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Marc Zyngier6d6ec202015-10-19 18:02:48 +01001/*
2 * Copyright (C) 2012-2015 - ARM Ltd
3 * Author: Marc Zyngier <marc.zyngier@arm.com>
4 *
5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License version 2 as
7 * published by the Free Software Foundation.
8 *
9 * This program is distributed in the hope that it will be useful,
10 * but WITHOUT ANY WARRANTY; without even the implied warranty of
11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
12 * GNU General Public License for more details.
13 *
14 * You should have received a copy of the GNU General Public License
15 * along with this program. If not, see <http://www.gnu.org/licenses/>.
16 */
17
18#include <linux/compiler.h>
19#include <linux/kvm_host.h>
20
Marc Zyngier9d8415d2015-10-25 19:57:11 +000021#include <asm/kvm_asm.h>
Marc Zyngier13720a52016-01-28 13:44:07 +000022#include <asm/kvm_hyp.h>
Marc Zyngier6d6ec202015-10-19 18:02:48 +010023
Marc Zyngierd1526e52015-10-28 13:59:46 +000024/* Yes, this does nothing, on purpose */
25static void __hyp_text __sysreg_do_nothing(struct kvm_cpu_context *ctxt) { }
26
Marc Zyngier9c6c3562015-10-28 12:39:38 +000027/*
28 * Non-VHE: Both host and guest must save everything.
29 *
30 * VHE: Host must save tpidr*_el[01], actlr_el1, sp0, pc, pstate, and
31 * guest must save everything.
32 */
33
34static void __hyp_text __sysreg_save_common_state(struct kvm_cpu_context *ctxt)
35{
36 ctxt->sys_regs[ACTLR_EL1] = read_sysreg(actlr_el1);
37 ctxt->sys_regs[TPIDR_EL0] = read_sysreg(tpidr_el0);
38 ctxt->sys_regs[TPIDRRO_EL0] = read_sysreg(tpidrro_el0);
39 ctxt->sys_regs[TPIDR_EL1] = read_sysreg(tpidr_el1);
40 ctxt->gp_regs.regs.sp = read_sysreg(sp_el0);
Marc Zyngier094f8232015-10-28 12:56:25 +000041 ctxt->gp_regs.regs.pc = read_sysreg_el2(elr);
42 ctxt->gp_regs.regs.pstate = read_sysreg_el2(spsr);
Marc Zyngier9c6c3562015-10-28 12:39:38 +000043}
44
Marc Zyngieredef5282015-10-28 12:17:35 +000045static void __hyp_text __sysreg_save_state(struct kvm_cpu_context *ctxt)
Marc Zyngier6d6ec202015-10-19 18:02:48 +010046{
47 ctxt->sys_regs[MPIDR_EL1] = read_sysreg(vmpidr_el2);
48 ctxt->sys_regs[CSSELR_EL1] = read_sysreg(csselr_el1);
Marc Zyngier094f8232015-10-28 12:56:25 +000049 ctxt->sys_regs[SCTLR_EL1] = read_sysreg_el1(sctlr);
50 ctxt->sys_regs[CPACR_EL1] = read_sysreg_el1(cpacr);
51 ctxt->sys_regs[TTBR0_EL1] = read_sysreg_el1(ttbr0);
52 ctxt->sys_regs[TTBR1_EL1] = read_sysreg_el1(ttbr1);
53 ctxt->sys_regs[TCR_EL1] = read_sysreg_el1(tcr);
54 ctxt->sys_regs[ESR_EL1] = read_sysreg_el1(esr);
55 ctxt->sys_regs[AFSR0_EL1] = read_sysreg_el1(afsr0);
56 ctxt->sys_regs[AFSR1_EL1] = read_sysreg_el1(afsr1);
57 ctxt->sys_regs[FAR_EL1] = read_sysreg_el1(far);
58 ctxt->sys_regs[MAIR_EL1] = read_sysreg_el1(mair);
59 ctxt->sys_regs[VBAR_EL1] = read_sysreg_el1(vbar);
60 ctxt->sys_regs[CONTEXTIDR_EL1] = read_sysreg_el1(contextidr);
61 ctxt->sys_regs[AMAIR_EL1] = read_sysreg_el1(amair);
62 ctxt->sys_regs[CNTKCTL_EL1] = read_sysreg_el1(cntkctl);
Marc Zyngier6d6ec202015-10-19 18:02:48 +010063 ctxt->sys_regs[PAR_EL1] = read_sysreg(par_el1);
64 ctxt->sys_regs[MDSCR_EL1] = read_sysreg(mdscr_el1);
65
Marc Zyngier6d6ec202015-10-19 18:02:48 +010066 ctxt->gp_regs.sp_el1 = read_sysreg(sp_el1);
Marc Zyngier094f8232015-10-28 12:56:25 +000067 ctxt->gp_regs.elr_el1 = read_sysreg_el1(elr);
68 ctxt->gp_regs.spsr[KVM_SPSR_EL1]= read_sysreg_el1(spsr);
Marc Zyngier6d6ec202015-10-19 18:02:48 +010069}
70
Marc Zyngierd1526e52015-10-28 13:59:46 +000071static hyp_alternate_select(__sysreg_call_save_host_state,
72 __sysreg_save_state, __sysreg_do_nothing,
73 ARM64_HAS_VIRT_HOST_EXTN);
74
Marc Zyngieredef5282015-10-28 12:17:35 +000075void __hyp_text __sysreg_save_host_state(struct kvm_cpu_context *ctxt)
76{
Marc Zyngierd1526e52015-10-28 13:59:46 +000077 __sysreg_call_save_host_state()(ctxt);
Marc Zyngier9c6c3562015-10-28 12:39:38 +000078 __sysreg_save_common_state(ctxt);
Marc Zyngieredef5282015-10-28 12:17:35 +000079}
80
81void __hyp_text __sysreg_save_guest_state(struct kvm_cpu_context *ctxt)
82{
83 __sysreg_save_state(ctxt);
Marc Zyngier9c6c3562015-10-28 12:39:38 +000084 __sysreg_save_common_state(ctxt);
85}
86
87static void __hyp_text __sysreg_restore_common_state(struct kvm_cpu_context *ctxt)
88{
89 write_sysreg(ctxt->sys_regs[ACTLR_EL1], actlr_el1);
90 write_sysreg(ctxt->sys_regs[TPIDR_EL0], tpidr_el0);
91 write_sysreg(ctxt->sys_regs[TPIDRRO_EL0], tpidrro_el0);
92 write_sysreg(ctxt->sys_regs[TPIDR_EL1], tpidr_el1);
93 write_sysreg(ctxt->gp_regs.regs.sp, sp_el0);
Marc Zyngier094f8232015-10-28 12:56:25 +000094 write_sysreg_el2(ctxt->gp_regs.regs.pc, elr);
95 write_sysreg_el2(ctxt->gp_regs.regs.pstate, spsr);
Marc Zyngieredef5282015-10-28 12:17:35 +000096}
97
98static void __hyp_text __sysreg_restore_state(struct kvm_cpu_context *ctxt)
Marc Zyngier6d6ec202015-10-19 18:02:48 +010099{
Marc Zyngier094f8232015-10-28 12:56:25 +0000100 write_sysreg(ctxt->sys_regs[MPIDR_EL1], vmpidr_el2);
101 write_sysreg(ctxt->sys_regs[CSSELR_EL1], csselr_el1);
102 write_sysreg_el1(ctxt->sys_regs[SCTLR_EL1], sctlr);
103 write_sysreg_el1(ctxt->sys_regs[CPACR_EL1], cpacr);
104 write_sysreg_el1(ctxt->sys_regs[TTBR0_EL1], ttbr0);
105 write_sysreg_el1(ctxt->sys_regs[TTBR1_EL1], ttbr1);
106 write_sysreg_el1(ctxt->sys_regs[TCR_EL1], tcr);
107 write_sysreg_el1(ctxt->sys_regs[ESR_EL1], esr);
108 write_sysreg_el1(ctxt->sys_regs[AFSR0_EL1], afsr0);
109 write_sysreg_el1(ctxt->sys_regs[AFSR1_EL1], afsr1);
110 write_sysreg_el1(ctxt->sys_regs[FAR_EL1], far);
111 write_sysreg_el1(ctxt->sys_regs[MAIR_EL1], mair);
112 write_sysreg_el1(ctxt->sys_regs[VBAR_EL1], vbar);
113 write_sysreg_el1(ctxt->sys_regs[CONTEXTIDR_EL1],contextidr);
114 write_sysreg_el1(ctxt->sys_regs[AMAIR_EL1], amair);
115 write_sysreg_el1(ctxt->sys_regs[CNTKCTL_EL1], cntkctl);
116 write_sysreg(ctxt->sys_regs[PAR_EL1], par_el1);
117 write_sysreg(ctxt->sys_regs[MDSCR_EL1], mdscr_el1);
Marc Zyngier6d6ec202015-10-19 18:02:48 +0100118
Marc Zyngier094f8232015-10-28 12:56:25 +0000119 write_sysreg(ctxt->gp_regs.sp_el1, sp_el1);
120 write_sysreg_el1(ctxt->gp_regs.elr_el1, elr);
121 write_sysreg_el1(ctxt->gp_regs.spsr[KVM_SPSR_EL1],spsr);
Marc Zyngier6d6ec202015-10-19 18:02:48 +0100122}
Marc Zyngierc209ec82015-10-19 19:28:29 +0100123
Marc Zyngierd1526e52015-10-28 13:59:46 +0000124static hyp_alternate_select(__sysreg_call_restore_host_state,
125 __sysreg_restore_state, __sysreg_do_nothing,
126 ARM64_HAS_VIRT_HOST_EXTN);
127
Marc Zyngieredef5282015-10-28 12:17:35 +0000128void __hyp_text __sysreg_restore_host_state(struct kvm_cpu_context *ctxt)
129{
Marc Zyngierd1526e52015-10-28 13:59:46 +0000130 __sysreg_call_restore_host_state()(ctxt);
Marc Zyngier9c6c3562015-10-28 12:39:38 +0000131 __sysreg_restore_common_state(ctxt);
Marc Zyngieredef5282015-10-28 12:17:35 +0000132}
133
134void __hyp_text __sysreg_restore_guest_state(struct kvm_cpu_context *ctxt)
135{
136 __sysreg_restore_state(ctxt);
Marc Zyngier9c6c3562015-10-28 12:39:38 +0000137 __sysreg_restore_common_state(ctxt);
Marc Zyngieredef5282015-10-28 12:17:35 +0000138}
139
Marc Zyngierc209ec82015-10-19 19:28:29 +0100140void __hyp_text __sysreg32_save_state(struct kvm_vcpu *vcpu)
141{
142 u64 *spsr, *sysreg;
143
144 if (read_sysreg(hcr_el2) & HCR_RW)
145 return;
146
147 spsr = vcpu->arch.ctxt.gp_regs.spsr;
148 sysreg = vcpu->arch.ctxt.sys_regs;
149
150 spsr[KVM_SPSR_ABT] = read_sysreg(spsr_abt);
151 spsr[KVM_SPSR_UND] = read_sysreg(spsr_und);
152 spsr[KVM_SPSR_IRQ] = read_sysreg(spsr_irq);
153 spsr[KVM_SPSR_FIQ] = read_sysreg(spsr_fiq);
154
155 sysreg[DACR32_EL2] = read_sysreg(dacr32_el2);
156 sysreg[IFSR32_EL2] = read_sysreg(ifsr32_el2);
157
Marc Zyngierc13d1682015-10-26 08:34:09 +0000158 if (__fpsimd_enabled())
Marc Zyngierc209ec82015-10-19 19:28:29 +0100159 sysreg[FPEXC32_EL2] = read_sysreg(fpexc32_el2);
160
161 if (vcpu->arch.debug_flags & KVM_ARM64_DEBUG_DIRTY)
162 sysreg[DBGVCR32_EL2] = read_sysreg(dbgvcr32_el2);
163}
164
165void __hyp_text __sysreg32_restore_state(struct kvm_vcpu *vcpu)
166{
167 u64 *spsr, *sysreg;
168
169 if (read_sysreg(hcr_el2) & HCR_RW)
170 return;
171
172 spsr = vcpu->arch.ctxt.gp_regs.spsr;
173 sysreg = vcpu->arch.ctxt.sys_regs;
174
175 write_sysreg(spsr[KVM_SPSR_ABT], spsr_abt);
176 write_sysreg(spsr[KVM_SPSR_UND], spsr_und);
177 write_sysreg(spsr[KVM_SPSR_IRQ], spsr_irq);
178 write_sysreg(spsr[KVM_SPSR_FIQ], spsr_fiq);
179
180 write_sysreg(sysreg[DACR32_EL2], dacr32_el2);
181 write_sysreg(sysreg[IFSR32_EL2], ifsr32_el2);
182
183 if (vcpu->arch.debug_flags & KVM_ARM64_DEBUG_DIRTY)
184 write_sysreg(sysreg[DBGVCR32_EL2], dbgvcr32_el2);
185}