blob: ad6bbe90616e2e026810deabffe71f90fafd2ab5 [file] [log] [blame]
Linus Torvalds1da177e2005-04-16 15:20:36 -07001/* linux/include/asm-arm/arch-s3c2410/nand.h
2 *
Ben Dooksf0560762006-12-17 19:59:20 +01003 * Copyright (c) 2004 Simtec Electronics
4 * Ben Dooks <ben@simtec.co.uk>
Linus Torvalds1da177e2005-04-16 15:20:36 -07005 *
6 * S3C2410 - NAND device controller platfrom_device info
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
Linus Torvalds1da177e2005-04-16 15:20:36 -070011*/
12
13/* struct s3c2410_nand_set
14 *
15 * define an set of one or more nand chips registered with an unique mtd
16 *
17 * nr_chips = number of chips in this set
18 * nr_partitions = number of partitions pointed to be partitoons (or zero)
19 * name = name of set (optional)
20 * nr_map = map for low-layer logical to physical chip numbers (option)
21 * partitions = mtd partition list
22*/
23
24struct s3c2410_nand_set {
Ben Dooks37e5ffa2008-04-15 11:36:22 +010025 unsigned int disable_ecc : 1;
26
Linus Torvalds1da177e2005-04-16 15:20:36 -070027 int nr_chips;
28 int nr_partitions;
29 char *name;
30 int *nr_map;
31 struct mtd_partition *partitions;
Ben Dooks1c21ab62008-04-15 11:36:21 +010032 struct nand_ecclayout *ecc_layout;
Linus Torvalds1da177e2005-04-16 15:20:36 -070033};
34
35struct s3c2410_platform_nand {
36 /* timing information for controller, all times in nanoseconds */
37
38 int tacls; /* time for active CLE/ALE to nWE/nOE */
39 int twrph0; /* active time for nWE/nOE */
40 int twrph1; /* time for release CLE/ALE from nWE/nOE inactive */
41
Ben Dooksc45c6c62008-04-15 11:36:20 +010042 unsigned int ignore_unset_ecc : 1;
43
Linus Torvalds1da177e2005-04-16 15:20:36 -070044 int nr_sets;
45 struct s3c2410_nand_set *sets;
46
47 void (*select_chip)(struct s3c2410_nand_set *,
48 int chip);
49};
50