blob: 50e4d159957634a8ee550302b80fd70569cbf79c [file] [log] [blame]
Kuninori Morimoto287c1292009-05-26 07:04:52 +00001/*
2 * linux/arch/sh/boards/se/7724/setup.c
3 *
4 * Copyright (C) 2009 Renesas Solutions Corp.
5 *
6 * Kuninori Morimoto <morimoto.kuninori@renesas.com>
7 *
8 * This file is subject to the terms and conditions of the GNU General Public
9 * License. See the file "COPYING" in the main directory of this archive
10 * for more details.
11 */
12
13#include <linux/init.h>
14#include <linux/device.h>
15#include <linux/interrupt.h>
16#include <linux/platform_device.h>
17#include <linux/mtd/physmap.h>
18#include <linux/delay.h>
19#include <linux/smc91x.h>
20#include <linux/gpio.h>
21#include <linux/input.h>
Magnus Dammfc1d0032009-11-27 07:32:24 +000022#include <linux/input/sh_keysc.h>
Magnus Damm9731f4a2009-07-03 09:40:03 +000023#include <linux/usb/r8a66597.h>
Kuninori Morimoto287c1292009-05-26 07:04:52 +000024#include <video/sh_mobile_lcdc.h>
25#include <media/sh_mobile_ceu.h>
Kuninori Morimoto3e9ad522009-08-21 01:24:54 +000026#include <sound/sh_fsi.h>
Kuninori Morimoto287c1292009-05-26 07:04:52 +000027#include <asm/io.h>
28#include <asm/heartbeat.h>
Kuninori Morimotoa80cad92009-06-26 07:05:39 +000029#include <asm/sh_eth.h>
30#include <asm/clock.h>
Magnus Damm3b9f2952009-10-29 10:52:23 +000031#include <asm/suspend.h>
Kuninori Morimoto287c1292009-05-26 07:04:52 +000032#include <cpu/sh7724.h>
33#include <mach-se/mach/se7724.h>
34
35/*
36 * SWx 1234 5678
37 * ------------------------------------
38 * SW31 : 1001 1100 : default
39 * SW32 : 0111 1111 : use on board flash
40 *
41 * SW41 : abxx xxxx -> a = 0 : Analog monitor
42 * 1 : Digital monitor
43 * b = 0 : VGA
Kuninori Morimoto4f324312009-08-03 04:52:03 +000044 * 1 : 720p
45 */
46
47/*
48 * about 720p
49 *
50 * When you use 1280 x 720 lcdc output,
51 * you should change OSC6 lcdc clock from 25.175MHz to 74.25MHz,
52 * and change SW41 to use 720p
Kuninori Morimoto287c1292009-05-26 07:04:52 +000053 */
54
55/* Heartbeat */
Paul Mundta09d2832010-01-15 12:24:34 +090056static struct resource heartbeat_resource = {
57 .start = PA_LED,
58 .end = PA_LED,
59 .flags = IORESOURCE_MEM | IORESOURCE_MEM_16BIT,
Kuninori Morimoto287c1292009-05-26 07:04:52 +000060};
61
62static struct platform_device heartbeat_device = {
63 .name = "heartbeat",
64 .id = -1,
Paul Mundta09d2832010-01-15 12:24:34 +090065 .num_resources = 1,
66 .resource = &heartbeat_resource,
Kuninori Morimoto287c1292009-05-26 07:04:52 +000067};
68
69/* LAN91C111 */
70static struct smc91x_platdata smc91x_info = {
71 .flags = SMC91X_USE_16BIT | SMC91X_NOWAIT,
72};
73
74static struct resource smc91x_eth_resources[] = {
75 [0] = {
76 .name = "SMC91C111" ,
77 .start = 0x1a300300,
78 .end = 0x1a30030f,
79 .flags = IORESOURCE_MEM,
80 },
81 [1] = {
82 .start = IRQ0_SMC,
83 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
84 },
85};
86
87static struct platform_device smc91x_eth_device = {
88 .name = "smc91x",
89 .num_resources = ARRAY_SIZE(smc91x_eth_resources),
90 .resource = smc91x_eth_resources,
91 .dev = {
92 .platform_data = &smc91x_info,
93 },
94};
95
96/* MTD */
97static struct mtd_partition nor_flash_partitions[] = {
98 {
99 .name = "uboot",
100 .offset = 0,
101 .size = (1 * 1024 * 1024),
102 .mask_flags = MTD_WRITEABLE, /* Read-only */
103 }, {
104 .name = "kernel",
105 .offset = MTDPART_OFS_APPEND,
106 .size = (2 * 1024 * 1024),
107 }, {
108 .name = "free-area",
109 .offset = MTDPART_OFS_APPEND,
110 .size = MTDPART_SIZ_FULL,
111 },
112};
113
114static struct physmap_flash_data nor_flash_data = {
115 .width = 2,
116 .parts = nor_flash_partitions,
117 .nr_parts = ARRAY_SIZE(nor_flash_partitions),
118};
119
120static struct resource nor_flash_resources[] = {
121 [0] = {
122 .name = "NOR Flash",
123 .start = 0x00000000,
124 .end = 0x01ffffff,
125 .flags = IORESOURCE_MEM,
126 }
127};
128
129static struct platform_device nor_flash_device = {
130 .name = "physmap-flash",
131 .resource = nor_flash_resources,
132 .num_resources = ARRAY_SIZE(nor_flash_resources),
133 .dev = {
134 .platform_data = &nor_flash_data,
135 },
136};
137
138/* LCDC */
139static struct sh_mobile_lcdc_info lcdc_info = {
140 .clock_source = LCDC_CLK_EXTERNAL,
141 .ch[0] = {
142 .chan = LCDC_CHAN_MAINLCD,
143 .bpp = 16,
144 .clock_divider = 1,
145 .lcd_cfg = {
146 .name = "LB070WV1",
147 .sync = 0, /* hsync and vsync are active low */
148 },
149 .lcd_size_cfg = { /* 7.0 inch */
150 .width = 152,
151 .height = 91,
152 },
153 .board_cfg = {
154 },
155 }
156};
157
158static struct resource lcdc_resources[] = {
159 [0] = {
160 .name = "LCDC",
161 .start = 0xfe940000,
Phil Edworthya6f15ad2009-09-15 12:00:30 +0000162 .end = 0xfe942fff,
Kuninori Morimoto287c1292009-05-26 07:04:52 +0000163 .flags = IORESOURCE_MEM,
164 },
165 [1] = {
166 .start = 106,
167 .flags = IORESOURCE_IRQ,
168 },
169};
170
171static struct platform_device lcdc_device = {
172 .name = "sh_mobile_lcdc_fb",
173 .num_resources = ARRAY_SIZE(lcdc_resources),
174 .resource = lcdc_resources,
175 .dev = {
176 .platform_data = &lcdc_info,
177 },
Magnus Dammdf47cd02009-07-31 07:48:29 +0000178 .archdata = {
179 .hwblk_id = HWBLK_LCDC,
180 },
Kuninori Morimoto287c1292009-05-26 07:04:52 +0000181};
182
183/* CEU0 */
184static struct sh_mobile_ceu_info sh_mobile_ceu0_info = {
185 .flags = SH_CEU_FLAG_USE_8BIT_BUS,
186};
187
188static struct resource ceu0_resources[] = {
189 [0] = {
190 .name = "CEU0",
191 .start = 0xfe910000,
192 .end = 0xfe91009f,
193 .flags = IORESOURCE_MEM,
194 },
195 [1] = {
196 .start = 52,
197 .flags = IORESOURCE_IRQ,
198 },
199 [2] = {
200 /* place holder for contiguous memory */
201 },
202};
203
204static struct platform_device ceu0_device = {
205 .name = "sh_mobile_ceu",
206 .id = 0, /* "ceu0" clock */
207 .num_resources = ARRAY_SIZE(ceu0_resources),
208 .resource = ceu0_resources,
209 .dev = {
210 .platform_data = &sh_mobile_ceu0_info,
211 },
Magnus Dammdf47cd02009-07-31 07:48:29 +0000212 .archdata = {
213 .hwblk_id = HWBLK_CEU0,
214 },
Kuninori Morimoto287c1292009-05-26 07:04:52 +0000215};
216
217/* CEU1 */
218static struct sh_mobile_ceu_info sh_mobile_ceu1_info = {
219 .flags = SH_CEU_FLAG_USE_8BIT_BUS,
220};
221
222static struct resource ceu1_resources[] = {
223 [0] = {
224 .name = "CEU1",
225 .start = 0xfe914000,
226 .end = 0xfe91409f,
227 .flags = IORESOURCE_MEM,
228 },
229 [1] = {
230 .start = 63,
231 .flags = IORESOURCE_IRQ,
232 },
233 [2] = {
234 /* place holder for contiguous memory */
235 },
236};
237
238static struct platform_device ceu1_device = {
239 .name = "sh_mobile_ceu",
240 .id = 1, /* "ceu1" clock */
241 .num_resources = ARRAY_SIZE(ceu1_resources),
242 .resource = ceu1_resources,
243 .dev = {
244 .platform_data = &sh_mobile_ceu1_info,
245 },
Magnus Dammdf47cd02009-07-31 07:48:29 +0000246 .archdata = {
247 .hwblk_id = HWBLK_CEU1,
248 },
Kuninori Morimoto287c1292009-05-26 07:04:52 +0000249};
250
Kuninori Morimoto3e9ad522009-08-21 01:24:54 +0000251/* FSI */
252/*
253 * FSI-A use external clock which came from ak464x.
254 * So, we should change parent of fsi
255 */
256#define FCLKACR 0xa4150008
257static void fsimck_init(struct clk *clk)
258{
Paul Mundt9d56dd32010-01-26 12:58:40 +0900259 u32 status = __raw_readl(clk->enable_reg);
Kuninori Morimoto3e9ad522009-08-21 01:24:54 +0000260
261 /* use external clock */
262 status &= ~0x000000ff;
263 status |= 0x00000080;
Paul Mundt9d56dd32010-01-26 12:58:40 +0900264 __raw_writel(status, clk->enable_reg);
Kuninori Morimoto3e9ad522009-08-21 01:24:54 +0000265}
266
267static struct clk_ops fsimck_clk_ops = {
268 .init = fsimck_init,
269};
270
271static struct clk fsimcka_clk = {
272 .name = "fsimcka_clk",
273 .id = -1,
274 .ops = &fsimck_clk_ops,
275 .enable_reg = (void __iomem *)FCLKACR,
276 .rate = 0, /* unknown */
277};
278
279struct sh_fsi_platform_info fsi_info = {
280 .porta_flags = SH_FSI_BRS_INV |
281 SH_FSI_OUT_SLAVE_MODE |
282 SH_FSI_IN_SLAVE_MODE |
283 SH_FSI_OFMT(PCM) |
284 SH_FSI_IFMT(PCM),
285};
286
287static struct resource fsi_resources[] = {
288 [0] = {
289 .name = "FSI",
290 .start = 0xFE3C0000,
291 .end = 0xFE3C021d,
292 .flags = IORESOURCE_MEM,
293 },
294 [1] = {
295 .start = 108,
296 .flags = IORESOURCE_IRQ,
297 },
298};
299
300static struct platform_device fsi_device = {
301 .name = "sh_fsi",
302 .id = 0,
303 .num_resources = ARRAY_SIZE(fsi_resources),
304 .resource = fsi_resources,
305 .dev = {
306 .platform_data = &fsi_info,
307 },
Kuninori Morimotod53bd802009-11-09 11:12:49 +0900308 .archdata = {
309 .hwblk_id = HWBLK_SPU, /* FSI needs SPU hwblk */
310 },
Kuninori Morimoto3e9ad522009-08-21 01:24:54 +0000311};
312
Magnus Damm9747e782009-08-15 02:53:34 +0000313/* KEYSC in SoC (Needs SW33-2 set to ON) */
Kuninori Morimoto287c1292009-05-26 07:04:52 +0000314static struct sh_keysc_info keysc_info = {
315 .mode = SH_KEYSC_MODE_1,
316 .scan_timing = 10,
317 .delay = 50,
318 .keycodes = {
319 KEY_1, KEY_2, KEY_3, KEY_4, KEY_5,
320 KEY_6, KEY_7, KEY_8, KEY_9, KEY_A,
321 KEY_B, KEY_C, KEY_D, KEY_E, KEY_F,
322 KEY_G, KEY_H, KEY_I, KEY_K, KEY_L,
323 KEY_M, KEY_N, KEY_O, KEY_P, KEY_Q,
324 KEY_R, KEY_S, KEY_T, KEY_U, KEY_V,
325 },
326};
327
328static struct resource keysc_resources[] = {
329 [0] = {
Magnus Damm9747e782009-08-15 02:53:34 +0000330 .name = "KEYSC",
331 .start = 0x044b0000,
332 .end = 0x044b000f,
Kuninori Morimoto287c1292009-05-26 07:04:52 +0000333 .flags = IORESOURCE_MEM,
334 },
335 [1] = {
Magnus Damm9747e782009-08-15 02:53:34 +0000336 .start = 79,
Kuninori Morimoto287c1292009-05-26 07:04:52 +0000337 .flags = IORESOURCE_IRQ,
338 },
339};
340
341static struct platform_device keysc_device = {
342 .name = "sh_keysc",
343 .id = 0, /* "keysc0" clock */
344 .num_resources = ARRAY_SIZE(keysc_resources),
345 .resource = keysc_resources,
346 .dev = {
347 .platform_data = &keysc_info,
348 },
Magnus Dammdf47cd02009-07-31 07:48:29 +0000349 .archdata = {
350 .hwblk_id = HWBLK_KEYSC,
351 },
Kuninori Morimoto287c1292009-05-26 07:04:52 +0000352};
353
Kuninori Morimotoa80cad92009-06-26 07:05:39 +0000354/* SH Eth */
355static struct resource sh_eth_resources[] = {
356 [0] = {
357 .start = SH_ETH_ADDR,
358 .end = SH_ETH_ADDR + 0x1FC,
359 .flags = IORESOURCE_MEM,
360 },
361 [1] = {
362 .start = 91,
363 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
364 },
365};
366
367struct sh_eth_plat_data sh_eth_plat = {
368 .phy = 0x1f, /* SMSC LAN8187 */
369 .edmac_endian = EDMAC_LITTLE_ENDIAN,
370};
371
372static struct platform_device sh_eth_device = {
373 .name = "sh-eth",
374 .id = 0,
375 .dev = {
376 .platform_data = &sh_eth_plat,
377 },
378 .num_resources = ARRAY_SIZE(sh_eth_resources),
379 .resource = sh_eth_resources,
Magnus Dammdf47cd02009-07-31 07:48:29 +0000380 .archdata = {
381 .hwblk_id = HWBLK_ETHER,
382 },
Kuninori Morimotoa80cad92009-06-26 07:05:39 +0000383};
384
Magnus Damm9731f4a2009-07-03 09:40:03 +0000385static struct r8a66597_platdata sh7724_usb0_host_data = {
Magnus Damm719a72b2009-07-17 14:59:55 +0000386 .on_chip = 1,
Magnus Damm9731f4a2009-07-03 09:40:03 +0000387};
388
389static struct resource sh7724_usb0_host_resources[] = {
390 [0] = {
391 .start = 0xa4d80000,
Kuninori Morimoto1bc265d02009-08-19 00:12:15 +0000392 .end = 0xa4d80124 - 1,
Magnus Damm9731f4a2009-07-03 09:40:03 +0000393 .flags = IORESOURCE_MEM,
394 },
395 [1] = {
396 .start = 65,
397 .end = 65,
398 .flags = IORESOURCE_IRQ | IRQF_TRIGGER_LOW,
399 },
400};
401
402static struct platform_device sh7724_usb0_host_device = {
403 .name = "r8a66597_hcd",
404 .id = 0,
405 .dev = {
406 .dma_mask = NULL, /* not use dma */
407 .coherent_dma_mask = 0xffffffff,
408 .platform_data = &sh7724_usb0_host_data,
409 },
410 .num_resources = ARRAY_SIZE(sh7724_usb0_host_resources),
411 .resource = sh7724_usb0_host_resources,
Magnus Dammdf47cd02009-07-31 07:48:29 +0000412 .archdata = {
413 .hwblk_id = HWBLK_USB0,
414 },
Magnus Damm9731f4a2009-07-03 09:40:03 +0000415};
416
Magnus Dammf8f8c072009-08-19 09:52:02 +0000417static struct r8a66597_platdata sh7724_usb1_gadget_data = {
418 .on_chip = 1,
419};
420
421static struct resource sh7724_usb1_gadget_resources[] = {
422 [0] = {
423 .start = 0xa4d90000,
424 .end = 0xa4d90123,
425 .flags = IORESOURCE_MEM,
426 },
427 [1] = {
428 .start = 66,
429 .end = 66,
430 .flags = IORESOURCE_IRQ | IRQF_TRIGGER_LOW,
431 },
432};
433
434static struct platform_device sh7724_usb1_gadget_device = {
435 .name = "r8a66597_udc",
436 .id = 1, /* USB1 */
437 .dev = {
438 .dma_mask = NULL, /* not use dma */
439 .coherent_dma_mask = 0xffffffff,
440 .platform_data = &sh7724_usb1_gadget_data,
441 },
442 .num_resources = ARRAY_SIZE(sh7724_usb1_gadget_resources),
443 .resource = sh7724_usb1_gadget_resources,
444};
445
Magnus Damm0f79af62009-10-02 02:23:07 +0000446static struct resource sdhi0_cn7_resources[] = {
447 [0] = {
448 .name = "SDHI0",
449 .start = 0x04ce0000,
450 .end = 0x04ce01ff,
451 .flags = IORESOURCE_MEM,
452 },
453 [1] = {
Magnus Damm3844ead2010-02-09 06:50:04 +0000454 .start = 100,
Magnus Damm0f79af62009-10-02 02:23:07 +0000455 .flags = IORESOURCE_IRQ,
456 },
457};
458
459static struct platform_device sdhi0_cn7_device = {
460 .name = "sh_mobile_sdhi",
Magnus Damm5b380ec2009-10-27 10:49:55 +0000461 .id = 0,
Magnus Damm0f79af62009-10-02 02:23:07 +0000462 .num_resources = ARRAY_SIZE(sdhi0_cn7_resources),
463 .resource = sdhi0_cn7_resources,
464 .archdata = {
465 .hwblk_id = HWBLK_SDHI0,
466 },
467};
468
Magnus Damm5b380ec2009-10-27 10:49:55 +0000469static struct resource sdhi1_cn8_resources[] = {
470 [0] = {
471 .name = "SDHI1",
472 .start = 0x04cf0000,
473 .end = 0x04cf01ff,
474 .flags = IORESOURCE_MEM,
475 },
476 [1] = {
Magnus Damm3844ead2010-02-09 06:50:04 +0000477 .start = 23,
Magnus Damm5b380ec2009-10-27 10:49:55 +0000478 .flags = IORESOURCE_IRQ,
479 },
480};
481
482static struct platform_device sdhi1_cn8_device = {
483 .name = "sh_mobile_sdhi",
484 .id = 1,
485 .num_resources = ARRAY_SIZE(sdhi1_cn8_resources),
486 .resource = sdhi1_cn8_resources,
487 .archdata = {
488 .hwblk_id = HWBLK_SDHI1,
489 },
490};
491
Kuninori Morimoto287c1292009-05-26 07:04:52 +0000492static struct platform_device *ms7724se_devices[] __initdata = {
493 &heartbeat_device,
494 &smc91x_eth_device,
495 &lcdc_device,
496 &nor_flash_device,
497 &ceu0_device,
498 &ceu1_device,
499 &keysc_device,
Kuninori Morimotoa80cad92009-06-26 07:05:39 +0000500 &sh_eth_device,
Magnus Damm9731f4a2009-07-03 09:40:03 +0000501 &sh7724_usb0_host_device,
Magnus Dammf8f8c072009-08-19 09:52:02 +0000502 &sh7724_usb1_gadget_device,
Kuninori Morimoto3e9ad522009-08-21 01:24:54 +0000503 &fsi_device,
Magnus Damm0f79af62009-10-02 02:23:07 +0000504 &sdhi0_cn7_device,
Magnus Damm5b380ec2009-10-27 10:49:55 +0000505 &sdhi1_cn8_device,
Kuninori Morimoto287c1292009-05-26 07:04:52 +0000506};
507
Kuninori Morimoto9f815a12009-12-15 00:27:57 +0000508/* I2C device */
509static struct i2c_board_info i2c0_devices[] = {
510 {
511 I2C_BOARD_INFO("ak4642", 0x12),
512 },
513};
514
Kuninori Morimotoa80cad92009-06-26 07:05:39 +0000515#define EEPROM_OP 0xBA206000
516#define EEPROM_ADR 0xBA206004
517#define EEPROM_DATA 0xBA20600C
518#define EEPROM_STAT 0xBA206010
519#define EEPROM_STRT 0xBA206014
520static int __init sh_eth_is_eeprom_ready(void)
521{
522 int t = 10000;
523
524 while (t--) {
Paul Mundt9d56dd32010-01-26 12:58:40 +0900525 if (!__raw_readw(EEPROM_STAT))
Kuninori Morimotoa80cad92009-06-26 07:05:39 +0000526 return 1;
Kuninori Morimotoc718aff2009-12-24 08:31:44 +0000527 udelay(1);
Kuninori Morimotoa80cad92009-06-26 07:05:39 +0000528 }
529
530 printk(KERN_ERR "ms7724se can not access to eeprom\n");
531 return 0;
532}
533
534static void __init sh_eth_init(void)
535{
536 int i;
Magnus Damm8013cc92009-10-27 10:47:34 +0000537 u16 mac;
Kuninori Morimotoa80cad92009-06-26 07:05:39 +0000538
539 /* check EEPROM status */
540 if (!sh_eth_is_eeprom_ready())
541 return;
542
543 /* read MAC addr from EEPROM */
544 for (i = 0 ; i < 3 ; i++) {
Paul Mundt9d56dd32010-01-26 12:58:40 +0900545 __raw_writew(0x0, EEPROM_OP); /* read */
546 __raw_writew(i*2, EEPROM_ADR);
547 __raw_writew(0x1, EEPROM_STRT);
Kuninori Morimotoa80cad92009-06-26 07:05:39 +0000548 if (!sh_eth_is_eeprom_ready())
549 return;
550
Paul Mundt9d56dd32010-01-26 12:58:40 +0900551 mac = __raw_readw(EEPROM_DATA);
Magnus Damm8013cc92009-10-27 10:47:34 +0000552 sh_eth_plat.mac_addr[i << 1] = mac & 0xff;
553 sh_eth_plat.mac_addr[(i << 1) + 1] = mac >> 8;
Kuninori Morimotoa80cad92009-06-26 07:05:39 +0000554 }
Kuninori Morimotoa80cad92009-06-26 07:05:39 +0000555}
556
Kuninori Morimoto287c1292009-05-26 07:04:52 +0000557#define SW4140 0xBA201000
558#define FPGA_OUT 0xBA200400
559#define PORT_HIZA 0xA4050158
Magnus Damm9731f4a2009-07-03 09:40:03 +0000560#define PORT_MSELCRB 0xA4050182
Kuninori Morimoto287c1292009-05-26 07:04:52 +0000561
562#define SW41_A 0x0100
563#define SW41_B 0x0200
564#define SW41_C 0x0400
565#define SW41_D 0x0800
566#define SW41_E 0x1000
567#define SW41_F 0x2000
568#define SW41_G 0x4000
569#define SW41_H 0x8000
Magnus Damm9731f4a2009-07-03 09:40:03 +0000570
Magnus Damm3b9f2952009-10-29 10:52:23 +0000571extern char ms7724se_sdram_enter_start;
572extern char ms7724se_sdram_enter_end;
573extern char ms7724se_sdram_leave_start;
574extern char ms7724se_sdram_leave_end;
575
Kuninori Morimoto9f815a12009-12-15 00:27:57 +0000576
577static int __init arch_setup(void)
578{
579 /* enable I2C device */
580 i2c_register_board_info(0, i2c0_devices,
581 ARRAY_SIZE(i2c0_devices));
582 return 0;
583}
584arch_initcall(arch_setup);
585
Kuninori Morimoto287c1292009-05-26 07:04:52 +0000586static int __init devices_setup(void)
587{
Paul Mundt9d56dd32010-01-26 12:58:40 +0900588 u16 sw = __raw_readw(SW4140); /* select camera, monitor */
Kuninori Morimoto3e9ad522009-08-21 01:24:54 +0000589 struct clk *fsia_clk;
Kuninori Morimoto287c1292009-05-26 07:04:52 +0000590
Magnus Damm3b9f2952009-10-29 10:52:23 +0000591 /* register board specific self-refresh code */
592 sh_mobile_register_self_refresh(SUSP_SH_STANDBY | SUSP_SH_SF,
593 &ms7724se_sdram_enter_start,
594 &ms7724se_sdram_enter_end,
595 &ms7724se_sdram_leave_start,
596 &ms7724se_sdram_leave_end);
Kuninori Morimoto287c1292009-05-26 07:04:52 +0000597 /* Reset Release */
Paul Mundt9d56dd32010-01-26 12:58:40 +0900598 __raw_writew(__raw_readw(FPGA_OUT) &
Kuninori Morimoto287c1292009-05-26 07:04:52 +0000599 ~((1 << 1) | /* LAN */
600 (1 << 6) | /* VIDEO DAC */
Kuninori Morimoto3e9ad522009-08-21 01:24:54 +0000601 (1 << 7) | /* AK4643 */
Kuninori Morimotoa80cad92009-06-26 07:05:39 +0000602 (1 << 12) | /* USB0 */
603 (1 << 14)), /* RMII */
Kuninori Morimoto287c1292009-05-26 07:04:52 +0000604 FPGA_OUT);
605
Magnus Damm9731f4a2009-07-03 09:40:03 +0000606 /* turn on USB clocks, use external clock */
Paul Mundt9d56dd32010-01-26 12:58:40 +0900607 __raw_writew((__raw_readw(PORT_MSELCRB) & ~0xc000) | 0x8000, PORT_MSELCRB);
Magnus Damm9731f4a2009-07-03 09:40:03 +0000608
Magnus Damm7766e162009-08-06 15:03:43 +0000609#ifdef CONFIG_PM
610 /* Let LED9 show STATUS2 */
611 gpio_request(GPIO_FN_STATUS2, NULL);
612
613 /* Lit LED10 show STATUS0 */
614 gpio_request(GPIO_FN_STATUS0, NULL);
615
616 /* Lit LED11 show PDSTATUS */
617 gpio_request(GPIO_FN_PDSTATUS, NULL);
618#else
619 /* Lit LED9 */
620 gpio_request(GPIO_PTJ6, NULL);
621 gpio_direction_output(GPIO_PTJ6, 1);
622 gpio_export(GPIO_PTJ6, 0);
623
624 /* Lit LED10 */
625 gpio_request(GPIO_PTJ5, NULL);
626 gpio_direction_output(GPIO_PTJ5, 1);
627 gpio_export(GPIO_PTJ5, 0);
628
629 /* Lit LED11 */
630 gpio_request(GPIO_PTJ7, NULL);
631 gpio_direction_output(GPIO_PTJ7, 1);
632 gpio_export(GPIO_PTJ7, 0);
633#endif
634
Magnus Damm9731f4a2009-07-03 09:40:03 +0000635 /* enable USB0 port */
Paul Mundt9d56dd32010-01-26 12:58:40 +0900636 __raw_writew(0x0600, 0xa40501d4);
Magnus Damm9731f4a2009-07-03 09:40:03 +0000637
Magnus Dammf8f8c072009-08-19 09:52:02 +0000638 /* enable USB1 port */
Paul Mundt9d56dd32010-01-26 12:58:40 +0900639 __raw_writew(0x0600, 0xa4050192);
Magnus Dammf8f8c072009-08-19 09:52:02 +0000640
Kuninori Morimoto287c1292009-05-26 07:04:52 +0000641 /* enable IRQ 0,1,2 */
642 gpio_request(GPIO_FN_INTC_IRQ0, NULL);
643 gpio_request(GPIO_FN_INTC_IRQ1, NULL);
644 gpio_request(GPIO_FN_INTC_IRQ2, NULL);
645
646 /* enable SCIFA3 */
647 gpio_request(GPIO_FN_SCIF3_I_SCK, NULL);
648 gpio_request(GPIO_FN_SCIF3_I_RXD, NULL);
649 gpio_request(GPIO_FN_SCIF3_I_TXD, NULL);
650 gpio_request(GPIO_FN_SCIF3_I_CTS, NULL);
651 gpio_request(GPIO_FN_SCIF3_I_RTS, NULL);
652
653 /* enable LCDC */
654 gpio_request(GPIO_FN_LCDD23, NULL);
655 gpio_request(GPIO_FN_LCDD22, NULL);
656 gpio_request(GPIO_FN_LCDD21, NULL);
657 gpio_request(GPIO_FN_LCDD20, NULL);
658 gpio_request(GPIO_FN_LCDD19, NULL);
659 gpio_request(GPIO_FN_LCDD18, NULL);
660 gpio_request(GPIO_FN_LCDD17, NULL);
661 gpio_request(GPIO_FN_LCDD16, NULL);
662 gpio_request(GPIO_FN_LCDD15, NULL);
663 gpio_request(GPIO_FN_LCDD14, NULL);
664 gpio_request(GPIO_FN_LCDD13, NULL);
665 gpio_request(GPIO_FN_LCDD12, NULL);
666 gpio_request(GPIO_FN_LCDD11, NULL);
667 gpio_request(GPIO_FN_LCDD10, NULL);
668 gpio_request(GPIO_FN_LCDD9, NULL);
669 gpio_request(GPIO_FN_LCDD8, NULL);
670 gpio_request(GPIO_FN_LCDD7, NULL);
671 gpio_request(GPIO_FN_LCDD6, NULL);
672 gpio_request(GPIO_FN_LCDD5, NULL);
673 gpio_request(GPIO_FN_LCDD4, NULL);
674 gpio_request(GPIO_FN_LCDD3, NULL);
675 gpio_request(GPIO_FN_LCDD2, NULL);
676 gpio_request(GPIO_FN_LCDD1, NULL);
677 gpio_request(GPIO_FN_LCDD0, NULL);
678 gpio_request(GPIO_FN_LCDDISP, NULL);
679 gpio_request(GPIO_FN_LCDHSYN, NULL);
680 gpio_request(GPIO_FN_LCDDCK, NULL);
681 gpio_request(GPIO_FN_LCDVSYN, NULL);
682 gpio_request(GPIO_FN_LCDDON, NULL);
683 gpio_request(GPIO_FN_LCDVEPWC, NULL);
684 gpio_request(GPIO_FN_LCDVCPWC, NULL);
685 gpio_request(GPIO_FN_LCDRD, NULL);
686 gpio_request(GPIO_FN_LCDLCLK, NULL);
Paul Mundt9d56dd32010-01-26 12:58:40 +0900687 __raw_writew((__raw_readw(PORT_HIZA) & ~0x0001), PORT_HIZA);
Kuninori Morimoto287c1292009-05-26 07:04:52 +0000688
689 /* enable CEU0 */
690 gpio_request(GPIO_FN_VIO0_D15, NULL);
691 gpio_request(GPIO_FN_VIO0_D14, NULL);
692 gpio_request(GPIO_FN_VIO0_D13, NULL);
693 gpio_request(GPIO_FN_VIO0_D12, NULL);
694 gpio_request(GPIO_FN_VIO0_D11, NULL);
695 gpio_request(GPIO_FN_VIO0_D10, NULL);
696 gpio_request(GPIO_FN_VIO0_D9, NULL);
697 gpio_request(GPIO_FN_VIO0_D8, NULL);
698 gpio_request(GPIO_FN_VIO0_D7, NULL);
699 gpio_request(GPIO_FN_VIO0_D6, NULL);
700 gpio_request(GPIO_FN_VIO0_D5, NULL);
701 gpio_request(GPIO_FN_VIO0_D4, NULL);
702 gpio_request(GPIO_FN_VIO0_D3, NULL);
703 gpio_request(GPIO_FN_VIO0_D2, NULL);
704 gpio_request(GPIO_FN_VIO0_D1, NULL);
705 gpio_request(GPIO_FN_VIO0_D0, NULL);
706 gpio_request(GPIO_FN_VIO0_VD, NULL);
707 gpio_request(GPIO_FN_VIO0_CLK, NULL);
708 gpio_request(GPIO_FN_VIO0_FLD, NULL);
709 gpio_request(GPIO_FN_VIO0_HD, NULL);
Magnus Damm84f75972009-07-01 04:55:35 +0000710 platform_resource_setup_memory(&ceu0_device, "ceu0", 4 << 20);
Kuninori Morimoto287c1292009-05-26 07:04:52 +0000711
712 /* enable CEU1 */
713 gpio_request(GPIO_FN_VIO1_D7, NULL);
714 gpio_request(GPIO_FN_VIO1_D6, NULL);
715 gpio_request(GPIO_FN_VIO1_D5, NULL);
716 gpio_request(GPIO_FN_VIO1_D4, NULL);
717 gpio_request(GPIO_FN_VIO1_D3, NULL);
718 gpio_request(GPIO_FN_VIO1_D2, NULL);
719 gpio_request(GPIO_FN_VIO1_D1, NULL);
720 gpio_request(GPIO_FN_VIO1_D0, NULL);
721 gpio_request(GPIO_FN_VIO1_FLD, NULL);
722 gpio_request(GPIO_FN_VIO1_HD, NULL);
723 gpio_request(GPIO_FN_VIO1_VD, NULL);
724 gpio_request(GPIO_FN_VIO1_CLK, NULL);
Magnus Damm84f75972009-07-01 04:55:35 +0000725 platform_resource_setup_memory(&ceu1_device, "ceu1", 4 << 20);
Kuninori Morimoto287c1292009-05-26 07:04:52 +0000726
727 /* KEYSC */
728 gpio_request(GPIO_FN_KEYOUT5_IN5, NULL);
729 gpio_request(GPIO_FN_KEYOUT4_IN6, NULL);
730 gpio_request(GPIO_FN_KEYIN4, NULL);
731 gpio_request(GPIO_FN_KEYIN3, NULL);
732 gpio_request(GPIO_FN_KEYIN2, NULL);
733 gpio_request(GPIO_FN_KEYIN1, NULL);
734 gpio_request(GPIO_FN_KEYIN0, NULL);
735 gpio_request(GPIO_FN_KEYOUT3, NULL);
736 gpio_request(GPIO_FN_KEYOUT2, NULL);
737 gpio_request(GPIO_FN_KEYOUT1, NULL);
738 gpio_request(GPIO_FN_KEYOUT0, NULL);
739
Kuninori Morimoto3e9ad522009-08-21 01:24:54 +0000740 /* enable FSI */
741 gpio_request(GPIO_FN_FSIMCKB, NULL);
742 gpio_request(GPIO_FN_FSIMCKA, NULL);
743 gpio_request(GPIO_FN_FSIOASD, NULL);
744 gpio_request(GPIO_FN_FSIIABCK, NULL);
745 gpio_request(GPIO_FN_FSIIALRCK, NULL);
746 gpio_request(GPIO_FN_FSIOABCK, NULL);
747 gpio_request(GPIO_FN_FSIOALRCK, NULL);
748 gpio_request(GPIO_FN_CLKAUDIOAO, NULL);
749 gpio_request(GPIO_FN_FSIIBSD, NULL);
750 gpio_request(GPIO_FN_FSIOBSD, NULL);
751 gpio_request(GPIO_FN_FSIIBBCK, NULL);
752 gpio_request(GPIO_FN_FSIIBLRCK, NULL);
753 gpio_request(GPIO_FN_FSIOBBCK, NULL);
754 gpio_request(GPIO_FN_FSIOBLRCK, NULL);
755 gpio_request(GPIO_FN_CLKAUDIOBO, NULL);
756 gpio_request(GPIO_FN_FSIIASD, NULL);
757
758 /* change parent of FSI A */
759 fsia_clk = clk_get(NULL, "fsia_clk");
760 clk_register(&fsimcka_clk);
761 clk_set_parent(fsia_clk, &fsimcka_clk);
762 clk_set_rate(fsia_clk, 11000);
763 clk_set_rate(&fsimcka_clk, 11000);
764 clk_put(fsia_clk);
765
Magnus Damm0f79af62009-10-02 02:23:07 +0000766 /* SDHI0 connected to cn7 */
767 gpio_request(GPIO_FN_SDHI0CD, NULL);
768 gpio_request(GPIO_FN_SDHI0WP, NULL);
769 gpio_request(GPIO_FN_SDHI0D3, NULL);
770 gpio_request(GPIO_FN_SDHI0D2, NULL);
771 gpio_request(GPIO_FN_SDHI0D1, NULL);
772 gpio_request(GPIO_FN_SDHI0D0, NULL);
773 gpio_request(GPIO_FN_SDHI0CMD, NULL);
774 gpio_request(GPIO_FN_SDHI0CLK, NULL);
775
Magnus Damm5b380ec2009-10-27 10:49:55 +0000776 /* SDHI1 connected to cn8 */
777 gpio_request(GPIO_FN_SDHI1CD, NULL);
778 gpio_request(GPIO_FN_SDHI1WP, NULL);
779 gpio_request(GPIO_FN_SDHI1D3, NULL);
780 gpio_request(GPIO_FN_SDHI1D2, NULL);
781 gpio_request(GPIO_FN_SDHI1D1, NULL);
782 gpio_request(GPIO_FN_SDHI1D0, NULL);
783 gpio_request(GPIO_FN_SDHI1CMD, NULL);
784 gpio_request(GPIO_FN_SDHI1CLK, NULL);
785
Kuninori Morimotoa80cad92009-06-26 07:05:39 +0000786 /*
787 * enable SH-Eth
788 *
789 * please remove J33 pin from your board !!
790 *
791 * ms7724 board should not use GPIO_FN_LNKSTA pin
792 * So, This time PTX5 is set to input pin
793 */
794 gpio_request(GPIO_FN_RMII_RXD0, NULL);
795 gpio_request(GPIO_FN_RMII_RXD1, NULL);
796 gpio_request(GPIO_FN_RMII_TXD0, NULL);
797 gpio_request(GPIO_FN_RMII_TXD1, NULL);
798 gpio_request(GPIO_FN_RMII_REF_CLK, NULL);
799 gpio_request(GPIO_FN_RMII_TX_EN, NULL);
800 gpio_request(GPIO_FN_RMII_RX_ER, NULL);
801 gpio_request(GPIO_FN_RMII_CRS_DV, NULL);
802 gpio_request(GPIO_FN_MDIO, NULL);
803 gpio_request(GPIO_FN_MDC, NULL);
804 gpio_request(GPIO_PTX5, NULL);
805 gpio_direction_input(GPIO_PTX5);
806 sh_eth_init();
807
Kuninori Morimoto287c1292009-05-26 07:04:52 +0000808 if (sw & SW41_B) {
Kuninori Morimoto4f324312009-08-03 04:52:03 +0000809 /* 720p */
810 lcdc_info.ch[0].lcd_cfg.xres = 1280;
811 lcdc_info.ch[0].lcd_cfg.yres = 720;
812 lcdc_info.ch[0].lcd_cfg.left_margin = 220;
813 lcdc_info.ch[0].lcd_cfg.right_margin = 110;
814 lcdc_info.ch[0].lcd_cfg.hsync_len = 40;
815 lcdc_info.ch[0].lcd_cfg.upper_margin = 20;
816 lcdc_info.ch[0].lcd_cfg.lower_margin = 5;
817 lcdc_info.ch[0].lcd_cfg.vsync_len = 5;
Kuninori Morimoto287c1292009-05-26 07:04:52 +0000818 } else {
819 /* VGA */
820 lcdc_info.ch[0].lcd_cfg.xres = 640;
821 lcdc_info.ch[0].lcd_cfg.yres = 480;
822 lcdc_info.ch[0].lcd_cfg.left_margin = 105;
823 lcdc_info.ch[0].lcd_cfg.right_margin = 50;
824 lcdc_info.ch[0].lcd_cfg.hsync_len = 96;
825 lcdc_info.ch[0].lcd_cfg.upper_margin = 33;
826 lcdc_info.ch[0].lcd_cfg.lower_margin = 10;
827 lcdc_info.ch[0].lcd_cfg.vsync_len = 2;
828 }
829
830 if (sw & SW41_A) {
831 /* Digital monitor */
832 lcdc_info.ch[0].interface_type = RGB18;
833 lcdc_info.ch[0].flags = 0;
834 } else {
835 /* Analog monitor */
836 lcdc_info.ch[0].interface_type = RGB24;
837 lcdc_info.ch[0].flags = LCDC_FLAGS_DWPOL;
838 }
839
840 return platform_add_devices(ms7724se_devices,
Kuninori Morimotoa80cad92009-06-26 07:05:39 +0000841 ARRAY_SIZE(ms7724se_devices));
Kuninori Morimoto287c1292009-05-26 07:04:52 +0000842}
843device_initcall(devices_setup);
844
845static struct sh_machine_vector mv_ms7724se __initmv = {
846 .mv_name = "ms7724se",
847 .mv_init_irq = init_se7724_IRQ,
848 .mv_nr_irqs = SE7724_FPGA_IRQ_BASE + SE7724_FPGA_IRQ_NR,
849};