Paul Walmsley | 530e544 | 2011-02-25 15:39:28 -0700 | [diff] [blame] | 1 | /* |
| 2 | * OMAP2/3 interface clock control |
| 3 | * |
| 4 | * Copyright (C) 2011 Nokia Corporation |
| 5 | * Paul Walmsley |
| 6 | * |
| 7 | * This program is free software; you can redistribute it and/or modify |
| 8 | * it under the terms of the GNU General Public License version 2 as |
| 9 | * published by the Free Software Foundation. |
| 10 | */ |
| 11 | #undef DEBUG |
| 12 | |
| 13 | #include <linux/kernel.h> |
Mike Turquette | 32cc002 | 2012-11-10 16:58:41 -0700 | [diff] [blame] | 14 | #include <linux/clk-provider.h> |
Paul Walmsley | 530e544 | 2011-02-25 15:39:28 -0700 | [diff] [blame] | 15 | #include <linux/io.h> |
Tero Kristo | ef14db0 | 2015-03-02 14:33:54 +0200 | [diff] [blame] | 16 | #include <linux/clk/ti.h> |
Paul Walmsley | 530e544 | 2011-02-25 15:39:28 -0700 | [diff] [blame] | 17 | |
Paul Walmsley | 530e544 | 2011-02-25 15:39:28 -0700 | [diff] [blame] | 18 | #include "clock.h" |
Tero Kristo | acd052b | 2014-07-02 11:47:47 +0300 | [diff] [blame] | 19 | |
| 20 | /* Register offsets */ |
Tero Kristo | d5a04dd | 2015-03-03 16:08:42 +0200 | [diff] [blame] | 21 | #define OMAP24XX_CM_FCLKEN2 0x04 |
Tero Kristo | acd052b | 2014-07-02 11:47:47 +0300 | [diff] [blame] | 22 | #define CM_AUTOIDLE 0x30 |
| 23 | #define CM_ICLKEN 0x10 |
Tero Kristo | d5a04dd | 2015-03-03 16:08:42 +0200 | [diff] [blame] | 24 | #define CM_IDLEST 0x20 |
| 25 | |
| 26 | #define OMAP24XX_CM_IDLEST_VAL 0 |
Paul Walmsley | 530e544 | 2011-02-25 15:39:28 -0700 | [diff] [blame] | 27 | |
| 28 | /* Private functions */ |
| 29 | |
| 30 | /* XXX */ |
Rajendra Nayak | b4777a2 | 2012-04-27 15:53:48 +0530 | [diff] [blame] | 31 | void omap2_clkt_iclk_allow_idle(struct clk_hw_omap *clk) |
Paul Walmsley | 530e544 | 2011-02-25 15:39:28 -0700 | [diff] [blame] | 32 | { |
Tero Kristo | 519ab8b | 2013-10-22 11:49:58 +0300 | [diff] [blame] | 33 | u32 v; |
| 34 | void __iomem *r; |
Paul Walmsley | 530e544 | 2011-02-25 15:39:28 -0700 | [diff] [blame] | 35 | |
Tero Kristo | 519ab8b | 2013-10-22 11:49:58 +0300 | [diff] [blame] | 36 | r = (__force void __iomem *) |
| 37 | ((__force u32)clk->enable_reg ^ (CM_AUTOIDLE ^ CM_ICLKEN)); |
Paul Walmsley | 530e544 | 2011-02-25 15:39:28 -0700 | [diff] [blame] | 38 | |
Tero Kristo | ef14db0 | 2015-03-02 14:33:54 +0200 | [diff] [blame] | 39 | v = ti_clk_ll_ops->clk_readl(r); |
Paul Walmsley | 530e544 | 2011-02-25 15:39:28 -0700 | [diff] [blame] | 40 | v |= (1 << clk->enable_bit); |
Tero Kristo | ef14db0 | 2015-03-02 14:33:54 +0200 | [diff] [blame] | 41 | ti_clk_ll_ops->clk_writel(v, r); |
Paul Walmsley | 530e544 | 2011-02-25 15:39:28 -0700 | [diff] [blame] | 42 | } |
| 43 | |
| 44 | /* XXX */ |
Rajendra Nayak | b4777a2 | 2012-04-27 15:53:48 +0530 | [diff] [blame] | 45 | void omap2_clkt_iclk_deny_idle(struct clk_hw_omap *clk) |
Paul Walmsley | 530e544 | 2011-02-25 15:39:28 -0700 | [diff] [blame] | 46 | { |
Tero Kristo | 519ab8b | 2013-10-22 11:49:58 +0300 | [diff] [blame] | 47 | u32 v; |
| 48 | void __iomem *r; |
Paul Walmsley | 530e544 | 2011-02-25 15:39:28 -0700 | [diff] [blame] | 49 | |
Tero Kristo | 519ab8b | 2013-10-22 11:49:58 +0300 | [diff] [blame] | 50 | r = (__force void __iomem *) |
| 51 | ((__force u32)clk->enable_reg ^ (CM_AUTOIDLE ^ CM_ICLKEN)); |
Paul Walmsley | 530e544 | 2011-02-25 15:39:28 -0700 | [diff] [blame] | 52 | |
Tero Kristo | ef14db0 | 2015-03-02 14:33:54 +0200 | [diff] [blame] | 53 | v = ti_clk_ll_ops->clk_readl(r); |
Paul Walmsley | 530e544 | 2011-02-25 15:39:28 -0700 | [diff] [blame] | 54 | v &= ~(1 << clk->enable_bit); |
Tero Kristo | ef14db0 | 2015-03-02 14:33:54 +0200 | [diff] [blame] | 55 | ti_clk_ll_ops->clk_writel(v, r); |
Paul Walmsley | 530e544 | 2011-02-25 15:39:28 -0700 | [diff] [blame] | 56 | } |
| 57 | |
Tero Kristo | d5a04dd | 2015-03-03 16:08:42 +0200 | [diff] [blame] | 58 | /** |
| 59 | * omap2430_clk_i2chs_find_idlest - return CM_IDLEST info for 2430 I2CHS |
| 60 | * @clk: struct clk * being enabled |
| 61 | * @idlest_reg: void __iomem ** to store CM_IDLEST reg address into |
| 62 | * @idlest_bit: pointer to a u8 to store the CM_IDLEST bit shift into |
| 63 | * @idlest_val: pointer to a u8 to store the CM_IDLEST indicator |
| 64 | * |
| 65 | * OMAP2430 I2CHS CM_IDLEST bits are in CM_IDLEST1_CORE, but the |
| 66 | * CM_*CLKEN bits are in CM_{I,F}CLKEN2_CORE. This custom function |
| 67 | * passes back the correct CM_IDLEST register address for I2CHS |
| 68 | * modules. No return value. |
| 69 | */ |
| 70 | static void omap2430_clk_i2chs_find_idlest(struct clk_hw_omap *clk, |
| 71 | void __iomem **idlest_reg, |
| 72 | u8 *idlest_bit, |
| 73 | u8 *idlest_val) |
| 74 | { |
| 75 | u32 r; |
| 76 | |
| 77 | r = ((__force u32)clk->enable_reg ^ (OMAP24XX_CM_FCLKEN2 ^ CM_IDLEST)); |
| 78 | *idlest_reg = (__force void __iomem *)r; |
| 79 | *idlest_bit = clk->enable_bit; |
| 80 | *idlest_val = OMAP24XX_CM_IDLEST_VAL; |
| 81 | } |
| 82 | |
Paul Walmsley | 530e544 | 2011-02-25 15:39:28 -0700 | [diff] [blame] | 83 | /* Public data */ |
| 84 | |
Rajendra Nayak | b4777a2 | 2012-04-27 15:53:48 +0530 | [diff] [blame] | 85 | const struct clk_hw_omap_ops clkhwops_iclk = { |
| 86 | .allow_idle = omap2_clkt_iclk_allow_idle, |
| 87 | .deny_idle = omap2_clkt_iclk_deny_idle, |
| 88 | }; |
| 89 | |
Mike Turquette | 32cc002 | 2012-11-10 16:58:41 -0700 | [diff] [blame] | 90 | const struct clk_hw_omap_ops clkhwops_iclk_wait = { |
| 91 | .allow_idle = omap2_clkt_iclk_allow_idle, |
| 92 | .deny_idle = omap2_clkt_iclk_deny_idle, |
| 93 | .find_idlest = omap2_clk_dflt_find_idlest, |
| 94 | .find_companion = omap2_clk_dflt_find_companion, |
| 95 | }; |
Tero Kristo | d5a04dd | 2015-03-03 16:08:42 +0200 | [diff] [blame] | 96 | |
| 97 | /* 2430 I2CHS has non-standard IDLEST register */ |
| 98 | const struct clk_hw_omap_ops clkhwops_omap2430_i2chs_wait = { |
| 99 | .find_idlest = omap2430_clk_i2chs_find_idlest, |
| 100 | .find_companion = omap2_clk_dflt_find_companion, |
| 101 | }; |