blob: 651f9022308feb300dee8d4f4d08439a1094db7d [file] [log] [blame]
Rob Clarkcd5351f2011-11-12 12:09:40 -06001/*
Rob Clark8bb0daf2013-02-11 12:43:09 -05002 * drivers/gpu/drm/omapdrm/omap_drv.c
Rob Clarkcd5351f2011-11-12 12:09:40 -06003 *
4 * Copyright (C) 2011 Texas Instruments
5 * Author: Rob Clark <rob@ti.com>
6 *
7 * This program is free software; you can redistribute it and/or modify it
8 * under the terms of the GNU General Public License version 2 as published by
9 * the Free Software Foundation.
10 *
11 * This program is distributed in the hope that it will be useful, but WITHOUT
12 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
13 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
14 * more details.
15 *
16 * You should have received a copy of the GNU General Public License along with
17 * this program. If not, see <http://www.gnu.org/licenses/>.
18 */
19
20#include "omap_drv.h"
21
22#include "drm_crtc_helper.h"
23#include "drm_fb_helper.h"
Andy Gross5c137792012-03-05 10:48:39 -060024#include "omap_dmm_tiler.h"
Rob Clarkcd5351f2011-11-12 12:09:40 -060025
26#define DRIVER_NAME MODULE_NAME
27#define DRIVER_DESC "OMAP DRM"
28#define DRIVER_DATE "20110917"
29#define DRIVER_MAJOR 1
30#define DRIVER_MINOR 0
31#define DRIVER_PATCHLEVEL 0
32
Rob Clarkcd5351f2011-11-12 12:09:40 -060033static int num_crtc = CONFIG_DRM_OMAP_NUM_CRTCS;
34
35MODULE_PARM_DESC(num_crtc, "Number of overlays to use as CRTCs");
36module_param(num_crtc, int, 0600);
37
38/*
39 * mode config funcs
40 */
41
42/* Notes about mapping DSS and DRM entities:
43 * CRTC: overlay
44 * encoder: manager.. with some extension to allow one primary CRTC
45 * and zero or more video CRTC's to be mapped to one encoder?
46 * connector: dssdev.. manager can be attached/detached from different
47 * devices
48 */
49
50static void omap_fb_output_poll_changed(struct drm_device *dev)
51{
52 struct omap_drm_private *priv = dev->dev_private;
53 DBG("dev=%p", dev);
YAMANE Toshiakic7f904b2012-11-14 19:30:38 +090054 if (priv->fbdev)
Rob Clarkcd5351f2011-11-12 12:09:40 -060055 drm_fb_helper_hotplug_event(priv->fbdev);
Rob Clarkcd5351f2011-11-12 12:09:40 -060056}
57
Laurent Pincharte6ecefa2012-05-17 13:27:23 +020058static const struct drm_mode_config_funcs omap_mode_config_funcs = {
Rob Clarkcd5351f2011-11-12 12:09:40 -060059 .fb_create = omap_framebuffer_create,
60 .output_poll_changed = omap_fb_output_poll_changed,
61};
62
63static int get_connector_type(struct omap_dss_device *dssdev)
64{
65 switch (dssdev->type) {
66 case OMAP_DISPLAY_TYPE_HDMI:
67 return DRM_MODE_CONNECTOR_HDMIA;
Tomi Valkeinen4635c172013-05-14 14:14:15 +030068 case OMAP_DISPLAY_TYPE_DVI:
69 return DRM_MODE_CONNECTOR_DVID;
Rob Clarkcd5351f2011-11-12 12:09:40 -060070 default:
71 return DRM_MODE_CONNECTOR_Unknown;
72 }
73}
74
Archit Taneja0d8f3712013-03-26 19:15:19 +053075static bool channel_used(struct drm_device *dev, enum omap_channel channel)
76{
77 struct omap_drm_private *priv = dev->dev_private;
78 int i;
79
80 for (i = 0; i < priv->num_crtcs; i++) {
81 struct drm_crtc *crtc = priv->crtcs[i];
82
83 if (omap_crtc_channel(crtc) == channel)
84 return true;
85 }
86
87 return false;
88}
89
Archit Taneja3a01ab22014-01-02 14:49:51 +053090static int omap_connect_dssdevs(void)
91{
92 int r;
93 struct omap_dss_device *dssdev = NULL;
94 bool no_displays = true;
95
96 for_each_dss_dev(dssdev) {
97 r = dssdev->driver->connect(dssdev);
98 if (r == -EPROBE_DEFER) {
99 omap_dss_put_device(dssdev);
100 goto cleanup;
101 } else if (r) {
102 dev_warn(dssdev->dev, "could not connect display: %s\n",
103 dssdev->name);
104 } else {
105 no_displays = false;
106 }
107 }
108
109 if (no_displays)
110 return -EPROBE_DEFER;
111
112 return 0;
113
114cleanup:
115 /*
116 * if we are deferring probe, we disconnect the devices we previously
117 * connected
118 */
119 dssdev = NULL;
120
121 for_each_dss_dev(dssdev)
122 dssdev->driver->disconnect(dssdev);
123
124 return r;
125}
126
Rob Clarkcd5351f2011-11-12 12:09:40 -0600127static int omap_modeset_init(struct drm_device *dev)
128{
Rob Clarkcd5351f2011-11-12 12:09:40 -0600129 struct omap_drm_private *priv = dev->dev_private;
130 struct omap_dss_device *dssdev = NULL;
Rob Clarkf5f94542012-12-04 13:59:12 -0600131 int num_ovls = dss_feat_get_num_ovls();
Archit Taneja0d8f3712013-03-26 19:15:19 +0530132 int num_mgrs = dss_feat_get_num_mgrs();
133 int num_crtcs;
134 int i, id = 0;
Tomi Valkeinen04b1fc02013-05-14 10:55:19 +0300135
Rob Clarkcd5351f2011-11-12 12:09:40 -0600136 drm_mode_config_init(dev);
137
Rob Clarkf5f94542012-12-04 13:59:12 -0600138 omap_drm_irq_install(dev);
Andy Gross71e88312011-12-05 19:19:21 -0600139
Rob Clarkf5f94542012-12-04 13:59:12 -0600140 /*
Archit Taneja0d8f3712013-03-26 19:15:19 +0530141 * We usually don't want to create a CRTC for each manager, at least
142 * not until we have a way to expose private planes to userspace.
143 * Otherwise there would not be enough video pipes left for drm planes.
144 * We use the num_crtc argument to limit the number of crtcs we create.
Rob Clarkf5f94542012-12-04 13:59:12 -0600145 */
Archit Taneja0d8f3712013-03-26 19:15:19 +0530146 num_crtcs = min3(num_crtc, num_mgrs, num_ovls);
Rob Clarkcd5351f2011-11-12 12:09:40 -0600147
Archit Taneja0d8f3712013-03-26 19:15:19 +0530148 dssdev = NULL;
Rob Clarkcd5351f2011-11-12 12:09:40 -0600149
Rob Clarkf5f94542012-12-04 13:59:12 -0600150 for_each_dss_dev(dssdev) {
151 struct drm_connector *connector;
152 struct drm_encoder *encoder;
Archit Taneja0d8f3712013-03-26 19:15:19 +0530153 enum omap_channel channel;
Tomi Valkeinena7e71e72013-05-08 16:23:32 +0300154 struct omap_overlay_manager *mgr;
Rob Clarkf5f94542012-12-04 13:59:12 -0600155
Archit Taneja3a01ab22014-01-02 14:49:51 +0530156 if (!omapdss_device_is_connected(dssdev))
Archit Taneja581382e2013-03-26 19:15:18 +0530157 continue;
Tomi Valkeinena7e71e72013-05-08 16:23:32 +0300158
Rob Clarkf5f94542012-12-04 13:59:12 -0600159 encoder = omap_encoder_init(dev, dssdev);
160
161 if (!encoder) {
162 dev_err(dev->dev, "could not create encoder: %s\n",
163 dssdev->name);
164 return -ENOMEM;
165 }
166
167 connector = omap_connector_init(dev,
168 get_connector_type(dssdev), dssdev, encoder);
169
170 if (!connector) {
171 dev_err(dev->dev, "could not create connector: %s\n",
172 dssdev->name);
173 return -ENOMEM;
174 }
175
176 BUG_ON(priv->num_encoders >= ARRAY_SIZE(priv->encoders));
177 BUG_ON(priv->num_connectors >= ARRAY_SIZE(priv->connectors));
178
179 priv->encoders[priv->num_encoders++] = encoder;
180 priv->connectors[priv->num_connectors++] = connector;
181
182 drm_mode_connector_attach_encoder(connector, encoder);
183
Archit Taneja0d8f3712013-03-26 19:15:19 +0530184 /*
185 * if we have reached the limit of the crtcs we are allowed to
186 * create, let's not try to look for a crtc for this
187 * panel/encoder and onwards, we will, of course, populate the
188 * the possible_crtcs field for all the encoders with the final
189 * set of crtcs we create
190 */
191 if (id == num_crtcs)
192 continue;
193
194 /*
195 * get the recommended DISPC channel for this encoder. For now,
196 * we only try to get create a crtc out of the recommended, the
197 * other possible channels to which the encoder can connect are
198 * not considered.
199 */
Archit Taneja0d8f3712013-03-26 19:15:19 +0530200
Tomi Valkeinena7e71e72013-05-08 16:23:32 +0300201 mgr = omapdss_find_mgr_from_display(dssdev);
202 channel = mgr->id;
Archit Taneja0d8f3712013-03-26 19:15:19 +0530203 /*
204 * if this channel hasn't already been taken by a previously
205 * allocated crtc, we create a new crtc for it
206 */
207 if (!channel_used(dev, channel)) {
208 struct drm_plane *plane;
209 struct drm_crtc *crtc;
210
211 plane = omap_plane_init(dev, id, true);
212 crtc = omap_crtc_init(dev, plane, channel, id);
213
214 BUG_ON(priv->num_crtcs >= ARRAY_SIZE(priv->crtcs));
215 priv->crtcs[id] = crtc;
216 priv->num_crtcs++;
217
218 priv->planes[id] = plane;
219 priv->num_planes++;
220
221 id++;
222 }
223 }
224
225 /*
226 * we have allocated crtcs according to the need of the panels/encoders,
227 * adding more crtcs here if needed
228 */
229 for (; id < num_crtcs; id++) {
230
231 /* find a free manager for this crtc */
232 for (i = 0; i < num_mgrs; i++) {
233 if (!channel_used(dev, i)) {
234 struct drm_plane *plane;
235 struct drm_crtc *crtc;
236
237 plane = omap_plane_init(dev, id, true);
238 crtc = omap_crtc_init(dev, plane, i, id);
239
240 BUG_ON(priv->num_crtcs >=
241 ARRAY_SIZE(priv->crtcs));
242
243 priv->crtcs[id] = crtc;
244 priv->num_crtcs++;
245
246 priv->planes[id] = plane;
247 priv->num_planes++;
248
249 break;
250 } else {
251 continue;
252 }
253 }
254
255 if (i == num_mgrs) {
256 /* this shouldn't really happen */
257 dev_err(dev->dev, "no managers left for crtc\n");
258 return -ENOMEM;
259 }
260 }
261
262 /*
263 * Create normal planes for the remaining overlays:
264 */
265 for (; id < num_ovls; id++) {
266 struct drm_plane *plane = omap_plane_init(dev, id, false);
267
268 BUG_ON(priv->num_planes >= ARRAY_SIZE(priv->planes));
269 priv->planes[priv->num_planes++] = plane;
270 }
271
272 for (i = 0; i < priv->num_encoders; i++) {
273 struct drm_encoder *encoder = priv->encoders[i];
274 struct omap_dss_device *dssdev =
275 omap_encoder_get_dssdev(encoder);
Tomi Valkeinen1f68d9c2013-04-19 15:09:34 +0300276 struct omap_dss_device *output;
Tomi Valkeinenbe8e8e12013-04-23 15:35:35 +0300277
278 output = omapdss_find_output_from_display(dssdev);
Archit Taneja0d8f3712013-03-26 19:15:19 +0530279
Rob Clarkf5f94542012-12-04 13:59:12 -0600280 /* figure out which crtc's we can connect the encoder to: */
281 encoder->possible_crtcs = 0;
282 for (id = 0; id < priv->num_crtcs; id++) {
Archit Taneja0d8f3712013-03-26 19:15:19 +0530283 struct drm_crtc *crtc = priv->crtcs[id];
284 enum omap_channel crtc_channel;
285 enum omap_dss_output_id supported_outputs;
286
287 crtc_channel = omap_crtc_channel(crtc);
288 supported_outputs =
289 dss_feat_get_supported_outputs(crtc_channel);
290
Tomi Valkeinenbe8e8e12013-04-23 15:35:35 +0300291 if (supported_outputs & output->id)
Rob Clarkf5f94542012-12-04 13:59:12 -0600292 encoder->possible_crtcs |= (1 << id);
293 }
Tomi Valkeinen820caab2013-04-25 14:53:18 +0300294
295 omap_dss_put_device(output);
Rob Clarkf5f94542012-12-04 13:59:12 -0600296 }
Rob Clarkcd5351f2011-11-12 12:09:40 -0600297
Archit Taneja0d8f3712013-03-26 19:15:19 +0530298 DBG("registered %d planes, %d crtcs, %d encoders and %d connectors\n",
299 priv->num_planes, priv->num_crtcs, priv->num_encoders,
300 priv->num_connectors);
301
Rob Clark6b8ca4c2012-01-08 19:37:37 -0600302 dev->mode_config.min_width = 32;
303 dev->mode_config.min_height = 32;
Rob Clarkcd5351f2011-11-12 12:09:40 -0600304
305 /* note: eventually will need some cpu_is_omapXYZ() type stuff here
306 * to fill in these limits properly on different OMAP generations..
307 */
308 dev->mode_config.max_width = 2048;
309 dev->mode_config.max_height = 2048;
310
311 dev->mode_config.funcs = &omap_mode_config_funcs;
312
313 return 0;
314}
315
316static void omap_modeset_free(struct drm_device *dev)
317{
318 drm_mode_config_cleanup(dev);
319}
320
321/*
322 * drm ioctl funcs
323 */
324
325
326static int ioctl_get_param(struct drm_device *dev, void *data,
327 struct drm_file *file_priv)
328{
Rob Clark5e3b0872012-10-29 09:31:12 +0100329 struct omap_drm_private *priv = dev->dev_private;
Rob Clarkcd5351f2011-11-12 12:09:40 -0600330 struct drm_omap_param *args = data;
331
332 DBG("%p: param=%llu", dev, args->param);
333
334 switch (args->param) {
335 case OMAP_PARAM_CHIPSET_ID:
Rob Clark5e3b0872012-10-29 09:31:12 +0100336 args->value = priv->omaprev;
Rob Clarkcd5351f2011-11-12 12:09:40 -0600337 break;
338 default:
339 DBG("unknown parameter %lld", args->param);
340 return -EINVAL;
341 }
342
343 return 0;
344}
345
346static int ioctl_set_param(struct drm_device *dev, void *data,
347 struct drm_file *file_priv)
348{
349 struct drm_omap_param *args = data;
350
351 switch (args->param) {
352 default:
353 DBG("unknown parameter %lld", args->param);
354 return -EINVAL;
355 }
356
357 return 0;
358}
359
360static int ioctl_gem_new(struct drm_device *dev, void *data,
361 struct drm_file *file_priv)
362{
363 struct drm_omap_gem_new *args = data;
Rob Clarkf5f94542012-12-04 13:59:12 -0600364 VERB("%p:%p: size=0x%08x, flags=%08x", dev, file_priv,
Rob Clarkcd5351f2011-11-12 12:09:40 -0600365 args->size.bytes, args->flags);
366 return omap_gem_new_handle(dev, file_priv, args->size,
367 args->flags, &args->handle);
368}
369
370static int ioctl_gem_cpu_prep(struct drm_device *dev, void *data,
371 struct drm_file *file_priv)
372{
373 struct drm_omap_gem_cpu_prep *args = data;
374 struct drm_gem_object *obj;
375 int ret;
376
377 VERB("%p:%p: handle=%d, op=%x", dev, file_priv, args->handle, args->op);
378
379 obj = drm_gem_object_lookup(dev, file_priv, args->handle);
YAMANE Toshiakic7f904b2012-11-14 19:30:38 +0900380 if (!obj)
Rob Clarkcd5351f2011-11-12 12:09:40 -0600381 return -ENOENT;
Rob Clarkcd5351f2011-11-12 12:09:40 -0600382
383 ret = omap_gem_op_sync(obj, args->op);
384
YAMANE Toshiakic7f904b2012-11-14 19:30:38 +0900385 if (!ret)
Rob Clarkcd5351f2011-11-12 12:09:40 -0600386 ret = omap_gem_op_start(obj, args->op);
Rob Clarkcd5351f2011-11-12 12:09:40 -0600387
388 drm_gem_object_unreference_unlocked(obj);
389
390 return ret;
391}
392
393static int ioctl_gem_cpu_fini(struct drm_device *dev, void *data,
394 struct drm_file *file_priv)
395{
396 struct drm_omap_gem_cpu_fini *args = data;
397 struct drm_gem_object *obj;
398 int ret;
399
400 VERB("%p:%p: handle=%d", dev, file_priv, args->handle);
401
402 obj = drm_gem_object_lookup(dev, file_priv, args->handle);
YAMANE Toshiakic7f904b2012-11-14 19:30:38 +0900403 if (!obj)
Rob Clarkcd5351f2011-11-12 12:09:40 -0600404 return -ENOENT;
Rob Clarkcd5351f2011-11-12 12:09:40 -0600405
406 /* XXX flushy, flushy */
407 ret = 0;
408
YAMANE Toshiakic7f904b2012-11-14 19:30:38 +0900409 if (!ret)
Rob Clarkcd5351f2011-11-12 12:09:40 -0600410 ret = omap_gem_op_finish(obj, args->op);
Rob Clarkcd5351f2011-11-12 12:09:40 -0600411
412 drm_gem_object_unreference_unlocked(obj);
413
414 return ret;
415}
416
417static int ioctl_gem_info(struct drm_device *dev, void *data,
418 struct drm_file *file_priv)
419{
420 struct drm_omap_gem_info *args = data;
421 struct drm_gem_object *obj;
422 int ret = 0;
423
Rob Clarkf5f94542012-12-04 13:59:12 -0600424 VERB("%p:%p: handle=%d", dev, file_priv, args->handle);
Rob Clarkcd5351f2011-11-12 12:09:40 -0600425
426 obj = drm_gem_object_lookup(dev, file_priv, args->handle);
YAMANE Toshiakic7f904b2012-11-14 19:30:38 +0900427 if (!obj)
Rob Clarkcd5351f2011-11-12 12:09:40 -0600428 return -ENOENT;
Rob Clarkcd5351f2011-11-12 12:09:40 -0600429
Rob Clarkf7f9f452011-12-05 19:19:22 -0600430 args->size = omap_gem_mmap_size(obj);
Rob Clarkcd5351f2011-11-12 12:09:40 -0600431 args->offset = omap_gem_mmap_offset(obj);
432
433 drm_gem_object_unreference_unlocked(obj);
434
435 return ret;
436}
437
Rob Clarkbaa70942013-08-02 13:27:49 -0400438static const struct drm_ioctl_desc ioctls[DRM_COMMAND_END - DRM_COMMAND_BASE] = {
Rob Clarkcd5351f2011-11-12 12:09:40 -0600439 DRM_IOCTL_DEF_DRV(OMAP_GET_PARAM, ioctl_get_param, DRM_UNLOCKED|DRM_AUTH),
440 DRM_IOCTL_DEF_DRV(OMAP_SET_PARAM, ioctl_set_param, DRM_UNLOCKED|DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY),
441 DRM_IOCTL_DEF_DRV(OMAP_GEM_NEW, ioctl_gem_new, DRM_UNLOCKED|DRM_AUTH),
442 DRM_IOCTL_DEF_DRV(OMAP_GEM_CPU_PREP, ioctl_gem_cpu_prep, DRM_UNLOCKED|DRM_AUTH),
443 DRM_IOCTL_DEF_DRV(OMAP_GEM_CPU_FINI, ioctl_gem_cpu_fini, DRM_UNLOCKED|DRM_AUTH),
444 DRM_IOCTL_DEF_DRV(OMAP_GEM_INFO, ioctl_gem_info, DRM_UNLOCKED|DRM_AUTH),
445};
446
447/*
448 * drm driver funcs
449 */
450
451/**
452 * load - setup chip and create an initial config
453 * @dev: DRM device
454 * @flags: startup flags
455 *
456 * The driver load routine has to do several things:
457 * - initialize the memory manager
458 * - allocate initial config memory
459 * - setup the DRM framebuffer with the allocated memory
460 */
461static int dev_load(struct drm_device *dev, unsigned long flags)
462{
Rob Clark5e3b0872012-10-29 09:31:12 +0100463 struct omap_drm_platform_data *pdata = dev->dev->platform_data;
Rob Clarkcd5351f2011-11-12 12:09:40 -0600464 struct omap_drm_private *priv;
465 int ret;
466
467 DBG("load: dev=%p", dev);
468
Rob Clarkcd5351f2011-11-12 12:09:40 -0600469 priv = kzalloc(sizeof(*priv), GFP_KERNEL);
Joe Perches78110bb2013-02-11 09:41:29 -0800470 if (!priv)
Rob Clarkcd5351f2011-11-12 12:09:40 -0600471 return -ENOMEM;
Rob Clarkcd5351f2011-11-12 12:09:40 -0600472
Rob Clark5e3b0872012-10-29 09:31:12 +0100473 priv->omaprev = pdata->omaprev;
474
Rob Clarkcd5351f2011-11-12 12:09:40 -0600475 dev->dev_private = priv;
476
Tejun Heo4619cdb2012-08-22 16:49:44 -0700477 priv->wq = alloc_ordered_workqueue("omapdrm", 0);
Rob Clark5609f7f2012-03-05 10:48:32 -0600478
Rob Clarkf6b60362012-03-05 10:48:36 -0600479 INIT_LIST_HEAD(&priv->obj_list);
480
Rob Clarkf7f9f452011-12-05 19:19:22 -0600481 omap_gem_init(dev);
482
Rob Clarkcd5351f2011-11-12 12:09:40 -0600483 ret = omap_modeset_init(dev);
484 if (ret) {
485 dev_err(dev->dev, "omap_modeset_init failed: ret=%d\n", ret);
486 dev->dev_private = NULL;
487 kfree(priv);
488 return ret;
489 }
490
Rob Clarkf5f94542012-12-04 13:59:12 -0600491 ret = drm_vblank_init(dev, priv->num_crtcs);
492 if (ret)
493 dev_warn(dev->dev, "could not init vblank\n");
494
Rob Clarkcd5351f2011-11-12 12:09:40 -0600495 priv->fbdev = omap_fbdev_init(dev);
496 if (!priv->fbdev) {
497 dev_warn(dev->dev, "omap_fbdev_init failed\n");
498 /* well, limp along without an fbdev.. maybe X11 will work? */
499 }
500
Andy Grosse78edba2012-12-19 14:53:37 -0600501 /* store off drm_device for use in pm ops */
502 dev_set_drvdata(dev->dev, dev);
503
Rob Clarkcd5351f2011-11-12 12:09:40 -0600504 drm_kms_helper_poll_init(dev);
505
Rob Clarkcd5351f2011-11-12 12:09:40 -0600506 return 0;
507}
508
509static int dev_unload(struct drm_device *dev)
510{
Rob Clark5609f7f2012-03-05 10:48:32 -0600511 struct omap_drm_private *priv = dev->dev_private;
512
Rob Clarkcd5351f2011-11-12 12:09:40 -0600513 DBG("unload: dev=%p", dev);
514
Rob Clarkcd5351f2011-11-12 12:09:40 -0600515 drm_kms_helper_poll_fini(dev);
Rob Clarkf5f94542012-12-04 13:59:12 -0600516 drm_vblank_cleanup(dev);
517 omap_drm_irq_uninstall(dev);
Rob Clarkcd5351f2011-11-12 12:09:40 -0600518
519 omap_fbdev_free(dev);
Rob Clarkcd5351f2011-11-12 12:09:40 -0600520 omap_modeset_free(dev);
Rob Clarkf7f9f452011-12-05 19:19:22 -0600521 omap_gem_deinit(dev);
Rob Clarkcd5351f2011-11-12 12:09:40 -0600522
Rob Clark5609f7f2012-03-05 10:48:32 -0600523 flush_workqueue(priv->wq);
524 destroy_workqueue(priv->wq);
525
Rob Clarkcd5351f2011-11-12 12:09:40 -0600526 kfree(dev->dev_private);
527 dev->dev_private = NULL;
528
Andy Grosse78edba2012-12-19 14:53:37 -0600529 dev_set_drvdata(dev->dev, NULL);
530
Rob Clarkcd5351f2011-11-12 12:09:40 -0600531 return 0;
532}
533
534static int dev_open(struct drm_device *dev, struct drm_file *file)
535{
536 file->driver_priv = NULL;
537
538 DBG("open: dev=%p, file=%p", dev, file);
539
540 return 0;
541}
542
Rob Clarkcd5351f2011-11-12 12:09:40 -0600543/**
544 * lastclose - clean up after all DRM clients have exited
545 * @dev: DRM device
546 *
547 * Take care of cleaning up after all DRM clients have exited. In the
548 * mode setting case, we want to restore the kernel's initial mode (just
549 * in case the last client left us in a bad state).
550 */
551static void dev_lastclose(struct drm_device *dev)
552{
Rob Clark3c810c62012-08-15 15:18:01 -0500553 int i;
554
Rob Clarkcd5351f2011-11-12 12:09:40 -0600555 /* we don't support vga-switcheroo.. so just make sure the fbdev
556 * mode is active
557 */
558 struct omap_drm_private *priv = dev->dev_private;
559 int ret;
560
561 DBG("lastclose: dev=%p", dev);
562
Rob Clarkc2a6a552012-10-25 17:14:13 -0500563 if (priv->rotation_prop) {
564 /* need to restore default rotation state.. not sure
565 * if there is a cleaner way to restore properties to
566 * default state? Maybe a flag that properties should
567 * automatically be restored to default state on
568 * lastclose?
569 */
570 for (i = 0; i < priv->num_crtcs; i++) {
571 drm_object_property_set_value(&priv->crtcs[i]->base,
572 priv->rotation_prop, 0);
573 }
Rob Clark3c810c62012-08-15 15:18:01 -0500574
Rob Clarkc2a6a552012-10-25 17:14:13 -0500575 for (i = 0; i < priv->num_planes; i++) {
576 drm_object_property_set_value(&priv->planes[i]->base,
577 priv->rotation_prop, 0);
578 }
Rob Clark3c810c62012-08-15 15:18:01 -0500579 }
580
Daniel Vetterd5d26362013-01-20 15:50:41 +0100581 drm_modeset_lock_all(dev);
Rob Clarkcd5351f2011-11-12 12:09:40 -0600582 ret = drm_fb_helper_restore_fbdev_mode(priv->fbdev);
Daniel Vetterd5d26362013-01-20 15:50:41 +0100583 drm_modeset_unlock_all(dev);
Rob Clarkcd5351f2011-11-12 12:09:40 -0600584 if (ret)
585 DBG("failed to restore crtc mode");
586}
587
588static void dev_preclose(struct drm_device *dev, struct drm_file *file)
589{
590 DBG("preclose: dev=%p", dev);
591}
592
593static void dev_postclose(struct drm_device *dev, struct drm_file *file)
594{
595 DBG("postclose: dev=%p, file=%p", dev, file);
596}
597
Laurent Pinchart78b68552012-05-17 13:27:22 +0200598static const struct vm_operations_struct omap_gem_vm_ops = {
Rob Clarkcd5351f2011-11-12 12:09:40 -0600599 .fault = omap_gem_fault,
600 .open = drm_gem_vm_open,
601 .close = drm_gem_vm_close,
602};
603
Rob Clarkff4f3872012-01-16 12:51:14 -0600604static const struct file_operations omapdriver_fops = {
605 .owner = THIS_MODULE,
606 .open = drm_open,
607 .unlocked_ioctl = drm_ioctl,
608 .release = drm_release,
609 .mmap = omap_gem_mmap,
610 .poll = drm_poll,
Rob Clarkff4f3872012-01-16 12:51:14 -0600611 .read = drm_read,
612 .llseek = noop_llseek,
613};
614
Rob Clarkcd5351f2011-11-12 12:09:40 -0600615static struct drm_driver omap_drm_driver = {
616 .driver_features =
Rob Clark6ad11bc2012-04-10 13:19:55 -0500617 DRIVER_HAVE_IRQ | DRIVER_MODESET | DRIVER_GEM | DRIVER_PRIME,
Rob Clarkcd5351f2011-11-12 12:09:40 -0600618 .load = dev_load,
619 .unload = dev_unload,
620 .open = dev_open,
Rob Clarkcd5351f2011-11-12 12:09:40 -0600621 .lastclose = dev_lastclose,
622 .preclose = dev_preclose,
623 .postclose = dev_postclose,
624 .get_vblank_counter = drm_vblank_count,
Rob Clarkf5f94542012-12-04 13:59:12 -0600625 .enable_vblank = omap_irq_enable_vblank,
626 .disable_vblank = omap_irq_disable_vblank,
627 .irq_preinstall = omap_irq_preinstall,
628 .irq_postinstall = omap_irq_postinstall,
629 .irq_uninstall = omap_irq_uninstall,
630 .irq_handler = omap_irq_handler,
Andy Gross6169a1482011-12-15 21:05:17 -0600631#ifdef CONFIG_DEBUG_FS
632 .debugfs_init = omap_debugfs_init,
633 .debugfs_cleanup = omap_debugfs_cleanup,
634#endif
Rob Clark6ad11bc2012-04-10 13:19:55 -0500635 .prime_handle_to_fd = drm_gem_prime_handle_to_fd,
Rob Clark3080b832012-05-17 02:37:26 -0600636 .prime_fd_to_handle = drm_gem_prime_fd_to_handle,
Rob Clark6ad11bc2012-04-10 13:19:55 -0500637 .gem_prime_export = omap_gem_prime_export,
Rob Clark3080b832012-05-17 02:37:26 -0600638 .gem_prime_import = omap_gem_prime_import,
Rob Clarkcd5351f2011-11-12 12:09:40 -0600639 .gem_free_object = omap_gem_free_object,
640 .gem_vm_ops = &omap_gem_vm_ops,
641 .dumb_create = omap_gem_dumb_create,
642 .dumb_map_offset = omap_gem_dumb_map_offset,
Daniel Vetter43387b32013-07-16 09:12:04 +0200643 .dumb_destroy = drm_gem_dumb_destroy,
Rob Clarkcd5351f2011-11-12 12:09:40 -0600644 .ioctls = ioctls,
645 .num_ioctls = DRM_OMAP_NUM_IOCTLS,
Rob Clarkff4f3872012-01-16 12:51:14 -0600646 .fops = &omapdriver_fops,
Rob Clarkcd5351f2011-11-12 12:09:40 -0600647 .name = DRIVER_NAME,
648 .desc = DRIVER_DESC,
649 .date = DRIVER_DATE,
650 .major = DRIVER_MAJOR,
651 .minor = DRIVER_MINOR,
652 .patchlevel = DRIVER_PATCHLEVEL,
653};
654
655static int pdev_suspend(struct platform_device *pDevice, pm_message_t state)
656{
657 DBG("");
658 return 0;
659}
660
661static int pdev_resume(struct platform_device *device)
662{
663 DBG("");
664 return 0;
665}
666
667static void pdev_shutdown(struct platform_device *device)
668{
669 DBG("");
670}
671
672static int pdev_probe(struct platform_device *device)
673{
Archit Taneja3a01ab22014-01-02 14:49:51 +0530674 int r;
675
Tomi Valkeinen591a0ac2013-05-23 12:07:50 +0300676 if (omapdss_is_initialized() == false)
677 return -EPROBE_DEFER;
678
Archit Taneja3a01ab22014-01-02 14:49:51 +0530679 omap_crtc_pre_init();
680
681 r = omap_connect_dssdevs();
682 if (r) {
683 omap_crtc_pre_uninit();
684 return r;
685 }
686
Rob Clarkcd5351f2011-11-12 12:09:40 -0600687 DBG("%s", device->name);
688 return drm_platform_init(&omap_drm_driver, device);
689}
690
691static int pdev_remove(struct platform_device *device)
692{
693 DBG("");
694 drm_platform_exit(&omap_drm_driver, device);
Andy Gross5c137792012-03-05 10:48:39 -0600695
696 platform_driver_unregister(&omap_dmm_driver);
Rob Clarkcd5351f2011-11-12 12:09:40 -0600697 return 0;
698}
699
Andy Grosse78edba2012-12-19 14:53:37 -0600700#ifdef CONFIG_PM
701static const struct dev_pm_ops omapdrm_pm_ops = {
702 .resume = omap_gem_resume,
703};
704#endif
705
Tomi Valkeinen6717cd22013-04-10 10:44:00 +0300706static struct platform_driver pdev = {
Rob Clarkcd5351f2011-11-12 12:09:40 -0600707 .driver = {
708 .name = DRIVER_NAME,
709 .owner = THIS_MODULE,
Andy Grosse78edba2012-12-19 14:53:37 -0600710#ifdef CONFIG_PM
711 .pm = &omapdrm_pm_ops,
712#endif
Rob Clarkcd5351f2011-11-12 12:09:40 -0600713 },
714 .probe = pdev_probe,
715 .remove = pdev_remove,
716 .suspend = pdev_suspend,
717 .resume = pdev_resume,
718 .shutdown = pdev_shutdown,
719};
720
721static int __init omap_drm_init(void)
722{
723 DBG("init");
Rob Clarkbe0775a2012-04-05 10:34:56 -0500724 if (platform_driver_register(&omap_dmm_driver)) {
725 /* we can continue on without DMM.. so not fatal */
726 dev_err(NULL, "DMM registration failed\n");
727 }
Rob Clarkcd5351f2011-11-12 12:09:40 -0600728 return platform_driver_register(&pdev);
729}
730
731static void __exit omap_drm_fini(void)
732{
733 DBG("fini");
734 platform_driver_unregister(&pdev);
735}
736
737/* need late_initcall() so we load after dss_driver's are loaded */
738late_initcall(omap_drm_init);
739module_exit(omap_drm_fini);
740
741MODULE_AUTHOR("Rob Clark <rob@ti.com>");
742MODULE_DESCRIPTION("OMAP DRM Display Driver");
743MODULE_ALIAS("platform:" DRIVER_NAME);
744MODULE_LICENSE("GPL v2");