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Linus Torvalds1da177e2005-04-16 15:20:36 -07001#ifndef _INTELFB_H
2#define _INTELFB_H
3
4/* $DHD: intelfb/intelfb.h,v 1.40 2003/06/27 15:06:25 dawes Exp $ */
5
6#include <linux/agp_backend.h>
7#include <linux/fb.h>
8
9
10/*** Version/name ***/
Dave Airlie9a906032006-03-23 21:53:05 +110011#define INTELFB_VERSION "0.9.4"
Linus Torvalds1da177e2005-04-16 15:20:36 -070012#define INTELFB_MODULE_NAME "intelfb"
Dave Airlie9a906032006-03-23 21:53:05 +110013#define SUPPORTED_CHIPSETS "830M/845G/852GM/855GM/865G/915G/915GM/945G/945GM"
Linus Torvalds1da177e2005-04-16 15:20:36 -070014
15
16/*** Debug/feature defines ***/
17
18#ifndef DEBUG
19#define DEBUG 0
20#endif
21
22#ifndef VERBOSE
23#define VERBOSE 0
24#endif
25
26#ifndef REGDUMP
27#define REGDUMP 0
28#endif
29
30#ifndef DETECT_VGA_CLASS_ONLY
31#define DETECT_VGA_CLASS_ONLY 1
32#endif
33
34#ifndef ALLOCATE_FOR_PANNING
35#define ALLOCATE_FOR_PANNING 1
36#endif
37
38#ifndef PREFERRED_MODE
39#define PREFERRED_MODE "1024x768-32@70"
40#endif
41
42/*** hw-related values ***/
43
Antonino A. Daplas4b3760c2005-12-19 15:11:40 +080044/* Resource Allocation */
45#define INTELFB_FB_ACQUIRED 1
46#define INTELFB_MMIO_ACQUIRED 2
47
Linus Torvalds1da177e2005-04-16 15:20:36 -070048/* PCI ids for supported devices */
49#define PCI_DEVICE_ID_INTEL_830M 0x3577
50#define PCI_DEVICE_ID_INTEL_845G 0x2562
51#define PCI_DEVICE_ID_INTEL_85XGM 0x3582
52#define PCI_DEVICE_ID_INTEL_865G 0x2572
53#define PCI_DEVICE_ID_INTEL_915G 0x2582
Scott MacKenzie3a590262005-11-07 01:00:33 -080054#define PCI_DEVICE_ID_INTEL_915GM 0x2592
Dave Airlie9639d5e2006-03-23 11:23:55 +110055#define PCI_DEVICE_ID_INTEL_945G 0x2772
Dave Airlie9a906032006-03-23 21:53:05 +110056#define PCI_DEVICE_ID_INTEL_945GM 0x27A2
Linus Torvalds1da177e2005-04-16 15:20:36 -070057
58/* Size of MMIO region */
59#define INTEL_REG_SIZE 0x80000
60
61#define STRIDE_ALIGNMENT 16
62
63#define PALETTE_8_ENTRIES 256
64
65
66/*** Macros ***/
67
68/* basic arithmetic */
69#define KB(x) ((x) * 1024)
70#define MB(x) ((x) * 1024 * 1024)
71#define BtoKB(x) ((x) / 1024)
72#define BtoMB(x) ((x) / 1024 / 1024)
73
74#define GTT_PAGE_SIZE KB(4)
75
76#define ROUND_UP_TO(x, y) (((x) + (y) - 1) / (y) * (y))
77#define ROUND_DOWN_TO(x, y) ((x) / (y) * (y))
78#define ROUND_UP_TO_PAGE(x) ROUND_UP_TO((x), GTT_PAGE_SIZE)
79#define ROUND_DOWN_TO_PAGE(x) ROUND_DOWN_TO((x), GTT_PAGE_SIZE)
80
81/* messages */
82#define PFX INTELFB_MODULE_NAME ": "
83
84#define ERR_MSG(fmt, args...) printk(KERN_ERR PFX fmt, ## args)
85#define WRN_MSG(fmt, args...) printk(KERN_WARNING PFX fmt, ## args)
86#define NOT_MSG(fmt, args...) printk(KERN_NOTICE PFX fmt, ## args)
87#define INF_MSG(fmt, args...) printk(KERN_INFO PFX fmt, ## args)
88#if DEBUG
89#define DBG_MSG(fmt, args...) printk(KERN_DEBUG PFX fmt, ## args)
90#else
91#define DBG_MSG(fmt, args...) while (0) printk(fmt, ## args)
92#endif
93
94/* get commonly used pointers */
95#define GET_DINFO(info) (info)->par
96
97/* misc macros */
98#define ACCEL(d, i) \
99 ((d)->accel && !(d)->ring_lockup && \
100 ((i)->var.accel_flags & FB_ACCELF_TEXT))
101
102/*#define NOACCEL_CHIPSET(d) \
103 ((d)->chipset != INTEL_865G)*/
104#define NOACCEL_CHIPSET(d) \
105 (0)
106
107#define FIXED_MODE(d) ((d)->fixed_mode)
108
109/*** Driver paramters ***/
110
111#define RINGBUFFER_SIZE KB(64)
112#define HW_CURSOR_SIZE KB(4)
113
114/* Intel agpgart driver */
115#define AGP_PHYSICAL_MEMORY 2
116
117/*** Data Types ***/
118
119/* supported chipsets */
120enum intel_chips {
121 INTEL_830M,
122 INTEL_845G,
123 INTEL_85XGM,
124 INTEL_852GM,
125 INTEL_852GME,
126 INTEL_855GM,
127 INTEL_855GME,
128 INTEL_865G,
Scott MacKenzie3a590262005-11-07 01:00:33 -0800129 INTEL_915G,
Dave Airlie9639d5e2006-03-23 11:23:55 +1100130 INTEL_915GM,
Dave Airlie9a906032006-03-23 21:53:05 +1100131 INTEL_945G,
132 INTEL_945GM,
Linus Torvalds1da177e2005-04-16 15:20:36 -0700133};
134
135struct intelfb_hwstate {
136 u32 vga0_divisor;
137 u32 vga1_divisor;
138 u32 vga_pd;
139 u32 dpll_a;
140 u32 dpll_b;
141 u32 fpa0;
142 u32 fpa1;
143 u32 fpb0;
144 u32 fpb1;
145 u32 palette_a[PALETTE_8_ENTRIES];
146 u32 palette_b[PALETTE_8_ENTRIES];
147 u32 htotal_a;
148 u32 hblank_a;
149 u32 hsync_a;
150 u32 vtotal_a;
151 u32 vblank_a;
152 u32 vsync_a;
153 u32 src_size_a;
154 u32 bclrpat_a;
155 u32 htotal_b;
156 u32 hblank_b;
157 u32 hsync_b;
158 u32 vtotal_b;
159 u32 vblank_b;
160 u32 vsync_b;
161 u32 src_size_b;
162 u32 bclrpat_b;
163 u32 adpa;
164 u32 dvoa;
165 u32 dvob;
166 u32 dvoc;
167 u32 dvoa_srcdim;
168 u32 dvob_srcdim;
169 u32 dvoc_srcdim;
170 u32 lvds;
171 u32 pipe_a_conf;
172 u32 pipe_b_conf;
173 u32 disp_arb;
174 u32 cursor_a_control;
175 u32 cursor_b_control;
176 u32 cursor_a_base;
177 u32 cursor_b_base;
178 u32 cursor_size;
179 u32 disp_a_ctrl;
180 u32 disp_b_ctrl;
181 u32 disp_a_base;
182 u32 disp_b_base;
183 u32 cursor_a_palette[4];
184 u32 cursor_b_palette[4];
185 u32 disp_a_stride;
186 u32 disp_b_stride;
187 u32 vgacntrl;
188 u32 add_id;
189 u32 swf0x[7];
190 u32 swf1x[7];
191 u32 swf3x[3];
192 u32 fence[8];
193 u32 instpm;
194 u32 mem_mode;
195 u32 fw_blc_0;
196 u32 fw_blc_1;
197};
198
199struct intelfb_heap_data {
200 u32 physical;
201 u8 __iomem *virtual;
202 u32 offset; // in GATT pages
203 u32 size; // in bytes
204};
205
206struct intelfb_info {
207 struct fb_info *info;
208 struct fb_ops *fbops;
209 struct pci_dev *pdev;
210
211 struct intelfb_hwstate save_state;
212
213 /* agpgart structs */
214 struct agp_memory *gtt_fb_mem; // use all stolen memory or vram
215 struct agp_memory *gtt_ring_mem; // ring buffer
216 struct agp_memory *gtt_cursor_mem; // hw cursor
217
218 /* use a gart reserved fb mem */
219 u8 fbmem_gart;
220
221 /* mtrr support */
222 u32 mtrr_reg;
223 u32 has_mtrr;
224
225 /* heap data */
226 struct intelfb_heap_data aperture;
227 struct intelfb_heap_data fb;
228 struct intelfb_heap_data ring;
229 struct intelfb_heap_data cursor;
230
231 /* mmio regs */
232 u32 mmio_base_phys;
233 u8 __iomem *mmio_base;
234
235 /* fb start offset (in bytes) */
236 u32 fb_start;
237
238 /* ring buffer */
239 u8 __iomem *ring_head;
240 u32 ring_tail;
241 u32 ring_tail_mask;
242 u32 ring_space;
243 u32 ring_lockup;
244
245 /* palette */
246 u32 pseudo_palette[17];
Linus Torvalds1da177e2005-04-16 15:20:36 -0700247
248 /* chip info */
249 int pci_chipset;
250 int chipset;
251 const char *name;
252 int mobile;
253
254 /* current mode */
255 int bpp, depth;
256 u32 visual;
257 int xres, yres, pitch;
258 int pixclock;
259
260 /* current pipe */
261 int pipe;
262
263 /* some flags */
264 int accel;
265 int hwcursor;
266 int fixed_mode;
267 int ring_active;
Antonino A. Daplas4b3760c2005-12-19 15:11:40 +0800268 int flag;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700269
270 /* hw cursor */
271 int cursor_on;
272 int cursor_blanked;
273 u8 cursor_src[64];
274
275 /* initial parameters */
276 int initial_vga;
277 struct fb_var_screeninfo initial_var;
278 u32 initial_fb_base;
279 u32 initial_video_ram;
280 u32 initial_pitch;
281
282 /* driver registered */
283 int registered;
Dave Airlied0249602006-03-20 20:26:45 +1100284
285 /* index into plls */
286 int pll_index;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700287};
288
Dave Airlie3aff13c2006-03-31 17:08:52 +1000289#define IS_I9XX(dinfo) (((dinfo)->chipset == INTEL_915G)||(dinfo->chipset == INTEL_915GM)||((dinfo)->chipset == INTEL_945G)||(dinfo->chipset==INTEL_945GM))
Dave Airlie8bb91f62006-03-23 13:06:32 +1100290
Linus Torvalds1da177e2005-04-16 15:20:36 -0700291/*** function prototypes ***/
292
293extern int intelfb_var_to_depth(const struct fb_var_screeninfo *var);
294
295#endif /* _INTELFB_H */