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Linus Walleij2744e8a2011-05-02 20:50:54 +02001/*
2 * Interface the pinctrl subsystem
3 *
4 * Copyright (C) 2011 ST-Ericsson SA
5 * Written on behalf of Linaro for ST-Ericsson
6 * This interface is used in the core to keep track of pins.
7 *
8 * Author: Linus Walleij <linus.walleij@linaro.org>
9 *
10 * License terms: GNU General Public License (GPL) version 2
11 */
12#ifndef __LINUX_PINCTRL_PINCTRL_H
13#define __LINUX_PINCTRL_PINCTRL_H
14
15#ifdef CONFIG_PINCTRL
16
17#include <linux/radix-tree.h>
18#include <linux/spinlock.h>
19#include <linux/list.h>
20#include <linux/seq_file.h>
21
22struct pinctrl_dev;
23struct pinmux_ops;
24struct gpio_chip;
25
26/**
27 * struct pinctrl_pin_desc - boards/machines provide information on their
28 * pins, pads or other muxable units in this struct
29 * @number: unique pin number from the global pin number space
30 * @name: a name for this pin
31 */
32struct pinctrl_pin_desc {
33 unsigned number;
34 const char *name;
35};
36
37/* Convenience macro to define a single named or anonymous pin descriptor */
38#define PINCTRL_PIN(a, b) { .number = a, .name = b }
39#define PINCTRL_PIN_ANON(a) { .number = a }
40
41/**
42 * struct pinctrl_gpio_range - each pin controller can provide subranges of
43 * the GPIO number space to be handled by the controller
44 * @node: list node for internal use
45 * @name: a name for the chip in this range
46 * @id: an ID number for the chip in this range
47 * @base: base offset of the GPIO range
Chanho Park3c739ad2011-11-11 18:47:58 +090048 * @pin_base: base pin number of the GPIO range
Linus Walleij2744e8a2011-05-02 20:50:54 +020049 * @npins: number of pins in the GPIO range, including the base number
50 * @gc: an optional pointer to a gpio_chip
51 */
52struct pinctrl_gpio_range {
53 struct list_head node;
54 const char *name;
55 unsigned int id;
56 unsigned int base;
Chanho Park3c739ad2011-11-11 18:47:58 +090057 unsigned int pin_base;
Linus Walleij2744e8a2011-05-02 20:50:54 +020058 unsigned int npins;
59 struct gpio_chip *gc;
60};
61
62/**
63 * struct pinctrl_ops - global pin control operations, to be implemented by
64 * pin controller drivers.
65 * @list_groups: list the number of selectable named groups available
66 * in this pinmux driver, the core will begin on 0 and call this
67 * repeatedly as long as it returns >= 0 to enumerate the groups
68 * @get_group_name: return the group name of the pin group
69 * @get_group_pins: return an array of pins corresponding to a certain
70 * group selector @pins, and the size of the array in @num_pins
71 * @pin_dbg_show: optional debugfs display hook that will provide per-device
72 * info for a certain pin in debugfs
73 */
74struct pinctrl_ops {
75 int (*list_groups) (struct pinctrl_dev *pctldev, unsigned selector);
76 const char *(*get_group_name) (struct pinctrl_dev *pctldev,
77 unsigned selector);
78 int (*get_group_pins) (struct pinctrl_dev *pctldev,
79 unsigned selector,
Stephen Warrena5818a82011-10-19 16:19:25 -060080 const unsigned **pins,
81 unsigned *num_pins);
Linus Walleij2744e8a2011-05-02 20:50:54 +020082 void (*pin_dbg_show) (struct pinctrl_dev *pctldev, struct seq_file *s,
83 unsigned offset);
84};
85
86/**
87 * struct pinctrl_desc - pin controller descriptor, register this to pin
88 * control subsystem
89 * @name: name for the pin controller
90 * @pins: an array of pin descriptors describing all the pins handled by
91 * this pin controller
92 * @npins: number of descriptors in the array, usually just ARRAY_SIZE()
93 * of the pins field above
94 * @maxpin: since pin spaces may be sparse, there can he "holes" in the
95 * pin range, this attribute gives the maximum pin number in the
96 * total range. This should not be lower than npins for example,
97 * but may be equal to npins if you have no holes in the pin range.
98 * @pctlops: pin control operation vtable, to support global concepts like
99 * grouping of pins, this is optional.
100 * @pmxops: pinmux operation vtable, if you support pinmuxing in your driver
101 * @owner: module providing the pin controller, used for refcounting
102 */
103struct pinctrl_desc {
104 const char *name;
105 struct pinctrl_pin_desc const *pins;
106 unsigned int npins;
107 unsigned int maxpin;
108 struct pinctrl_ops *pctlops;
109 struct pinmux_ops *pmxops;
110 struct module *owner;
111};
112
113/* External interface to pin controller */
114extern struct pinctrl_dev *pinctrl_register(struct pinctrl_desc *pctldesc,
115 struct device *dev, void *driver_data);
116extern void pinctrl_unregister(struct pinctrl_dev *pctldev);
117extern bool pin_is_valid(struct pinctrl_dev *pctldev, int pin);
118extern void pinctrl_add_gpio_range(struct pinctrl_dev *pctldev,
119 struct pinctrl_gpio_range *range);
120extern void pinctrl_remove_gpio_range(struct pinctrl_dev *pctldev,
121 struct pinctrl_gpio_range *range);
122extern const char *pinctrl_dev_get_name(struct pinctrl_dev *pctldev);
123extern void *pinctrl_dev_get_drvdata(struct pinctrl_dev *pctldev);
124#else
125
Barry Songe0e20752011-10-27 20:38:24 -0700126struct pinctrl_dev;
Linus Walleij2744e8a2011-05-02 20:50:54 +0200127
128/* Sufficiently stupid default function when pinctrl is not in use */
129static inline bool pin_is_valid(struct pinctrl_dev *pctldev, int pin)
130{
131 return pin >= 0;
132}
133
134#endif /* !CONFIG_PINCTRL */
135
136#endif /* __LINUX_PINCTRL_PINCTRL_H */