Yusuke Goda | fdc50a9 | 2010-05-26 14:41:59 -0700 | [diff] [blame] | 1 | /* |
| 2 | * MMCIF eMMC driver. |
| 3 | * |
| 4 | * Copyright (C) 2010 Renesas Solutions Corp. |
| 5 | * Yusuke Goda <yusuke.goda.sx@renesas.com> |
| 6 | * |
| 7 | * This program is free software; you can redistribute it and/or modify |
| 8 | * it under the terms of the GNU General Public License as published by |
| 9 | * the Free Software Foundation; either version 2 of the License. |
| 10 | * |
| 11 | * |
| 12 | * TODO |
| 13 | * 1. DMA |
| 14 | * 2. Power management |
| 15 | * 3. Handle MMC errors better |
| 16 | * |
| 17 | */ |
| 18 | |
Guennadi Liakhovetski | f985da1 | 2011-12-25 21:07:52 +0100 | [diff] [blame] | 19 | /* |
| 20 | * The MMCIF driver is now processing MMC requests asynchronously, according |
| 21 | * to the Linux MMC API requirement. |
| 22 | * |
| 23 | * The MMCIF driver processes MMC requests in up to 3 stages: command, optional |
| 24 | * data, and optional stop. To achieve asynchronous processing each of these |
| 25 | * stages is split into two halves: a top and a bottom half. The top half |
| 26 | * initialises the hardware, installs a timeout handler to handle completion |
| 27 | * timeouts, and returns. In case of the command stage this immediately returns |
| 28 | * control to the caller, leaving all further processing to run asynchronously. |
| 29 | * All further request processing is performed by the bottom halves. |
| 30 | * |
| 31 | * The bottom half further consists of a "hard" IRQ handler, an IRQ handler |
| 32 | * thread, a DMA completion callback, if DMA is used, a timeout work, and |
| 33 | * request- and stage-specific handler methods. |
| 34 | * |
| 35 | * Each bottom half run begins with either a hardware interrupt, a DMA callback |
| 36 | * invocation, or a timeout work run. In case of an error or a successful |
| 37 | * processing completion, the MMC core is informed and the request processing is |
| 38 | * finished. In case processing has to continue, i.e., if data has to be read |
| 39 | * from or written to the card, or if a stop command has to be sent, the next |
| 40 | * top half is called, which performs the necessary hardware handling and |
| 41 | * reschedules the timeout work. This returns the driver state machine into the |
| 42 | * bottom half waiting state. |
| 43 | */ |
| 44 | |
Guennadi Liakhovetski | 86df174 | 2011-11-23 15:52:30 +0100 | [diff] [blame] | 45 | #include <linux/bitops.h> |
Guennadi Liakhovetski | aa0787a | 2010-11-24 10:05:12 +0000 | [diff] [blame] | 46 | #include <linux/clk.h> |
| 47 | #include <linux/completion.h> |
Guennadi Liakhovetski | e47bf32 | 2010-11-24 10:05:18 +0000 | [diff] [blame] | 48 | #include <linux/delay.h> |
Yusuke Goda | fdc50a9 | 2010-05-26 14:41:59 -0700 | [diff] [blame] | 49 | #include <linux/dma-mapping.h> |
Guennadi Liakhovetski | a782d68 | 2010-11-24 10:05:22 +0000 | [diff] [blame] | 50 | #include <linux/dmaengine.h> |
Yusuke Goda | fdc50a9 | 2010-05-26 14:41:59 -0700 | [diff] [blame] | 51 | #include <linux/mmc/card.h> |
| 52 | #include <linux/mmc/core.h> |
Guennadi Liakhovetski | e47bf32 | 2010-11-24 10:05:18 +0000 | [diff] [blame] | 53 | #include <linux/mmc/host.h> |
Yusuke Goda | fdc50a9 | 2010-05-26 14:41:59 -0700 | [diff] [blame] | 54 | #include <linux/mmc/mmc.h> |
| 55 | #include <linux/mmc/sdio.h> |
Yusuke Goda | fdc50a9 | 2010-05-26 14:41:59 -0700 | [diff] [blame] | 56 | #include <linux/mmc/sh_mmcif.h> |
Guennadi Liakhovetski | e480606 | 2012-06-14 14:24:35 +0200 | [diff] [blame] | 57 | #include <linux/mmc/slot-gpio.h> |
Guennadi Liakhovetski | bf68a81 | 2012-05-01 18:18:16 +0200 | [diff] [blame] | 58 | #include <linux/mod_devicetable.h> |
Guennadi Liakhovetski | 8047310 | 2012-12-12 15:38:14 +0100 | [diff] [blame] | 59 | #include <linux/mutex.h> |
Kuninori Morimoto | 89d49a7 | 2015-05-14 07:22:46 +0000 | [diff] [blame] | 60 | #include <linux/of_device.h> |
Guennadi Liakhovetski | a782d68 | 2010-11-24 10:05:22 +0000 | [diff] [blame] | 61 | #include <linux/pagemap.h> |
Guennadi Liakhovetski | e47bf32 | 2010-11-24 10:05:18 +0000 | [diff] [blame] | 62 | #include <linux/platform_device.h> |
Rafael J. Wysocki | efe6a8a | 2012-03-13 01:02:15 +0100 | [diff] [blame] | 63 | #include <linux/pm_qos.h> |
Guennadi Liakhovetski | faca664 | 2011-05-05 16:20:48 +0000 | [diff] [blame] | 64 | #include <linux/pm_runtime.h> |
Guennadi Liakhovetski | d00cada | 2013-08-02 14:48:02 +0200 | [diff] [blame] | 65 | #include <linux/sh_dma.h> |
Guennadi Liakhovetski | 3b0beaf | 2011-04-15 18:30:47 +0000 | [diff] [blame] | 66 | #include <linux/spinlock.h> |
Paul Gortmaker | 88b4767 | 2011-07-03 15:15:51 -0400 | [diff] [blame] | 67 | #include <linux/module.h> |
Yusuke Goda | fdc50a9 | 2010-05-26 14:41:59 -0700 | [diff] [blame] | 68 | |
| 69 | #define DRIVER_NAME "sh_mmcif" |
| 70 | #define DRIVER_VERSION "2010-04-28" |
| 71 | |
Yusuke Goda | fdc50a9 | 2010-05-26 14:41:59 -0700 | [diff] [blame] | 72 | /* CE_CMD_SET */ |
| 73 | #define CMD_MASK 0x3f000000 |
| 74 | #define CMD_SET_RTYP_NO ((0 << 23) | (0 << 22)) |
| 75 | #define CMD_SET_RTYP_6B ((0 << 23) | (1 << 22)) /* R1/R1b/R3/R4/R5 */ |
| 76 | #define CMD_SET_RTYP_17B ((1 << 23) | (0 << 22)) /* R2 */ |
| 77 | #define CMD_SET_RBSY (1 << 21) /* R1b */ |
| 78 | #define CMD_SET_CCSEN (1 << 20) |
| 79 | #define CMD_SET_WDAT (1 << 19) /* 1: on data, 0: no data */ |
| 80 | #define CMD_SET_DWEN (1 << 18) /* 1: write, 0: read */ |
| 81 | #define CMD_SET_CMLTE (1 << 17) /* 1: multi block trans, 0: single */ |
| 82 | #define CMD_SET_CMD12EN (1 << 16) /* 1: CMD12 auto issue */ |
| 83 | #define CMD_SET_RIDXC_INDEX ((0 << 15) | (0 << 14)) /* index check */ |
| 84 | #define CMD_SET_RIDXC_BITS ((0 << 15) | (1 << 14)) /* check bits check */ |
| 85 | #define CMD_SET_RIDXC_NO ((1 << 15) | (0 << 14)) /* no check */ |
| 86 | #define CMD_SET_CRC7C ((0 << 13) | (0 << 12)) /* CRC7 check*/ |
| 87 | #define CMD_SET_CRC7C_BITS ((0 << 13) | (1 << 12)) /* check bits check*/ |
| 88 | #define CMD_SET_CRC7C_INTERNAL ((1 << 13) | (0 << 12)) /* internal CRC7 check*/ |
| 89 | #define CMD_SET_CRC16C (1 << 10) /* 0: CRC16 check*/ |
| 90 | #define CMD_SET_CRCSTE (1 << 8) /* 1: not receive CRC status */ |
| 91 | #define CMD_SET_TBIT (1 << 7) /* 1: tran mission bit "Low" */ |
| 92 | #define CMD_SET_OPDM (1 << 6) /* 1: open/drain */ |
| 93 | #define CMD_SET_CCSH (1 << 5) |
Teppei Kamijou | 555061f | 2012-12-12 15:38:08 +0100 | [diff] [blame] | 94 | #define CMD_SET_DARS (1 << 2) /* Dual Data Rate */ |
Yusuke Goda | fdc50a9 | 2010-05-26 14:41:59 -0700 | [diff] [blame] | 95 | #define CMD_SET_DATW_1 ((0 << 1) | (0 << 0)) /* 1bit */ |
| 96 | #define CMD_SET_DATW_4 ((0 << 1) | (1 << 0)) /* 4bit */ |
| 97 | #define CMD_SET_DATW_8 ((1 << 1) | (0 << 0)) /* 8bit */ |
| 98 | |
| 99 | /* CE_CMD_CTRL */ |
| 100 | #define CMD_CTRL_BREAK (1 << 0) |
| 101 | |
| 102 | /* CE_BLOCK_SET */ |
| 103 | #define BLOCK_SIZE_MASK 0x0000ffff |
| 104 | |
Yusuke Goda | fdc50a9 | 2010-05-26 14:41:59 -0700 | [diff] [blame] | 105 | /* CE_INT */ |
| 106 | #define INT_CCSDE (1 << 29) |
| 107 | #define INT_CMD12DRE (1 << 26) |
| 108 | #define INT_CMD12RBE (1 << 25) |
| 109 | #define INT_CMD12CRE (1 << 24) |
| 110 | #define INT_DTRANE (1 << 23) |
| 111 | #define INT_BUFRE (1 << 22) |
| 112 | #define INT_BUFWEN (1 << 21) |
| 113 | #define INT_BUFREN (1 << 20) |
| 114 | #define INT_CCSRCV (1 << 19) |
| 115 | #define INT_RBSYE (1 << 17) |
| 116 | #define INT_CRSPE (1 << 16) |
| 117 | #define INT_CMDVIO (1 << 15) |
| 118 | #define INT_BUFVIO (1 << 14) |
| 119 | #define INT_WDATERR (1 << 11) |
| 120 | #define INT_RDATERR (1 << 10) |
| 121 | #define INT_RIDXERR (1 << 9) |
| 122 | #define INT_RSPERR (1 << 8) |
| 123 | #define INT_CCSTO (1 << 5) |
| 124 | #define INT_CRCSTO (1 << 4) |
| 125 | #define INT_WDATTO (1 << 3) |
| 126 | #define INT_RDATTO (1 << 2) |
| 127 | #define INT_RBSYTO (1 << 1) |
| 128 | #define INT_RSPTO (1 << 0) |
| 129 | #define INT_ERR_STS (INT_CMDVIO | INT_BUFVIO | INT_WDATERR | \ |
| 130 | INT_RDATERR | INT_RIDXERR | INT_RSPERR | \ |
| 131 | INT_CCSTO | INT_CRCSTO | INT_WDATTO | \ |
| 132 | INT_RDATTO | INT_RBSYTO | INT_RSPTO) |
| 133 | |
Guennadi Liakhovetski | 8af5075 | 2012-12-12 15:45:14 +0100 | [diff] [blame] | 134 | #define INT_ALL (INT_RBSYE | INT_CRSPE | INT_BUFREN | \ |
| 135 | INT_BUFWEN | INT_CMD12DRE | INT_BUFRE | \ |
| 136 | INT_DTRANE | INT_CMD12RBE | INT_CMD12CRE) |
| 137 | |
Guennadi Liakhovetski | 967bcb7 | 2013-07-10 21:21:12 +0200 | [diff] [blame] | 138 | #define INT_CCS (INT_CCSTO | INT_CCSRCV | INT_CCSDE) |
| 139 | |
Yusuke Goda | fdc50a9 | 2010-05-26 14:41:59 -0700 | [diff] [blame] | 140 | /* CE_INT_MASK */ |
| 141 | #define MASK_ALL 0x00000000 |
| 142 | #define MASK_MCCSDE (1 << 29) |
| 143 | #define MASK_MCMD12DRE (1 << 26) |
| 144 | #define MASK_MCMD12RBE (1 << 25) |
| 145 | #define MASK_MCMD12CRE (1 << 24) |
| 146 | #define MASK_MDTRANE (1 << 23) |
| 147 | #define MASK_MBUFRE (1 << 22) |
| 148 | #define MASK_MBUFWEN (1 << 21) |
| 149 | #define MASK_MBUFREN (1 << 20) |
| 150 | #define MASK_MCCSRCV (1 << 19) |
| 151 | #define MASK_MRBSYE (1 << 17) |
| 152 | #define MASK_MCRSPE (1 << 16) |
| 153 | #define MASK_MCMDVIO (1 << 15) |
| 154 | #define MASK_MBUFVIO (1 << 14) |
| 155 | #define MASK_MWDATERR (1 << 11) |
| 156 | #define MASK_MRDATERR (1 << 10) |
| 157 | #define MASK_MRIDXERR (1 << 9) |
| 158 | #define MASK_MRSPERR (1 << 8) |
| 159 | #define MASK_MCCSTO (1 << 5) |
| 160 | #define MASK_MCRCSTO (1 << 4) |
| 161 | #define MASK_MWDATTO (1 << 3) |
| 162 | #define MASK_MRDATTO (1 << 2) |
| 163 | #define MASK_MRBSYTO (1 << 1) |
| 164 | #define MASK_MRSPTO (1 << 0) |
| 165 | |
Guennadi Liakhovetski | ee4b888 | 2011-12-14 19:31:52 +0100 | [diff] [blame] | 166 | #define MASK_START_CMD (MASK_MCMDVIO | MASK_MBUFVIO | MASK_MWDATERR | \ |
| 167 | MASK_MRDATERR | MASK_MRIDXERR | MASK_MRSPERR | \ |
Guennadi Liakhovetski | 967bcb7 | 2013-07-10 21:21:12 +0200 | [diff] [blame] | 168 | MASK_MCRCSTO | MASK_MWDATTO | \ |
Guennadi Liakhovetski | ee4b888 | 2011-12-14 19:31:52 +0100 | [diff] [blame] | 169 | MASK_MRDATTO | MASK_MRBSYTO | MASK_MRSPTO) |
| 170 | |
Guennadi Liakhovetski | 8af5075 | 2012-12-12 15:45:14 +0100 | [diff] [blame] | 171 | #define MASK_CLEAN (INT_ERR_STS | MASK_MRBSYE | MASK_MCRSPE | \ |
| 172 | MASK_MBUFREN | MASK_MBUFWEN | \ |
| 173 | MASK_MCMD12DRE | MASK_MBUFRE | MASK_MDTRANE | \ |
| 174 | MASK_MCMD12RBE | MASK_MCMD12CRE) |
| 175 | |
Yusuke Goda | fdc50a9 | 2010-05-26 14:41:59 -0700 | [diff] [blame] | 176 | /* CE_HOST_STS1 */ |
| 177 | #define STS1_CMDSEQ (1 << 31) |
| 178 | |
| 179 | /* CE_HOST_STS2 */ |
| 180 | #define STS2_CRCSTE (1 << 31) |
| 181 | #define STS2_CRC16E (1 << 30) |
| 182 | #define STS2_AC12CRCE (1 << 29) |
| 183 | #define STS2_RSPCRC7E (1 << 28) |
| 184 | #define STS2_CRCSTEBE (1 << 27) |
| 185 | #define STS2_RDATEBE (1 << 26) |
| 186 | #define STS2_AC12REBE (1 << 25) |
| 187 | #define STS2_RSPEBE (1 << 24) |
| 188 | #define STS2_AC12IDXE (1 << 23) |
| 189 | #define STS2_RSPIDXE (1 << 22) |
| 190 | #define STS2_CCSTO (1 << 15) |
| 191 | #define STS2_RDATTO (1 << 14) |
| 192 | #define STS2_DATBSYTO (1 << 13) |
| 193 | #define STS2_CRCSTTO (1 << 12) |
| 194 | #define STS2_AC12BSYTO (1 << 11) |
| 195 | #define STS2_RSPBSYTO (1 << 10) |
| 196 | #define STS2_AC12RSPTO (1 << 9) |
| 197 | #define STS2_RSPTO (1 << 8) |
| 198 | #define STS2_CRC_ERR (STS2_CRCSTE | STS2_CRC16E | \ |
| 199 | STS2_AC12CRCE | STS2_RSPCRC7E | STS2_CRCSTEBE) |
| 200 | #define STS2_TIMEOUT_ERR (STS2_CCSTO | STS2_RDATTO | \ |
| 201 | STS2_DATBSYTO | STS2_CRCSTTO | \ |
| 202 | STS2_AC12BSYTO | STS2_RSPBSYTO | \ |
| 203 | STS2_AC12RSPTO | STS2_RSPTO) |
| 204 | |
Yusuke Goda | fdc50a9 | 2010-05-26 14:41:59 -0700 | [diff] [blame] | 205 | #define CLKDEV_EMMC_DATA 52000000 /* 52MHz */ |
| 206 | #define CLKDEV_MMC_DATA 20000000 /* 20MHz */ |
| 207 | #define CLKDEV_INIT 400000 /* 400 KHz */ |
| 208 | |
Kuninori Morimoto | 1b1a694 | 2015-05-14 07:21:36 +0000 | [diff] [blame] | 209 | enum sh_mmcif_state { |
Guennadi Liakhovetski | 3b0beaf | 2011-04-15 18:30:47 +0000 | [diff] [blame] | 210 | STATE_IDLE, |
| 211 | STATE_REQUEST, |
| 212 | STATE_IOS, |
Guennadi Liakhovetski | 8047310 | 2012-12-12 15:38:14 +0100 | [diff] [blame] | 213 | STATE_TIMEOUT, |
Guennadi Liakhovetski | 3b0beaf | 2011-04-15 18:30:47 +0000 | [diff] [blame] | 214 | }; |
| 215 | |
Kuninori Morimoto | 1b1a694 | 2015-05-14 07:21:36 +0000 | [diff] [blame] | 216 | enum sh_mmcif_wait_for { |
Guennadi Liakhovetski | f985da1 | 2011-12-25 21:07:52 +0100 | [diff] [blame] | 217 | MMCIF_WAIT_FOR_REQUEST, |
| 218 | MMCIF_WAIT_FOR_CMD, |
| 219 | MMCIF_WAIT_FOR_MREAD, |
| 220 | MMCIF_WAIT_FOR_MWRITE, |
| 221 | MMCIF_WAIT_FOR_READ, |
| 222 | MMCIF_WAIT_FOR_WRITE, |
| 223 | MMCIF_WAIT_FOR_READ_END, |
| 224 | MMCIF_WAIT_FOR_WRITE_END, |
| 225 | MMCIF_WAIT_FOR_STOP, |
| 226 | }; |
| 227 | |
Kuninori Morimoto | 89d49a7 | 2015-05-14 07:22:46 +0000 | [diff] [blame] | 228 | /* |
| 229 | * difference for each SoC |
| 230 | */ |
Yusuke Goda | fdc50a9 | 2010-05-26 14:41:59 -0700 | [diff] [blame] | 231 | struct sh_mmcif_host { |
| 232 | struct mmc_host *mmc; |
Guennadi Liakhovetski | f985da1 | 2011-12-25 21:07:52 +0100 | [diff] [blame] | 233 | struct mmc_request *mrq; |
Yusuke Goda | fdc50a9 | 2010-05-26 14:41:59 -0700 | [diff] [blame] | 234 | struct platform_device *pd; |
Kuninori Morimoto | 6aed678 | 2015-04-23 08:15:08 +0000 | [diff] [blame] | 235 | struct clk *clk; |
Yusuke Goda | fdc50a9 | 2010-05-26 14:41:59 -0700 | [diff] [blame] | 236 | int bus_width; |
Teppei Kamijou | 555061f | 2012-12-12 15:38:08 +0100 | [diff] [blame] | 237 | unsigned char timing; |
Guennadi Liakhovetski | aa0787a | 2010-11-24 10:05:12 +0000 | [diff] [blame] | 238 | bool sd_error; |
Guennadi Liakhovetski | f985da1 | 2011-12-25 21:07:52 +0100 | [diff] [blame] | 239 | bool dying; |
Yusuke Goda | fdc50a9 | 2010-05-26 14:41:59 -0700 | [diff] [blame] | 240 | long timeout; |
| 241 | void __iomem *addr; |
Guennadi Liakhovetski | f985da1 | 2011-12-25 21:07:52 +0100 | [diff] [blame] | 242 | u32 *pio_ptr; |
Guennadi Liakhovetski | ee4b888 | 2011-12-14 19:31:52 +0100 | [diff] [blame] | 243 | spinlock_t lock; /* protect sh_mmcif_host::state */ |
Kuninori Morimoto | 1b1a694 | 2015-05-14 07:21:36 +0000 | [diff] [blame] | 244 | enum sh_mmcif_state state; |
| 245 | enum sh_mmcif_wait_for wait_for; |
Guennadi Liakhovetski | f985da1 | 2011-12-25 21:07:52 +0100 | [diff] [blame] | 246 | struct delayed_work timeout_work; |
| 247 | size_t blocksize; |
| 248 | int sg_idx; |
| 249 | int sg_blkidx; |
Guennadi Liakhovetski | faca664 | 2011-05-05 16:20:48 +0000 | [diff] [blame] | 250 | bool power; |
Guennadi Liakhovetski | 967bcb7 | 2013-07-10 21:21:12 +0200 | [diff] [blame] | 251 | bool ccs_enable; /* Command Completion Signal support */ |
Guennadi Liakhovetski | 6d6fd36 | 2013-07-10 21:21:13 +0200 | [diff] [blame] | 252 | bool clk_ctrl2_enable; |
Guennadi Liakhovetski | 8047310 | 2012-12-12 15:38:14 +0100 | [diff] [blame] | 253 | struct mutex thread_lock; |
Kuninori Morimoto | 89d49a7 | 2015-05-14 07:22:46 +0000 | [diff] [blame] | 254 | u32 clkdiv_map; /* see CE_CLK_CTRL::CLKDIV */ |
Yusuke Goda | fdc50a9 | 2010-05-26 14:41:59 -0700 | [diff] [blame] | 255 | |
Guennadi Liakhovetski | a782d68 | 2010-11-24 10:05:22 +0000 | [diff] [blame] | 256 | /* DMA support */ |
| 257 | struct dma_chan *chan_rx; |
| 258 | struct dma_chan *chan_tx; |
| 259 | struct completion dma_complete; |
Linus Walleij | f38f94c | 2011-02-10 16:09:50 +0100 | [diff] [blame] | 260 | bool dma_active; |
Guennadi Liakhovetski | a782d68 | 2010-11-24 10:05:22 +0000 | [diff] [blame] | 261 | }; |
Yusuke Goda | fdc50a9 | 2010-05-26 14:41:59 -0700 | [diff] [blame] | 262 | |
Kuninori Morimoto | 1b1a694 | 2015-05-14 07:21:36 +0000 | [diff] [blame] | 263 | static const struct of_device_id sh_mmcif_of_match[] = { |
Kuninori Morimoto | 70830b4 | 2015-04-23 08:13:25 +0000 | [diff] [blame] | 264 | { .compatible = "renesas,sh-mmcif" }, |
| 265 | { } |
| 266 | }; |
Kuninori Morimoto | 1b1a694 | 2015-05-14 07:21:36 +0000 | [diff] [blame] | 267 | MODULE_DEVICE_TABLE(of, sh_mmcif_of_match); |
Kuninori Morimoto | 70830b4 | 2015-04-23 08:13:25 +0000 | [diff] [blame] | 268 | |
Kuninori Morimoto | 585c3a5 | 2015-05-14 07:21:18 +0000 | [diff] [blame] | 269 | #define sh_mmcif_host_to_dev(host) (&host->pd->dev) |
| 270 | |
Yusuke Goda | fdc50a9 | 2010-05-26 14:41:59 -0700 | [diff] [blame] | 271 | static inline void sh_mmcif_bitset(struct sh_mmcif_host *host, |
| 272 | unsigned int reg, u32 val) |
| 273 | { |
Magnus Damm | 487d9fc | 2010-05-18 14:42:51 +0000 | [diff] [blame] | 274 | writel(val | readl(host->addr + reg), host->addr + reg); |
Yusuke Goda | fdc50a9 | 2010-05-26 14:41:59 -0700 | [diff] [blame] | 275 | } |
| 276 | |
| 277 | static inline void sh_mmcif_bitclr(struct sh_mmcif_host *host, |
| 278 | unsigned int reg, u32 val) |
| 279 | { |
Magnus Damm | 487d9fc | 2010-05-18 14:42:51 +0000 | [diff] [blame] | 280 | writel(~val & readl(host->addr + reg), host->addr + reg); |
Yusuke Goda | fdc50a9 | 2010-05-26 14:41:59 -0700 | [diff] [blame] | 281 | } |
| 282 | |
Kuninori Morimoto | 1b1a694 | 2015-05-14 07:21:36 +0000 | [diff] [blame] | 283 | static void sh_mmcif_dma_complete(void *arg) |
Guennadi Liakhovetski | a782d68 | 2010-11-24 10:05:22 +0000 | [diff] [blame] | 284 | { |
| 285 | struct sh_mmcif_host *host = arg; |
Guennadi Liakhovetski | 8047310 | 2012-12-12 15:38:14 +0100 | [diff] [blame] | 286 | struct mmc_request *mrq = host->mrq; |
Kuninori Morimoto | 585c3a5 | 2015-05-14 07:21:18 +0000 | [diff] [blame] | 287 | struct device *dev = sh_mmcif_host_to_dev(host); |
Guennadi Liakhovetski | 6998340 | 2011-12-26 12:52:13 -0500 | [diff] [blame] | 288 | |
Kuninori Morimoto | 585c3a5 | 2015-05-14 07:21:18 +0000 | [diff] [blame] | 289 | dev_dbg(dev, "Command completed\n"); |
Guennadi Liakhovetski | a782d68 | 2010-11-24 10:05:22 +0000 | [diff] [blame] | 290 | |
Guennadi Liakhovetski | 8047310 | 2012-12-12 15:38:14 +0100 | [diff] [blame] | 291 | if (WARN(!mrq || !mrq->data, "%s: NULL data in DMA completion!\n", |
Kuninori Morimoto | 585c3a5 | 2015-05-14 07:21:18 +0000 | [diff] [blame] | 292 | dev_name(dev))) |
Guennadi Liakhovetski | a782d68 | 2010-11-24 10:05:22 +0000 | [diff] [blame] | 293 | return; |
| 294 | |
Guennadi Liakhovetski | a782d68 | 2010-11-24 10:05:22 +0000 | [diff] [blame] | 295 | complete(&host->dma_complete); |
| 296 | } |
| 297 | |
| 298 | static void sh_mmcif_start_dma_rx(struct sh_mmcif_host *host) |
| 299 | { |
Guennadi Liakhovetski | 6998340 | 2011-12-26 12:52:13 -0500 | [diff] [blame] | 300 | struct mmc_data *data = host->mrq->data; |
| 301 | struct scatterlist *sg = data->sg; |
Guennadi Liakhovetski | a782d68 | 2010-11-24 10:05:22 +0000 | [diff] [blame] | 302 | struct dma_async_tx_descriptor *desc = NULL; |
| 303 | struct dma_chan *chan = host->chan_rx; |
Kuninori Morimoto | 585c3a5 | 2015-05-14 07:21:18 +0000 | [diff] [blame] | 304 | struct device *dev = sh_mmcif_host_to_dev(host); |
Guennadi Liakhovetski | a782d68 | 2010-11-24 10:05:22 +0000 | [diff] [blame] | 305 | dma_cookie_t cookie = -EINVAL; |
| 306 | int ret; |
| 307 | |
Guennadi Liakhovetski | 6998340 | 2011-12-26 12:52:13 -0500 | [diff] [blame] | 308 | ret = dma_map_sg(chan->device->dev, sg, data->sg_len, |
Linus Walleij | 1ed828d | 2011-02-10 16:09:29 +0100 | [diff] [blame] | 309 | DMA_FROM_DEVICE); |
Guennadi Liakhovetski | a782d68 | 2010-11-24 10:05:22 +0000 | [diff] [blame] | 310 | if (ret > 0) { |
Linus Walleij | f38f94c | 2011-02-10 16:09:50 +0100 | [diff] [blame] | 311 | host->dma_active = true; |
Alexandre Bounine | 1605282 | 2012-03-08 16:11:18 -0500 | [diff] [blame] | 312 | desc = dmaengine_prep_slave_sg(chan, sg, ret, |
Vinod Koul | 05f5799 | 2011-10-14 10:45:11 +0530 | [diff] [blame] | 313 | DMA_DEV_TO_MEM, DMA_PREP_INTERRUPT | DMA_CTRL_ACK); |
Guennadi Liakhovetski | a782d68 | 2010-11-24 10:05:22 +0000 | [diff] [blame] | 314 | } |
| 315 | |
| 316 | if (desc) { |
Kuninori Morimoto | 1b1a694 | 2015-05-14 07:21:36 +0000 | [diff] [blame] | 317 | desc->callback = sh_mmcif_dma_complete; |
Guennadi Liakhovetski | a782d68 | 2010-11-24 10:05:22 +0000 | [diff] [blame] | 318 | desc->callback_param = host; |
Linus Walleij | a5ece7d | 2011-02-10 16:10:00 +0100 | [diff] [blame] | 319 | cookie = dmaengine_submit(desc); |
| 320 | sh_mmcif_bitset(host, MMCIF_CE_BUF_ACC, BUF_ACC_DMAREN); |
| 321 | dma_async_issue_pending(chan); |
Guennadi Liakhovetski | a782d68 | 2010-11-24 10:05:22 +0000 | [diff] [blame] | 322 | } |
Kuninori Morimoto | 585c3a5 | 2015-05-14 07:21:18 +0000 | [diff] [blame] | 323 | dev_dbg(dev, "%s(): mapped %d -> %d, cookie %d\n", |
Guennadi Liakhovetski | 6998340 | 2011-12-26 12:52:13 -0500 | [diff] [blame] | 324 | __func__, data->sg_len, ret, cookie); |
Guennadi Liakhovetski | a782d68 | 2010-11-24 10:05:22 +0000 | [diff] [blame] | 325 | |
| 326 | if (!desc) { |
| 327 | /* DMA failed, fall back to PIO */ |
| 328 | if (ret >= 0) |
| 329 | ret = -EIO; |
| 330 | host->chan_rx = NULL; |
Linus Walleij | f38f94c | 2011-02-10 16:09:50 +0100 | [diff] [blame] | 331 | host->dma_active = false; |
Guennadi Liakhovetski | a782d68 | 2010-11-24 10:05:22 +0000 | [diff] [blame] | 332 | dma_release_channel(chan); |
| 333 | /* Free the Tx channel too */ |
| 334 | chan = host->chan_tx; |
| 335 | if (chan) { |
| 336 | host->chan_tx = NULL; |
| 337 | dma_release_channel(chan); |
| 338 | } |
Kuninori Morimoto | 585c3a5 | 2015-05-14 07:21:18 +0000 | [diff] [blame] | 339 | dev_warn(dev, |
Guennadi Liakhovetski | a782d68 | 2010-11-24 10:05:22 +0000 | [diff] [blame] | 340 | "DMA failed: %d, falling back to PIO\n", ret); |
| 341 | sh_mmcif_bitclr(host, MMCIF_CE_BUF_ACC, BUF_ACC_DMAREN | BUF_ACC_DMAWEN); |
| 342 | } |
| 343 | |
Kuninori Morimoto | 585c3a5 | 2015-05-14 07:21:18 +0000 | [diff] [blame] | 344 | dev_dbg(dev, "%s(): desc %p, cookie %d, sg[%d]\n", __func__, |
Guennadi Liakhovetski | 6998340 | 2011-12-26 12:52:13 -0500 | [diff] [blame] | 345 | desc, cookie, data->sg_len); |
Guennadi Liakhovetski | a782d68 | 2010-11-24 10:05:22 +0000 | [diff] [blame] | 346 | } |
| 347 | |
| 348 | static void sh_mmcif_start_dma_tx(struct sh_mmcif_host *host) |
| 349 | { |
Guennadi Liakhovetski | 6998340 | 2011-12-26 12:52:13 -0500 | [diff] [blame] | 350 | struct mmc_data *data = host->mrq->data; |
| 351 | struct scatterlist *sg = data->sg; |
Guennadi Liakhovetski | a782d68 | 2010-11-24 10:05:22 +0000 | [diff] [blame] | 352 | struct dma_async_tx_descriptor *desc = NULL; |
| 353 | struct dma_chan *chan = host->chan_tx; |
Kuninori Morimoto | 585c3a5 | 2015-05-14 07:21:18 +0000 | [diff] [blame] | 354 | struct device *dev = sh_mmcif_host_to_dev(host); |
Guennadi Liakhovetski | a782d68 | 2010-11-24 10:05:22 +0000 | [diff] [blame] | 355 | dma_cookie_t cookie = -EINVAL; |
| 356 | int ret; |
| 357 | |
Guennadi Liakhovetski | 6998340 | 2011-12-26 12:52:13 -0500 | [diff] [blame] | 358 | ret = dma_map_sg(chan->device->dev, sg, data->sg_len, |
Linus Walleij | 1ed828d | 2011-02-10 16:09:29 +0100 | [diff] [blame] | 359 | DMA_TO_DEVICE); |
Guennadi Liakhovetski | a782d68 | 2010-11-24 10:05:22 +0000 | [diff] [blame] | 360 | if (ret > 0) { |
Linus Walleij | f38f94c | 2011-02-10 16:09:50 +0100 | [diff] [blame] | 361 | host->dma_active = true; |
Alexandre Bounine | 1605282 | 2012-03-08 16:11:18 -0500 | [diff] [blame] | 362 | desc = dmaengine_prep_slave_sg(chan, sg, ret, |
Vinod Koul | 05f5799 | 2011-10-14 10:45:11 +0530 | [diff] [blame] | 363 | DMA_MEM_TO_DEV, DMA_PREP_INTERRUPT | DMA_CTRL_ACK); |
Guennadi Liakhovetski | a782d68 | 2010-11-24 10:05:22 +0000 | [diff] [blame] | 364 | } |
| 365 | |
| 366 | if (desc) { |
Kuninori Morimoto | 1b1a694 | 2015-05-14 07:21:36 +0000 | [diff] [blame] | 367 | desc->callback = sh_mmcif_dma_complete; |
Guennadi Liakhovetski | a782d68 | 2010-11-24 10:05:22 +0000 | [diff] [blame] | 368 | desc->callback_param = host; |
Linus Walleij | a5ece7d | 2011-02-10 16:10:00 +0100 | [diff] [blame] | 369 | cookie = dmaengine_submit(desc); |
| 370 | sh_mmcif_bitset(host, MMCIF_CE_BUF_ACC, BUF_ACC_DMAWEN); |
| 371 | dma_async_issue_pending(chan); |
Guennadi Liakhovetski | a782d68 | 2010-11-24 10:05:22 +0000 | [diff] [blame] | 372 | } |
Kuninori Morimoto | 585c3a5 | 2015-05-14 07:21:18 +0000 | [diff] [blame] | 373 | dev_dbg(dev, "%s(): mapped %d -> %d, cookie %d\n", |
Guennadi Liakhovetski | 6998340 | 2011-12-26 12:52:13 -0500 | [diff] [blame] | 374 | __func__, data->sg_len, ret, cookie); |
Guennadi Liakhovetski | a782d68 | 2010-11-24 10:05:22 +0000 | [diff] [blame] | 375 | |
| 376 | if (!desc) { |
| 377 | /* DMA failed, fall back to PIO */ |
| 378 | if (ret >= 0) |
| 379 | ret = -EIO; |
| 380 | host->chan_tx = NULL; |
Linus Walleij | f38f94c | 2011-02-10 16:09:50 +0100 | [diff] [blame] | 381 | host->dma_active = false; |
Guennadi Liakhovetski | a782d68 | 2010-11-24 10:05:22 +0000 | [diff] [blame] | 382 | dma_release_channel(chan); |
| 383 | /* Free the Rx channel too */ |
| 384 | chan = host->chan_rx; |
| 385 | if (chan) { |
| 386 | host->chan_rx = NULL; |
| 387 | dma_release_channel(chan); |
| 388 | } |
Kuninori Morimoto | 585c3a5 | 2015-05-14 07:21:18 +0000 | [diff] [blame] | 389 | dev_warn(dev, |
Guennadi Liakhovetski | a782d68 | 2010-11-24 10:05:22 +0000 | [diff] [blame] | 390 | "DMA failed: %d, falling back to PIO\n", ret); |
| 391 | sh_mmcif_bitclr(host, MMCIF_CE_BUF_ACC, BUF_ACC_DMAREN | BUF_ACC_DMAWEN); |
| 392 | } |
| 393 | |
Kuninori Morimoto | 585c3a5 | 2015-05-14 07:21:18 +0000 | [diff] [blame] | 394 | dev_dbg(dev, "%s(): desc %p, cookie %d\n", __func__, |
Guennadi Liakhovetski | a782d68 | 2010-11-24 10:05:22 +0000 | [diff] [blame] | 395 | desc, cookie); |
| 396 | } |
| 397 | |
Laurent Pinchart | e5a233c | 2013-10-30 12:34:51 +0100 | [diff] [blame] | 398 | static struct dma_chan * |
Arnd Bergmann | 27cbd7e | 2015-11-16 17:08:41 +0100 | [diff] [blame] | 399 | sh_mmcif_request_dma_pdata(struct sh_mmcif_host *host, uintptr_t slave_id) |
Guennadi Liakhovetski | a782d68 | 2010-11-24 10:05:22 +0000 | [diff] [blame] | 400 | { |
Guennadi Liakhovetski | 0e79f9a | 2012-07-05 12:29:43 +0200 | [diff] [blame] | 401 | dma_cap_mask_t mask; |
Guennadi Liakhovetski | 0e79f9a | 2012-07-05 12:29:43 +0200 | [diff] [blame] | 402 | |
Laurent Pinchart | e5a233c | 2013-10-30 12:34:51 +0100 | [diff] [blame] | 403 | dma_cap_zero(mask); |
| 404 | dma_cap_set(DMA_SLAVE, mask); |
Arnd Bergmann | 27cbd7e | 2015-11-16 17:08:41 +0100 | [diff] [blame] | 405 | if (slave_id <= 0) |
Laurent Pinchart | e5a233c | 2013-10-30 12:34:51 +0100 | [diff] [blame] | 406 | return NULL; |
| 407 | |
Arnd Bergmann | 27cbd7e | 2015-11-16 17:08:41 +0100 | [diff] [blame] | 408 | return dma_request_channel(mask, shdma_chan_filter, (void *)slave_id); |
| 409 | } |
Laurent Pinchart | e5a233c | 2013-10-30 12:34:51 +0100 | [diff] [blame] | 410 | |
Arnd Bergmann | 27cbd7e | 2015-11-16 17:08:41 +0100 | [diff] [blame] | 411 | static int sh_mmcif_dma_slave_config(struct sh_mmcif_host *host, |
| 412 | struct dma_chan *chan, |
| 413 | enum dma_transfer_direction direction) |
| 414 | { |
| 415 | struct resource *res; |
| 416 | struct dma_slave_config cfg = { 0, }; |
| 417 | |
| 418 | res = platform_get_resource(host->pd, IORESOURCE_MEM, 0); |
Laurent Pinchart | e5a233c | 2013-10-30 12:34:51 +0100 | [diff] [blame] | 419 | cfg.direction = direction; |
Laurent Pinchart | d25006e | 2014-07-16 00:45:12 +0200 | [diff] [blame] | 420 | |
Laurent Pinchart | e36152a | 2014-07-16 00:45:13 +0200 | [diff] [blame] | 421 | if (direction == DMA_DEV_TO_MEM) { |
Laurent Pinchart | d25006e | 2014-07-16 00:45:12 +0200 | [diff] [blame] | 422 | cfg.src_addr = res->start + MMCIF_CE_DATA; |
Laurent Pinchart | e36152a | 2014-07-16 00:45:13 +0200 | [diff] [blame] | 423 | cfg.src_addr_width = DMA_SLAVE_BUSWIDTH_4_BYTES; |
| 424 | } else { |
Laurent Pinchart | d25006e | 2014-07-16 00:45:12 +0200 | [diff] [blame] | 425 | cfg.dst_addr = res->start + MMCIF_CE_DATA; |
Laurent Pinchart | e36152a | 2014-07-16 00:45:13 +0200 | [diff] [blame] | 426 | cfg.dst_addr_width = DMA_SLAVE_BUSWIDTH_4_BYTES; |
| 427 | } |
Laurent Pinchart | d25006e | 2014-07-16 00:45:12 +0200 | [diff] [blame] | 428 | |
Arnd Bergmann | 27cbd7e | 2015-11-16 17:08:41 +0100 | [diff] [blame] | 429 | return dmaengine_slave_config(chan, &cfg); |
Laurent Pinchart | e5a233c | 2013-10-30 12:34:51 +0100 | [diff] [blame] | 430 | } |
| 431 | |
Arnd Bergmann | 27cbd7e | 2015-11-16 17:08:41 +0100 | [diff] [blame] | 432 | static void sh_mmcif_request_dma(struct sh_mmcif_host *host) |
Laurent Pinchart | e5a233c | 2013-10-30 12:34:51 +0100 | [diff] [blame] | 433 | { |
Kuninori Morimoto | 585c3a5 | 2015-05-14 07:21:18 +0000 | [diff] [blame] | 434 | struct device *dev = sh_mmcif_host_to_dev(host); |
Linus Walleij | f38f94c | 2011-02-10 16:09:50 +0100 | [diff] [blame] | 435 | host->dma_active = false; |
Guennadi Liakhovetski | a782d68 | 2010-11-24 10:05:22 +0000 | [diff] [blame] | 436 | |
| 437 | /* We can only either use DMA for both Tx and Rx or not use it at all */ |
Arnd Bergmann | 27cbd7e | 2015-11-16 17:08:41 +0100 | [diff] [blame] | 438 | if (IS_ENABLED(CONFIG_SUPERH) && dev->platform_data) { |
| 439 | struct sh_mmcif_plat_data *pdata = dev->platform_data; |
Guennadi Liakhovetski | a782d68 | 2010-11-24 10:05:22 +0000 | [diff] [blame] | 440 | |
Arnd Bergmann | 27cbd7e | 2015-11-16 17:08:41 +0100 | [diff] [blame] | 441 | host->chan_tx = sh_mmcif_request_dma_pdata(host, |
| 442 | pdata->slave_id_tx); |
| 443 | host->chan_rx = sh_mmcif_request_dma_pdata(host, |
| 444 | pdata->slave_id_rx); |
| 445 | } else { |
| 446 | host->chan_tx = dma_request_slave_channel(dev, "tx"); |
Chris Paterson | a32ef81 | 2016-02-10 14:07:01 +0000 | [diff] [blame] | 447 | host->chan_rx = dma_request_slave_channel(dev, "rx"); |
Laurent Pinchart | e5a233c | 2013-10-30 12:34:51 +0100 | [diff] [blame] | 448 | } |
Arnd Bergmann | 27cbd7e | 2015-11-16 17:08:41 +0100 | [diff] [blame] | 449 | dev_dbg(dev, "%s: got channel TX %p RX %p\n", __func__, host->chan_tx, |
| 450 | host->chan_rx); |
| 451 | |
| 452 | if (!host->chan_tx || !host->chan_rx || |
| 453 | sh_mmcif_dma_slave_config(host, host->chan_tx, DMA_MEM_TO_DEV) || |
| 454 | sh_mmcif_dma_slave_config(host, host->chan_rx, DMA_DEV_TO_MEM)) |
| 455 | goto error; |
| 456 | |
| 457 | return; |
| 458 | |
| 459 | error: |
| 460 | if (host->chan_tx) |
| 461 | dma_release_channel(host->chan_tx); |
| 462 | if (host->chan_rx) |
| 463 | dma_release_channel(host->chan_rx); |
| 464 | host->chan_tx = host->chan_rx = NULL; |
Guennadi Liakhovetski | a782d68 | 2010-11-24 10:05:22 +0000 | [diff] [blame] | 465 | } |
| 466 | |
| 467 | static void sh_mmcif_release_dma(struct sh_mmcif_host *host) |
| 468 | { |
| 469 | sh_mmcif_bitclr(host, MMCIF_CE_BUF_ACC, BUF_ACC_DMAREN | BUF_ACC_DMAWEN); |
| 470 | /* Descriptors are freed automatically */ |
| 471 | if (host->chan_tx) { |
| 472 | struct dma_chan *chan = host->chan_tx; |
| 473 | host->chan_tx = NULL; |
| 474 | dma_release_channel(chan); |
| 475 | } |
| 476 | if (host->chan_rx) { |
| 477 | struct dma_chan *chan = host->chan_rx; |
| 478 | host->chan_rx = NULL; |
| 479 | dma_release_channel(chan); |
| 480 | } |
| 481 | |
Linus Walleij | f38f94c | 2011-02-10 16:09:50 +0100 | [diff] [blame] | 482 | host->dma_active = false; |
Guennadi Liakhovetski | a782d68 | 2010-11-24 10:05:22 +0000 | [diff] [blame] | 483 | } |
Yusuke Goda | fdc50a9 | 2010-05-26 14:41:59 -0700 | [diff] [blame] | 484 | |
| 485 | static void sh_mmcif_clock_control(struct sh_mmcif_host *host, unsigned int clk) |
| 486 | { |
Kuninori Morimoto | 585c3a5 | 2015-05-14 07:21:18 +0000 | [diff] [blame] | 487 | struct device *dev = sh_mmcif_host_to_dev(host); |
| 488 | struct sh_mmcif_plat_data *p = dev->platform_data; |
Guennadi Liakhovetski | bf68a81 | 2012-05-01 18:18:16 +0200 | [diff] [blame] | 489 | bool sup_pclk = p ? p->sup_pclk : false; |
Kuninori Morimoto | 6aed678 | 2015-04-23 08:15:08 +0000 | [diff] [blame] | 490 | unsigned int current_clk = clk_get_rate(host->clk); |
Kuninori Morimoto | 89d49a7 | 2015-05-14 07:22:46 +0000 | [diff] [blame] | 491 | unsigned int clkdiv; |
Yusuke Goda | fdc50a9 | 2010-05-26 14:41:59 -0700 | [diff] [blame] | 492 | |
| 493 | sh_mmcif_bitclr(host, MMCIF_CE_CLK_CTRL, CLK_ENABLE); |
| 494 | sh_mmcif_bitclr(host, MMCIF_CE_CLK_CTRL, CLK_CLEAR); |
| 495 | |
| 496 | if (!clk) |
| 497 | return; |
Yusuke Goda | fdc50a9 | 2010-05-26 14:41:59 -0700 | [diff] [blame] | 498 | |
Kuninori Morimoto | 89d49a7 | 2015-05-14 07:22:46 +0000 | [diff] [blame] | 499 | if (host->clkdiv_map) { |
| 500 | unsigned int freq, best_freq, myclk, div, diff_min, diff; |
| 501 | int i; |
| 502 | |
| 503 | clkdiv = 0; |
| 504 | diff_min = ~0; |
| 505 | best_freq = 0; |
| 506 | for (i = 31; i >= 0; i--) { |
| 507 | if (!((1 << i) & host->clkdiv_map)) |
| 508 | continue; |
| 509 | |
| 510 | /* |
| 511 | * clk = parent_freq / div |
| 512 | * -> parent_freq = clk x div |
| 513 | */ |
| 514 | |
| 515 | div = 1 << (i + 1); |
| 516 | freq = clk_round_rate(host->clk, clk * div); |
| 517 | myclk = freq / div; |
| 518 | diff = (myclk > clk) ? myclk - clk : clk - myclk; |
| 519 | |
| 520 | if (diff <= diff_min) { |
| 521 | best_freq = freq; |
| 522 | clkdiv = i; |
| 523 | diff_min = diff; |
| 524 | } |
| 525 | } |
| 526 | |
| 527 | dev_dbg(dev, "clk %u/%u (%u, 0x%x)\n", |
| 528 | (best_freq / (1 << (clkdiv + 1))), clk, |
| 529 | best_freq, clkdiv); |
| 530 | |
| 531 | clk_set_rate(host->clk, best_freq); |
| 532 | clkdiv = clkdiv << 16; |
| 533 | } else if (sup_pclk && clk == current_clk) { |
| 534 | clkdiv = CLK_SUP_PCLK; |
| 535 | } else { |
| 536 | clkdiv = (fls(DIV_ROUND_UP(current_clk, clk) - 1) - 1) << 16; |
| 537 | } |
| 538 | |
| 539 | sh_mmcif_bitset(host, MMCIF_CE_CLK_CTRL, CLK_CLEAR & clkdiv); |
Yusuke Goda | fdc50a9 | 2010-05-26 14:41:59 -0700 | [diff] [blame] | 540 | sh_mmcif_bitset(host, MMCIF_CE_CLK_CTRL, CLK_ENABLE); |
| 541 | } |
| 542 | |
| 543 | static void sh_mmcif_sync_reset(struct sh_mmcif_host *host) |
| 544 | { |
| 545 | u32 tmp; |
| 546 | |
Magnus Damm | 487d9fc | 2010-05-18 14:42:51 +0000 | [diff] [blame] | 547 | tmp = 0x010f0000 & sh_mmcif_readl(host->addr, MMCIF_CE_CLK_CTRL); |
Yusuke Goda | fdc50a9 | 2010-05-26 14:41:59 -0700 | [diff] [blame] | 548 | |
Magnus Damm | 487d9fc | 2010-05-18 14:42:51 +0000 | [diff] [blame] | 549 | sh_mmcif_writel(host->addr, MMCIF_CE_VERSION, SOFT_RST_ON); |
| 550 | sh_mmcif_writel(host->addr, MMCIF_CE_VERSION, SOFT_RST_OFF); |
Guennadi Liakhovetski | 967bcb7 | 2013-07-10 21:21:12 +0200 | [diff] [blame] | 551 | if (host->ccs_enable) |
| 552 | tmp |= SCCSTO_29; |
Guennadi Liakhovetski | 6d6fd36 | 2013-07-10 21:21:13 +0200 | [diff] [blame] | 553 | if (host->clk_ctrl2_enable) |
| 554 | sh_mmcif_writel(host->addr, MMCIF_CE_CLK_CTRL2, 0x0F0F0000); |
Yusuke Goda | fdc50a9 | 2010-05-26 14:41:59 -0700 | [diff] [blame] | 555 | sh_mmcif_bitset(host, MMCIF_CE_CLK_CTRL, tmp | |
Guennadi Liakhovetski | 967bcb7 | 2013-07-10 21:21:12 +0200 | [diff] [blame] | 556 | SRSPTO_256 | SRBSYTO_29 | SRWDTO_29); |
Yusuke Goda | fdc50a9 | 2010-05-26 14:41:59 -0700 | [diff] [blame] | 557 | /* byte swap on */ |
| 558 | sh_mmcif_bitset(host, MMCIF_CE_BUF_ACC, BUF_ACC_ATYP); |
| 559 | } |
| 560 | |
| 561 | static int sh_mmcif_error_manage(struct sh_mmcif_host *host) |
| 562 | { |
Kuninori Morimoto | 585c3a5 | 2015-05-14 07:21:18 +0000 | [diff] [blame] | 563 | struct device *dev = sh_mmcif_host_to_dev(host); |
Yusuke Goda | fdc50a9 | 2010-05-26 14:41:59 -0700 | [diff] [blame] | 564 | u32 state1, state2; |
Guennadi Liakhovetski | ee4b888 | 2011-12-14 19:31:52 +0100 | [diff] [blame] | 565 | int ret, timeout; |
Yusuke Goda | fdc50a9 | 2010-05-26 14:41:59 -0700 | [diff] [blame] | 566 | |
Guennadi Liakhovetski | aa0787a | 2010-11-24 10:05:12 +0000 | [diff] [blame] | 567 | host->sd_error = false; |
Yusuke Goda | fdc50a9 | 2010-05-26 14:41:59 -0700 | [diff] [blame] | 568 | |
Magnus Damm | 487d9fc | 2010-05-18 14:42:51 +0000 | [diff] [blame] | 569 | state1 = sh_mmcif_readl(host->addr, MMCIF_CE_HOST_STS1); |
| 570 | state2 = sh_mmcif_readl(host->addr, MMCIF_CE_HOST_STS2); |
Kuninori Morimoto | 585c3a5 | 2015-05-14 07:21:18 +0000 | [diff] [blame] | 571 | dev_dbg(dev, "ERR HOST_STS1 = %08x\n", state1); |
| 572 | dev_dbg(dev, "ERR HOST_STS2 = %08x\n", state2); |
Yusuke Goda | fdc50a9 | 2010-05-26 14:41:59 -0700 | [diff] [blame] | 573 | |
| 574 | if (state1 & STS1_CMDSEQ) { |
| 575 | sh_mmcif_bitset(host, MMCIF_CE_CMD_CTRL, CMD_CTRL_BREAK); |
| 576 | sh_mmcif_bitset(host, MMCIF_CE_CMD_CTRL, ~CMD_CTRL_BREAK); |
Guennadi Liakhovetski | ee4b888 | 2011-12-14 19:31:52 +0100 | [diff] [blame] | 577 | for (timeout = 10000000; timeout; timeout--) { |
Magnus Damm | 487d9fc | 2010-05-18 14:42:51 +0000 | [diff] [blame] | 578 | if (!(sh_mmcif_readl(host->addr, MMCIF_CE_HOST_STS1) |
Guennadi Liakhovetski | ee4b888 | 2011-12-14 19:31:52 +0100 | [diff] [blame] | 579 | & STS1_CMDSEQ)) |
Yusuke Goda | fdc50a9 | 2010-05-26 14:41:59 -0700 | [diff] [blame] | 580 | break; |
| 581 | mdelay(1); |
| 582 | } |
Guennadi Liakhovetski | ee4b888 | 2011-12-14 19:31:52 +0100 | [diff] [blame] | 583 | if (!timeout) { |
Kuninori Morimoto | 585c3a5 | 2015-05-14 07:21:18 +0000 | [diff] [blame] | 584 | dev_err(dev, |
Guennadi Liakhovetski | ee4b888 | 2011-12-14 19:31:52 +0100 | [diff] [blame] | 585 | "Forced end of command sequence timeout err\n"); |
| 586 | return -EIO; |
| 587 | } |
Yusuke Goda | fdc50a9 | 2010-05-26 14:41:59 -0700 | [diff] [blame] | 588 | sh_mmcif_sync_reset(host); |
Kuninori Morimoto | 585c3a5 | 2015-05-14 07:21:18 +0000 | [diff] [blame] | 589 | dev_dbg(dev, "Forced end of command sequence\n"); |
Yusuke Goda | fdc50a9 | 2010-05-26 14:41:59 -0700 | [diff] [blame] | 590 | return -EIO; |
| 591 | } |
| 592 | |
| 593 | if (state2 & STS2_CRC_ERR) { |
Kuninori Morimoto | 585c3a5 | 2015-05-14 07:21:18 +0000 | [diff] [blame] | 594 | dev_err(dev, " CRC error: state %u, wait %u\n", |
Teppei Kamijou | e475b27 | 2012-12-12 15:38:18 +0100 | [diff] [blame] | 595 | host->state, host->wait_for); |
Yusuke Goda | fdc50a9 | 2010-05-26 14:41:59 -0700 | [diff] [blame] | 596 | ret = -EIO; |
| 597 | } else if (state2 & STS2_TIMEOUT_ERR) { |
Kuninori Morimoto | 585c3a5 | 2015-05-14 07:21:18 +0000 | [diff] [blame] | 598 | dev_err(dev, " Timeout: state %u, wait %u\n", |
Teppei Kamijou | e475b27 | 2012-12-12 15:38:18 +0100 | [diff] [blame] | 599 | host->state, host->wait_for); |
Yusuke Goda | fdc50a9 | 2010-05-26 14:41:59 -0700 | [diff] [blame] | 600 | ret = -ETIMEDOUT; |
| 601 | } else { |
Kuninori Morimoto | 585c3a5 | 2015-05-14 07:21:18 +0000 | [diff] [blame] | 602 | dev_dbg(dev, " End/Index error: state %u, wait %u\n", |
Teppei Kamijou | e475b27 | 2012-12-12 15:38:18 +0100 | [diff] [blame] | 603 | host->state, host->wait_for); |
Yusuke Goda | fdc50a9 | 2010-05-26 14:41:59 -0700 | [diff] [blame] | 604 | ret = -EIO; |
| 605 | } |
| 606 | return ret; |
| 607 | } |
| 608 | |
Guennadi Liakhovetski | f985da1 | 2011-12-25 21:07:52 +0100 | [diff] [blame] | 609 | static bool sh_mmcif_next_block(struct sh_mmcif_host *host, u32 *p) |
Yusuke Goda | fdc50a9 | 2010-05-26 14:41:59 -0700 | [diff] [blame] | 610 | { |
Guennadi Liakhovetski | f985da1 | 2011-12-25 21:07:52 +0100 | [diff] [blame] | 611 | struct mmc_data *data = host->mrq->data; |
| 612 | |
| 613 | host->sg_blkidx += host->blocksize; |
| 614 | |
| 615 | /* data->sg->length must be a multiple of host->blocksize? */ |
| 616 | BUG_ON(host->sg_blkidx > data->sg->length); |
| 617 | |
| 618 | if (host->sg_blkidx == data->sg->length) { |
| 619 | host->sg_blkidx = 0; |
| 620 | if (++host->sg_idx < data->sg_len) |
| 621 | host->pio_ptr = sg_virt(++data->sg); |
| 622 | } else { |
| 623 | host->pio_ptr = p; |
| 624 | } |
| 625 | |
Guennadi Liakhovetski | 99eb9d8 | 2012-12-12 15:38:13 +0100 | [diff] [blame] | 626 | return host->sg_idx != data->sg_len; |
Guennadi Liakhovetski | f985da1 | 2011-12-25 21:07:52 +0100 | [diff] [blame] | 627 | } |
| 628 | |
| 629 | static void sh_mmcif_single_read(struct sh_mmcif_host *host, |
| 630 | struct mmc_request *mrq) |
| 631 | { |
| 632 | host->blocksize = (sh_mmcif_readl(host->addr, MMCIF_CE_BLOCK_SET) & |
| 633 | BLOCK_SIZE_MASK) + 3; |
| 634 | |
| 635 | host->wait_for = MMCIF_WAIT_FOR_READ; |
Yusuke Goda | fdc50a9 | 2010-05-26 14:41:59 -0700 | [diff] [blame] | 636 | |
Yusuke Goda | fdc50a9 | 2010-05-26 14:41:59 -0700 | [diff] [blame] | 637 | /* buf read enable */ |
| 638 | sh_mmcif_bitset(host, MMCIF_CE_INT_MASK, MASK_MBUFREN); |
Guennadi Liakhovetski | f985da1 | 2011-12-25 21:07:52 +0100 | [diff] [blame] | 639 | } |
Yusuke Goda | fdc50a9 | 2010-05-26 14:41:59 -0700 | [diff] [blame] | 640 | |
Guennadi Liakhovetski | f985da1 | 2011-12-25 21:07:52 +0100 | [diff] [blame] | 641 | static bool sh_mmcif_read_block(struct sh_mmcif_host *host) |
| 642 | { |
Kuninori Morimoto | 585c3a5 | 2015-05-14 07:21:18 +0000 | [diff] [blame] | 643 | struct device *dev = sh_mmcif_host_to_dev(host); |
Guennadi Liakhovetski | f985da1 | 2011-12-25 21:07:52 +0100 | [diff] [blame] | 644 | struct mmc_data *data = host->mrq->data; |
| 645 | u32 *p = sg_virt(data->sg); |
| 646 | int i; |
| 647 | |
| 648 | if (host->sd_error) { |
| 649 | data->error = sh_mmcif_error_manage(host); |
Kuninori Morimoto | 585c3a5 | 2015-05-14 07:21:18 +0000 | [diff] [blame] | 650 | dev_dbg(dev, "%s(): %d\n", __func__, data->error); |
Guennadi Liakhovetski | f985da1 | 2011-12-25 21:07:52 +0100 | [diff] [blame] | 651 | return false; |
| 652 | } |
| 653 | |
| 654 | for (i = 0; i < host->blocksize / 4; i++) |
Magnus Damm | 487d9fc | 2010-05-18 14:42:51 +0000 | [diff] [blame] | 655 | *p++ = sh_mmcif_readl(host->addr, MMCIF_CE_DATA); |
Yusuke Goda | fdc50a9 | 2010-05-26 14:41:59 -0700 | [diff] [blame] | 656 | |
| 657 | /* buffer read end */ |
| 658 | sh_mmcif_bitset(host, MMCIF_CE_INT_MASK, MASK_MBUFRE); |
Guennadi Liakhovetski | f985da1 | 2011-12-25 21:07:52 +0100 | [diff] [blame] | 659 | host->wait_for = MMCIF_WAIT_FOR_READ_END; |
Yusuke Goda | fdc50a9 | 2010-05-26 14:41:59 -0700 | [diff] [blame] | 660 | |
Guennadi Liakhovetski | f985da1 | 2011-12-25 21:07:52 +0100 | [diff] [blame] | 661 | return true; |
Yusuke Goda | fdc50a9 | 2010-05-26 14:41:59 -0700 | [diff] [blame] | 662 | } |
| 663 | |
Guennadi Liakhovetski | f985da1 | 2011-12-25 21:07:52 +0100 | [diff] [blame] | 664 | static void sh_mmcif_multi_read(struct sh_mmcif_host *host, |
| 665 | struct mmc_request *mrq) |
Yusuke Goda | fdc50a9 | 2010-05-26 14:41:59 -0700 | [diff] [blame] | 666 | { |
| 667 | struct mmc_data *data = mrq->data; |
Yusuke Goda | fdc50a9 | 2010-05-26 14:41:59 -0700 | [diff] [blame] | 668 | |
Guennadi Liakhovetski | f985da1 | 2011-12-25 21:07:52 +0100 | [diff] [blame] | 669 | if (!data->sg_len || !data->sg->length) |
| 670 | return; |
Yusuke Goda | fdc50a9 | 2010-05-26 14:41:59 -0700 | [diff] [blame] | 671 | |
Guennadi Liakhovetski | f985da1 | 2011-12-25 21:07:52 +0100 | [diff] [blame] | 672 | host->blocksize = sh_mmcif_readl(host->addr, MMCIF_CE_BLOCK_SET) & |
| 673 | BLOCK_SIZE_MASK; |
Yusuke Goda | fdc50a9 | 2010-05-26 14:41:59 -0700 | [diff] [blame] | 674 | |
Guennadi Liakhovetski | f985da1 | 2011-12-25 21:07:52 +0100 | [diff] [blame] | 675 | host->wait_for = MMCIF_WAIT_FOR_MREAD; |
| 676 | host->sg_idx = 0; |
| 677 | host->sg_blkidx = 0; |
| 678 | host->pio_ptr = sg_virt(data->sg); |
Guennadi Liakhovetski | 5df460b | 2012-12-12 15:38:11 +0100 | [diff] [blame] | 679 | |
Guennadi Liakhovetski | f985da1 | 2011-12-25 21:07:52 +0100 | [diff] [blame] | 680 | sh_mmcif_bitset(host, MMCIF_CE_INT_MASK, MASK_MBUFREN); |
| 681 | } |
| 682 | |
| 683 | static bool sh_mmcif_mread_block(struct sh_mmcif_host *host) |
| 684 | { |
Kuninori Morimoto | 585c3a5 | 2015-05-14 07:21:18 +0000 | [diff] [blame] | 685 | struct device *dev = sh_mmcif_host_to_dev(host); |
Guennadi Liakhovetski | f985da1 | 2011-12-25 21:07:52 +0100 | [diff] [blame] | 686 | struct mmc_data *data = host->mrq->data; |
| 687 | u32 *p = host->pio_ptr; |
| 688 | int i; |
| 689 | |
| 690 | if (host->sd_error) { |
| 691 | data->error = sh_mmcif_error_manage(host); |
Kuninori Morimoto | 585c3a5 | 2015-05-14 07:21:18 +0000 | [diff] [blame] | 692 | dev_dbg(dev, "%s(): %d\n", __func__, data->error); |
Guennadi Liakhovetski | f985da1 | 2011-12-25 21:07:52 +0100 | [diff] [blame] | 693 | return false; |
Yusuke Goda | fdc50a9 | 2010-05-26 14:41:59 -0700 | [diff] [blame] | 694 | } |
Guennadi Liakhovetski | f985da1 | 2011-12-25 21:07:52 +0100 | [diff] [blame] | 695 | |
| 696 | BUG_ON(!data->sg->length); |
| 697 | |
| 698 | for (i = 0; i < host->blocksize / 4; i++) |
| 699 | *p++ = sh_mmcif_readl(host->addr, MMCIF_CE_DATA); |
| 700 | |
| 701 | if (!sh_mmcif_next_block(host, p)) |
| 702 | return false; |
| 703 | |
Guennadi Liakhovetski | f985da1 | 2011-12-25 21:07:52 +0100 | [diff] [blame] | 704 | sh_mmcif_bitset(host, MMCIF_CE_INT_MASK, MASK_MBUFREN); |
| 705 | |
| 706 | return true; |
Yusuke Goda | fdc50a9 | 2010-05-26 14:41:59 -0700 | [diff] [blame] | 707 | } |
| 708 | |
Guennadi Liakhovetski | f985da1 | 2011-12-25 21:07:52 +0100 | [diff] [blame] | 709 | static void sh_mmcif_single_write(struct sh_mmcif_host *host, |
Yusuke Goda | fdc50a9 | 2010-05-26 14:41:59 -0700 | [diff] [blame] | 710 | struct mmc_request *mrq) |
| 711 | { |
Guennadi Liakhovetski | f985da1 | 2011-12-25 21:07:52 +0100 | [diff] [blame] | 712 | host->blocksize = (sh_mmcif_readl(host->addr, MMCIF_CE_BLOCK_SET) & |
| 713 | BLOCK_SIZE_MASK) + 3; |
Yusuke Goda | fdc50a9 | 2010-05-26 14:41:59 -0700 | [diff] [blame] | 714 | |
Guennadi Liakhovetski | f985da1 | 2011-12-25 21:07:52 +0100 | [diff] [blame] | 715 | host->wait_for = MMCIF_WAIT_FOR_WRITE; |
Yusuke Goda | fdc50a9 | 2010-05-26 14:41:59 -0700 | [diff] [blame] | 716 | |
| 717 | /* buf write enable */ |
Guennadi Liakhovetski | f985da1 | 2011-12-25 21:07:52 +0100 | [diff] [blame] | 718 | sh_mmcif_bitset(host, MMCIF_CE_INT_MASK, MASK_MBUFWEN); |
| 719 | } |
Yusuke Goda | fdc50a9 | 2010-05-26 14:41:59 -0700 | [diff] [blame] | 720 | |
Guennadi Liakhovetski | f985da1 | 2011-12-25 21:07:52 +0100 | [diff] [blame] | 721 | static bool sh_mmcif_write_block(struct sh_mmcif_host *host) |
| 722 | { |
Kuninori Morimoto | 585c3a5 | 2015-05-14 07:21:18 +0000 | [diff] [blame] | 723 | struct device *dev = sh_mmcif_host_to_dev(host); |
Guennadi Liakhovetski | f985da1 | 2011-12-25 21:07:52 +0100 | [diff] [blame] | 724 | struct mmc_data *data = host->mrq->data; |
| 725 | u32 *p = sg_virt(data->sg); |
| 726 | int i; |
| 727 | |
| 728 | if (host->sd_error) { |
| 729 | data->error = sh_mmcif_error_manage(host); |
Kuninori Morimoto | 585c3a5 | 2015-05-14 07:21:18 +0000 | [diff] [blame] | 730 | dev_dbg(dev, "%s(): %d\n", __func__, data->error); |
Guennadi Liakhovetski | f985da1 | 2011-12-25 21:07:52 +0100 | [diff] [blame] | 731 | return false; |
| 732 | } |
| 733 | |
| 734 | for (i = 0; i < host->blocksize / 4; i++) |
Magnus Damm | 487d9fc | 2010-05-18 14:42:51 +0000 | [diff] [blame] | 735 | sh_mmcif_writel(host->addr, MMCIF_CE_DATA, *p++); |
Yusuke Goda | fdc50a9 | 2010-05-26 14:41:59 -0700 | [diff] [blame] | 736 | |
| 737 | /* buffer write end */ |
| 738 | sh_mmcif_bitset(host, MMCIF_CE_INT_MASK, MASK_MDTRANE); |
Guennadi Liakhovetski | f985da1 | 2011-12-25 21:07:52 +0100 | [diff] [blame] | 739 | host->wait_for = MMCIF_WAIT_FOR_WRITE_END; |
Yusuke Goda | fdc50a9 | 2010-05-26 14:41:59 -0700 | [diff] [blame] | 740 | |
Guennadi Liakhovetski | f985da1 | 2011-12-25 21:07:52 +0100 | [diff] [blame] | 741 | return true; |
Yusuke Goda | fdc50a9 | 2010-05-26 14:41:59 -0700 | [diff] [blame] | 742 | } |
| 743 | |
Guennadi Liakhovetski | f985da1 | 2011-12-25 21:07:52 +0100 | [diff] [blame] | 744 | static void sh_mmcif_multi_write(struct sh_mmcif_host *host, |
| 745 | struct mmc_request *mrq) |
Yusuke Goda | fdc50a9 | 2010-05-26 14:41:59 -0700 | [diff] [blame] | 746 | { |
| 747 | struct mmc_data *data = mrq->data; |
Yusuke Goda | fdc50a9 | 2010-05-26 14:41:59 -0700 | [diff] [blame] | 748 | |
Guennadi Liakhovetski | f985da1 | 2011-12-25 21:07:52 +0100 | [diff] [blame] | 749 | if (!data->sg_len || !data->sg->length) |
| 750 | return; |
Yusuke Goda | fdc50a9 | 2010-05-26 14:41:59 -0700 | [diff] [blame] | 751 | |
Guennadi Liakhovetski | f985da1 | 2011-12-25 21:07:52 +0100 | [diff] [blame] | 752 | host->blocksize = sh_mmcif_readl(host->addr, MMCIF_CE_BLOCK_SET) & |
| 753 | BLOCK_SIZE_MASK; |
Yusuke Goda | fdc50a9 | 2010-05-26 14:41:59 -0700 | [diff] [blame] | 754 | |
Guennadi Liakhovetski | f985da1 | 2011-12-25 21:07:52 +0100 | [diff] [blame] | 755 | host->wait_for = MMCIF_WAIT_FOR_MWRITE; |
| 756 | host->sg_idx = 0; |
| 757 | host->sg_blkidx = 0; |
| 758 | host->pio_ptr = sg_virt(data->sg); |
Guennadi Liakhovetski | 5df460b | 2012-12-12 15:38:11 +0100 | [diff] [blame] | 759 | |
Guennadi Liakhovetski | f985da1 | 2011-12-25 21:07:52 +0100 | [diff] [blame] | 760 | sh_mmcif_bitset(host, MMCIF_CE_INT_MASK, MASK_MBUFWEN); |
| 761 | } |
Yusuke Goda | fdc50a9 | 2010-05-26 14:41:59 -0700 | [diff] [blame] | 762 | |
Guennadi Liakhovetski | f985da1 | 2011-12-25 21:07:52 +0100 | [diff] [blame] | 763 | static bool sh_mmcif_mwrite_block(struct sh_mmcif_host *host) |
| 764 | { |
Kuninori Morimoto | 585c3a5 | 2015-05-14 07:21:18 +0000 | [diff] [blame] | 765 | struct device *dev = sh_mmcif_host_to_dev(host); |
Guennadi Liakhovetski | f985da1 | 2011-12-25 21:07:52 +0100 | [diff] [blame] | 766 | struct mmc_data *data = host->mrq->data; |
| 767 | u32 *p = host->pio_ptr; |
| 768 | int i; |
| 769 | |
| 770 | if (host->sd_error) { |
| 771 | data->error = sh_mmcif_error_manage(host); |
Kuninori Morimoto | 585c3a5 | 2015-05-14 07:21:18 +0000 | [diff] [blame] | 772 | dev_dbg(dev, "%s(): %d\n", __func__, data->error); |
Guennadi Liakhovetski | f985da1 | 2011-12-25 21:07:52 +0100 | [diff] [blame] | 773 | return false; |
Yusuke Goda | fdc50a9 | 2010-05-26 14:41:59 -0700 | [diff] [blame] | 774 | } |
Guennadi Liakhovetski | f985da1 | 2011-12-25 21:07:52 +0100 | [diff] [blame] | 775 | |
| 776 | BUG_ON(!data->sg->length); |
| 777 | |
| 778 | for (i = 0; i < host->blocksize / 4; i++) |
| 779 | sh_mmcif_writel(host->addr, MMCIF_CE_DATA, *p++); |
| 780 | |
| 781 | if (!sh_mmcif_next_block(host, p)) |
| 782 | return false; |
| 783 | |
Guennadi Liakhovetski | f985da1 | 2011-12-25 21:07:52 +0100 | [diff] [blame] | 784 | sh_mmcif_bitset(host, MMCIF_CE_INT_MASK, MASK_MBUFWEN); |
| 785 | |
| 786 | return true; |
Yusuke Goda | fdc50a9 | 2010-05-26 14:41:59 -0700 | [diff] [blame] | 787 | } |
| 788 | |
| 789 | static void sh_mmcif_get_response(struct sh_mmcif_host *host, |
| 790 | struct mmc_command *cmd) |
| 791 | { |
| 792 | if (cmd->flags & MMC_RSP_136) { |
Magnus Damm | 487d9fc | 2010-05-18 14:42:51 +0000 | [diff] [blame] | 793 | cmd->resp[0] = sh_mmcif_readl(host->addr, MMCIF_CE_RESP3); |
| 794 | cmd->resp[1] = sh_mmcif_readl(host->addr, MMCIF_CE_RESP2); |
| 795 | cmd->resp[2] = sh_mmcif_readl(host->addr, MMCIF_CE_RESP1); |
| 796 | cmd->resp[3] = sh_mmcif_readl(host->addr, MMCIF_CE_RESP0); |
Yusuke Goda | fdc50a9 | 2010-05-26 14:41:59 -0700 | [diff] [blame] | 797 | } else |
Magnus Damm | 487d9fc | 2010-05-18 14:42:51 +0000 | [diff] [blame] | 798 | cmd->resp[0] = sh_mmcif_readl(host->addr, MMCIF_CE_RESP0); |
Yusuke Goda | fdc50a9 | 2010-05-26 14:41:59 -0700 | [diff] [blame] | 799 | } |
| 800 | |
| 801 | static void sh_mmcif_get_cmd12response(struct sh_mmcif_host *host, |
| 802 | struct mmc_command *cmd) |
| 803 | { |
Magnus Damm | 487d9fc | 2010-05-18 14:42:51 +0000 | [diff] [blame] | 804 | cmd->resp[0] = sh_mmcif_readl(host->addr, MMCIF_CE_RESP_CMD12); |
Yusuke Goda | fdc50a9 | 2010-05-26 14:41:59 -0700 | [diff] [blame] | 805 | } |
| 806 | |
| 807 | static u32 sh_mmcif_set_cmd(struct sh_mmcif_host *host, |
Guennadi Liakhovetski | 6998340 | 2011-12-26 12:52:13 -0500 | [diff] [blame] | 808 | struct mmc_request *mrq) |
Yusuke Goda | fdc50a9 | 2010-05-26 14:41:59 -0700 | [diff] [blame] | 809 | { |
Kuninori Morimoto | 585c3a5 | 2015-05-14 07:21:18 +0000 | [diff] [blame] | 810 | struct device *dev = sh_mmcif_host_to_dev(host); |
Guennadi Liakhovetski | 6998340 | 2011-12-26 12:52:13 -0500 | [diff] [blame] | 811 | struct mmc_data *data = mrq->data; |
| 812 | struct mmc_command *cmd = mrq->cmd; |
| 813 | u32 opc = cmd->opcode; |
Yusuke Goda | fdc50a9 | 2010-05-26 14:41:59 -0700 | [diff] [blame] | 814 | u32 tmp = 0; |
| 815 | |
| 816 | /* Response Type check */ |
| 817 | switch (mmc_resp_type(cmd)) { |
| 818 | case MMC_RSP_NONE: |
| 819 | tmp |= CMD_SET_RTYP_NO; |
| 820 | break; |
| 821 | case MMC_RSP_R1: |
| 822 | case MMC_RSP_R1B: |
| 823 | case MMC_RSP_R3: |
| 824 | tmp |= CMD_SET_RTYP_6B; |
| 825 | break; |
| 826 | case MMC_RSP_R2: |
| 827 | tmp |= CMD_SET_RTYP_17B; |
| 828 | break; |
| 829 | default: |
Kuninori Morimoto | 585c3a5 | 2015-05-14 07:21:18 +0000 | [diff] [blame] | 830 | dev_err(dev, "Unsupported response type.\n"); |
Yusuke Goda | fdc50a9 | 2010-05-26 14:41:59 -0700 | [diff] [blame] | 831 | break; |
| 832 | } |
| 833 | switch (opc) { |
| 834 | /* RBSY */ |
Teppei Kamijou | a812ba0 | 2012-12-12 15:38:10 +0100 | [diff] [blame] | 835 | case MMC_SLEEP_AWAKE: |
Yusuke Goda | fdc50a9 | 2010-05-26 14:41:59 -0700 | [diff] [blame] | 836 | case MMC_SWITCH: |
| 837 | case MMC_STOP_TRANSMISSION: |
| 838 | case MMC_SET_WRITE_PROT: |
| 839 | case MMC_CLR_WRITE_PROT: |
| 840 | case MMC_ERASE: |
Yusuke Goda | fdc50a9 | 2010-05-26 14:41:59 -0700 | [diff] [blame] | 841 | tmp |= CMD_SET_RBSY; |
| 842 | break; |
| 843 | } |
| 844 | /* WDAT / DATW */ |
Guennadi Liakhovetski | 6998340 | 2011-12-26 12:52:13 -0500 | [diff] [blame] | 845 | if (data) { |
Yusuke Goda | fdc50a9 | 2010-05-26 14:41:59 -0700 | [diff] [blame] | 846 | tmp |= CMD_SET_WDAT; |
| 847 | switch (host->bus_width) { |
| 848 | case MMC_BUS_WIDTH_1: |
| 849 | tmp |= CMD_SET_DATW_1; |
| 850 | break; |
| 851 | case MMC_BUS_WIDTH_4: |
| 852 | tmp |= CMD_SET_DATW_4; |
| 853 | break; |
| 854 | case MMC_BUS_WIDTH_8: |
| 855 | tmp |= CMD_SET_DATW_8; |
| 856 | break; |
| 857 | default: |
Kuninori Morimoto | 585c3a5 | 2015-05-14 07:21:18 +0000 | [diff] [blame] | 858 | dev_err(dev, "Unsupported bus width.\n"); |
Yusuke Goda | fdc50a9 | 2010-05-26 14:41:59 -0700 | [diff] [blame] | 859 | break; |
| 860 | } |
Teppei Kamijou | 555061f | 2012-12-12 15:38:08 +0100 | [diff] [blame] | 861 | switch (host->timing) { |
Seungwon Jeon | 4039ff4 | 2014-03-14 21:12:33 +0900 | [diff] [blame] | 862 | case MMC_TIMING_MMC_DDR52: |
Teppei Kamijou | 555061f | 2012-12-12 15:38:08 +0100 | [diff] [blame] | 863 | /* |
| 864 | * MMC core will only set this timing, if the host |
Seungwon Jeon | 4039ff4 | 2014-03-14 21:12:33 +0900 | [diff] [blame] | 865 | * advertises the MMC_CAP_1_8V_DDR/MMC_CAP_1_2V_DDR |
| 866 | * capability. MMCIF implementations with this |
| 867 | * capability, e.g. sh73a0, will have to set it |
| 868 | * in their platform data. |
Teppei Kamijou | 555061f | 2012-12-12 15:38:08 +0100 | [diff] [blame] | 869 | */ |
| 870 | tmp |= CMD_SET_DARS; |
| 871 | break; |
| 872 | } |
Yusuke Goda | fdc50a9 | 2010-05-26 14:41:59 -0700 | [diff] [blame] | 873 | } |
| 874 | /* DWEN */ |
| 875 | if (opc == MMC_WRITE_BLOCK || opc == MMC_WRITE_MULTIPLE_BLOCK) |
| 876 | tmp |= CMD_SET_DWEN; |
| 877 | /* CMLTE/CMD12EN */ |
| 878 | if (opc == MMC_READ_MULTIPLE_BLOCK || opc == MMC_WRITE_MULTIPLE_BLOCK) { |
| 879 | tmp |= CMD_SET_CMLTE | CMD_SET_CMD12EN; |
| 880 | sh_mmcif_bitset(host, MMCIF_CE_BLOCK_SET, |
Guennadi Liakhovetski | 6998340 | 2011-12-26 12:52:13 -0500 | [diff] [blame] | 881 | data->blocks << 16); |
Yusuke Goda | fdc50a9 | 2010-05-26 14:41:59 -0700 | [diff] [blame] | 882 | } |
| 883 | /* RIDXC[1:0] check bits */ |
| 884 | if (opc == MMC_SEND_OP_COND || opc == MMC_ALL_SEND_CID || |
| 885 | opc == MMC_SEND_CSD || opc == MMC_SEND_CID) |
| 886 | tmp |= CMD_SET_RIDXC_BITS; |
| 887 | /* RCRC7C[1:0] check bits */ |
| 888 | if (opc == MMC_SEND_OP_COND) |
| 889 | tmp |= CMD_SET_CRC7C_BITS; |
| 890 | /* RCRC7C[1:0] internal CRC7 */ |
| 891 | if (opc == MMC_ALL_SEND_CID || |
| 892 | opc == MMC_SEND_CSD || opc == MMC_SEND_CID) |
| 893 | tmp |= CMD_SET_CRC7C_INTERNAL; |
| 894 | |
Guennadi Liakhovetski | 6998340 | 2011-12-26 12:52:13 -0500 | [diff] [blame] | 895 | return (opc << 24) | tmp; |
Yusuke Goda | fdc50a9 | 2010-05-26 14:41:59 -0700 | [diff] [blame] | 896 | } |
| 897 | |
Guennadi Liakhovetski | e47bf32 | 2010-11-24 10:05:18 +0000 | [diff] [blame] | 898 | static int sh_mmcif_data_trans(struct sh_mmcif_host *host, |
Guennadi Liakhovetski | f985da1 | 2011-12-25 21:07:52 +0100 | [diff] [blame] | 899 | struct mmc_request *mrq, u32 opc) |
Yusuke Goda | fdc50a9 | 2010-05-26 14:41:59 -0700 | [diff] [blame] | 900 | { |
Kuninori Morimoto | 585c3a5 | 2015-05-14 07:21:18 +0000 | [diff] [blame] | 901 | struct device *dev = sh_mmcif_host_to_dev(host); |
| 902 | |
Yusuke Goda | fdc50a9 | 2010-05-26 14:41:59 -0700 | [diff] [blame] | 903 | switch (opc) { |
| 904 | case MMC_READ_MULTIPLE_BLOCK: |
Guennadi Liakhovetski | f985da1 | 2011-12-25 21:07:52 +0100 | [diff] [blame] | 905 | sh_mmcif_multi_read(host, mrq); |
| 906 | return 0; |
Yusuke Goda | fdc50a9 | 2010-05-26 14:41:59 -0700 | [diff] [blame] | 907 | case MMC_WRITE_MULTIPLE_BLOCK: |
Guennadi Liakhovetski | f985da1 | 2011-12-25 21:07:52 +0100 | [diff] [blame] | 908 | sh_mmcif_multi_write(host, mrq); |
| 909 | return 0; |
Yusuke Goda | fdc50a9 | 2010-05-26 14:41:59 -0700 | [diff] [blame] | 910 | case MMC_WRITE_BLOCK: |
Guennadi Liakhovetski | f985da1 | 2011-12-25 21:07:52 +0100 | [diff] [blame] | 911 | sh_mmcif_single_write(host, mrq); |
| 912 | return 0; |
Yusuke Goda | fdc50a9 | 2010-05-26 14:41:59 -0700 | [diff] [blame] | 913 | case MMC_READ_SINGLE_BLOCK: |
| 914 | case MMC_SEND_EXT_CSD: |
Guennadi Liakhovetski | f985da1 | 2011-12-25 21:07:52 +0100 | [diff] [blame] | 915 | sh_mmcif_single_read(host, mrq); |
| 916 | return 0; |
Yusuke Goda | fdc50a9 | 2010-05-26 14:41:59 -0700 | [diff] [blame] | 917 | default: |
Kuninori Morimoto | 585c3a5 | 2015-05-14 07:21:18 +0000 | [diff] [blame] | 918 | dev_err(dev, "Unsupported CMD%d\n", opc); |
Guennadi Liakhovetski | ee4b888 | 2011-12-14 19:31:52 +0100 | [diff] [blame] | 919 | return -EINVAL; |
Yusuke Goda | fdc50a9 | 2010-05-26 14:41:59 -0700 | [diff] [blame] | 920 | } |
Yusuke Goda | fdc50a9 | 2010-05-26 14:41:59 -0700 | [diff] [blame] | 921 | } |
| 922 | |
| 923 | static void sh_mmcif_start_cmd(struct sh_mmcif_host *host, |
Guennadi Liakhovetski | ee4b888 | 2011-12-14 19:31:52 +0100 | [diff] [blame] | 924 | struct mmc_request *mrq) |
Yusuke Goda | fdc50a9 | 2010-05-26 14:41:59 -0700 | [diff] [blame] | 925 | { |
Guennadi Liakhovetski | ee4b888 | 2011-12-14 19:31:52 +0100 | [diff] [blame] | 926 | struct mmc_command *cmd = mrq->cmd; |
Guennadi Liakhovetski | f985da1 | 2011-12-25 21:07:52 +0100 | [diff] [blame] | 927 | u32 opc = cmd->opcode; |
| 928 | u32 mask; |
Kouichi Tomita | dbb42d9 | 2015-02-15 23:46:46 +0900 | [diff] [blame] | 929 | unsigned long flags; |
Yusuke Goda | fdc50a9 | 2010-05-26 14:41:59 -0700 | [diff] [blame] | 930 | |
Yusuke Goda | fdc50a9 | 2010-05-26 14:41:59 -0700 | [diff] [blame] | 931 | switch (opc) { |
Guennadi Liakhovetski | ee4b888 | 2011-12-14 19:31:52 +0100 | [diff] [blame] | 932 | /* response busy check */ |
Teppei Kamijou | a812ba0 | 2012-12-12 15:38:10 +0100 | [diff] [blame] | 933 | case MMC_SLEEP_AWAKE: |
Yusuke Goda | fdc50a9 | 2010-05-26 14:41:59 -0700 | [diff] [blame] | 934 | case MMC_SWITCH: |
| 935 | case MMC_STOP_TRANSMISSION: |
| 936 | case MMC_SET_WRITE_PROT: |
| 937 | case MMC_CLR_WRITE_PROT: |
| 938 | case MMC_ERASE: |
Guennadi Liakhovetski | ee4b888 | 2011-12-14 19:31:52 +0100 | [diff] [blame] | 939 | mask = MASK_START_CMD | MASK_MRBSYE; |
Yusuke Goda | fdc50a9 | 2010-05-26 14:41:59 -0700 | [diff] [blame] | 940 | break; |
| 941 | default: |
Guennadi Liakhovetski | ee4b888 | 2011-12-14 19:31:52 +0100 | [diff] [blame] | 942 | mask = MASK_START_CMD | MASK_MCRSPE; |
Yusuke Goda | fdc50a9 | 2010-05-26 14:41:59 -0700 | [diff] [blame] | 943 | break; |
| 944 | } |
Yusuke Goda | fdc50a9 | 2010-05-26 14:41:59 -0700 | [diff] [blame] | 945 | |
Guennadi Liakhovetski | 967bcb7 | 2013-07-10 21:21:12 +0200 | [diff] [blame] | 946 | if (host->ccs_enable) |
| 947 | mask |= MASK_MCCSTO; |
| 948 | |
Guennadi Liakhovetski | 6998340 | 2011-12-26 12:52:13 -0500 | [diff] [blame] | 949 | if (mrq->data) { |
Magnus Damm | 487d9fc | 2010-05-18 14:42:51 +0000 | [diff] [blame] | 950 | sh_mmcif_writel(host->addr, MMCIF_CE_BLOCK_SET, 0); |
| 951 | sh_mmcif_writel(host->addr, MMCIF_CE_BLOCK_SET, |
| 952 | mrq->data->blksz); |
Yusuke Goda | fdc50a9 | 2010-05-26 14:41:59 -0700 | [diff] [blame] | 953 | } |
Guennadi Liakhovetski | 6998340 | 2011-12-26 12:52:13 -0500 | [diff] [blame] | 954 | opc = sh_mmcif_set_cmd(host, mrq); |
Yusuke Goda | fdc50a9 | 2010-05-26 14:41:59 -0700 | [diff] [blame] | 955 | |
Guennadi Liakhovetski | 967bcb7 | 2013-07-10 21:21:12 +0200 | [diff] [blame] | 956 | if (host->ccs_enable) |
| 957 | sh_mmcif_writel(host->addr, MMCIF_CE_INT, 0xD80430C0); |
| 958 | else |
| 959 | sh_mmcif_writel(host->addr, MMCIF_CE_INT, 0xD80430C0 | INT_CCS); |
Magnus Damm | 487d9fc | 2010-05-18 14:42:51 +0000 | [diff] [blame] | 960 | sh_mmcif_writel(host->addr, MMCIF_CE_INT_MASK, mask); |
Yusuke Goda | fdc50a9 | 2010-05-26 14:41:59 -0700 | [diff] [blame] | 961 | /* set arg */ |
Magnus Damm | 487d9fc | 2010-05-18 14:42:51 +0000 | [diff] [blame] | 962 | sh_mmcif_writel(host->addr, MMCIF_CE_ARG, cmd->arg); |
Yusuke Goda | fdc50a9 | 2010-05-26 14:41:59 -0700 | [diff] [blame] | 963 | /* set cmd */ |
Kouichi Tomita | dbb42d9 | 2015-02-15 23:46:46 +0900 | [diff] [blame] | 964 | spin_lock_irqsave(&host->lock, flags); |
Magnus Damm | 487d9fc | 2010-05-18 14:42:51 +0000 | [diff] [blame] | 965 | sh_mmcif_writel(host->addr, MMCIF_CE_CMD_SET, opc); |
Yusuke Goda | fdc50a9 | 2010-05-26 14:41:59 -0700 | [diff] [blame] | 966 | |
Guennadi Liakhovetski | f985da1 | 2011-12-25 21:07:52 +0100 | [diff] [blame] | 967 | host->wait_for = MMCIF_WAIT_FOR_CMD; |
| 968 | schedule_delayed_work(&host->timeout_work, host->timeout); |
Kouichi Tomita | dbb42d9 | 2015-02-15 23:46:46 +0900 | [diff] [blame] | 969 | spin_unlock_irqrestore(&host->lock, flags); |
Yusuke Goda | fdc50a9 | 2010-05-26 14:41:59 -0700 | [diff] [blame] | 970 | } |
| 971 | |
| 972 | static void sh_mmcif_stop_cmd(struct sh_mmcif_host *host, |
Guennadi Liakhovetski | ee4b888 | 2011-12-14 19:31:52 +0100 | [diff] [blame] | 973 | struct mmc_request *mrq) |
Yusuke Goda | fdc50a9 | 2010-05-26 14:41:59 -0700 | [diff] [blame] | 974 | { |
Kuninori Morimoto | 585c3a5 | 2015-05-14 07:21:18 +0000 | [diff] [blame] | 975 | struct device *dev = sh_mmcif_host_to_dev(host); |
| 976 | |
Guennadi Liakhovetski | 6998340 | 2011-12-26 12:52:13 -0500 | [diff] [blame] | 977 | switch (mrq->cmd->opcode) { |
| 978 | case MMC_READ_MULTIPLE_BLOCK: |
Yusuke Goda | fdc50a9 | 2010-05-26 14:41:59 -0700 | [diff] [blame] | 979 | sh_mmcif_bitset(host, MMCIF_CE_INT_MASK, MASK_MCMD12DRE); |
Guennadi Liakhovetski | 6998340 | 2011-12-26 12:52:13 -0500 | [diff] [blame] | 980 | break; |
| 981 | case MMC_WRITE_MULTIPLE_BLOCK: |
Yusuke Goda | fdc50a9 | 2010-05-26 14:41:59 -0700 | [diff] [blame] | 982 | sh_mmcif_bitset(host, MMCIF_CE_INT_MASK, MASK_MCMD12RBE); |
Guennadi Liakhovetski | 6998340 | 2011-12-26 12:52:13 -0500 | [diff] [blame] | 983 | break; |
| 984 | default: |
Kuninori Morimoto | 585c3a5 | 2015-05-14 07:21:18 +0000 | [diff] [blame] | 985 | dev_err(dev, "unsupported stop cmd\n"); |
Guennadi Liakhovetski | 6998340 | 2011-12-26 12:52:13 -0500 | [diff] [blame] | 986 | mrq->stop->error = sh_mmcif_error_manage(host); |
Yusuke Goda | fdc50a9 | 2010-05-26 14:41:59 -0700 | [diff] [blame] | 987 | return; |
| 988 | } |
| 989 | |
Guennadi Liakhovetski | f985da1 | 2011-12-25 21:07:52 +0100 | [diff] [blame] | 990 | host->wait_for = MMCIF_WAIT_FOR_STOP; |
Yusuke Goda | fdc50a9 | 2010-05-26 14:41:59 -0700 | [diff] [blame] | 991 | } |
| 992 | |
| 993 | static void sh_mmcif_request(struct mmc_host *mmc, struct mmc_request *mrq) |
| 994 | { |
| 995 | struct sh_mmcif_host *host = mmc_priv(mmc); |
Kuninori Morimoto | 585c3a5 | 2015-05-14 07:21:18 +0000 | [diff] [blame] | 996 | struct device *dev = sh_mmcif_host_to_dev(host); |
Guennadi Liakhovetski | 3b0beaf | 2011-04-15 18:30:47 +0000 | [diff] [blame] | 997 | unsigned long flags; |
| 998 | |
| 999 | spin_lock_irqsave(&host->lock, flags); |
| 1000 | if (host->state != STATE_IDLE) { |
Kuninori Morimoto | 585c3a5 | 2015-05-14 07:21:18 +0000 | [diff] [blame] | 1001 | dev_dbg(dev, "%s() rejected, state %u\n", |
| 1002 | __func__, host->state); |
Guennadi Liakhovetski | 3b0beaf | 2011-04-15 18:30:47 +0000 | [diff] [blame] | 1003 | spin_unlock_irqrestore(&host->lock, flags); |
| 1004 | mrq->cmd->error = -EAGAIN; |
| 1005 | mmc_request_done(mmc, mrq); |
| 1006 | return; |
| 1007 | } |
| 1008 | |
| 1009 | host->state = STATE_REQUEST; |
| 1010 | spin_unlock_irqrestore(&host->lock, flags); |
Yusuke Goda | fdc50a9 | 2010-05-26 14:41:59 -0700 | [diff] [blame] | 1011 | |
| 1012 | switch (mrq->cmd->opcode) { |
| 1013 | /* MMCIF does not support SD/SDIO command */ |
Laurent Pinchart | 7541ca9 | 2012-06-12 22:56:09 +0200 | [diff] [blame] | 1014 | case MMC_SLEEP_AWAKE: /* = SD_IO_SEND_OP_COND (5) */ |
| 1015 | case MMC_SEND_EXT_CSD: /* = SD_SEND_IF_COND (8) */ |
| 1016 | if ((mrq->cmd->flags & MMC_CMD_MASK) != MMC_CMD_BCR) |
| 1017 | break; |
Yusuke Goda | fdc50a9 | 2010-05-26 14:41:59 -0700 | [diff] [blame] | 1018 | case MMC_APP_CMD: |
Teppei Kamijou | 92ff0c5 | 2012-12-12 15:38:05 +0100 | [diff] [blame] | 1019 | case SD_IO_RW_DIRECT: |
Guennadi Liakhovetski | 3b0beaf | 2011-04-15 18:30:47 +0000 | [diff] [blame] | 1020 | host->state = STATE_IDLE; |
Yusuke Goda | fdc50a9 | 2010-05-26 14:41:59 -0700 | [diff] [blame] | 1021 | mrq->cmd->error = -ETIMEDOUT; |
| 1022 | mmc_request_done(mmc, mrq); |
| 1023 | return; |
Yusuke Goda | fdc50a9 | 2010-05-26 14:41:59 -0700 | [diff] [blame] | 1024 | default: |
| 1025 | break; |
| 1026 | } |
Yusuke Goda | fdc50a9 | 2010-05-26 14:41:59 -0700 | [diff] [blame] | 1027 | |
Guennadi Liakhovetski | f985da1 | 2011-12-25 21:07:52 +0100 | [diff] [blame] | 1028 | host->mrq = mrq; |
Guennadi Liakhovetski | f985da1 | 2011-12-25 21:07:52 +0100 | [diff] [blame] | 1029 | |
| 1030 | sh_mmcif_start_cmd(host, mrq); |
Yusuke Goda | fdc50a9 | 2010-05-26 14:41:59 -0700 | [diff] [blame] | 1031 | } |
| 1032 | |
Kuninori Morimoto | 9bb09a3 | 2015-04-23 08:16:04 +0000 | [diff] [blame] | 1033 | static void sh_mmcif_clk_setup(struct sh_mmcif_host *host) |
Guennadi Liakhovetski | a660926 | 2012-04-19 18:02:50 +0200 | [diff] [blame] | 1034 | { |
Kuninori Morimoto | 89d49a7 | 2015-05-14 07:22:46 +0000 | [diff] [blame] | 1035 | struct device *dev = sh_mmcif_host_to_dev(host); |
Guennadi Liakhovetski | a660926 | 2012-04-19 18:02:50 +0200 | [diff] [blame] | 1036 | |
Kuninori Morimoto | 89d49a7 | 2015-05-14 07:22:46 +0000 | [diff] [blame] | 1037 | if (host->mmc->f_max) { |
| 1038 | unsigned int f_max, f_min = 0, f_min_old; |
| 1039 | |
| 1040 | f_max = host->mmc->f_max; |
| 1041 | for (f_min_old = f_max; f_min_old > 2;) { |
| 1042 | f_min = clk_round_rate(host->clk, f_min_old / 2); |
| 1043 | if (f_min == f_min_old) |
| 1044 | break; |
| 1045 | f_min_old = f_min; |
| 1046 | } |
| 1047 | |
| 1048 | /* |
| 1049 | * This driver assumes this SoC is R-Car Gen2 or later |
| 1050 | */ |
| 1051 | host->clkdiv_map = 0x3ff; |
| 1052 | |
| 1053 | host->mmc->f_max = f_max / (1 << ffs(host->clkdiv_map)); |
| 1054 | host->mmc->f_min = f_min / (1 << fls(host->clkdiv_map)); |
| 1055 | } else { |
| 1056 | unsigned int clk = clk_get_rate(host->clk); |
| 1057 | |
| 1058 | host->mmc->f_max = clk / 2; |
| 1059 | host->mmc->f_min = clk / 512; |
| 1060 | } |
| 1061 | |
| 1062 | dev_dbg(dev, "clk max/min = %d/%d\n", |
| 1063 | host->mmc->f_max, host->mmc->f_min); |
Guennadi Liakhovetski | a660926 | 2012-04-19 18:02:50 +0200 | [diff] [blame] | 1064 | } |
| 1065 | |
Yusuke Goda | fdc50a9 | 2010-05-26 14:41:59 -0700 | [diff] [blame] | 1066 | static void sh_mmcif_set_ios(struct mmc_host *mmc, struct mmc_ios *ios) |
| 1067 | { |
| 1068 | struct sh_mmcif_host *host = mmc_priv(mmc); |
Kuninori Morimoto | 585c3a5 | 2015-05-14 07:21:18 +0000 | [diff] [blame] | 1069 | struct device *dev = sh_mmcif_host_to_dev(host); |
Guennadi Liakhovetski | 3b0beaf | 2011-04-15 18:30:47 +0000 | [diff] [blame] | 1070 | unsigned long flags; |
| 1071 | |
| 1072 | spin_lock_irqsave(&host->lock, flags); |
| 1073 | if (host->state != STATE_IDLE) { |
Kuninori Morimoto | 585c3a5 | 2015-05-14 07:21:18 +0000 | [diff] [blame] | 1074 | dev_dbg(dev, "%s() rejected, state %u\n", |
| 1075 | __func__, host->state); |
Guennadi Liakhovetski | 3b0beaf | 2011-04-15 18:30:47 +0000 | [diff] [blame] | 1076 | spin_unlock_irqrestore(&host->lock, flags); |
| 1077 | return; |
| 1078 | } |
| 1079 | |
| 1080 | host->state = STATE_IOS; |
| 1081 | spin_unlock_irqrestore(&host->lock, flags); |
Yusuke Goda | fdc50a9 | 2010-05-26 14:41:59 -0700 | [diff] [blame] | 1082 | |
Ulf Hansson | 4caf653 | 2016-02-11 13:59:54 +0100 | [diff] [blame] | 1083 | switch (ios->power_mode) { |
| 1084 | case MMC_POWER_UP: |
Ulf Hansson | 33a31ce | 2016-02-11 13:59:55 +0100 | [diff] [blame] | 1085 | if (!IS_ERR(mmc->supply.vmmc)) |
| 1086 | mmc_regulator_set_ocr(mmc, mmc->supply.vmmc, ios->vdd); |
Guennadi Liakhovetski | c9b0cef | 2011-05-26 15:33:30 +0200 | [diff] [blame] | 1087 | if (!host->power) { |
Kuninori Morimoto | 9bb09a3 | 2015-04-23 08:16:04 +0000 | [diff] [blame] | 1088 | clk_prepare_enable(host->clk); |
Kuninori Morimoto | 585c3a5 | 2015-05-14 07:21:18 +0000 | [diff] [blame] | 1089 | pm_runtime_get_sync(dev); |
Guennadi Liakhovetski | c9b0cef | 2011-05-26 15:33:30 +0200 | [diff] [blame] | 1090 | sh_mmcif_sync_reset(host); |
Ulf Hansson | 4caf653 | 2016-02-11 13:59:54 +0100 | [diff] [blame] | 1091 | sh_mmcif_request_dma(host); |
| 1092 | host->power = true; |
Guennadi Liakhovetski | c9b0cef | 2011-05-26 15:33:30 +0200 | [diff] [blame] | 1093 | } |
Ulf Hansson | 4caf653 | 2016-02-11 13:59:54 +0100 | [diff] [blame] | 1094 | break; |
| 1095 | case MMC_POWER_OFF: |
Ulf Hansson | 33a31ce | 2016-02-11 13:59:55 +0100 | [diff] [blame] | 1096 | if (!IS_ERR(mmc->supply.vmmc)) |
| 1097 | mmc_regulator_set_ocr(mmc, mmc->supply.vmmc, 0); |
Ulf Hansson | 4caf653 | 2016-02-11 13:59:54 +0100 | [diff] [blame] | 1098 | if (host->power) { |
| 1099 | sh_mmcif_clock_control(host, 0); |
| 1100 | sh_mmcif_release_dma(host); |
| 1101 | pm_runtime_put(dev); |
| 1102 | clk_disable_unprepare(host->clk); |
| 1103 | host->power = false; |
| 1104 | } |
| 1105 | break; |
| 1106 | case MMC_POWER_ON: |
Yusuke Goda | fdc50a9 | 2010-05-26 14:41:59 -0700 | [diff] [blame] | 1107 | sh_mmcif_clock_control(host, ios->clock); |
Ulf Hansson | 4caf653 | 2016-02-11 13:59:54 +0100 | [diff] [blame] | 1108 | break; |
Guennadi Liakhovetski | c9b0cef | 2011-05-26 15:33:30 +0200 | [diff] [blame] | 1109 | } |
Yusuke Goda | fdc50a9 | 2010-05-26 14:41:59 -0700 | [diff] [blame] | 1110 | |
Teppei Kamijou | 555061f | 2012-12-12 15:38:08 +0100 | [diff] [blame] | 1111 | host->timing = ios->timing; |
Yusuke Goda | fdc50a9 | 2010-05-26 14:41:59 -0700 | [diff] [blame] | 1112 | host->bus_width = ios->bus_width; |
Guennadi Liakhovetski | 3b0beaf | 2011-04-15 18:30:47 +0000 | [diff] [blame] | 1113 | host->state = STATE_IDLE; |
Yusuke Goda | fdc50a9 | 2010-05-26 14:41:59 -0700 | [diff] [blame] | 1114 | } |
| 1115 | |
Arnd Hannemann | 777271d | 2010-08-24 17:27:01 +0200 | [diff] [blame] | 1116 | static int sh_mmcif_get_cd(struct mmc_host *mmc) |
| 1117 | { |
| 1118 | struct sh_mmcif_host *host = mmc_priv(mmc); |
Kuninori Morimoto | 585c3a5 | 2015-05-14 07:21:18 +0000 | [diff] [blame] | 1119 | struct device *dev = sh_mmcif_host_to_dev(host); |
| 1120 | struct sh_mmcif_plat_data *p = dev->platform_data; |
Guennadi Liakhovetski | e480606 | 2012-06-14 14:24:35 +0200 | [diff] [blame] | 1121 | int ret = mmc_gpio_get_cd(mmc); |
| 1122 | |
| 1123 | if (ret >= 0) |
| 1124 | return ret; |
Arnd Hannemann | 777271d | 2010-08-24 17:27:01 +0200 | [diff] [blame] | 1125 | |
Guennadi Liakhovetski | bf68a81 | 2012-05-01 18:18:16 +0200 | [diff] [blame] | 1126 | if (!p || !p->get_cd) |
Arnd Hannemann | 777271d | 2010-08-24 17:27:01 +0200 | [diff] [blame] | 1127 | return -ENOSYS; |
| 1128 | else |
| 1129 | return p->get_cd(host->pd); |
| 1130 | } |
| 1131 | |
Yusuke Goda | fdc50a9 | 2010-05-26 14:41:59 -0700 | [diff] [blame] | 1132 | static struct mmc_host_ops sh_mmcif_ops = { |
| 1133 | .request = sh_mmcif_request, |
| 1134 | .set_ios = sh_mmcif_set_ios, |
Arnd Hannemann | 777271d | 2010-08-24 17:27:01 +0200 | [diff] [blame] | 1135 | .get_cd = sh_mmcif_get_cd, |
Yusuke Goda | fdc50a9 | 2010-05-26 14:41:59 -0700 | [diff] [blame] | 1136 | }; |
| 1137 | |
Guennadi Liakhovetski | f985da1 | 2011-12-25 21:07:52 +0100 | [diff] [blame] | 1138 | static bool sh_mmcif_end_cmd(struct sh_mmcif_host *host) |
| 1139 | { |
| 1140 | struct mmc_command *cmd = host->mrq->cmd; |
Guennadi Liakhovetski | 6998340 | 2011-12-26 12:52:13 -0500 | [diff] [blame] | 1141 | struct mmc_data *data = host->mrq->data; |
Kuninori Morimoto | 585c3a5 | 2015-05-14 07:21:18 +0000 | [diff] [blame] | 1142 | struct device *dev = sh_mmcif_host_to_dev(host); |
Guennadi Liakhovetski | f985da1 | 2011-12-25 21:07:52 +0100 | [diff] [blame] | 1143 | long time; |
| 1144 | |
| 1145 | if (host->sd_error) { |
| 1146 | switch (cmd->opcode) { |
| 1147 | case MMC_ALL_SEND_CID: |
| 1148 | case MMC_SELECT_CARD: |
| 1149 | case MMC_APP_CMD: |
| 1150 | cmd->error = -ETIMEDOUT; |
Guennadi Liakhovetski | f985da1 | 2011-12-25 21:07:52 +0100 | [diff] [blame] | 1151 | break; |
| 1152 | default: |
| 1153 | cmd->error = sh_mmcif_error_manage(host); |
Guennadi Liakhovetski | f985da1 | 2011-12-25 21:07:52 +0100 | [diff] [blame] | 1154 | break; |
| 1155 | } |
Kuninori Morimoto | 585c3a5 | 2015-05-14 07:21:18 +0000 | [diff] [blame] | 1156 | dev_dbg(dev, "CMD%d error %d\n", |
Teppei Kamijou | e475b27 | 2012-12-12 15:38:18 +0100 | [diff] [blame] | 1157 | cmd->opcode, cmd->error); |
Guennadi Liakhovetski | aba9d64 | 2012-12-12 15:38:15 +0100 | [diff] [blame] | 1158 | host->sd_error = false; |
Guennadi Liakhovetski | f985da1 | 2011-12-25 21:07:52 +0100 | [diff] [blame] | 1159 | return false; |
| 1160 | } |
| 1161 | if (!(cmd->flags & MMC_RSP_PRESENT)) { |
| 1162 | cmd->error = 0; |
| 1163 | return false; |
| 1164 | } |
| 1165 | |
| 1166 | sh_mmcif_get_response(host, cmd); |
| 1167 | |
Guennadi Liakhovetski | 6998340 | 2011-12-26 12:52:13 -0500 | [diff] [blame] | 1168 | if (!data) |
Guennadi Liakhovetski | f985da1 | 2011-12-25 21:07:52 +0100 | [diff] [blame] | 1169 | return false; |
| 1170 | |
Guennadi Liakhovetski | 90f1cb4 | 2012-12-12 15:38:16 +0100 | [diff] [blame] | 1171 | /* |
| 1172 | * Completion can be signalled from DMA callback and error, so, have to |
| 1173 | * reset here, before setting .dma_active |
| 1174 | */ |
| 1175 | init_completion(&host->dma_complete); |
| 1176 | |
Guennadi Liakhovetski | 6998340 | 2011-12-26 12:52:13 -0500 | [diff] [blame] | 1177 | if (data->flags & MMC_DATA_READ) { |
Guennadi Liakhovetski | f985da1 | 2011-12-25 21:07:52 +0100 | [diff] [blame] | 1178 | if (host->chan_rx) |
| 1179 | sh_mmcif_start_dma_rx(host); |
| 1180 | } else { |
| 1181 | if (host->chan_tx) |
| 1182 | sh_mmcif_start_dma_tx(host); |
| 1183 | } |
| 1184 | |
| 1185 | if (!host->dma_active) { |
Guennadi Liakhovetski | 6998340 | 2011-12-26 12:52:13 -0500 | [diff] [blame] | 1186 | data->error = sh_mmcif_data_trans(host, host->mrq, cmd->opcode); |
Guennadi Liakhovetski | 99eb9d8 | 2012-12-12 15:38:13 +0100 | [diff] [blame] | 1187 | return !data->error; |
Guennadi Liakhovetski | f985da1 | 2011-12-25 21:07:52 +0100 | [diff] [blame] | 1188 | } |
| 1189 | |
| 1190 | /* Running in the IRQ thread, can sleep */ |
| 1191 | time = wait_for_completion_interruptible_timeout(&host->dma_complete, |
| 1192 | host->timeout); |
Teppei Kamijou | eae3098 | 2012-12-12 15:38:12 +0100 | [diff] [blame] | 1193 | |
| 1194 | if (data->flags & MMC_DATA_READ) |
| 1195 | dma_unmap_sg(host->chan_rx->device->dev, |
| 1196 | data->sg, data->sg_len, |
| 1197 | DMA_FROM_DEVICE); |
| 1198 | else |
| 1199 | dma_unmap_sg(host->chan_tx->device->dev, |
| 1200 | data->sg, data->sg_len, |
| 1201 | DMA_TO_DEVICE); |
| 1202 | |
Guennadi Liakhovetski | f985da1 | 2011-12-25 21:07:52 +0100 | [diff] [blame] | 1203 | if (host->sd_error) { |
| 1204 | dev_err(host->mmc->parent, |
| 1205 | "Error IRQ while waiting for DMA completion!\n"); |
| 1206 | /* Woken up by an error IRQ: abort DMA */ |
Guennadi Liakhovetski | 6998340 | 2011-12-26 12:52:13 -0500 | [diff] [blame] | 1207 | data->error = sh_mmcif_error_manage(host); |
Guennadi Liakhovetski | f985da1 | 2011-12-25 21:07:52 +0100 | [diff] [blame] | 1208 | } else if (!time) { |
Teppei Kamijou | e475b27 | 2012-12-12 15:38:18 +0100 | [diff] [blame] | 1209 | dev_err(host->mmc->parent, "DMA timeout!\n"); |
Guennadi Liakhovetski | 6998340 | 2011-12-26 12:52:13 -0500 | [diff] [blame] | 1210 | data->error = -ETIMEDOUT; |
Guennadi Liakhovetski | f985da1 | 2011-12-25 21:07:52 +0100 | [diff] [blame] | 1211 | } else if (time < 0) { |
Teppei Kamijou | e475b27 | 2012-12-12 15:38:18 +0100 | [diff] [blame] | 1212 | dev_err(host->mmc->parent, |
| 1213 | "wait_for_completion_...() error %ld!\n", time); |
Guennadi Liakhovetski | 6998340 | 2011-12-26 12:52:13 -0500 | [diff] [blame] | 1214 | data->error = time; |
Guennadi Liakhovetski | f985da1 | 2011-12-25 21:07:52 +0100 | [diff] [blame] | 1215 | } |
| 1216 | sh_mmcif_bitclr(host, MMCIF_CE_BUF_ACC, |
| 1217 | BUF_ACC_DMAREN | BUF_ACC_DMAWEN); |
| 1218 | host->dma_active = false; |
| 1219 | |
Teppei Kamijou | eae3098 | 2012-12-12 15:38:12 +0100 | [diff] [blame] | 1220 | if (data->error) { |
Guennadi Liakhovetski | 6998340 | 2011-12-26 12:52:13 -0500 | [diff] [blame] | 1221 | data->bytes_xfered = 0; |
Teppei Kamijou | eae3098 | 2012-12-12 15:38:12 +0100 | [diff] [blame] | 1222 | /* Abort DMA */ |
| 1223 | if (data->flags & MMC_DATA_READ) |
| 1224 | dmaengine_terminate_all(host->chan_rx); |
| 1225 | else |
| 1226 | dmaengine_terminate_all(host->chan_tx); |
| 1227 | } |
Guennadi Liakhovetski | f985da1 | 2011-12-25 21:07:52 +0100 | [diff] [blame] | 1228 | |
| 1229 | return false; |
| 1230 | } |
| 1231 | |
| 1232 | static irqreturn_t sh_mmcif_irqt(int irq, void *dev_id) |
| 1233 | { |
| 1234 | struct sh_mmcif_host *host = dev_id; |
Guennadi Liakhovetski | 8047310 | 2012-12-12 15:38:14 +0100 | [diff] [blame] | 1235 | struct mmc_request *mrq; |
Kuninori Morimoto | 585c3a5 | 2015-05-14 07:21:18 +0000 | [diff] [blame] | 1236 | struct device *dev = sh_mmcif_host_to_dev(host); |
Guennadi Liakhovetski | 5df460b | 2012-12-12 15:38:11 +0100 | [diff] [blame] | 1237 | bool wait = false; |
Kouichi Tomita | dbb42d9 | 2015-02-15 23:46:46 +0900 | [diff] [blame] | 1238 | unsigned long flags; |
| 1239 | int wait_work; |
| 1240 | |
| 1241 | spin_lock_irqsave(&host->lock, flags); |
| 1242 | wait_work = host->wait_for; |
| 1243 | spin_unlock_irqrestore(&host->lock, flags); |
Guennadi Liakhovetski | f985da1 | 2011-12-25 21:07:52 +0100 | [diff] [blame] | 1244 | |
| 1245 | cancel_delayed_work_sync(&host->timeout_work); |
| 1246 | |
Guennadi Liakhovetski | 8047310 | 2012-12-12 15:38:14 +0100 | [diff] [blame] | 1247 | mutex_lock(&host->thread_lock); |
| 1248 | |
| 1249 | mrq = host->mrq; |
| 1250 | if (!mrq) { |
Kuninori Morimoto | 585c3a5 | 2015-05-14 07:21:18 +0000 | [diff] [blame] | 1251 | dev_dbg(dev, "IRQ thread state %u, wait %u: NULL mrq!\n", |
Guennadi Liakhovetski | 8047310 | 2012-12-12 15:38:14 +0100 | [diff] [blame] | 1252 | host->state, host->wait_for); |
| 1253 | mutex_unlock(&host->thread_lock); |
| 1254 | return IRQ_HANDLED; |
| 1255 | } |
| 1256 | |
Guennadi Liakhovetski | f985da1 | 2011-12-25 21:07:52 +0100 | [diff] [blame] | 1257 | /* |
| 1258 | * All handlers return true, if processing continues, and false, if the |
| 1259 | * request has to be completed - successfully or not |
| 1260 | */ |
Kouichi Tomita | dbb42d9 | 2015-02-15 23:46:46 +0900 | [diff] [blame] | 1261 | switch (wait_work) { |
Guennadi Liakhovetski | f985da1 | 2011-12-25 21:07:52 +0100 | [diff] [blame] | 1262 | case MMCIF_WAIT_FOR_REQUEST: |
| 1263 | /* We're too late, the timeout has already kicked in */ |
Guennadi Liakhovetski | 8047310 | 2012-12-12 15:38:14 +0100 | [diff] [blame] | 1264 | mutex_unlock(&host->thread_lock); |
Guennadi Liakhovetski | f985da1 | 2011-12-25 21:07:52 +0100 | [diff] [blame] | 1265 | return IRQ_HANDLED; |
| 1266 | case MMCIF_WAIT_FOR_CMD: |
Guennadi Liakhovetski | 5df460b | 2012-12-12 15:38:11 +0100 | [diff] [blame] | 1267 | /* Wait for data? */ |
| 1268 | wait = sh_mmcif_end_cmd(host); |
Guennadi Liakhovetski | f985da1 | 2011-12-25 21:07:52 +0100 | [diff] [blame] | 1269 | break; |
| 1270 | case MMCIF_WAIT_FOR_MREAD: |
Guennadi Liakhovetski | 5df460b | 2012-12-12 15:38:11 +0100 | [diff] [blame] | 1271 | /* Wait for more data? */ |
| 1272 | wait = sh_mmcif_mread_block(host); |
Guennadi Liakhovetski | f985da1 | 2011-12-25 21:07:52 +0100 | [diff] [blame] | 1273 | break; |
| 1274 | case MMCIF_WAIT_FOR_READ: |
Guennadi Liakhovetski | 5df460b | 2012-12-12 15:38:11 +0100 | [diff] [blame] | 1275 | /* Wait for data end? */ |
| 1276 | wait = sh_mmcif_read_block(host); |
Guennadi Liakhovetski | f985da1 | 2011-12-25 21:07:52 +0100 | [diff] [blame] | 1277 | break; |
| 1278 | case MMCIF_WAIT_FOR_MWRITE: |
Guennadi Liakhovetski | 5df460b | 2012-12-12 15:38:11 +0100 | [diff] [blame] | 1279 | /* Wait data to write? */ |
| 1280 | wait = sh_mmcif_mwrite_block(host); |
Guennadi Liakhovetski | f985da1 | 2011-12-25 21:07:52 +0100 | [diff] [blame] | 1281 | break; |
| 1282 | case MMCIF_WAIT_FOR_WRITE: |
Guennadi Liakhovetski | 5df460b | 2012-12-12 15:38:11 +0100 | [diff] [blame] | 1283 | /* Wait for data end? */ |
| 1284 | wait = sh_mmcif_write_block(host); |
Guennadi Liakhovetski | f985da1 | 2011-12-25 21:07:52 +0100 | [diff] [blame] | 1285 | break; |
| 1286 | case MMCIF_WAIT_FOR_STOP: |
| 1287 | if (host->sd_error) { |
| 1288 | mrq->stop->error = sh_mmcif_error_manage(host); |
Kuninori Morimoto | 585c3a5 | 2015-05-14 07:21:18 +0000 | [diff] [blame] | 1289 | dev_dbg(dev, "%s(): %d\n", __func__, mrq->stop->error); |
Guennadi Liakhovetski | f985da1 | 2011-12-25 21:07:52 +0100 | [diff] [blame] | 1290 | break; |
| 1291 | } |
| 1292 | sh_mmcif_get_cmd12response(host, mrq->stop); |
| 1293 | mrq->stop->error = 0; |
| 1294 | break; |
| 1295 | case MMCIF_WAIT_FOR_READ_END: |
| 1296 | case MMCIF_WAIT_FOR_WRITE_END: |
Teppei Kamijou | e475b27 | 2012-12-12 15:38:18 +0100 | [diff] [blame] | 1297 | if (host->sd_error) { |
Guennadi Liakhovetski | 91ab252 | 2012-08-22 06:49:47 +0000 | [diff] [blame] | 1298 | mrq->data->error = sh_mmcif_error_manage(host); |
Kuninori Morimoto | 585c3a5 | 2015-05-14 07:21:18 +0000 | [diff] [blame] | 1299 | dev_dbg(dev, "%s(): %d\n", __func__, mrq->data->error); |
Teppei Kamijou | e475b27 | 2012-12-12 15:38:18 +0100 | [diff] [blame] | 1300 | } |
Guennadi Liakhovetski | f985da1 | 2011-12-25 21:07:52 +0100 | [diff] [blame] | 1301 | break; |
| 1302 | default: |
| 1303 | BUG(); |
| 1304 | } |
| 1305 | |
Guennadi Liakhovetski | 5df460b | 2012-12-12 15:38:11 +0100 | [diff] [blame] | 1306 | if (wait) { |
| 1307 | schedule_delayed_work(&host->timeout_work, host->timeout); |
| 1308 | /* Wait for more data */ |
Guennadi Liakhovetski | 8047310 | 2012-12-12 15:38:14 +0100 | [diff] [blame] | 1309 | mutex_unlock(&host->thread_lock); |
Guennadi Liakhovetski | 5df460b | 2012-12-12 15:38:11 +0100 | [diff] [blame] | 1310 | return IRQ_HANDLED; |
| 1311 | } |
| 1312 | |
Guennadi Liakhovetski | f985da1 | 2011-12-25 21:07:52 +0100 | [diff] [blame] | 1313 | if (host->wait_for != MMCIF_WAIT_FOR_STOP) { |
Guennadi Liakhovetski | 91ab252 | 2012-08-22 06:49:47 +0000 | [diff] [blame] | 1314 | struct mmc_data *data = mrq->data; |
Guennadi Liakhovetski | 6998340 | 2011-12-26 12:52:13 -0500 | [diff] [blame] | 1315 | if (!mrq->cmd->error && data && !data->error) |
| 1316 | data->bytes_xfered = |
| 1317 | data->blocks * data->blksz; |
Guennadi Liakhovetski | f985da1 | 2011-12-25 21:07:52 +0100 | [diff] [blame] | 1318 | |
Guennadi Liakhovetski | 6998340 | 2011-12-26 12:52:13 -0500 | [diff] [blame] | 1319 | if (mrq->stop && !mrq->cmd->error && (!data || !data->error)) { |
Guennadi Liakhovetski | f985da1 | 2011-12-25 21:07:52 +0100 | [diff] [blame] | 1320 | sh_mmcif_stop_cmd(host, mrq); |
Guennadi Liakhovetski | 5df460b | 2012-12-12 15:38:11 +0100 | [diff] [blame] | 1321 | if (!mrq->stop->error) { |
| 1322 | schedule_delayed_work(&host->timeout_work, host->timeout); |
Guennadi Liakhovetski | 8047310 | 2012-12-12 15:38:14 +0100 | [diff] [blame] | 1323 | mutex_unlock(&host->thread_lock); |
Guennadi Liakhovetski | f985da1 | 2011-12-25 21:07:52 +0100 | [diff] [blame] | 1324 | return IRQ_HANDLED; |
Guennadi Liakhovetski | 5df460b | 2012-12-12 15:38:11 +0100 | [diff] [blame] | 1325 | } |
Guennadi Liakhovetski | f985da1 | 2011-12-25 21:07:52 +0100 | [diff] [blame] | 1326 | } |
| 1327 | } |
| 1328 | |
| 1329 | host->wait_for = MMCIF_WAIT_FOR_REQUEST; |
| 1330 | host->state = STATE_IDLE; |
Guennadi Liakhovetski | 6998340 | 2011-12-26 12:52:13 -0500 | [diff] [blame] | 1331 | host->mrq = NULL; |
Guennadi Liakhovetski | f985da1 | 2011-12-25 21:07:52 +0100 | [diff] [blame] | 1332 | mmc_request_done(host->mmc, mrq); |
| 1333 | |
Guennadi Liakhovetski | 8047310 | 2012-12-12 15:38:14 +0100 | [diff] [blame] | 1334 | mutex_unlock(&host->thread_lock); |
| 1335 | |
Guennadi Liakhovetski | f985da1 | 2011-12-25 21:07:52 +0100 | [diff] [blame] | 1336 | return IRQ_HANDLED; |
| 1337 | } |
| 1338 | |
Yusuke Goda | fdc50a9 | 2010-05-26 14:41:59 -0700 | [diff] [blame] | 1339 | static irqreturn_t sh_mmcif_intr(int irq, void *dev_id) |
| 1340 | { |
| 1341 | struct sh_mmcif_host *host = dev_id; |
Kuninori Morimoto | 585c3a5 | 2015-05-14 07:21:18 +0000 | [diff] [blame] | 1342 | struct device *dev = sh_mmcif_host_to_dev(host); |
Guennadi Liakhovetski | 967bcb7 | 2013-07-10 21:21:12 +0200 | [diff] [blame] | 1343 | u32 state, mask; |
Yusuke Goda | fdc50a9 | 2010-05-26 14:41:59 -0700 | [diff] [blame] | 1344 | |
Magnus Damm | 487d9fc | 2010-05-18 14:42:51 +0000 | [diff] [blame] | 1345 | state = sh_mmcif_readl(host->addr, MMCIF_CE_INT); |
Guennadi Liakhovetski | 967bcb7 | 2013-07-10 21:21:12 +0200 | [diff] [blame] | 1346 | mask = sh_mmcif_readl(host->addr, MMCIF_CE_INT_MASK); |
| 1347 | if (host->ccs_enable) |
| 1348 | sh_mmcif_writel(host->addr, MMCIF_CE_INT, ~(state & mask)); |
| 1349 | else |
| 1350 | sh_mmcif_writel(host->addr, MMCIF_CE_INT, INT_CCS | ~(state & mask)); |
Guennadi Liakhovetski | 8af5075 | 2012-12-12 15:45:14 +0100 | [diff] [blame] | 1351 | sh_mmcif_bitclr(host, MMCIF_CE_INT_MASK, state & MASK_CLEAN); |
Yusuke Goda | fdc50a9 | 2010-05-26 14:41:59 -0700 | [diff] [blame] | 1352 | |
Guennadi Liakhovetski | 8af5075 | 2012-12-12 15:45:14 +0100 | [diff] [blame] | 1353 | if (state & ~MASK_CLEAN) |
Kuninori Morimoto | 585c3a5 | 2015-05-14 07:21:18 +0000 | [diff] [blame] | 1354 | dev_dbg(dev, "IRQ state = 0x%08x incompletely cleared\n", |
Guennadi Liakhovetski | 8af5075 | 2012-12-12 15:45:14 +0100 | [diff] [blame] | 1355 | state); |
| 1356 | |
| 1357 | if (state & INT_ERR_STS || state & ~INT_ALL) { |
Guennadi Liakhovetski | aa0787a | 2010-11-24 10:05:12 +0000 | [diff] [blame] | 1358 | host->sd_error = true; |
Kuninori Morimoto | 585c3a5 | 2015-05-14 07:21:18 +0000 | [diff] [blame] | 1359 | dev_dbg(dev, "int err state = 0x%08x\n", state); |
Yusuke Goda | fdc50a9 | 2010-05-26 14:41:59 -0700 | [diff] [blame] | 1360 | } |
Guennadi Liakhovetski | f985da1 | 2011-12-25 21:07:52 +0100 | [diff] [blame] | 1361 | if (state & ~(INT_CMD12RBE | INT_CMD12CRE)) { |
Guennadi Liakhovetski | 8af5075 | 2012-12-12 15:45:14 +0100 | [diff] [blame] | 1362 | if (!host->mrq) |
Kuninori Morimoto | 585c3a5 | 2015-05-14 07:21:18 +0000 | [diff] [blame] | 1363 | dev_dbg(dev, "NULL IRQ state = 0x%08x\n", state); |
Guennadi Liakhovetski | f985da1 | 2011-12-25 21:07:52 +0100 | [diff] [blame] | 1364 | if (!host->dma_active) |
| 1365 | return IRQ_WAKE_THREAD; |
| 1366 | else if (host->sd_error) |
Kuninori Morimoto | 1b1a694 | 2015-05-14 07:21:36 +0000 | [diff] [blame] | 1367 | sh_mmcif_dma_complete(host); |
Guennadi Liakhovetski | f985da1 | 2011-12-25 21:07:52 +0100 | [diff] [blame] | 1368 | } else { |
Kuninori Morimoto | 585c3a5 | 2015-05-14 07:21:18 +0000 | [diff] [blame] | 1369 | dev_dbg(dev, "Unexpected IRQ 0x%x\n", state); |
Guennadi Liakhovetski | f985da1 | 2011-12-25 21:07:52 +0100 | [diff] [blame] | 1370 | } |
Yusuke Goda | fdc50a9 | 2010-05-26 14:41:59 -0700 | [diff] [blame] | 1371 | |
| 1372 | return IRQ_HANDLED; |
| 1373 | } |
| 1374 | |
Kuninori Morimoto | 1b1a694 | 2015-05-14 07:21:36 +0000 | [diff] [blame] | 1375 | static void sh_mmcif_timeout_work(struct work_struct *work) |
Guennadi Liakhovetski | f985da1 | 2011-12-25 21:07:52 +0100 | [diff] [blame] | 1376 | { |
Geliang Tang | 1046a81 | 2016-01-01 22:59:09 +0800 | [diff] [blame] | 1377 | struct delayed_work *d = to_delayed_work(work); |
Guennadi Liakhovetski | f985da1 | 2011-12-25 21:07:52 +0100 | [diff] [blame] | 1378 | struct sh_mmcif_host *host = container_of(d, struct sh_mmcif_host, timeout_work); |
| 1379 | struct mmc_request *mrq = host->mrq; |
Kuninori Morimoto | 585c3a5 | 2015-05-14 07:21:18 +0000 | [diff] [blame] | 1380 | struct device *dev = sh_mmcif_host_to_dev(host); |
Guennadi Liakhovetski | 8047310 | 2012-12-12 15:38:14 +0100 | [diff] [blame] | 1381 | unsigned long flags; |
Guennadi Liakhovetski | f985da1 | 2011-12-25 21:07:52 +0100 | [diff] [blame] | 1382 | |
| 1383 | if (host->dying) |
| 1384 | /* Don't run after mmc_remove_host() */ |
| 1385 | return; |
| 1386 | |
Guennadi Liakhovetski | 8047310 | 2012-12-12 15:38:14 +0100 | [diff] [blame] | 1387 | spin_lock_irqsave(&host->lock, flags); |
| 1388 | if (host->state == STATE_IDLE) { |
| 1389 | spin_unlock_irqrestore(&host->lock, flags); |
| 1390 | return; |
| 1391 | } |
| 1392 | |
Kuninori Morimoto | 585c3a5 | 2015-05-14 07:21:18 +0000 | [diff] [blame] | 1393 | dev_err(dev, "Timeout waiting for %u on CMD%u\n", |
Kouichi Tomita | 4cbd522 | 2015-02-15 23:46:47 +0900 | [diff] [blame] | 1394 | host->wait_for, mrq->cmd->opcode); |
| 1395 | |
Guennadi Liakhovetski | 8047310 | 2012-12-12 15:38:14 +0100 | [diff] [blame] | 1396 | host->state = STATE_TIMEOUT; |
| 1397 | spin_unlock_irqrestore(&host->lock, flags); |
| 1398 | |
Guennadi Liakhovetski | f985da1 | 2011-12-25 21:07:52 +0100 | [diff] [blame] | 1399 | /* |
| 1400 | * Handle races with cancel_delayed_work(), unless |
| 1401 | * cancel_delayed_work_sync() is used |
| 1402 | */ |
| 1403 | switch (host->wait_for) { |
| 1404 | case MMCIF_WAIT_FOR_CMD: |
| 1405 | mrq->cmd->error = sh_mmcif_error_manage(host); |
| 1406 | break; |
| 1407 | case MMCIF_WAIT_FOR_STOP: |
| 1408 | mrq->stop->error = sh_mmcif_error_manage(host); |
| 1409 | break; |
| 1410 | case MMCIF_WAIT_FOR_MREAD: |
| 1411 | case MMCIF_WAIT_FOR_MWRITE: |
| 1412 | case MMCIF_WAIT_FOR_READ: |
| 1413 | case MMCIF_WAIT_FOR_WRITE: |
| 1414 | case MMCIF_WAIT_FOR_READ_END: |
| 1415 | case MMCIF_WAIT_FOR_WRITE_END: |
Guennadi Liakhovetski | 6998340 | 2011-12-26 12:52:13 -0500 | [diff] [blame] | 1416 | mrq->data->error = sh_mmcif_error_manage(host); |
Guennadi Liakhovetski | f985da1 | 2011-12-25 21:07:52 +0100 | [diff] [blame] | 1417 | break; |
| 1418 | default: |
| 1419 | BUG(); |
| 1420 | } |
| 1421 | |
| 1422 | host->state = STATE_IDLE; |
| 1423 | host->wait_for = MMCIF_WAIT_FOR_REQUEST; |
Guennadi Liakhovetski | f985da1 | 2011-12-25 21:07:52 +0100 | [diff] [blame] | 1424 | host->mrq = NULL; |
| 1425 | mmc_request_done(host->mmc, mrq); |
| 1426 | } |
| 1427 | |
Guennadi Liakhovetski | 7d17baa | 2012-04-20 18:27:13 +0200 | [diff] [blame] | 1428 | static void sh_mmcif_init_ocr(struct sh_mmcif_host *host) |
| 1429 | { |
Kuninori Morimoto | 585c3a5 | 2015-05-14 07:21:18 +0000 | [diff] [blame] | 1430 | struct device *dev = sh_mmcif_host_to_dev(host); |
| 1431 | struct sh_mmcif_plat_data *pd = dev->platform_data; |
Guennadi Liakhovetski | 7d17baa | 2012-04-20 18:27:13 +0200 | [diff] [blame] | 1432 | struct mmc_host *mmc = host->mmc; |
| 1433 | |
| 1434 | mmc_regulator_get_supply(mmc); |
| 1435 | |
Guennadi Liakhovetski | bf68a81 | 2012-05-01 18:18:16 +0200 | [diff] [blame] | 1436 | if (!pd) |
| 1437 | return; |
| 1438 | |
Guennadi Liakhovetski | 7d17baa | 2012-04-20 18:27:13 +0200 | [diff] [blame] | 1439 | if (!mmc->ocr_avail) |
| 1440 | mmc->ocr_avail = pd->ocr; |
| 1441 | else if (pd->ocr) |
| 1442 | dev_warn(mmc_dev(mmc), "Platform OCR mask is ignored\n"); |
| 1443 | } |
| 1444 | |
Bill Pemberton | c3be1ef | 2012-11-19 13:23:06 -0500 | [diff] [blame] | 1445 | static int sh_mmcif_probe(struct platform_device *pdev) |
Yusuke Goda | fdc50a9 | 2010-05-26 14:41:59 -0700 | [diff] [blame] | 1446 | { |
| 1447 | int ret = 0, irq[2]; |
| 1448 | struct mmc_host *mmc; |
Guennadi Liakhovetski | e47bf32 | 2010-11-24 10:05:18 +0000 | [diff] [blame] | 1449 | struct sh_mmcif_host *host; |
Kuninori Morimoto | 60985c3 | 2015-04-23 08:14:12 +0000 | [diff] [blame] | 1450 | struct device *dev = &pdev->dev; |
| 1451 | struct sh_mmcif_plat_data *pd = dev->platform_data; |
Yusuke Goda | fdc50a9 | 2010-05-26 14:41:59 -0700 | [diff] [blame] | 1452 | struct resource *res; |
| 1453 | void __iomem *reg; |
Shinya Kuribayashi | 2cd5b3e | 2013-01-14 14:12:36 -0500 | [diff] [blame] | 1454 | const char *name; |
Yusuke Goda | fdc50a9 | 2010-05-26 14:41:59 -0700 | [diff] [blame] | 1455 | |
| 1456 | irq[0] = platform_get_irq(pdev, 0); |
| 1457 | irq[1] = platform_get_irq(pdev, 1); |
Shinya Kuribayashi | 2cd5b3e | 2013-01-14 14:12:36 -0500 | [diff] [blame] | 1458 | if (irq[0] < 0) { |
Kuninori Morimoto | 60985c3 | 2015-04-23 08:14:12 +0000 | [diff] [blame] | 1459 | dev_err(dev, "Get irq error\n"); |
Yusuke Goda | fdc50a9 | 2010-05-26 14:41:59 -0700 | [diff] [blame] | 1460 | return -ENXIO; |
| 1461 | } |
Ben Dooks | 18f55fc | 2014-06-04 12:42:09 +0100 | [diff] [blame] | 1462 | |
Yusuke Goda | fdc50a9 | 2010-05-26 14:41:59 -0700 | [diff] [blame] | 1463 | res = platform_get_resource(pdev, IORESOURCE_MEM, 0); |
Kuninori Morimoto | 60985c3 | 2015-04-23 08:14:12 +0000 | [diff] [blame] | 1464 | reg = devm_ioremap_resource(dev, res); |
Ben Dooks | 18f55fc | 2014-06-04 12:42:09 +0100 | [diff] [blame] | 1465 | if (IS_ERR(reg)) |
| 1466 | return PTR_ERR(reg); |
Guennadi Liakhovetski | e1aae2e | 2012-04-19 16:15:52 +0200 | [diff] [blame] | 1467 | |
Kuninori Morimoto | 60985c3 | 2015-04-23 08:14:12 +0000 | [diff] [blame] | 1468 | mmc = mmc_alloc_host(sizeof(struct sh_mmcif_host), dev); |
Ben Dooks | 18f55fc | 2014-06-04 12:42:09 +0100 | [diff] [blame] | 1469 | if (!mmc) |
| 1470 | return -ENOMEM; |
Simon Baatz | 2c9054d | 2013-06-09 22:14:12 +0200 | [diff] [blame] | 1471 | |
| 1472 | ret = mmc_of_parse(mmc); |
| 1473 | if (ret < 0) |
Ben Dooks | 4699100 | 2014-06-04 12:42:10 +0100 | [diff] [blame] | 1474 | goto err_host; |
Simon Baatz | 2c9054d | 2013-06-09 22:14:12 +0200 | [diff] [blame] | 1475 | |
Yusuke Goda | fdc50a9 | 2010-05-26 14:41:59 -0700 | [diff] [blame] | 1476 | host = mmc_priv(mmc); |
| 1477 | host->mmc = mmc; |
| 1478 | host->addr = reg; |
Takeshi Kihara | bad4371 | 2015-04-30 02:03:51 +0900 | [diff] [blame] | 1479 | host->timeout = msecs_to_jiffies(10000); |
Guennadi Liakhovetski | 967bcb7 | 2013-07-10 21:21:12 +0200 | [diff] [blame] | 1480 | host->ccs_enable = !pd || !pd->ccs_unsupported; |
Guennadi Liakhovetski | 6d6fd36 | 2013-07-10 21:21:13 +0200 | [diff] [blame] | 1481 | host->clk_ctrl2_enable = pd && pd->clk_ctrl2_present; |
Yusuke Goda | fdc50a9 | 2010-05-26 14:41:59 -0700 | [diff] [blame] | 1482 | |
Yusuke Goda | fdc50a9 | 2010-05-26 14:41:59 -0700 | [diff] [blame] | 1483 | host->pd = pdev; |
| 1484 | |
Guennadi Liakhovetski | 3b0beaf | 2011-04-15 18:30:47 +0000 | [diff] [blame] | 1485 | spin_lock_init(&host->lock); |
Yusuke Goda | fdc50a9 | 2010-05-26 14:41:59 -0700 | [diff] [blame] | 1486 | |
| 1487 | mmc->ops = &sh_mmcif_ops; |
Guennadi Liakhovetski | 7d17baa | 2012-04-20 18:27:13 +0200 | [diff] [blame] | 1488 | sh_mmcif_init_ocr(host); |
| 1489 | |
Guennadi Liakhovetski | eca889f | 2013-02-15 16:13:54 +0100 | [diff] [blame] | 1490 | mmc->caps |= MMC_CAP_MMC_HIGHSPEED | MMC_CAP_WAIT_WHILE_BUSY; |
Guennadi Liakhovetski | bf68a81 | 2012-05-01 18:18:16 +0200 | [diff] [blame] | 1491 | if (pd && pd->caps) |
Yusuke Goda | fdc50a9 | 2010-05-26 14:41:59 -0700 | [diff] [blame] | 1492 | mmc->caps |= pd->caps; |
Guennadi Liakhovetski | a782d68 | 2010-11-24 10:05:22 +0000 | [diff] [blame] | 1493 | mmc->max_segs = 32; |
Yusuke Goda | fdc50a9 | 2010-05-26 14:41:59 -0700 | [diff] [blame] | 1494 | mmc->max_blk_size = 512; |
Kirill A. Shutemov | 09cbfea | 2016-04-01 15:29:47 +0300 | [diff] [blame] | 1495 | mmc->max_req_size = PAGE_SIZE * mmc->max_segs; |
Guennadi Liakhovetski | a782d68 | 2010-11-24 10:05:22 +0000 | [diff] [blame] | 1496 | mmc->max_blk_count = mmc->max_req_size / mmc->max_blk_size; |
Yusuke Goda | fdc50a9 | 2010-05-26 14:41:59 -0700 | [diff] [blame] | 1497 | mmc->max_seg_size = mmc->max_req_size; |
| 1498 | |
Yusuke Goda | fdc50a9 | 2010-05-26 14:41:59 -0700 | [diff] [blame] | 1499 | platform_set_drvdata(pdev, host); |
Guennadi Liakhovetski | a782d68 | 2010-11-24 10:05:22 +0000 | [diff] [blame] | 1500 | |
Kuninori Morimoto | 6aed678 | 2015-04-23 08:15:08 +0000 | [diff] [blame] | 1501 | host->clk = devm_clk_get(dev, NULL); |
| 1502 | if (IS_ERR(host->clk)) { |
| 1503 | ret = PTR_ERR(host->clk); |
Kuninori Morimoto | 60985c3 | 2015-04-23 08:14:12 +0000 | [diff] [blame] | 1504 | dev_err(dev, "cannot get clock: %d\n", ret); |
Ulf Hansson | 88ac2a2 | 2016-02-11 13:59:53 +0100 | [diff] [blame] | 1505 | goto err_host; |
Guennadi Liakhovetski | b289174 | 2012-04-19 18:02:05 +0200 | [diff] [blame] | 1506 | } |
Kuninori Morimoto | 9bb09a3 | 2015-04-23 08:16:04 +0000 | [diff] [blame] | 1507 | |
| 1508 | ret = clk_prepare_enable(host->clk); |
Guennadi Liakhovetski | a660926 | 2012-04-19 18:02:50 +0200 | [diff] [blame] | 1509 | if (ret < 0) |
Ulf Hansson | 88ac2a2 | 2016-02-11 13:59:53 +0100 | [diff] [blame] | 1510 | goto err_host; |
Guennadi Liakhovetski | b289174 | 2012-04-19 18:02:05 +0200 | [diff] [blame] | 1511 | |
Kuninori Morimoto | 9bb09a3 | 2015-04-23 08:16:04 +0000 | [diff] [blame] | 1512 | sh_mmcif_clk_setup(host); |
| 1513 | |
Ulf Hansson | 88ac2a2 | 2016-02-11 13:59:53 +0100 | [diff] [blame] | 1514 | pm_runtime_enable(dev); |
| 1515 | host->power = false; |
| 1516 | |
| 1517 | ret = pm_runtime_get_sync(dev); |
Guennadi Liakhovetski | faca664 | 2011-05-05 16:20:48 +0000 | [diff] [blame] | 1518 | if (ret < 0) |
Ben Dooks | 4699100 | 2014-06-04 12:42:10 +0100 | [diff] [blame] | 1519 | goto err_clk; |
Guennadi Liakhovetski | a782d68 | 2010-11-24 10:05:22 +0000 | [diff] [blame] | 1520 | |
Kuninori Morimoto | 1b1a694 | 2015-05-14 07:21:36 +0000 | [diff] [blame] | 1521 | INIT_DELAYED_WORK(&host->timeout_work, sh_mmcif_timeout_work); |
Yusuke Goda | fdc50a9 | 2010-05-26 14:41:59 -0700 | [diff] [blame] | 1522 | |
Guennadi Liakhovetski | b289174 | 2012-04-19 18:02:05 +0200 | [diff] [blame] | 1523 | sh_mmcif_sync_reset(host); |
Guennadi Liakhovetski | 3b0beaf | 2011-04-15 18:30:47 +0000 | [diff] [blame] | 1524 | sh_mmcif_writel(host->addr, MMCIF_CE_INT_MASK, MASK_ALL); |
| 1525 | |
Kuninori Morimoto | 60985c3 | 2015-04-23 08:14:12 +0000 | [diff] [blame] | 1526 | name = irq[1] < 0 ? dev_name(dev) : "sh_mmc:error"; |
| 1527 | ret = devm_request_threaded_irq(dev, irq[0], sh_mmcif_intr, |
Ben Dooks | 6f4789e | 2014-06-04 12:42:11 +0100 | [diff] [blame] | 1528 | sh_mmcif_irqt, 0, name, host); |
Yusuke Goda | fdc50a9 | 2010-05-26 14:41:59 -0700 | [diff] [blame] | 1529 | if (ret) { |
Kuninori Morimoto | 60985c3 | 2015-04-23 08:14:12 +0000 | [diff] [blame] | 1530 | dev_err(dev, "request_irq error (%s)\n", name); |
Ben Dooks | 11a8085 | 2014-06-04 12:42:12 +0100 | [diff] [blame] | 1531 | goto err_clk; |
Yusuke Goda | fdc50a9 | 2010-05-26 14:41:59 -0700 | [diff] [blame] | 1532 | } |
Shinya Kuribayashi | 2cd5b3e | 2013-01-14 14:12:36 -0500 | [diff] [blame] | 1533 | if (irq[1] >= 0) { |
Kuninori Morimoto | 60985c3 | 2015-04-23 08:14:12 +0000 | [diff] [blame] | 1534 | ret = devm_request_threaded_irq(dev, irq[1], |
Ben Dooks | 6f4789e | 2014-06-04 12:42:11 +0100 | [diff] [blame] | 1535 | sh_mmcif_intr, sh_mmcif_irqt, |
| 1536 | 0, "sh_mmc:int", host); |
Shinya Kuribayashi | 2cd5b3e | 2013-01-14 14:12:36 -0500 | [diff] [blame] | 1537 | if (ret) { |
Kuninori Morimoto | 60985c3 | 2015-04-23 08:14:12 +0000 | [diff] [blame] | 1538 | dev_err(dev, "request_irq error (sh_mmc:int)\n"); |
Ben Dooks | 11a8085 | 2014-06-04 12:42:12 +0100 | [diff] [blame] | 1539 | goto err_clk; |
Shinya Kuribayashi | 2cd5b3e | 2013-01-14 14:12:36 -0500 | [diff] [blame] | 1540 | } |
Yusuke Goda | fdc50a9 | 2010-05-26 14:41:59 -0700 | [diff] [blame] | 1541 | } |
| 1542 | |
Guennadi Liakhovetski | e480606 | 2012-06-14 14:24:35 +0200 | [diff] [blame] | 1543 | if (pd && pd->use_cd_gpio) { |
Laurent Pinchart | 214fc30 | 2013-08-08 12:38:31 +0200 | [diff] [blame] | 1544 | ret = mmc_gpio_request_cd(mmc, pd->cd_gpio, 0); |
Guennadi Liakhovetski | e480606 | 2012-06-14 14:24:35 +0200 | [diff] [blame] | 1545 | if (ret < 0) |
Ben Dooks | 7f67f3a | 2014-06-04 12:42:13 +0100 | [diff] [blame] | 1546 | goto err_clk; |
Guennadi Liakhovetski | e480606 | 2012-06-14 14:24:35 +0200 | [diff] [blame] | 1547 | } |
| 1548 | |
Guennadi Liakhovetski | 8047310 | 2012-12-12 15:38:14 +0100 | [diff] [blame] | 1549 | mutex_init(&host->thread_lock); |
| 1550 | |
Guennadi Liakhovetski | 5ba85d9 | 2012-01-21 00:41:28 +0100 | [diff] [blame] | 1551 | ret = mmc_add_host(mmc); |
| 1552 | if (ret < 0) |
Ben Dooks | 7f67f3a | 2014-06-04 12:42:13 +0100 | [diff] [blame] | 1553 | goto err_clk; |
Yusuke Goda | fdc50a9 | 2010-05-26 14:41:59 -0700 | [diff] [blame] | 1554 | |
Kuninori Morimoto | 60985c3 | 2015-04-23 08:14:12 +0000 | [diff] [blame] | 1555 | dev_pm_qos_expose_latency_limit(dev, 100); |
Rafael J. Wysocki | efe6a8a | 2012-03-13 01:02:15 +0100 | [diff] [blame] | 1556 | |
Kuninori Morimoto | 60985c3 | 2015-04-23 08:14:12 +0000 | [diff] [blame] | 1557 | dev_info(dev, "Chip version 0x%04x, clock rate %luMHz\n", |
Ben Dooks | ce7eb68 | 2014-06-04 12:42:08 +0100 | [diff] [blame] | 1558 | sh_mmcif_readl(host->addr, MMCIF_CE_VERSION) & 0xffff, |
Kuninori Morimoto | 6aed678 | 2015-04-23 08:15:08 +0000 | [diff] [blame] | 1559 | clk_get_rate(host->clk) / 1000000UL); |
Ben Dooks | ce7eb68 | 2014-06-04 12:42:08 +0100 | [diff] [blame] | 1560 | |
Ulf Hansson | 88ac2a2 | 2016-02-11 13:59:53 +0100 | [diff] [blame] | 1561 | pm_runtime_put(dev); |
Kuninori Morimoto | 6aed678 | 2015-04-23 08:15:08 +0000 | [diff] [blame] | 1562 | clk_disable_unprepare(host->clk); |
Yusuke Goda | fdc50a9 | 2010-05-26 14:41:59 -0700 | [diff] [blame] | 1563 | return ret; |
| 1564 | |
Ben Dooks | 4699100 | 2014-06-04 12:42:10 +0100 | [diff] [blame] | 1565 | err_clk: |
Kuninori Morimoto | 6aed678 | 2015-04-23 08:15:08 +0000 | [diff] [blame] | 1566 | clk_disable_unprepare(host->clk); |
Ulf Hansson | 88ac2a2 | 2016-02-11 13:59:53 +0100 | [diff] [blame] | 1567 | pm_runtime_put_sync(dev); |
Kuninori Morimoto | 60985c3 | 2015-04-23 08:14:12 +0000 | [diff] [blame] | 1568 | pm_runtime_disable(dev); |
Ben Dooks | 4699100 | 2014-06-04 12:42:10 +0100 | [diff] [blame] | 1569 | err_host: |
Yusuke Goda | fdc50a9 | 2010-05-26 14:41:59 -0700 | [diff] [blame] | 1570 | mmc_free_host(mmc); |
Yusuke Goda | fdc50a9 | 2010-05-26 14:41:59 -0700 | [diff] [blame] | 1571 | return ret; |
| 1572 | } |
| 1573 | |
Bill Pemberton | 6e0ee71 | 2012-11-19 13:26:03 -0500 | [diff] [blame] | 1574 | static int sh_mmcif_remove(struct platform_device *pdev) |
Yusuke Goda | fdc50a9 | 2010-05-26 14:41:59 -0700 | [diff] [blame] | 1575 | { |
| 1576 | struct sh_mmcif_host *host = platform_get_drvdata(pdev); |
Yusuke Goda | fdc50a9 | 2010-05-26 14:41:59 -0700 | [diff] [blame] | 1577 | |
Guennadi Liakhovetski | f985da1 | 2011-12-25 21:07:52 +0100 | [diff] [blame] | 1578 | host->dying = true; |
Kuninori Morimoto | 6aed678 | 2015-04-23 08:15:08 +0000 | [diff] [blame] | 1579 | clk_prepare_enable(host->clk); |
Guennadi Liakhovetski | faca664 | 2011-05-05 16:20:48 +0000 | [diff] [blame] | 1580 | pm_runtime_get_sync(&pdev->dev); |
Guennadi Liakhovetski | aa0787a | 2010-11-24 10:05:12 +0000 | [diff] [blame] | 1581 | |
Rafael J. Wysocki | efe6a8a | 2012-03-13 01:02:15 +0100 | [diff] [blame] | 1582 | dev_pm_qos_hide_latency_limit(&pdev->dev); |
| 1583 | |
Guennadi Liakhovetski | faca664 | 2011-05-05 16:20:48 +0000 | [diff] [blame] | 1584 | mmc_remove_host(host->mmc); |
Guennadi Liakhovetski | 3b0beaf | 2011-04-15 18:30:47 +0000 | [diff] [blame] | 1585 | sh_mmcif_writel(host->addr, MMCIF_CE_INT_MASK, MASK_ALL); |
| 1586 | |
Guennadi Liakhovetski | f985da1 | 2011-12-25 21:07:52 +0100 | [diff] [blame] | 1587 | /* |
| 1588 | * FIXME: cancel_delayed_work(_sync)() and free_irq() race with the |
| 1589 | * mmc_remove_host() call above. But swapping order doesn't help either |
| 1590 | * (a query on the linux-mmc mailing list didn't bring any replies). |
| 1591 | */ |
| 1592 | cancel_delayed_work_sync(&host->timeout_work); |
| 1593 | |
Kuninori Morimoto | 6aed678 | 2015-04-23 08:15:08 +0000 | [diff] [blame] | 1594 | clk_disable_unprepare(host->clk); |
Yusuke Goda | fdc50a9 | 2010-05-26 14:41:59 -0700 | [diff] [blame] | 1595 | mmc_free_host(host->mmc); |
Guennadi Liakhovetski | faca664 | 2011-05-05 16:20:48 +0000 | [diff] [blame] | 1596 | pm_runtime_put_sync(&pdev->dev); |
| 1597 | pm_runtime_disable(&pdev->dev); |
Yusuke Goda | fdc50a9 | 2010-05-26 14:41:59 -0700 | [diff] [blame] | 1598 | |
| 1599 | return 0; |
| 1600 | } |
| 1601 | |
Ulf Hansson | 51129f3 | 2013-10-01 14:01:46 +0200 | [diff] [blame] | 1602 | #ifdef CONFIG_PM_SLEEP |
Guennadi Liakhovetski | faca664 | 2011-05-05 16:20:48 +0000 | [diff] [blame] | 1603 | static int sh_mmcif_suspend(struct device *dev) |
| 1604 | { |
Guennadi Liakhovetski | b289174 | 2012-04-19 18:02:05 +0200 | [diff] [blame] | 1605 | struct sh_mmcif_host *host = dev_get_drvdata(dev); |
Guennadi Liakhovetski | faca664 | 2011-05-05 16:20:48 +0000 | [diff] [blame] | 1606 | |
Koji Matsuoka | 5afc30f | 2015-08-23 21:58:08 +0900 | [diff] [blame] | 1607 | pm_runtime_get_sync(dev); |
Ulf Hansson | cb3ca1a | 2013-09-26 10:19:09 +0200 | [diff] [blame] | 1608 | sh_mmcif_writel(host->addr, MMCIF_CE_INT_MASK, MASK_ALL); |
Koji Matsuoka | 5afc30f | 2015-08-23 21:58:08 +0900 | [diff] [blame] | 1609 | pm_runtime_put(dev); |
Guennadi Liakhovetski | faca664 | 2011-05-05 16:20:48 +0000 | [diff] [blame] | 1610 | |
Ulf Hansson | cb3ca1a | 2013-09-26 10:19:09 +0200 | [diff] [blame] | 1611 | return 0; |
Guennadi Liakhovetski | faca664 | 2011-05-05 16:20:48 +0000 | [diff] [blame] | 1612 | } |
| 1613 | |
| 1614 | static int sh_mmcif_resume(struct device *dev) |
| 1615 | { |
Ulf Hansson | cb3ca1a | 2013-09-26 10:19:09 +0200 | [diff] [blame] | 1616 | return 0; |
Guennadi Liakhovetski | faca664 | 2011-05-05 16:20:48 +0000 | [diff] [blame] | 1617 | } |
Ulf Hansson | 51129f3 | 2013-10-01 14:01:46 +0200 | [diff] [blame] | 1618 | #endif |
Guennadi Liakhovetski | faca664 | 2011-05-05 16:20:48 +0000 | [diff] [blame] | 1619 | |
| 1620 | static const struct dev_pm_ops sh_mmcif_dev_pm_ops = { |
Ulf Hansson | 51129f3 | 2013-10-01 14:01:46 +0200 | [diff] [blame] | 1621 | SET_SYSTEM_SLEEP_PM_OPS(sh_mmcif_suspend, sh_mmcif_resume) |
Guennadi Liakhovetski | faca664 | 2011-05-05 16:20:48 +0000 | [diff] [blame] | 1622 | }; |
| 1623 | |
Yusuke Goda | fdc50a9 | 2010-05-26 14:41:59 -0700 | [diff] [blame] | 1624 | static struct platform_driver sh_mmcif_driver = { |
| 1625 | .probe = sh_mmcif_probe, |
| 1626 | .remove = sh_mmcif_remove, |
| 1627 | .driver = { |
| 1628 | .name = DRIVER_NAME, |
Guennadi Liakhovetski | faca664 | 2011-05-05 16:20:48 +0000 | [diff] [blame] | 1629 | .pm = &sh_mmcif_dev_pm_ops, |
Kuninori Morimoto | 1b1a694 | 2015-05-14 07:21:36 +0000 | [diff] [blame] | 1630 | .of_match_table = sh_mmcif_of_match, |
Yusuke Goda | fdc50a9 | 2010-05-26 14:41:59 -0700 | [diff] [blame] | 1631 | }, |
| 1632 | }; |
| 1633 | |
Axel Lin | d1f81a6 | 2011-11-26 12:55:43 +0800 | [diff] [blame] | 1634 | module_platform_driver(sh_mmcif_driver); |
Yusuke Goda | fdc50a9 | 2010-05-26 14:41:59 -0700 | [diff] [blame] | 1635 | |
| 1636 | MODULE_DESCRIPTION("SuperH on-chip MMC/eMMC interface driver"); |
| 1637 | MODULE_LICENSE("GPL"); |
Guennadi Liakhovetski | aa0787a | 2010-11-24 10:05:12 +0000 | [diff] [blame] | 1638 | MODULE_ALIAS("platform:" DRIVER_NAME); |
Yusuke Goda | fdc50a9 | 2010-05-26 14:41:59 -0700 | [diff] [blame] | 1639 | MODULE_AUTHOR("Yusuke Goda <yusuke.goda.sx@renesas.com>"); |