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H. Peter Anvin1965aae2008-10-22 22:26:29 -07001#ifndef _ASM_X86_IRQ_VECTORS_H
2#define _ASM_X86_IRQ_VECTORS_H
Thomas Gleixner9b7dc562008-05-02 20:10:09 +02003
4#include <linux/threads.h>
5
6#define NMI_VECTOR 0x02
7
8/*
9 * IDT vectors usable for external interrupt sources start
10 * at 0x20:
11 */
12#define FIRST_EXTERNAL_VECTOR 0x20
13
14#ifdef CONFIG_X86_32
15# define SYSCALL_VECTOR 0x80
16#else
17# define IA32_SYSCALL_VECTOR 0x80
18#endif
19
20/*
Thomas Gleixner9b7dc562008-05-02 20:10:09 +020021 * Reserve the lowest usable priority level 0x20 - 0x2f for triggering
Yinghai Lu497c9a12008-08-19 20:50:28 -070022 * cleanup after irq migration.
Thomas Gleixner9b7dc562008-05-02 20:10:09 +020023 */
24#define IRQ_MOVE_CLEANUP_VECTOR FIRST_EXTERNAL_VECTOR
25
26/*
Yinghai Lu497c9a12008-08-19 20:50:28 -070027 * Vectors 0x30-0x3f are used for ISA interrupts.
Thomas Gleixner9b7dc562008-05-02 20:10:09 +020028 */
29#define IRQ0_VECTOR (FIRST_EXTERNAL_VECTOR + 0x10)
30#define IRQ1_VECTOR (IRQ0_VECTOR + 1)
31#define IRQ2_VECTOR (IRQ0_VECTOR + 2)
32#define IRQ3_VECTOR (IRQ0_VECTOR + 3)
33#define IRQ4_VECTOR (IRQ0_VECTOR + 4)
34#define IRQ5_VECTOR (IRQ0_VECTOR + 5)
35#define IRQ6_VECTOR (IRQ0_VECTOR + 6)
36#define IRQ7_VECTOR (IRQ0_VECTOR + 7)
37#define IRQ8_VECTOR (IRQ0_VECTOR + 8)
38#define IRQ9_VECTOR (IRQ0_VECTOR + 9)
39#define IRQ10_VECTOR (IRQ0_VECTOR + 10)
40#define IRQ11_VECTOR (IRQ0_VECTOR + 11)
41#define IRQ12_VECTOR (IRQ0_VECTOR + 12)
42#define IRQ13_VECTOR (IRQ0_VECTOR + 13)
43#define IRQ14_VECTOR (IRQ0_VECTOR + 14)
44#define IRQ15_VECTOR (IRQ0_VECTOR + 15)
45
46/*
47 * Special IRQ vectors used by the SMP architecture, 0xf0-0xff
48 *
49 * some of the following vectors are 'rare', they are merged
50 * into a single vector (CALL_FUNCTION_VECTOR) to save vector space.
51 * TLB, reschedule and local APIC vectors are performance-critical.
Thomas Gleixner9b7dc562008-05-02 20:10:09 +020052 */
Ingo Molnar5da690d2009-01-31 02:10:03 +010053
54#define SPURIOUS_APIC_VECTOR 0xff
Ingo Molnar647ad942009-01-31 02:06:50 +010055/*
56 * Sanity check
57 */
58#if ((SPURIOUS_APIC_VECTOR & 0x0F) != 0x0F)
59# error SPURIOUS_APIC_VECTOR definition error
60#endif
61
Ingo Molnar5da690d2009-01-31 02:10:03 +010062#define ERROR_APIC_VECTOR 0xfe
63#define RESCHEDULE_VECTOR 0xfd
64#define CALL_FUNCTION_VECTOR 0xfc
65#define CALL_FUNCTION_SINGLE_VECTOR 0xfb
66#define THERMAL_APIC_VECTOR 0xfa
67
Thomas Gleixner9b7dc562008-05-02 20:10:09 +020068#ifdef CONFIG_X86_32
Tejun Heo02cf94c2009-01-21 17:26:06 +090069/* 0xf8 - 0xf9 : free */
Thomas Gleixner9b7dc562008-05-02 20:10:09 +020070#else
Tejun Heo6dd01be2009-01-21 17:26:06 +090071# define THRESHOLD_APIC_VECTOR 0xf9
72# define UV_BAU_MESSAGE 0xf8
Thomas Gleixner9b7dc562008-05-02 20:10:09 +020073#endif
74
Ingo Molnar5da690d2009-01-31 02:10:03 +010075/* f0-f7 used for spreading out TLB flushes: */
76#define INVALIDATE_TLB_VECTOR_END 0xf7
77#define INVALIDATE_TLB_VECTOR_START 0xf0
78#define NUM_INVALIDATE_TLB_VECTORS 8
79
Thomas Gleixner9b7dc562008-05-02 20:10:09 +020080/*
81 * Local APIC timer IRQ vector is on a different priority level,
82 * to work around the 'lost local interrupt if more than 2 IRQ
83 * sources per level' errata.
84 */
85#define LOCAL_TIMER_VECTOR 0xef
86
87/*
Ingo Molnar193c81b2009-01-31 02:23:27 +010088 * Performance monitoring interrupt vector:
89 */
90#define LOCAL_PERF_VECTOR 0xee
91
92/*
Thomas Gleixner9b7dc562008-05-02 20:10:09 +020093 * First APIC vector available to drivers: (vectors 0x30-0xee) we
94 * start at 0x31(0x41) to spread out vectors evenly between priority
95 * levels. (0x80 is the syscall vector)
96 */
Yinghai Lu497c9a12008-08-19 20:50:28 -070097#define FIRST_DEVICE_VECTOR (IRQ15_VECTOR + 2)
Thomas Gleixner9b7dc562008-05-02 20:10:09 +020098
Thomas Gleixner9b7dc562008-05-02 20:10:09 +020099#define NR_VECTORS 256
100
101#define FPU_IRQ 13
102
103#define FIRST_VM86_IRQ 3
104#define LAST_VM86_IRQ 15
105#define invalid_vm86_irq(irq) ((irq) < 3 || (irq) > 15)
106
Yinghai Lu99d093d2008-12-05 18:58:32 -0800107#define NR_IRQS_LEGACY 16
108
Ingo Molnar3e92ab32009-01-31 02:21:42 +0100109#ifdef CONFIG_X86_IO_APIC
Yinghai Lu0b8f1ef2008-12-05 18:58:31 -0800110
Mike Travis9332fcc2009-01-10 22:24:07 -0800111#include <asm/apicnum.h> /* need MAX_IO_APICS */
112
Yinghai Lu0b8f1ef2008-12-05 18:58:31 -0800113#ifndef CONFIG_SPARSE_IRQ
Eric W. Biederman3c7569b2008-08-10 00:35:50 -0700114# if NR_CPUS < MAX_IO_APICS
115# define NR_IRQS (NR_VECTORS + (32 * NR_CPUS))
116# else
117# define NR_IRQS (NR_VECTORS + (32 * MAX_IO_APICS))
118# endif
Yinghai Lu0b8f1ef2008-12-05 18:58:31 -0800119#else
Yinghai Lu4a046d12009-01-12 17:39:24 -0800120# define NR_IRQS \
121 ((8 * NR_CPUS) > (32 * MAX_IO_APICS) ? \
Mike Travis9332fcc2009-01-10 22:24:07 -0800122 (NR_VECTORS + (8 * NR_CPUS)) : \
Ingo Molnar3e92ab32009-01-31 02:21:42 +0100123 (NR_VECTORS + (32 * MAX_IO_APICS)))
Yinghai Lu0b8f1ef2008-12-05 18:58:31 -0800124#endif
Eric W. Biederman3c7569b2008-08-10 00:35:50 -0700125
Ingo Molnar3e92ab32009-01-31 02:21:42 +0100126#else /* !CONFIG_X86_IO_APIC: */
Yinghai Lu1b489762008-11-04 14:10:13 -0800127# define NR_IRQS 16
Yinghai Lu1b489762008-11-04 14:10:13 -0800128#endif
Thomas Gleixner9b7dc562008-05-02 20:10:09 +0200129
H. Peter Anvin1965aae2008-10-22 22:26:29 -0700130#endif /* _ASM_X86_IRQ_VECTORS_H */