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Greg Kroah-Hartmanb2441312017-11-01 15:07:57 +01001/* SPDX-License-Identifier: GPL-2.0 */
Linus Torvalds1da177e2005-04-16 15:20:36 -07002/*
3 * Copyright (C) 1999-2000 Hewlett-Packard Co
4 * Copyright (C) 1999-2000 David Mosberger-Tang <davidm@hpl.hp.com>
5 *
6 * 64-bit integer division.
7 *
8 * This code is based on the application note entitled "Divide, Square Root
9 * and Remainder Algorithms for the IA-64 Architecture". This document
10 * is available as Intel document number 248725-002 or via the web at
11 * http://developer.intel.com/software/opensource/numerics/
12 *
13 * For more details on the theory behind these algorithms, see "IA-64
14 * and Elementary Functions" by Peter Markstein; HP Professional Books
Sina Hamediana9eb2212016-01-30 22:07:31 -080015 * (http://www.goodreads.com/book/show/2019887.Ia_64_and_Elementary_Functions)
Linus Torvalds1da177e2005-04-16 15:20:36 -070016 */
17
18#include <asm/asmmacro.h>
Al Viroe007c532016-01-17 01:13:41 -050019#include <asm/export.h>
Linus Torvalds1da177e2005-04-16 15:20:36 -070020
21#ifdef MODULO
22# define OP mod
23#else
24# define OP div
25#endif
26
27#ifdef UNSIGNED
28# define SGN u
29# define INT_TO_FP(a,b) fcvt.xuf.s1 a=b
30# define FP_TO_INT(a,b) fcvt.fxu.trunc.s1 a=b
31#else
32# define SGN
33# define INT_TO_FP(a,b) fcvt.xf a=b
34# define FP_TO_INT(a,b) fcvt.fx.trunc.s1 a=b
35#endif
36
37#define PASTE1(a,b) a##b
38#define PASTE(a,b) PASTE1(a,b)
39#define NAME PASTE(PASTE(__,SGN),PASTE(OP,di3))
40
41GLOBAL_ENTRY(NAME)
42 .regstk 2,0,0,0
43 // Transfer inputs to FP registers.
44 setf.sig f8 = in0
45 setf.sig f9 = in1
46 ;;
47 // Convert the inputs to FP, to avoid FP software-assist faults.
48 INT_TO_FP(f8, f8)
49 INT_TO_FP(f9, f9)
50 ;;
51 frcpa.s1 f11, p6 = f8, f9 // y0 = frcpa(b)
52 ;;
53(p6) fmpy.s1 f7 = f8, f11 // q0 = a*y0
54(p6) fnma.s1 f6 = f9, f11, f1 // e0 = -b*y0 + 1
55 ;;
56(p6) fma.s1 f10 = f7, f6, f7 // q1 = q0*e0 + q0
57(p6) fmpy.s1 f7 = f6, f6 // e1 = e0*e0
58 ;;
59#ifdef MODULO
60 sub in1 = r0, in1 // in1 = -b
61#endif
62(p6) fma.s1 f10 = f10, f7, f10 // q2 = q1*e1 + q1
63(p6) fma.s1 f6 = f11, f6, f11 // y1 = y0*e0 + y0
64 ;;
65(p6) fma.s1 f6 = f6, f7, f6 // y2 = y1*e1 + y1
66(p6) fnma.s1 f7 = f9, f10, f8 // r = -b*q2 + a
67 ;;
68#ifdef MODULO
69 setf.sig f8 = in0 // f8 = a
70 setf.sig f9 = in1 // f9 = -b
71#endif
72(p6) fma.s1 f11 = f7, f6, f10 // q3 = r*y2 + q2
73 ;;
74 FP_TO_INT(f11, f11) // q = trunc(q3)
75 ;;
76#ifdef MODULO
77 xma.l f11 = f11, f9, f8 // r = q*(-b) + a
78 ;;
79#endif
80 getf.sig r8 = f11 // transfer result to result register
81 br.ret.sptk.many rp
82END(NAME)
Al Viroe007c532016-01-17 01:13:41 -050083EXPORT_SYMBOL(NAME)