| David Howells | af170c5 | 2012-12-14 22:37:13 +0000 | [diff] [blame] | 1 | #ifndef _UAPI_ASM_X86_SIGCONTEXT_H |
| 2 | #define _UAPI_ASM_X86_SIGCONTEXT_H |
| 3 | |
| Ingo Molnar | cbf5f4f | 2015-09-05 09:32:31 +0200 | [diff] [blame] | 4 | /* |
| 5 | * Linux signal context definitions. The sigcontext includes a complex hierarchy of CPU |
| 6 | * and FPU state, available to user-space (on the stack) when a signal handler is |
| 7 | * executed. |
| 8 | * |
| 9 | * As over the years this ABI grew from its very simple roots towards supporting more and |
| 10 | * more CPU state organically, some of the details (which were rather clever hacks back |
| 11 | * in the days) became a bit quirky by today. |
| 12 | * |
| 13 | * The current ABI includes flexible provisions for future extensions, so we won't have |
| 14 | * to grow new quirks for quite some time. Promise! |
| 15 | */ |
| 16 | |
| David Howells | af170c5 | 2012-12-14 22:37:13 +0000 | [diff] [blame] | 17 | #include <linux/compiler.h> |
| 18 | #include <linux/types.h> |
| 19 | |
| Ingo Molnar | cbf5f4f | 2015-09-05 09:32:31 +0200 | [diff] [blame] | 20 | #define FP_XSTATE_MAGIC1 0x46505853U |
| 21 | #define FP_XSTATE_MAGIC2 0x46505845U |
| 22 | #define FP_XSTATE_MAGIC2_SIZE sizeof(FP_XSTATE_MAGIC2) |
| David Howells | af170c5 | 2012-12-14 22:37:13 +0000 | [diff] [blame] | 23 | |
| 24 | /* |
| Ingo Molnar | cbf5f4f | 2015-09-05 09:32:31 +0200 | [diff] [blame] | 25 | * Bytes 464..511 in the current 512-byte layout of the FXSAVE/FXRSTOR frame |
| 26 | * are reserved for SW usage. On CPUs supporting XSAVE/XRSTOR, these bytes |
| 27 | * are used to extend the fpstate pointer in the sigcontext, which now |
| David Howells | af170c5 | 2012-12-14 22:37:13 +0000 | [diff] [blame] | 28 | * includes the extended state information along with fpstate information. |
| 29 | * |
| Ingo Molnar | cbf5f4f | 2015-09-05 09:32:31 +0200 | [diff] [blame] | 30 | * If sw_reserved.magic1 == FP_XSTATE_MAGIC1 then there's a sw_reserved.extended_size |
| 31 | * bytes large extended context area present. (The last 32-bit word of this extended |
| 32 | * area (at the fpstate+extended_size-FP_XSTATE_MAGIC2_SIZE address) is set to |
| 33 | * FP_XSTATE_MAGIC2 so that you can sanity check your size calculations.) |
| 34 | * |
| 35 | * This extended area typically grows with newer CPUs that have larger and larger |
| 36 | * XSAVE areas. |
| David Howells | af170c5 | 2012-12-14 22:37:13 +0000 | [diff] [blame] | 37 | */ |
| 38 | struct _fpx_sw_bytes { |
| Ingo Molnar | cbf5f4f | 2015-09-05 09:32:31 +0200 | [diff] [blame] | 39 | /* If set to FP_XSTATE_MAGIC1 then this is an xstate context. 0 if a legacy frame. */ |
| 40 | __u32 magic1; |
| 41 | |
| 42 | /* |
| 43 | * Total size of the fpstate area: |
| 44 | * |
| 45 | * - if magic1 == 0 then it's sizeof(struct _fpstate) |
| 46 | * - if magic1 == FP_XSTATE_MAGIC1 then it's sizeof(struct _xstate) plus extensions (if any) |
| 47 | */ |
| 48 | __u32 extended_size; |
| 49 | |
| 50 | /* |
| 51 | * Feature bit mask (including FP/SSE/extended state) that is present |
| 52 | * in the memory layout: |
| 53 | */ |
| 54 | __u64 xfeatures; |
| 55 | |
| 56 | /* |
| 57 | * Actual XSAVE state size, based on the xfeatures saved in the layout. |
| 58 | * 'extended_size' is greater than 'xstate_size': |
| 59 | */ |
| 60 | __u32 xstate_size; |
| 61 | |
| 62 | /* For future use: */ |
| 63 | __u32 padding[7]; |
| David Howells | af170c5 | 2012-12-14 22:37:13 +0000 | [diff] [blame] | 64 | }; |
| 65 | |
| 66 | #ifdef __i386__ |
| 67 | /* |
| Ingo Molnar | cbf5f4f | 2015-09-05 09:32:31 +0200 | [diff] [blame] | 68 | * As documented in the iBCS2 standard: |
| David Howells | af170c5 | 2012-12-14 22:37:13 +0000 | [diff] [blame] | 69 | * |
| 70 | * The first part of "struct _fpstate" is just the normal i387 |
| 71 | * hardware setup, the extra "status" word is used to save the |
| 72 | * coprocessor status word before entering the handler. |
| 73 | * |
| David Howells | af170c5 | 2012-12-14 22:37:13 +0000 | [diff] [blame] | 74 | * The FPU state data structure has had to grow to accommodate the |
| 75 | * extended FPU state required by the Streaming SIMD Extensions. |
| 76 | * There is no documented standard to accomplish this at the moment. |
| 77 | */ |
| Ingo Molnar | cbf5f4f | 2015-09-05 09:32:31 +0200 | [diff] [blame] | 78 | |
| 79 | /* 10-byte legacy floating point register: */ |
| David Howells | af170c5 | 2012-12-14 22:37:13 +0000 | [diff] [blame] | 80 | struct _fpreg { |
| Ingo Molnar | 3f623a5 | 2015-09-05 09:32:33 +0200 | [diff] [blame^] | 81 | __u16 significand[4]; |
| 82 | __u16 exponent; |
| David Howells | af170c5 | 2012-12-14 22:37:13 +0000 | [diff] [blame] | 83 | }; |
| 84 | |
| Ingo Molnar | cbf5f4f | 2015-09-05 09:32:31 +0200 | [diff] [blame] | 85 | /* 16-byte floating point register: */ |
| David Howells | af170c5 | 2012-12-14 22:37:13 +0000 | [diff] [blame] | 86 | struct _fpxreg { |
| Ingo Molnar | 3f623a5 | 2015-09-05 09:32:33 +0200 | [diff] [blame^] | 87 | __u16 significand[4]; |
| 88 | __u16 exponent; |
| 89 | __u16 padding[3]; |
| David Howells | af170c5 | 2012-12-14 22:37:13 +0000 | [diff] [blame] | 90 | }; |
| 91 | |
| Ingo Molnar | cbf5f4f | 2015-09-05 09:32:31 +0200 | [diff] [blame] | 92 | /* 16-byte XMM register: */ |
| David Howells | af170c5 | 2012-12-14 22:37:13 +0000 | [diff] [blame] | 93 | struct _xmmreg { |
| Ingo Molnar | 3f623a5 | 2015-09-05 09:32:33 +0200 | [diff] [blame^] | 94 | __u32 element[4]; |
| David Howells | af170c5 | 2012-12-14 22:37:13 +0000 | [diff] [blame] | 95 | }; |
| 96 | |
| Ingo Molnar | cbf5f4f | 2015-09-05 09:32:31 +0200 | [diff] [blame] | 97 | #define X86_FXSR_MAGIC 0x0000 |
| 98 | |
| David Howells | af170c5 | 2012-12-14 22:37:13 +0000 | [diff] [blame] | 99 | struct _fpstate { |
| Ingo Molnar | cbf5f4f | 2015-09-05 09:32:31 +0200 | [diff] [blame] | 100 | /* Legacy FPU environment: */ |
| Ingo Molnar | 3f623a5 | 2015-09-05 09:32:33 +0200 | [diff] [blame^] | 101 | __u32 cw; |
| 102 | __u32 sw; |
| 103 | __u32 tag; |
| 104 | __u32 ipoff; |
| 105 | __u32 cssel; |
| 106 | __u32 dataoff; |
| 107 | __u32 datasel; |
| Ingo Molnar | cbf5f4f | 2015-09-05 09:32:31 +0200 | [diff] [blame] | 108 | struct _fpreg _st[8]; |
| Ingo Molnar | 3f623a5 | 2015-09-05 09:32:33 +0200 | [diff] [blame^] | 109 | __u16 status; |
| 110 | __u16 magic; /* 0xffff: regular FPU data only */ |
| Ingo Molnar | cbf5f4f | 2015-09-05 09:32:31 +0200 | [diff] [blame] | 111 | /* 0x0000: FXSR FPU data */ |
| David Howells | af170c5 | 2012-12-14 22:37:13 +0000 | [diff] [blame] | 112 | |
| 113 | /* FXSR FPU environment */ |
| Ingo Molnar | 3f623a5 | 2015-09-05 09:32:33 +0200 | [diff] [blame^] | 114 | __u32 _fxsr_env[6]; /* FXSR FPU env is ignored */ |
| 115 | __u32 mxcsr; |
| 116 | __u32 reserved; |
| Ingo Molnar | cbf5f4f | 2015-09-05 09:32:31 +0200 | [diff] [blame] | 117 | struct _fpxreg _fxsr_st[8]; /* FXSR FPU reg data is ignored */ |
| 118 | struct _xmmreg _xmm[8]; /* First 8 XMM registers */ |
| Ingo Molnar | 3f623a5 | 2015-09-05 09:32:33 +0200 | [diff] [blame^] | 119 | __u32 padding1[44]; /* Second 8 XMM registers plus padding */ |
| David Howells | af170c5 | 2012-12-14 22:37:13 +0000 | [diff] [blame] | 120 | |
| 121 | union { |
| Ingo Molnar | 3f623a5 | 2015-09-05 09:32:33 +0200 | [diff] [blame^] | 122 | __u32 padding2[12]; |
| Ingo Molnar | cbf5f4f | 2015-09-05 09:32:31 +0200 | [diff] [blame] | 123 | struct _fpx_sw_bytes sw_reserved; /* Potential extended state is encoded here */ |
| David Howells | af170c5 | 2012-12-14 22:37:13 +0000 | [diff] [blame] | 124 | }; |
| 125 | }; |
| 126 | |
| Ingo Molnar | cbf5f4f | 2015-09-05 09:32:31 +0200 | [diff] [blame] | 127 | #else /* __x86_64__: */ |
| David Howells | af170c5 | 2012-12-14 22:37:13 +0000 | [diff] [blame] | 128 | |
| Ingo Molnar | cbf5f4f | 2015-09-05 09:32:31 +0200 | [diff] [blame] | 129 | /* |
| 130 | * The FXSAVE frame. |
| 131 | * |
| 132 | * Note1: If sw_reserved.magic1 == FP_XSTATE_MAGIC1 then the structure is |
| 133 | * larger: 'struct _xstate'. Note that 'struct _xstate' embedds |
| 134 | * 'struct _fpstate' so that you can always assume the _fpstate portion |
| 135 | * exists so that you can check the magic value. |
| 136 | * |
| 137 | * Note2: Reserved fields may someday contain valuable data. Always save/restore |
| 138 | * them when you change signal frames. |
| 139 | */ |
| David Howells | af170c5 | 2012-12-14 22:37:13 +0000 | [diff] [blame] | 140 | struct _fpstate { |
| Ingo Molnar | cbf5f4f | 2015-09-05 09:32:31 +0200 | [diff] [blame] | 141 | __u16 cwd; |
| 142 | __u16 swd; |
| 143 | /* Note this is not the same as the 32-bit/x87/FSAVE twd: */ |
| 144 | __u16 twd; |
| 145 | __u16 fop; |
| 146 | __u64 rip; |
| 147 | __u64 rdp; |
| 148 | __u32 mxcsr; |
| 149 | __u32 mxcsr_mask; |
| 150 | __u32 st_space[32]; /* 8x FP registers, 16 bytes each */ |
| 151 | __u32 xmm_space[64]; /* 16x XMM registers, 16 bytes each */ |
| 152 | __u32 reserved2[12]; |
| David Howells | af170c5 | 2012-12-14 22:37:13 +0000 | [diff] [blame] | 153 | union { |
| Ingo Molnar | cbf5f4f | 2015-09-05 09:32:31 +0200 | [diff] [blame] | 154 | __u32 reserved3[12]; |
| 155 | struct _fpx_sw_bytes sw_reserved; /* Potential extended state is encoded here */ |
| David Howells | af170c5 | 2012-12-14 22:37:13 +0000 | [diff] [blame] | 156 | }; |
| 157 | }; |
| 158 | |
| Ingo Molnar | 128f825 | 2015-09-05 09:32:32 +0200 | [diff] [blame] | 159 | #endif /* __x86_64__ */ |
| 160 | |
| 161 | struct _header { |
| 162 | __u64 xfeatures; |
| 163 | __u64 reserved1[2]; |
| 164 | __u64 reserved2[5]; |
| 165 | }; |
| 166 | |
| 167 | struct _ymmh_state { |
| 168 | /* 16x YMM registers, 16 bytes each: */ |
| 169 | __u32 ymmh_space[64]; |
| 170 | }; |
| 171 | |
| David Howells | af170c5 | 2012-12-14 22:37:13 +0000 | [diff] [blame] | 172 | /* |
| Ingo Molnar | 128f825 | 2015-09-05 09:32:32 +0200 | [diff] [blame] | 173 | * Extended state pointed to by sigcontext::fpstate. |
| 174 | * |
| 175 | * In addition to the fpstate, information encoded in _xstate::xstate_hdr |
| 176 | * indicates the presence of other extended state information supported |
| 177 | * by the CPU and kernel: |
| David Howells | af170c5 | 2012-12-14 22:37:13 +0000 | [diff] [blame] | 178 | */ |
| Ingo Molnar | 128f825 | 2015-09-05 09:32:32 +0200 | [diff] [blame] | 179 | struct _xstate { |
| 180 | struct _fpstate fpstate; |
| 181 | struct _header xstate_hdr; |
| 182 | struct _ymmh_state ymmh; |
| 183 | /* New processor state extensions go here: */ |
| 184 | }; |
| 185 | |
| 186 | /* |
| 187 | * The old user-space sigcontext definition, just in case user-space still |
| 188 | * relies on it. The kernel definition (in asm/sigcontext.h) has unified |
| 189 | * field names but otherwise the same layout. |
| 190 | */ |
| 191 | #ifndef __KERNEL__ |
| 192 | # ifdef __i386__ |
| 193 | struct sigcontext { |
| Ingo Molnar | 3f623a5 | 2015-09-05 09:32:33 +0200 | [diff] [blame^] | 194 | __u16 gs, __gsh; |
| 195 | __u16 fs, __fsh; |
| 196 | __u16 es, __esh; |
| 197 | __u16 ds, __dsh; |
| 198 | __u32 edi; |
| 199 | __u32 esi; |
| 200 | __u32 ebp; |
| 201 | __u32 esp; |
| 202 | __u32 ebx; |
| 203 | __u32 edx; |
| 204 | __u32 ecx; |
| 205 | __u32 eax; |
| 206 | __u32 trapno; |
| 207 | __u32 err; |
| 208 | __u32 eip; |
| 209 | __u16 cs, __csh; |
| 210 | __u32 eflags; |
| 211 | __u32 esp_at_signal; |
| 212 | __u16 ss, __ssh; |
| Ingo Molnar | 128f825 | 2015-09-05 09:32:32 +0200 | [diff] [blame] | 213 | struct _fpstate __user *fpstate; |
| Ingo Molnar | 3f623a5 | 2015-09-05 09:32:33 +0200 | [diff] [blame^] | 214 | __u32 oldmask; |
| 215 | __u32 cr2; |
| Ingo Molnar | 128f825 | 2015-09-05 09:32:32 +0200 | [diff] [blame] | 216 | }; |
| 217 | # else /* __x86_64__: */ |
| David Howells | af170c5 | 2012-12-14 22:37:13 +0000 | [diff] [blame] | 218 | struct sigcontext { |
| Ingo Molnar | cbf5f4f | 2015-09-05 09:32:31 +0200 | [diff] [blame] | 219 | __u64 r8; |
| 220 | __u64 r9; |
| 221 | __u64 r10; |
| 222 | __u64 r11; |
| 223 | __u64 r12; |
| 224 | __u64 r13; |
| 225 | __u64 r14; |
| 226 | __u64 r15; |
| 227 | __u64 rdi; |
| 228 | __u64 rsi; |
| 229 | __u64 rbp; |
| 230 | __u64 rbx; |
| 231 | __u64 rdx; |
| 232 | __u64 rax; |
| 233 | __u64 rcx; |
| 234 | __u64 rsp; |
| 235 | __u64 rip; |
| 236 | __u64 eflags; /* RFLAGS */ |
| 237 | __u16 cs; |
| 238 | __u16 gs; |
| 239 | __u16 fs; |
| 240 | __u16 __pad0; |
| 241 | __u64 err; |
| 242 | __u64 trapno; |
| 243 | __u64 oldmask; |
| 244 | __u64 cr2; |
| 245 | struct _fpstate __user *fpstate; /* Zero when no FPU context */ |
| 246 | # ifdef __ILP32__ |
| 247 | __u32 __fpstate_pad; |
| 248 | # endif |
| 249 | __u64 reserved1[8]; |
| David Howells | af170c5 | 2012-12-14 22:37:13 +0000 | [diff] [blame] | 250 | }; |
| Ingo Molnar | 128f825 | 2015-09-05 09:32:32 +0200 | [diff] [blame] | 251 | # endif /* __x86_64__ */ |
| 252 | #endif /* !__KERNEL__ */ |
| David Howells | af170c5 | 2012-12-14 22:37:13 +0000 | [diff] [blame] | 253 | |
| 254 | #endif /* _UAPI_ASM_X86_SIGCONTEXT_H */ |