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Carlo Caionecfb61a42014-05-01 14:29:27 +02001/*
Chen-Yu Tsai4fd41152016-02-12 10:02:42 +08002 * MFD core driver for the X-Powers' Power Management ICs
Carlo Caionecfb61a42014-05-01 14:29:27 +02003 *
Jacob Panaf7e9062014-10-06 21:17:14 -07004 * AXP20x typically comprises an adaptive USB-Compatible PWM charger, BUCK DC-DC
5 * converters, LDOs, multiple 12-bit ADCs of voltage, current and temperature
6 * as well as configurable GPIOs.
Carlo Caionecfb61a42014-05-01 14:29:27 +02007 *
Chen-Yu Tsai4fd41152016-02-12 10:02:42 +08008 * This file contains the interface independent core functions.
9 *
Chen-Yu Tsaie7402352016-02-12 10:02:41 +080010 * Copyright (C) 2014 Carlo Caione
11 *
Carlo Caionecfb61a42014-05-01 14:29:27 +020012 * Author: Carlo Caione <carlo@caione.org>
13 *
14 * This program is free software; you can redistribute it and/or modify
15 * it under the terms of the GNU General Public License version 2 as
16 * published by the Free Software Foundation.
17 */
18
19#include <linux/err.h>
Hans de Goede179dc632016-06-05 15:50:48 +020020#include <linux/delay.h>
Carlo Caionecfb61a42014-05-01 14:29:27 +020021#include <linux/interrupt.h>
22#include <linux/kernel.h>
23#include <linux/module.h>
24#include <linux/pm_runtime.h>
25#include <linux/regmap.h>
Carlo Caionecfb61a42014-05-01 14:29:27 +020026#include <linux/regulator/consumer.h>
27#include <linux/mfd/axp20x.h>
28#include <linux/mfd/core.h>
29#include <linux/of_device.h>
Jacob Panaf7e9062014-10-06 21:17:14 -070030#include <linux/acpi.h>
Carlo Caionecfb61a42014-05-01 14:29:27 +020031
32#define AXP20X_OFF 0x80
33
Krzysztof Kozlowskic31e8582015-03-24 11:21:17 +010034static const char * const axp20x_model_names[] = {
Michal Suchanekd8d79f82015-07-11 14:59:56 +020035 "AXP152",
Jacob Panaf7e9062014-10-06 21:17:14 -070036 "AXP202",
37 "AXP209",
Boris BREZILLONf05be582015-04-10 12:09:01 +080038 "AXP221",
Chen-Yu Tsai02071f02016-02-12 10:02:44 +080039 "AXP223",
Jacob Panaf7e9062014-10-06 21:17:14 -070040 "AXP288",
Chen-Yu Tsai8824ee82016-08-27 15:55:38 +080041 "AXP806",
Chen-Yu Tsai20147f02016-03-29 17:22:26 +080042 "AXP809",
Jacob Panaf7e9062014-10-06 21:17:14 -070043};
44
Michal Suchanekd8d79f82015-07-11 14:59:56 +020045static const struct regmap_range axp152_writeable_ranges[] = {
46 regmap_reg_range(AXP152_LDO3456_DC1234_CTRL, AXP152_IRQ3_STATE),
47 regmap_reg_range(AXP152_DCDC_MODE, AXP152_PWM1_DUTY_CYCLE),
48};
49
50static const struct regmap_range axp152_volatile_ranges[] = {
51 regmap_reg_range(AXP152_PWR_OP_MODE, AXP152_PWR_OP_MODE),
52 regmap_reg_range(AXP152_IRQ1_EN, AXP152_IRQ3_STATE),
53 regmap_reg_range(AXP152_GPIO_INPUT, AXP152_GPIO_INPUT),
54};
55
56static const struct regmap_access_table axp152_writeable_table = {
57 .yes_ranges = axp152_writeable_ranges,
58 .n_yes_ranges = ARRAY_SIZE(axp152_writeable_ranges),
59};
60
61static const struct regmap_access_table axp152_volatile_table = {
62 .yes_ranges = axp152_volatile_ranges,
63 .n_yes_ranges = ARRAY_SIZE(axp152_volatile_ranges),
64};
65
Carlo Caionecfb61a42014-05-01 14:29:27 +020066static const struct regmap_range axp20x_writeable_ranges[] = {
67 regmap_reg_range(AXP20X_DATACACHE(0), AXP20X_IRQ5_STATE),
68 regmap_reg_range(AXP20X_DCDC_MODE, AXP20X_FG_RES),
Bruno Prémont553ed4b2015-08-08 17:58:40 +020069 regmap_reg_range(AXP20X_RDC_H, AXP20X_OCV(AXP20X_OCV_MAX)),
Carlo Caionecfb61a42014-05-01 14:29:27 +020070};
71
72static const struct regmap_range axp20x_volatile_ranges[] = {
Bruno Prémont553ed4b2015-08-08 17:58:40 +020073 regmap_reg_range(AXP20X_PWR_INPUT_STATUS, AXP20X_USB_OTG_STATUS),
74 regmap_reg_range(AXP20X_CHRG_CTRL1, AXP20X_CHRG_CTRL2),
Carlo Caionecfb61a42014-05-01 14:29:27 +020075 regmap_reg_range(AXP20X_IRQ1_EN, AXP20X_IRQ5_STATE),
Bruno Prémont553ed4b2015-08-08 17:58:40 +020076 regmap_reg_range(AXP20X_ACIN_V_ADC_H, AXP20X_IPSOUT_V_HIGH_L),
77 regmap_reg_range(AXP20X_GPIO20_SS, AXP20X_GPIO3_CTRL),
78 regmap_reg_range(AXP20X_FG_RES, AXP20X_RDC_L),
Carlo Caionecfb61a42014-05-01 14:29:27 +020079};
80
81static const struct regmap_access_table axp20x_writeable_table = {
82 .yes_ranges = axp20x_writeable_ranges,
83 .n_yes_ranges = ARRAY_SIZE(axp20x_writeable_ranges),
84};
85
86static const struct regmap_access_table axp20x_volatile_table = {
87 .yes_ranges = axp20x_volatile_ranges,
88 .n_yes_ranges = ARRAY_SIZE(axp20x_volatile_ranges),
89};
90
Chen-Yu Tsai20147f02016-03-29 17:22:26 +080091/* AXP22x ranges are shared with the AXP809, as they cover the same range */
Boris BREZILLONf05be582015-04-10 12:09:01 +080092static const struct regmap_range axp22x_writeable_ranges[] = {
93 regmap_reg_range(AXP20X_DATACACHE(0), AXP20X_IRQ5_STATE),
94 regmap_reg_range(AXP20X_DCDC_MODE, AXP22X_BATLOW_THRES1),
95};
96
97static const struct regmap_range axp22x_volatile_ranges[] = {
Hans de Goede15093252016-05-14 19:51:28 +020098 regmap_reg_range(AXP20X_PWR_INPUT_STATUS, AXP20X_PWR_OP_MODE),
Boris BREZILLONf05be582015-04-10 12:09:01 +080099 regmap_reg_range(AXP20X_IRQ1_EN, AXP20X_IRQ5_STATE),
Hans de Goede15093252016-05-14 19:51:28 +0200100 regmap_reg_range(AXP22X_GPIO_STATE, AXP22X_GPIO_STATE),
Icenowy Zheng3f895862016-07-01 17:29:23 +0800101 regmap_reg_range(AXP22X_PMIC_ADC_H, AXP20X_IPSOUT_V_HIGH_L),
Hans de Goede15093252016-05-14 19:51:28 +0200102 regmap_reg_range(AXP20X_FG_RES, AXP20X_FG_RES),
Boris BREZILLONf05be582015-04-10 12:09:01 +0800103};
104
105static const struct regmap_access_table axp22x_writeable_table = {
106 .yes_ranges = axp22x_writeable_ranges,
107 .n_yes_ranges = ARRAY_SIZE(axp22x_writeable_ranges),
108};
109
110static const struct regmap_access_table axp22x_volatile_table = {
111 .yes_ranges = axp22x_volatile_ranges,
112 .n_yes_ranges = ARRAY_SIZE(axp22x_volatile_ranges),
113};
114
Jacob Panaf7e9062014-10-06 21:17:14 -0700115static const struct regmap_range axp288_writeable_ranges[] = {
116 regmap_reg_range(AXP20X_DATACACHE(0), AXP20X_IRQ6_STATE),
117 regmap_reg_range(AXP20X_DCDC_MODE, AXP288_FG_TUNE5),
118};
119
120static const struct regmap_range axp288_volatile_ranges[] = {
121 regmap_reg_range(AXP20X_IRQ1_EN, AXP20X_IPSOUT_V_HIGH_L),
122};
123
124static const struct regmap_access_table axp288_writeable_table = {
125 .yes_ranges = axp288_writeable_ranges,
126 .n_yes_ranges = ARRAY_SIZE(axp288_writeable_ranges),
127};
128
129static const struct regmap_access_table axp288_volatile_table = {
130 .yes_ranges = axp288_volatile_ranges,
131 .n_yes_ranges = ARRAY_SIZE(axp288_volatile_ranges),
132};
133
Chen-Yu Tsai8824ee82016-08-27 15:55:38 +0800134static const struct regmap_range axp806_writeable_ranges[] = {
135 regmap_reg_range(AXP20X_DATACACHE(0), AXP20X_DATACACHE(3)),
136 regmap_reg_range(AXP806_PWR_OUT_CTRL1, AXP806_CLDO3_V_CTRL),
137 regmap_reg_range(AXP20X_IRQ1_EN, AXP20X_IRQ2_EN),
138 regmap_reg_range(AXP20X_IRQ1_STATE, AXP20X_IRQ2_STATE),
139};
140
141static const struct regmap_range axp806_volatile_ranges[] = {
142 regmap_reg_range(AXP20X_IRQ1_STATE, AXP20X_IRQ2_STATE),
143};
144
145static const struct regmap_access_table axp806_writeable_table = {
146 .yes_ranges = axp806_writeable_ranges,
147 .n_yes_ranges = ARRAY_SIZE(axp806_writeable_ranges),
148};
149
150static const struct regmap_access_table axp806_volatile_table = {
151 .yes_ranges = axp806_volatile_ranges,
152 .n_yes_ranges = ARRAY_SIZE(axp806_volatile_ranges),
153};
154
Michal Suchanekd8d79f82015-07-11 14:59:56 +0200155static struct resource axp152_pek_resources[] = {
156 DEFINE_RES_IRQ_NAMED(AXP152_IRQ_PEK_RIS_EDGE, "PEK_DBR"),
157 DEFINE_RES_IRQ_NAMED(AXP152_IRQ_PEK_FAL_EDGE, "PEK_DBF"),
158};
159
Michael Haascd7cf272016-05-06 07:19:49 +0200160static struct resource axp20x_ac_power_supply_resources[] = {
161 DEFINE_RES_IRQ_NAMED(AXP20X_IRQ_ACIN_PLUGIN, "ACIN_PLUGIN"),
162 DEFINE_RES_IRQ_NAMED(AXP20X_IRQ_ACIN_REMOVAL, "ACIN_REMOVAL"),
163 DEFINE_RES_IRQ_NAMED(AXP20X_IRQ_ACIN_OVER_V, "ACIN_OVER_V"),
164};
165
Carlo Caionecfb61a42014-05-01 14:29:27 +0200166static struct resource axp20x_pek_resources[] = {
167 {
168 .name = "PEK_DBR",
169 .start = AXP20X_IRQ_PEK_RIS_EDGE,
170 .end = AXP20X_IRQ_PEK_RIS_EDGE,
171 .flags = IORESOURCE_IRQ,
172 }, {
173 .name = "PEK_DBF",
174 .start = AXP20X_IRQ_PEK_FAL_EDGE,
175 .end = AXP20X_IRQ_PEK_FAL_EDGE,
176 .flags = IORESOURCE_IRQ,
177 },
178};
179
Hans de Goede8de4efd2015-08-08 17:58:41 +0200180static struct resource axp20x_usb_power_supply_resources[] = {
181 DEFINE_RES_IRQ_NAMED(AXP20X_IRQ_VBUS_PLUGIN, "VBUS_PLUGIN"),
182 DEFINE_RES_IRQ_NAMED(AXP20X_IRQ_VBUS_REMOVAL, "VBUS_REMOVAL"),
183 DEFINE_RES_IRQ_NAMED(AXP20X_IRQ_VBUS_VALID, "VBUS_VALID"),
184 DEFINE_RES_IRQ_NAMED(AXP20X_IRQ_VBUS_NOT_VALID, "VBUS_NOT_VALID"),
185};
186
Hans de Goedeecd98cc2016-06-02 19:18:55 +0200187static struct resource axp22x_usb_power_supply_resources[] = {
188 DEFINE_RES_IRQ_NAMED(AXP22X_IRQ_VBUS_PLUGIN, "VBUS_PLUGIN"),
189 DEFINE_RES_IRQ_NAMED(AXP22X_IRQ_VBUS_REMOVAL, "VBUS_REMOVAL"),
190};
191
Boris BREZILLONf05be582015-04-10 12:09:01 +0800192static struct resource axp22x_pek_resources[] = {
193 {
194 .name = "PEK_DBR",
195 .start = AXP22X_IRQ_PEK_RIS_EDGE,
196 .end = AXP22X_IRQ_PEK_RIS_EDGE,
197 .flags = IORESOURCE_IRQ,
198 }, {
199 .name = "PEK_DBF",
200 .start = AXP22X_IRQ_PEK_FAL_EDGE,
201 .end = AXP22X_IRQ_PEK_FAL_EDGE,
202 .flags = IORESOURCE_IRQ,
203 },
204};
205
Borun Fue56e5ad2015-10-14 16:16:26 +0800206static struct resource axp288_power_button_resources[] = {
207 {
208 .name = "PEK_DBR",
209 .start = AXP288_IRQ_POKN,
210 .end = AXP288_IRQ_POKN,
211 .flags = IORESOURCE_IRQ,
212 },
213 {
214 .name = "PEK_DBF",
215 .start = AXP288_IRQ_POKP,
216 .end = AXP288_IRQ_POKP,
217 .flags = IORESOURCE_IRQ,
218 },
219};
220
Todd Brandtd63878742015-02-02 15:41:41 -0800221static struct resource axp288_fuel_gauge_resources[] = {
Jacob Panaf7e9062014-10-06 21:17:14 -0700222 {
223 .start = AXP288_IRQ_QWBTU,
224 .end = AXP288_IRQ_QWBTU,
225 .flags = IORESOURCE_IRQ,
226 },
227 {
228 .start = AXP288_IRQ_WBTU,
229 .end = AXP288_IRQ_WBTU,
230 .flags = IORESOURCE_IRQ,
231 },
232 {
233 .start = AXP288_IRQ_QWBTO,
234 .end = AXP288_IRQ_QWBTO,
235 .flags = IORESOURCE_IRQ,
236 },
237 {
238 .start = AXP288_IRQ_WBTO,
239 .end = AXP288_IRQ_WBTO,
240 .flags = IORESOURCE_IRQ,
241 },
242 {
243 .start = AXP288_IRQ_WL2,
244 .end = AXP288_IRQ_WL2,
245 .flags = IORESOURCE_IRQ,
246 },
247 {
248 .start = AXP288_IRQ_WL1,
249 .end = AXP288_IRQ_WL1,
250 .flags = IORESOURCE_IRQ,
251 },
252};
253
Chen-Yu Tsai20147f02016-03-29 17:22:26 +0800254static struct resource axp809_pek_resources[] = {
255 {
256 .name = "PEK_DBR",
257 .start = AXP809_IRQ_PEK_RIS_EDGE,
258 .end = AXP809_IRQ_PEK_RIS_EDGE,
259 .flags = IORESOURCE_IRQ,
260 }, {
261 .name = "PEK_DBF",
262 .start = AXP809_IRQ_PEK_FAL_EDGE,
263 .end = AXP809_IRQ_PEK_FAL_EDGE,
264 .flags = IORESOURCE_IRQ,
265 },
266};
267
Michal Suchanekd8d79f82015-07-11 14:59:56 +0200268static const struct regmap_config axp152_regmap_config = {
269 .reg_bits = 8,
270 .val_bits = 8,
271 .wr_table = &axp152_writeable_table,
272 .volatile_table = &axp152_volatile_table,
273 .max_register = AXP152_PWM1_DUTY_CYCLE,
274 .cache_type = REGCACHE_RBTREE,
275};
276
Carlo Caionecfb61a42014-05-01 14:29:27 +0200277static const struct regmap_config axp20x_regmap_config = {
278 .reg_bits = 8,
279 .val_bits = 8,
280 .wr_table = &axp20x_writeable_table,
281 .volatile_table = &axp20x_volatile_table,
Bruno Prémont553ed4b2015-08-08 17:58:40 +0200282 .max_register = AXP20X_OCV(AXP20X_OCV_MAX),
Carlo Caionecfb61a42014-05-01 14:29:27 +0200283 .cache_type = REGCACHE_RBTREE,
284};
285
Boris BREZILLONf05be582015-04-10 12:09:01 +0800286static const struct regmap_config axp22x_regmap_config = {
287 .reg_bits = 8,
288 .val_bits = 8,
289 .wr_table = &axp22x_writeable_table,
290 .volatile_table = &axp22x_volatile_table,
291 .max_register = AXP22X_BATLOW_THRES1,
292 .cache_type = REGCACHE_RBTREE,
293};
294
Jacob Panaf7e9062014-10-06 21:17:14 -0700295static const struct regmap_config axp288_regmap_config = {
296 .reg_bits = 8,
297 .val_bits = 8,
298 .wr_table = &axp288_writeable_table,
299 .volatile_table = &axp288_volatile_table,
300 .max_register = AXP288_FG_TUNE5,
301 .cache_type = REGCACHE_RBTREE,
302};
303
Chen-Yu Tsai8824ee82016-08-27 15:55:38 +0800304static const struct regmap_config axp806_regmap_config = {
305 .reg_bits = 8,
306 .val_bits = 8,
307 .wr_table = &axp806_writeable_table,
308 .volatile_table = &axp806_volatile_table,
309 .max_register = AXP806_VREF_TEMP_WARN_L,
310 .cache_type = REGCACHE_RBTREE,
311};
312
Jacob Panaf7e9062014-10-06 21:17:14 -0700313#define INIT_REGMAP_IRQ(_variant, _irq, _off, _mask) \
314 [_variant##_IRQ_##_irq] = { .reg_offset = (_off), .mask = BIT(_mask) }
Carlo Caionecfb61a42014-05-01 14:29:27 +0200315
Michal Suchanekd8d79f82015-07-11 14:59:56 +0200316static const struct regmap_irq axp152_regmap_irqs[] = {
317 INIT_REGMAP_IRQ(AXP152, LDO0IN_CONNECT, 0, 6),
318 INIT_REGMAP_IRQ(AXP152, LDO0IN_REMOVAL, 0, 5),
319 INIT_REGMAP_IRQ(AXP152, ALDO0IN_CONNECT, 0, 3),
320 INIT_REGMAP_IRQ(AXP152, ALDO0IN_REMOVAL, 0, 2),
321 INIT_REGMAP_IRQ(AXP152, DCDC1_V_LOW, 1, 5),
322 INIT_REGMAP_IRQ(AXP152, DCDC2_V_LOW, 1, 4),
323 INIT_REGMAP_IRQ(AXP152, DCDC3_V_LOW, 1, 3),
324 INIT_REGMAP_IRQ(AXP152, DCDC4_V_LOW, 1, 2),
325 INIT_REGMAP_IRQ(AXP152, PEK_SHORT, 1, 1),
326 INIT_REGMAP_IRQ(AXP152, PEK_LONG, 1, 0),
327 INIT_REGMAP_IRQ(AXP152, TIMER, 2, 7),
328 INIT_REGMAP_IRQ(AXP152, PEK_RIS_EDGE, 2, 6),
329 INIT_REGMAP_IRQ(AXP152, PEK_FAL_EDGE, 2, 5),
330 INIT_REGMAP_IRQ(AXP152, GPIO3_INPUT, 2, 3),
331 INIT_REGMAP_IRQ(AXP152, GPIO2_INPUT, 2, 2),
332 INIT_REGMAP_IRQ(AXP152, GPIO1_INPUT, 2, 1),
333 INIT_REGMAP_IRQ(AXP152, GPIO0_INPUT, 2, 0),
334};
335
Carlo Caionecfb61a42014-05-01 14:29:27 +0200336static const struct regmap_irq axp20x_regmap_irqs[] = {
Jacob Panaf7e9062014-10-06 21:17:14 -0700337 INIT_REGMAP_IRQ(AXP20X, ACIN_OVER_V, 0, 7),
338 INIT_REGMAP_IRQ(AXP20X, ACIN_PLUGIN, 0, 6),
339 INIT_REGMAP_IRQ(AXP20X, ACIN_REMOVAL, 0, 5),
340 INIT_REGMAP_IRQ(AXP20X, VBUS_OVER_V, 0, 4),
341 INIT_REGMAP_IRQ(AXP20X, VBUS_PLUGIN, 0, 3),
342 INIT_REGMAP_IRQ(AXP20X, VBUS_REMOVAL, 0, 2),
343 INIT_REGMAP_IRQ(AXP20X, VBUS_V_LOW, 0, 1),
344 INIT_REGMAP_IRQ(AXP20X, BATT_PLUGIN, 1, 7),
345 INIT_REGMAP_IRQ(AXP20X, BATT_REMOVAL, 1, 6),
346 INIT_REGMAP_IRQ(AXP20X, BATT_ENT_ACT_MODE, 1, 5),
347 INIT_REGMAP_IRQ(AXP20X, BATT_EXIT_ACT_MODE, 1, 4),
348 INIT_REGMAP_IRQ(AXP20X, CHARG, 1, 3),
349 INIT_REGMAP_IRQ(AXP20X, CHARG_DONE, 1, 2),
350 INIT_REGMAP_IRQ(AXP20X, BATT_TEMP_HIGH, 1, 1),
351 INIT_REGMAP_IRQ(AXP20X, BATT_TEMP_LOW, 1, 0),
352 INIT_REGMAP_IRQ(AXP20X, DIE_TEMP_HIGH, 2, 7),
353 INIT_REGMAP_IRQ(AXP20X, CHARG_I_LOW, 2, 6),
354 INIT_REGMAP_IRQ(AXP20X, DCDC1_V_LONG, 2, 5),
355 INIT_REGMAP_IRQ(AXP20X, DCDC2_V_LONG, 2, 4),
356 INIT_REGMAP_IRQ(AXP20X, DCDC3_V_LONG, 2, 3),
357 INIT_REGMAP_IRQ(AXP20X, PEK_SHORT, 2, 1),
358 INIT_REGMAP_IRQ(AXP20X, PEK_LONG, 2, 0),
359 INIT_REGMAP_IRQ(AXP20X, N_OE_PWR_ON, 3, 7),
360 INIT_REGMAP_IRQ(AXP20X, N_OE_PWR_OFF, 3, 6),
361 INIT_REGMAP_IRQ(AXP20X, VBUS_VALID, 3, 5),
362 INIT_REGMAP_IRQ(AXP20X, VBUS_NOT_VALID, 3, 4),
363 INIT_REGMAP_IRQ(AXP20X, VBUS_SESS_VALID, 3, 3),
364 INIT_REGMAP_IRQ(AXP20X, VBUS_SESS_END, 3, 2),
365 INIT_REGMAP_IRQ(AXP20X, LOW_PWR_LVL1, 3, 1),
366 INIT_REGMAP_IRQ(AXP20X, LOW_PWR_LVL2, 3, 0),
367 INIT_REGMAP_IRQ(AXP20X, TIMER, 4, 7),
368 INIT_REGMAP_IRQ(AXP20X, PEK_RIS_EDGE, 4, 6),
369 INIT_REGMAP_IRQ(AXP20X, PEK_FAL_EDGE, 4, 5),
370 INIT_REGMAP_IRQ(AXP20X, GPIO3_INPUT, 4, 3),
371 INIT_REGMAP_IRQ(AXP20X, GPIO2_INPUT, 4, 2),
372 INIT_REGMAP_IRQ(AXP20X, GPIO1_INPUT, 4, 1),
373 INIT_REGMAP_IRQ(AXP20X, GPIO0_INPUT, 4, 0),
374};
375
Boris BREZILLONf05be582015-04-10 12:09:01 +0800376static const struct regmap_irq axp22x_regmap_irqs[] = {
377 INIT_REGMAP_IRQ(AXP22X, ACIN_OVER_V, 0, 7),
378 INIT_REGMAP_IRQ(AXP22X, ACIN_PLUGIN, 0, 6),
379 INIT_REGMAP_IRQ(AXP22X, ACIN_REMOVAL, 0, 5),
380 INIT_REGMAP_IRQ(AXP22X, VBUS_OVER_V, 0, 4),
381 INIT_REGMAP_IRQ(AXP22X, VBUS_PLUGIN, 0, 3),
382 INIT_REGMAP_IRQ(AXP22X, VBUS_REMOVAL, 0, 2),
383 INIT_REGMAP_IRQ(AXP22X, VBUS_V_LOW, 0, 1),
384 INIT_REGMAP_IRQ(AXP22X, BATT_PLUGIN, 1, 7),
385 INIT_REGMAP_IRQ(AXP22X, BATT_REMOVAL, 1, 6),
386 INIT_REGMAP_IRQ(AXP22X, BATT_ENT_ACT_MODE, 1, 5),
387 INIT_REGMAP_IRQ(AXP22X, BATT_EXIT_ACT_MODE, 1, 4),
388 INIT_REGMAP_IRQ(AXP22X, CHARG, 1, 3),
389 INIT_REGMAP_IRQ(AXP22X, CHARG_DONE, 1, 2),
390 INIT_REGMAP_IRQ(AXP22X, BATT_TEMP_HIGH, 1, 1),
391 INIT_REGMAP_IRQ(AXP22X, BATT_TEMP_LOW, 1, 0),
392 INIT_REGMAP_IRQ(AXP22X, DIE_TEMP_HIGH, 2, 7),
393 INIT_REGMAP_IRQ(AXP22X, PEK_SHORT, 2, 1),
394 INIT_REGMAP_IRQ(AXP22X, PEK_LONG, 2, 0),
395 INIT_REGMAP_IRQ(AXP22X, LOW_PWR_LVL1, 3, 1),
396 INIT_REGMAP_IRQ(AXP22X, LOW_PWR_LVL2, 3, 0),
397 INIT_REGMAP_IRQ(AXP22X, TIMER, 4, 7),
398 INIT_REGMAP_IRQ(AXP22X, PEK_RIS_EDGE, 4, 6),
399 INIT_REGMAP_IRQ(AXP22X, PEK_FAL_EDGE, 4, 5),
400 INIT_REGMAP_IRQ(AXP22X, GPIO1_INPUT, 4, 1),
401 INIT_REGMAP_IRQ(AXP22X, GPIO0_INPUT, 4, 0),
402};
403
Jacob Panaf7e9062014-10-06 21:17:14 -0700404/* some IRQs are compatible with axp20x models */
405static const struct regmap_irq axp288_regmap_irqs[] = {
Jacob Panff3bbc52014-11-11 11:30:09 -0800406 INIT_REGMAP_IRQ(AXP288, VBUS_FALL, 0, 2),
407 INIT_REGMAP_IRQ(AXP288, VBUS_RISE, 0, 3),
408 INIT_REGMAP_IRQ(AXP288, OV, 0, 4),
Jacob Panaf7e9062014-10-06 21:17:14 -0700409
Jacob Panff3bbc52014-11-11 11:30:09 -0800410 INIT_REGMAP_IRQ(AXP288, DONE, 1, 2),
411 INIT_REGMAP_IRQ(AXP288, CHARGING, 1, 3),
Jacob Panaf7e9062014-10-06 21:17:14 -0700412 INIT_REGMAP_IRQ(AXP288, SAFE_QUIT, 1, 4),
413 INIT_REGMAP_IRQ(AXP288, SAFE_ENTER, 1, 5),
Jacob Panff3bbc52014-11-11 11:30:09 -0800414 INIT_REGMAP_IRQ(AXP288, ABSENT, 1, 6),
415 INIT_REGMAP_IRQ(AXP288, APPEND, 1, 7),
Jacob Panaf7e9062014-10-06 21:17:14 -0700416
417 INIT_REGMAP_IRQ(AXP288, QWBTU, 2, 0),
418 INIT_REGMAP_IRQ(AXP288, WBTU, 2, 1),
419 INIT_REGMAP_IRQ(AXP288, QWBTO, 2, 2),
Jacob Panff3bbc52014-11-11 11:30:09 -0800420 INIT_REGMAP_IRQ(AXP288, WBTO, 2, 3),
Jacob Panaf7e9062014-10-06 21:17:14 -0700421 INIT_REGMAP_IRQ(AXP288, QCBTU, 2, 4),
422 INIT_REGMAP_IRQ(AXP288, CBTU, 2, 5),
423 INIT_REGMAP_IRQ(AXP288, QCBTO, 2, 6),
424 INIT_REGMAP_IRQ(AXP288, CBTO, 2, 7),
425
426 INIT_REGMAP_IRQ(AXP288, WL2, 3, 0),
427 INIT_REGMAP_IRQ(AXP288, WL1, 3, 1),
428 INIT_REGMAP_IRQ(AXP288, GPADC, 3, 2),
429 INIT_REGMAP_IRQ(AXP288, OT, 3, 7),
430
431 INIT_REGMAP_IRQ(AXP288, GPIO0, 4, 0),
432 INIT_REGMAP_IRQ(AXP288, GPIO1, 4, 1),
433 INIT_REGMAP_IRQ(AXP288, POKO, 4, 2),
434 INIT_REGMAP_IRQ(AXP288, POKL, 4, 3),
435 INIT_REGMAP_IRQ(AXP288, POKS, 4, 4),
436 INIT_REGMAP_IRQ(AXP288, POKN, 4, 5),
437 INIT_REGMAP_IRQ(AXP288, POKP, 4, 6),
Jacob Panff3bbc52014-11-11 11:30:09 -0800438 INIT_REGMAP_IRQ(AXP288, TIMER, 4, 7),
Jacob Panaf7e9062014-10-06 21:17:14 -0700439
440 INIT_REGMAP_IRQ(AXP288, MV_CHNG, 5, 0),
441 INIT_REGMAP_IRQ(AXP288, BC_USB_CHNG, 5, 1),
Carlo Caionecfb61a42014-05-01 14:29:27 +0200442};
443
Chen-Yu Tsai8824ee82016-08-27 15:55:38 +0800444static const struct regmap_irq axp806_regmap_irqs[] = {
445 INIT_REGMAP_IRQ(AXP806, DIE_TEMP_HIGH_LV1, 0, 0),
446 INIT_REGMAP_IRQ(AXP806, DIE_TEMP_HIGH_LV2, 0, 1),
447 INIT_REGMAP_IRQ(AXP806, DCDCA_V_LOW, 0, 3),
448 INIT_REGMAP_IRQ(AXP806, DCDCB_V_LOW, 0, 4),
449 INIT_REGMAP_IRQ(AXP806, DCDCC_V_LOW, 0, 5),
450 INIT_REGMAP_IRQ(AXP806, DCDCD_V_LOW, 0, 6),
451 INIT_REGMAP_IRQ(AXP806, DCDCE_V_LOW, 0, 7),
452 INIT_REGMAP_IRQ(AXP806, PWROK_LONG, 1, 0),
453 INIT_REGMAP_IRQ(AXP806, PWROK_SHORT, 1, 1),
454 INIT_REGMAP_IRQ(AXP806, WAKEUP, 1, 4),
455 INIT_REGMAP_IRQ(AXP806, PWROK_FALL, 1, 5),
456 INIT_REGMAP_IRQ(AXP806, PWROK_RISE, 1, 6),
457};
458
Chen-Yu Tsai20147f02016-03-29 17:22:26 +0800459static const struct regmap_irq axp809_regmap_irqs[] = {
460 INIT_REGMAP_IRQ(AXP809, ACIN_OVER_V, 0, 7),
461 INIT_REGMAP_IRQ(AXP809, ACIN_PLUGIN, 0, 6),
462 INIT_REGMAP_IRQ(AXP809, ACIN_REMOVAL, 0, 5),
463 INIT_REGMAP_IRQ(AXP809, VBUS_OVER_V, 0, 4),
464 INIT_REGMAP_IRQ(AXP809, VBUS_PLUGIN, 0, 3),
465 INIT_REGMAP_IRQ(AXP809, VBUS_REMOVAL, 0, 2),
466 INIT_REGMAP_IRQ(AXP809, VBUS_V_LOW, 0, 1),
467 INIT_REGMAP_IRQ(AXP809, BATT_PLUGIN, 1, 7),
468 INIT_REGMAP_IRQ(AXP809, BATT_REMOVAL, 1, 6),
469 INIT_REGMAP_IRQ(AXP809, BATT_ENT_ACT_MODE, 1, 5),
470 INIT_REGMAP_IRQ(AXP809, BATT_EXIT_ACT_MODE, 1, 4),
471 INIT_REGMAP_IRQ(AXP809, CHARG, 1, 3),
472 INIT_REGMAP_IRQ(AXP809, CHARG_DONE, 1, 2),
473 INIT_REGMAP_IRQ(AXP809, BATT_CHG_TEMP_HIGH, 2, 7),
474 INIT_REGMAP_IRQ(AXP809, BATT_CHG_TEMP_HIGH_END, 2, 6),
475 INIT_REGMAP_IRQ(AXP809, BATT_CHG_TEMP_LOW, 2, 5),
476 INIT_REGMAP_IRQ(AXP809, BATT_CHG_TEMP_LOW_END, 2, 4),
477 INIT_REGMAP_IRQ(AXP809, BATT_ACT_TEMP_HIGH, 2, 3),
478 INIT_REGMAP_IRQ(AXP809, BATT_ACT_TEMP_HIGH_END, 2, 2),
479 INIT_REGMAP_IRQ(AXP809, BATT_ACT_TEMP_LOW, 2, 1),
480 INIT_REGMAP_IRQ(AXP809, BATT_ACT_TEMP_LOW_END, 2, 0),
481 INIT_REGMAP_IRQ(AXP809, DIE_TEMP_HIGH, 3, 7),
482 INIT_REGMAP_IRQ(AXP809, LOW_PWR_LVL1, 3, 1),
483 INIT_REGMAP_IRQ(AXP809, LOW_PWR_LVL2, 3, 0),
484 INIT_REGMAP_IRQ(AXP809, TIMER, 4, 7),
485 INIT_REGMAP_IRQ(AXP809, PEK_RIS_EDGE, 4, 6),
486 INIT_REGMAP_IRQ(AXP809, PEK_FAL_EDGE, 4, 5),
487 INIT_REGMAP_IRQ(AXP809, PEK_SHORT, 4, 4),
488 INIT_REGMAP_IRQ(AXP809, PEK_LONG, 4, 3),
489 INIT_REGMAP_IRQ(AXP809, PEK_OVER_OFF, 4, 2),
490 INIT_REGMAP_IRQ(AXP809, GPIO1_INPUT, 4, 1),
491 INIT_REGMAP_IRQ(AXP809, GPIO0_INPUT, 4, 0),
492};
493
Michal Suchanekd8d79f82015-07-11 14:59:56 +0200494static const struct regmap_irq_chip axp152_regmap_irq_chip = {
495 .name = "axp152_irq_chip",
496 .status_base = AXP152_IRQ1_STATE,
497 .ack_base = AXP152_IRQ1_STATE,
498 .mask_base = AXP152_IRQ1_EN,
499 .mask_invert = true,
500 .init_ack_masked = true,
501 .irqs = axp152_regmap_irqs,
502 .num_irqs = ARRAY_SIZE(axp152_regmap_irqs),
503 .num_regs = 3,
504};
505
Carlo Caionecfb61a42014-05-01 14:29:27 +0200506static const struct regmap_irq_chip axp20x_regmap_irq_chip = {
507 .name = "axp20x_irq_chip",
508 .status_base = AXP20X_IRQ1_STATE,
509 .ack_base = AXP20X_IRQ1_STATE,
510 .mask_base = AXP20X_IRQ1_EN,
Carlo Caionecfb61a42014-05-01 14:29:27 +0200511 .mask_invert = true,
512 .init_ack_masked = true,
Jacob Panaf7e9062014-10-06 21:17:14 -0700513 .irqs = axp20x_regmap_irqs,
514 .num_irqs = ARRAY_SIZE(axp20x_regmap_irqs),
515 .num_regs = 5,
516
517};
518
Boris BREZILLONf05be582015-04-10 12:09:01 +0800519static const struct regmap_irq_chip axp22x_regmap_irq_chip = {
520 .name = "axp22x_irq_chip",
521 .status_base = AXP20X_IRQ1_STATE,
522 .ack_base = AXP20X_IRQ1_STATE,
523 .mask_base = AXP20X_IRQ1_EN,
524 .mask_invert = true,
525 .init_ack_masked = true,
526 .irqs = axp22x_regmap_irqs,
527 .num_irqs = ARRAY_SIZE(axp22x_regmap_irqs),
528 .num_regs = 5,
529};
530
Jacob Panaf7e9062014-10-06 21:17:14 -0700531static const struct regmap_irq_chip axp288_regmap_irq_chip = {
532 .name = "axp288_irq_chip",
533 .status_base = AXP20X_IRQ1_STATE,
534 .ack_base = AXP20X_IRQ1_STATE,
535 .mask_base = AXP20X_IRQ1_EN,
536 .mask_invert = true,
537 .init_ack_masked = true,
538 .irqs = axp288_regmap_irqs,
539 .num_irqs = ARRAY_SIZE(axp288_regmap_irqs),
540 .num_regs = 6,
541
Carlo Caionecfb61a42014-05-01 14:29:27 +0200542};
543
Chen-Yu Tsai8824ee82016-08-27 15:55:38 +0800544static const struct regmap_irq_chip axp806_regmap_irq_chip = {
545 .name = "axp806",
546 .status_base = AXP20X_IRQ1_STATE,
547 .ack_base = AXP20X_IRQ1_STATE,
548 .mask_base = AXP20X_IRQ1_EN,
549 .mask_invert = true,
550 .init_ack_masked = true,
551 .irqs = axp806_regmap_irqs,
552 .num_irqs = ARRAY_SIZE(axp806_regmap_irqs),
553 .num_regs = 2,
554};
555
Chen-Yu Tsai20147f02016-03-29 17:22:26 +0800556static const struct regmap_irq_chip axp809_regmap_irq_chip = {
557 .name = "axp809",
558 .status_base = AXP20X_IRQ1_STATE,
559 .ack_base = AXP20X_IRQ1_STATE,
560 .mask_base = AXP20X_IRQ1_EN,
561 .mask_invert = true,
562 .init_ack_masked = true,
563 .irqs = axp809_regmap_irqs,
564 .num_irqs = ARRAY_SIZE(axp809_regmap_irqs),
565 .num_regs = 5,
566};
567
Carlo Caionecfb61a42014-05-01 14:29:27 +0200568static struct mfd_cell axp20x_cells[] = {
569 {
Maxime Ripardb419c162016-07-20 16:11:37 +0200570 .name = "axp20x-gpio",
571 .of_compatible = "x-powers,axp209-gpio",
572 }, {
Hans de Goede8de4efd2015-08-08 17:58:41 +0200573 .name = "axp20x-pek",
574 .num_resources = ARRAY_SIZE(axp20x_pek_resources),
575 .resources = axp20x_pek_resources,
Carlo Caionecfb61a42014-05-01 14:29:27 +0200576 }, {
Hans de Goede8de4efd2015-08-08 17:58:41 +0200577 .name = "axp20x-regulator",
578 }, {
Michael Haascd7cf272016-05-06 07:19:49 +0200579 .name = "axp20x-ac-power-supply",
580 .of_compatible = "x-powers,axp202-ac-power-supply",
581 .num_resources = ARRAY_SIZE(axp20x_ac_power_supply_resources),
582 .resources = axp20x_ac_power_supply_resources,
583 }, {
Hans de Goede8de4efd2015-08-08 17:58:41 +0200584 .name = "axp20x-usb-power-supply",
585 .of_compatible = "x-powers,axp202-usb-power-supply",
586 .num_resources = ARRAY_SIZE(axp20x_usb_power_supply_resources),
587 .resources = axp20x_usb_power_supply_resources,
Carlo Caionecfb61a42014-05-01 14:29:27 +0200588 },
589};
590
Boris BREZILLONf05be582015-04-10 12:09:01 +0800591static struct mfd_cell axp22x_cells[] = {
592 {
593 .name = "axp20x-pek",
594 .num_resources = ARRAY_SIZE(axp22x_pek_resources),
595 .resources = axp22x_pek_resources,
Chen-Yu Tsai6d4fa892015-04-10 12:09:06 +0800596 }, {
597 .name = "axp20x-regulator",
Hans de Goedeecd98cc2016-06-02 19:18:55 +0200598 }, {
599 .name = "axp20x-usb-power-supply",
600 .of_compatible = "x-powers,axp221-usb-power-supply",
601 .num_resources = ARRAY_SIZE(axp22x_usb_power_supply_resources),
602 .resources = axp22x_usb_power_supply_resources,
Boris BREZILLONf05be582015-04-10 12:09:01 +0800603 },
604};
605
Michal Suchanekd8d79f82015-07-11 14:59:56 +0200606static struct mfd_cell axp152_cells[] = {
607 {
608 .name = "axp20x-pek",
609 .num_resources = ARRAY_SIZE(axp152_pek_resources),
610 .resources = axp152_pek_resources,
611 },
612};
613
Jacob Panaf7e9062014-10-06 21:17:14 -0700614static struct resource axp288_adc_resources[] = {
615 {
616 .name = "GPADC",
617 .start = AXP288_IRQ_GPADC,
618 .end = AXP288_IRQ_GPADC,
619 .flags = IORESOURCE_IRQ,
620 },
621};
622
Ramakrishna Pallalabdb01f72015-04-03 00:49:47 +0530623static struct resource axp288_extcon_resources[] = {
624 {
625 .start = AXP288_IRQ_VBUS_FALL,
626 .end = AXP288_IRQ_VBUS_FALL,
627 .flags = IORESOURCE_IRQ,
628 },
629 {
630 .start = AXP288_IRQ_VBUS_RISE,
631 .end = AXP288_IRQ_VBUS_RISE,
632 .flags = IORESOURCE_IRQ,
633 },
634 {
635 .start = AXP288_IRQ_MV_CHNG,
636 .end = AXP288_IRQ_MV_CHNG,
637 .flags = IORESOURCE_IRQ,
638 },
639 {
640 .start = AXP288_IRQ_BC_USB_CHNG,
641 .end = AXP288_IRQ_BC_USB_CHNG,
642 .flags = IORESOURCE_IRQ,
643 },
644};
645
Jacob Panaf7e9062014-10-06 21:17:14 -0700646static struct resource axp288_charger_resources[] = {
647 {
648 .start = AXP288_IRQ_OV,
649 .end = AXP288_IRQ_OV,
650 .flags = IORESOURCE_IRQ,
651 },
652 {
653 .start = AXP288_IRQ_DONE,
654 .end = AXP288_IRQ_DONE,
655 .flags = IORESOURCE_IRQ,
656 },
657 {
658 .start = AXP288_IRQ_CHARGING,
659 .end = AXP288_IRQ_CHARGING,
660 .flags = IORESOURCE_IRQ,
661 },
662 {
663 .start = AXP288_IRQ_SAFE_QUIT,
664 .end = AXP288_IRQ_SAFE_QUIT,
665 .flags = IORESOURCE_IRQ,
666 },
667 {
668 .start = AXP288_IRQ_SAFE_ENTER,
669 .end = AXP288_IRQ_SAFE_ENTER,
670 .flags = IORESOURCE_IRQ,
671 },
672 {
673 .start = AXP288_IRQ_QCBTU,
674 .end = AXP288_IRQ_QCBTU,
675 .flags = IORESOURCE_IRQ,
676 },
677 {
678 .start = AXP288_IRQ_CBTU,
679 .end = AXP288_IRQ_CBTU,
680 .flags = IORESOURCE_IRQ,
681 },
682 {
683 .start = AXP288_IRQ_QCBTO,
684 .end = AXP288_IRQ_QCBTO,
685 .flags = IORESOURCE_IRQ,
686 },
687 {
688 .start = AXP288_IRQ_CBTO,
689 .end = AXP288_IRQ_CBTO,
690 .flags = IORESOURCE_IRQ,
691 },
692};
693
694static struct mfd_cell axp288_cells[] = {
695 {
696 .name = "axp288_adc",
697 .num_resources = ARRAY_SIZE(axp288_adc_resources),
698 .resources = axp288_adc_resources,
699 },
700 {
Ramakrishna Pallalabdb01f72015-04-03 00:49:47 +0530701 .name = "axp288_extcon",
702 .num_resources = ARRAY_SIZE(axp288_extcon_resources),
703 .resources = axp288_extcon_resources,
704 },
705 {
Jacob Panaf7e9062014-10-06 21:17:14 -0700706 .name = "axp288_charger",
707 .num_resources = ARRAY_SIZE(axp288_charger_resources),
708 .resources = axp288_charger_resources,
709 },
710 {
Todd Brandtd63878742015-02-02 15:41:41 -0800711 .name = "axp288_fuel_gauge",
712 .num_resources = ARRAY_SIZE(axp288_fuel_gauge_resources),
713 .resources = axp288_fuel_gauge_resources,
Jacob Panaf7e9062014-10-06 21:17:14 -0700714 },
Aaron Lud8139f62014-11-24 17:24:47 +0800715 {
Borun Fue56e5ad2015-10-14 16:16:26 +0800716 .name = "axp20x-pek",
717 .num_resources = ARRAY_SIZE(axp288_power_button_resources),
718 .resources = axp288_power_button_resources,
719 },
720 {
Aaron Lud8139f62014-11-24 17:24:47 +0800721 .name = "axp288_pmic_acpi",
722 },
Jacob Panaf7e9062014-10-06 21:17:14 -0700723};
724
Chen-Yu Tsai8824ee82016-08-27 15:55:38 +0800725static struct mfd_cell axp806_cells[] = {
726 {
727 .id = 2,
728 .name = "axp20x-regulator",
729 },
730};
731
Chen-Yu Tsai20147f02016-03-29 17:22:26 +0800732static struct mfd_cell axp809_cells[] = {
733 {
734 .name = "axp20x-pek",
735 .num_resources = ARRAY_SIZE(axp809_pek_resources),
736 .resources = axp809_pek_resources,
737 }, {
Chen-Yu Tsai8824ee82016-08-27 15:55:38 +0800738 .id = 1,
Chen-Yu Tsai20147f02016-03-29 17:22:26 +0800739 .name = "axp20x-regulator",
740 },
741};
742
Carlo Caionecfb61a42014-05-01 14:29:27 +0200743static struct axp20x_dev *axp20x_pm_power_off;
744static void axp20x_power_off(void)
745{
Jacob Panaf7e9062014-10-06 21:17:14 -0700746 if (axp20x_pm_power_off->variant == AXP288_ID)
747 return;
748
Carlo Caionecfb61a42014-05-01 14:29:27 +0200749 regmap_write(axp20x_pm_power_off->regmap, AXP20X_OFF_CTRL,
750 AXP20X_OFF);
Hans de Goede179dc632016-06-05 15:50:48 +0200751
752 /* Give capacitors etc. time to drain to avoid kernel panic msg. */
753 msleep(500);
Carlo Caionecfb61a42014-05-01 14:29:27 +0200754}
755
Chen-Yu Tsai4fd41152016-02-12 10:02:42 +0800756int axp20x_match_device(struct axp20x_dev *axp20x)
Jacob Panaf7e9062014-10-06 21:17:14 -0700757{
Chen-Yu Tsaie47a3cf2016-02-12 10:02:39 +0800758 struct device *dev = axp20x->dev;
Jacob Panaf7e9062014-10-06 21:17:14 -0700759 const struct acpi_device_id *acpi_id;
760 const struct of_device_id *of_id;
761
762 if (dev->of_node) {
Chen-Yu Tsaiaf7acc32016-02-12 10:02:40 +0800763 of_id = of_match_device(dev->driver->of_match_table, dev);
Jacob Panaf7e9062014-10-06 21:17:14 -0700764 if (!of_id) {
765 dev_err(dev, "Unable to match OF ID\n");
766 return -ENODEV;
767 }
Chen-Yu Tsai2260a452016-02-12 10:02:43 +0800768 axp20x->variant = (long)of_id->data;
Jacob Panaf7e9062014-10-06 21:17:14 -0700769 } else {
770 acpi_id = acpi_match_device(dev->driver->acpi_match_table, dev);
771 if (!acpi_id || !acpi_id->driver_data) {
772 dev_err(dev, "Unable to match ACPI ID and data\n");
773 return -ENODEV;
774 }
Chen-Yu Tsai2260a452016-02-12 10:02:43 +0800775 axp20x->variant = (long)acpi_id->driver_data;
Jacob Panaf7e9062014-10-06 21:17:14 -0700776 }
777
778 switch (axp20x->variant) {
Michal Suchanekd8d79f82015-07-11 14:59:56 +0200779 case AXP152_ID:
780 axp20x->nr_cells = ARRAY_SIZE(axp152_cells);
781 axp20x->cells = axp152_cells;
782 axp20x->regmap_cfg = &axp152_regmap_config;
783 axp20x->regmap_irq_chip = &axp152_regmap_irq_chip;
784 break;
Jacob Panaf7e9062014-10-06 21:17:14 -0700785 case AXP202_ID:
786 case AXP209_ID:
787 axp20x->nr_cells = ARRAY_SIZE(axp20x_cells);
788 axp20x->cells = axp20x_cells;
789 axp20x->regmap_cfg = &axp20x_regmap_config;
790 axp20x->regmap_irq_chip = &axp20x_regmap_irq_chip;
791 break;
Boris BREZILLONf05be582015-04-10 12:09:01 +0800792 case AXP221_ID:
Chen-Yu Tsai02071f02016-02-12 10:02:44 +0800793 case AXP223_ID:
Boris BREZILLONf05be582015-04-10 12:09:01 +0800794 axp20x->nr_cells = ARRAY_SIZE(axp22x_cells);
795 axp20x->cells = axp22x_cells;
796 axp20x->regmap_cfg = &axp22x_regmap_config;
797 axp20x->regmap_irq_chip = &axp22x_regmap_irq_chip;
798 break;
Jacob Panaf7e9062014-10-06 21:17:14 -0700799 case AXP288_ID:
800 axp20x->cells = axp288_cells;
801 axp20x->nr_cells = ARRAY_SIZE(axp288_cells);
802 axp20x->regmap_cfg = &axp288_regmap_config;
803 axp20x->regmap_irq_chip = &axp288_regmap_irq_chip;
804 break;
Chen-Yu Tsai8824ee82016-08-27 15:55:38 +0800805 case AXP806_ID:
806 axp20x->nr_cells = ARRAY_SIZE(axp806_cells);
807 axp20x->cells = axp806_cells;
808 axp20x->regmap_cfg = &axp806_regmap_config;
809 axp20x->regmap_irq_chip = &axp806_regmap_irq_chip;
810 break;
Chen-Yu Tsai20147f02016-03-29 17:22:26 +0800811 case AXP809_ID:
812 axp20x->nr_cells = ARRAY_SIZE(axp809_cells);
813 axp20x->cells = axp809_cells;
814 axp20x->regmap_cfg = &axp22x_regmap_config;
815 axp20x->regmap_irq_chip = &axp809_regmap_irq_chip;
816 break;
Jacob Panaf7e9062014-10-06 21:17:14 -0700817 default:
818 dev_err(dev, "unsupported AXP20X ID %lu\n", axp20x->variant);
819 return -EINVAL;
820 }
821 dev_info(dev, "AXP20x variant %s found\n",
Chen-Yu Tsai2260a452016-02-12 10:02:43 +0800822 axp20x_model_names[axp20x->variant]);
Jacob Panaf7e9062014-10-06 21:17:14 -0700823
824 return 0;
825}
Chen-Yu Tsai4fd41152016-02-12 10:02:42 +0800826EXPORT_SYMBOL(axp20x_match_device);
Jacob Panaf7e9062014-10-06 21:17:14 -0700827
Chen-Yu Tsai4fd41152016-02-12 10:02:42 +0800828int axp20x_device_probe(struct axp20x_dev *axp20x)
Carlo Caionecfb61a42014-05-01 14:29:27 +0200829{
Carlo Caionecfb61a42014-05-01 14:29:27 +0200830 int ret;
831
Chen-Yu Tsai4fd41152016-02-12 10:02:42 +0800832 ret = regmap_add_irq_chip(axp20x->regmap, axp20x->irq,
Carlo Caionecfb61a42014-05-01 14:29:27 +0200833 IRQF_ONESHOT | IRQF_SHARED, -1,
Jacob Panaf7e9062014-10-06 21:17:14 -0700834 axp20x->regmap_irq_chip,
Carlo Caionecfb61a42014-05-01 14:29:27 +0200835 &axp20x->regmap_irqc);
836 if (ret) {
Chen-Yu Tsai4fd41152016-02-12 10:02:42 +0800837 dev_err(axp20x->dev, "failed to add irq chip: %d\n", ret);
Carlo Caionecfb61a42014-05-01 14:29:27 +0200838 return ret;
839 }
840
Jacob Panaf7e9062014-10-06 21:17:14 -0700841 ret = mfd_add_devices(axp20x->dev, -1, axp20x->cells,
Chen-Yu Tsai2260a452016-02-12 10:02:43 +0800842 axp20x->nr_cells, NULL, 0, NULL);
Carlo Caionecfb61a42014-05-01 14:29:27 +0200843
844 if (ret) {
Chen-Yu Tsai4fd41152016-02-12 10:02:42 +0800845 dev_err(axp20x->dev, "failed to add MFD devices: %d\n", ret);
846 regmap_del_irq_chip(axp20x->irq, axp20x->regmap_irqc);
Carlo Caionecfb61a42014-05-01 14:29:27 +0200847 return ret;
848 }
849
850 if (!pm_power_off) {
851 axp20x_pm_power_off = axp20x;
852 pm_power_off = axp20x_power_off;
853 }
854
Chen-Yu Tsai4fd41152016-02-12 10:02:42 +0800855 dev_info(axp20x->dev, "AXP20X driver loaded\n");
Carlo Caionecfb61a42014-05-01 14:29:27 +0200856
857 return 0;
858}
Chen-Yu Tsai4fd41152016-02-12 10:02:42 +0800859EXPORT_SYMBOL(axp20x_device_probe);
Carlo Caionecfb61a42014-05-01 14:29:27 +0200860
Chen-Yu Tsai4fd41152016-02-12 10:02:42 +0800861int axp20x_device_remove(struct axp20x_dev *axp20x)
Carlo Caionecfb61a42014-05-01 14:29:27 +0200862{
Carlo Caionecfb61a42014-05-01 14:29:27 +0200863 if (axp20x == axp20x_pm_power_off) {
864 axp20x_pm_power_off = NULL;
865 pm_power_off = NULL;
866 }
867
868 mfd_remove_devices(axp20x->dev);
Chen-Yu Tsai4fd41152016-02-12 10:02:42 +0800869 regmap_del_irq_chip(axp20x->irq, axp20x->regmap_irqc);
Carlo Caionecfb61a42014-05-01 14:29:27 +0200870
871 return 0;
872}
Chen-Yu Tsai4fd41152016-02-12 10:02:42 +0800873EXPORT_SYMBOL(axp20x_device_remove);
Carlo Caionecfb61a42014-05-01 14:29:27 +0200874
875MODULE_DESCRIPTION("PMIC MFD core driver for AXP20X");
876MODULE_AUTHOR("Carlo Caione <carlo@caione.org>");
877MODULE_LICENSE("GPL");