blob: 271855a6e224758800f1146f02dd992786dab801 [file] [log] [blame]
Thomas Petazzonif3b42b72012-09-13 17:41:48 +02001/*
2 * Device Tree Include file for Marvell Armada XP family SoC
3 *
4 * Copyright (C) 2012 Marvell
5 *
6 * Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
7 *
8 * This file is licensed under the terms of the GNU General Public
9 * License version 2. This program is licensed "as is" without any
10 * warranty of any kind, whether express or implied.
11 *
12 * Contains definitions specific to the Armada XP MV78230 SoC that are not
13 * common to all Armada XP SoCs.
14 */
15
16/include/ "armada-xp.dtsi"
17
18/ {
19 model = "Marvell Armada XP MV78230 SoC";
20 compatible = "marvell,armadaxp-mv78230", "marvell,armadaxp", "marvell,armada-370-xp";
21
Thomas Petazzoni397d59f2012-09-19 22:53:01 +020022 aliases {
23 gpio0 = &gpio0;
24 gpio1 = &gpio1;
25 };
26
Gregory CLEMENT9d202782012-11-17 15:22:24 +010027 cpus {
28 #address-cells = <1>;
29 #size-cells = <0>;
30
31 cpu@0 {
32 device_type = "cpu";
33 compatible = "marvell,sheeva-v7";
34 reg = <0>;
35 clocks = <&cpuclk 0>;
36 };
Thomas Petazzoni44cfae92013-01-06 11:10:40 +010037
38 cpu@1 {
39 device_type = "cpu";
40 compatible = "marvell,sheeva-v7";
41 reg = <1>;
42 clocks = <&cpuclk 1>;
43 };
Andrew Lunn41be8dc2013-01-06 11:10:42 +010044 };
Gregory CLEMENT9d202782012-11-17 15:22:24 +010045
Thomas Petazzonif3b42b72012-09-13 17:41:48 +020046 soc {
47 pinctrl {
48 compatible = "marvell,mv78230-pinctrl";
49 reg = <0xd0018000 0x38>;
50 };
Thomas Petazzoni397d59f2012-09-19 22:53:01 +020051
52 gpio0: gpio@d0018100 {
53 compatible = "marvell,armadaxp-gpio";
54 reg = <0xd0018100 0x40>,
55 <0xd0018800 0x30>;
56 ngpios = <32>;
57 gpio-controller;
58 #gpio-cells = <2>;
59 interrupt-controller;
60 #interrupts-cells = <2>;
61 interrupts = <16>, <17>, <18>, <19>;
62 };
63
64 gpio1: gpio@d0018140 {
65 compatible = "marvell,armadaxp-gpio";
66 reg = <0xd0018140 0x40>,
67 <0xd0018840 0x30>;
68 ngpios = <17>;
69 gpio-controller;
70 #gpio-cells = <2>;
71 interrupt-controller;
72 #interrupts-cells = <2>;
73 interrupts = <20>, <21>, <22>;
74 };
Thomas Petazzonif3b42b72012-09-13 17:41:48 +020075 };
76};