Peter Korsgaard | 1e16dfc | 2008-09-23 17:35:38 +0200 | [diff] [blame] | 1 | /* |
Liu Gang | 42178e2 | 2016-02-03 19:27:34 +0800 | [diff] [blame^] | 2 | * GPIOs on MPC512x/8349/8572/8610/QorIQ and compatible |
Peter Korsgaard | 1e16dfc | 2008-09-23 17:35:38 +0200 | [diff] [blame] | 3 | * |
| 4 | * Copyright (C) 2008 Peter Korsgaard <jacmet@sunsite.dk> |
Liu Gang | 42178e2 | 2016-02-03 19:27:34 +0800 | [diff] [blame^] | 5 | * Copyright (C) 2016 Freescale Semiconductor Inc. |
Peter Korsgaard | 1e16dfc | 2008-09-23 17:35:38 +0200 | [diff] [blame] | 6 | * |
| 7 | * This file is licensed under the terms of the GNU General Public License |
| 8 | * version 2. This program is licensed "as is" without any warranty of any |
| 9 | * kind, whether express or implied. |
| 10 | */ |
| 11 | |
| 12 | #include <linux/kernel.h> |
| 13 | #include <linux/init.h> |
| 14 | #include <linux/spinlock.h> |
| 15 | #include <linux/io.h> |
| 16 | #include <linux/of.h> |
| 17 | #include <linux/of_gpio.h> |
Liu Gang | 42178e2 | 2016-02-03 19:27:34 +0800 | [diff] [blame^] | 18 | #include <linux/of_address.h> |
Rob Herring | 5af5073 | 2013-09-17 14:28:33 -0500 | [diff] [blame] | 19 | #include <linux/of_irq.h> |
Ricardo Ribalda Delgado | 98686d9a5 | 2015-01-18 12:39:32 +0100 | [diff] [blame] | 20 | #include <linux/of_platform.h> |
Tejun Heo | 5a0e3ad | 2010-03-24 17:04:11 +0900 | [diff] [blame] | 21 | #include <linux/slab.h> |
Peter Korsgaard | 345e5c8 | 2010-01-07 17:57:46 +0100 | [diff] [blame] | 22 | #include <linux/irq.h> |
Liu Gang | 42178e2 | 2016-02-03 19:27:34 +0800 | [diff] [blame^] | 23 | #include <linux/gpio/driver.h> |
Peter Korsgaard | 1e16dfc | 2008-09-23 17:35:38 +0200 | [diff] [blame] | 24 | |
| 25 | #define MPC8XXX_GPIO_PINS 32 |
| 26 | |
| 27 | #define GPIO_DIR 0x00 |
| 28 | #define GPIO_ODR 0x04 |
| 29 | #define GPIO_DAT 0x08 |
| 30 | #define GPIO_IER 0x0c |
| 31 | #define GPIO_IMR 0x10 |
| 32 | #define GPIO_ICR 0x14 |
Anatolij Gustschin | e39d5ef | 2010-08-09 07:58:48 +0200 | [diff] [blame] | 33 | #define GPIO_ICR2 0x18 |
Peter Korsgaard | 1e16dfc | 2008-09-23 17:35:38 +0200 | [diff] [blame] | 34 | |
| 35 | struct mpc8xxx_gpio_chip { |
Liu Gang | 42178e2 | 2016-02-03 19:27:34 +0800 | [diff] [blame^] | 36 | struct gpio_chip gc; |
| 37 | void __iomem *regs; |
Alexander Stein | 5059361 | 2015-07-21 15:54:30 +0200 | [diff] [blame] | 38 | raw_spinlock_t lock; |
Peter Korsgaard | 1e16dfc | 2008-09-23 17:35:38 +0200 | [diff] [blame] | 39 | |
Liu Gang | 42178e2 | 2016-02-03 19:27:34 +0800 | [diff] [blame^] | 40 | unsigned long (*read_reg)(void __iomem *reg); |
| 41 | void (*write_reg)(void __iomem *reg, unsigned long data); |
| 42 | |
| 43 | int (*direction_output)(struct gpio_chip *chip, |
| 44 | unsigned offset, int value); |
| 45 | |
Grant Likely | bae1d8f | 2012-02-14 14:06:50 -0700 | [diff] [blame] | 46 | struct irq_domain *irq; |
Ricardo Ribalda Delgado | 257e107 | 2015-01-18 12:39:33 +0100 | [diff] [blame] | 47 | unsigned int irqn; |
Peter Korsgaard | 1e16dfc | 2008-09-23 17:35:38 +0200 | [diff] [blame] | 48 | }; |
| 49 | |
Felix Radensky | c1a676d | 2009-08-12 08:57:39 +0300 | [diff] [blame] | 50 | /* Workaround GPIO 1 errata on MPC8572/MPC8536. The status of GPIOs |
| 51 | * defined as output cannot be determined by reading GPDAT register, |
| 52 | * so we use shadow data register instead. The status of input pins |
| 53 | * is determined by reading GPDAT register. |
| 54 | */ |
| 55 | static int mpc8572_gpio_get(struct gpio_chip *gc, unsigned int gpio) |
| 56 | { |
| 57 | u32 val; |
Linus Walleij | 709d71a | 2015-12-07 10:34:28 +0100 | [diff] [blame] | 58 | struct mpc8xxx_gpio_chip *mpc8xxx_gc = gpiochip_get_data(gc); |
Liu Gang | 1aeef30 | 2013-11-22 16:12:40 +0800 | [diff] [blame] | 59 | u32 out_mask, out_shadow; |
Felix Radensky | c1a676d | 2009-08-12 08:57:39 +0300 | [diff] [blame] | 60 | |
Liu Gang | 42178e2 | 2016-02-03 19:27:34 +0800 | [diff] [blame^] | 61 | out_mask = mpc8xxx_gc->read_reg(mpc8xxx_gc->regs + GPIO_DIR); |
| 62 | val = mpc8xxx_gc->read_reg(mpc8xxx_gc->regs + GPIO_DAT) & ~out_mask; |
| 63 | out_shadow = gc->bgpio_data & out_mask; |
Felix Radensky | c1a676d | 2009-08-12 08:57:39 +0300 | [diff] [blame] | 64 | |
Liu Gang | 42178e2 | 2016-02-03 19:27:34 +0800 | [diff] [blame^] | 65 | return !!((val | out_shadow) & gc->pin2mask(gc, gpio)); |
Felix Radensky | c1a676d | 2009-08-12 08:57:39 +0300 | [diff] [blame] | 66 | } |
| 67 | |
Liu Gang | 42178e2 | 2016-02-03 19:27:34 +0800 | [diff] [blame^] | 68 | static int mpc5121_gpio_dir_out(struct gpio_chip *gc, |
| 69 | unsigned int gpio, int val) |
Peter Korsgaard | 1e16dfc | 2008-09-23 17:35:38 +0200 | [diff] [blame] | 70 | { |
Linus Walleij | 709d71a | 2015-12-07 10:34:28 +0100 | [diff] [blame] | 71 | struct mpc8xxx_gpio_chip *mpc8xxx_gc = gpiochip_get_data(gc); |
Wolfram Sang | 28538df | 2011-12-13 10:12:48 +0100 | [diff] [blame] | 72 | /* GPIO 28..31 are input only on MPC5121 */ |
| 73 | if (gpio >= 28) |
| 74 | return -EINVAL; |
| 75 | |
Liu Gang | 42178e2 | 2016-02-03 19:27:34 +0800 | [diff] [blame^] | 76 | return mpc8xxx_gc->direction_output(gc, gpio, val); |
Wolfram Sang | 28538df | 2011-12-13 10:12:48 +0100 | [diff] [blame] | 77 | } |
| 78 | |
Liu Gang | 42178e2 | 2016-02-03 19:27:34 +0800 | [diff] [blame^] | 79 | static int mpc5125_gpio_dir_out(struct gpio_chip *gc, |
| 80 | unsigned int gpio, int val) |
Uwe Kleine-König | 0ba69e0 | 2015-07-16 21:08:23 +0200 | [diff] [blame] | 81 | { |
Liu Gang | 42178e2 | 2016-02-03 19:27:34 +0800 | [diff] [blame^] | 82 | struct mpc8xxx_gpio_chip *mpc8xxx_gc = gpiochip_get_data(gc); |
Uwe Kleine-König | 0ba69e0 | 2015-07-16 21:08:23 +0200 | [diff] [blame] | 83 | /* GPIO 0..3 are input only on MPC5125 */ |
| 84 | if (gpio <= 3) |
| 85 | return -EINVAL; |
| 86 | |
Liu Gang | 42178e2 | 2016-02-03 19:27:34 +0800 | [diff] [blame^] | 87 | return mpc8xxx_gc->direction_output(gc, gpio, val); |
Uwe Kleine-König | 0ba69e0 | 2015-07-16 21:08:23 +0200 | [diff] [blame] | 88 | } |
| 89 | |
Peter Korsgaard | 345e5c8 | 2010-01-07 17:57:46 +0100 | [diff] [blame] | 90 | static int mpc8xxx_gpio_to_irq(struct gpio_chip *gc, unsigned offset) |
| 91 | { |
Linus Walleij | 709d71a | 2015-12-07 10:34:28 +0100 | [diff] [blame] | 92 | struct mpc8xxx_gpio_chip *mpc8xxx_gc = gpiochip_get_data(gc); |
Peter Korsgaard | 345e5c8 | 2010-01-07 17:57:46 +0100 | [diff] [blame] | 93 | |
| 94 | if (mpc8xxx_gc->irq && offset < MPC8XXX_GPIO_PINS) |
| 95 | return irq_create_mapping(mpc8xxx_gc->irq, offset); |
| 96 | else |
| 97 | return -ENXIO; |
| 98 | } |
| 99 | |
Thomas Gleixner | bd0b9ac | 2015-09-14 10:42:37 +0200 | [diff] [blame] | 100 | static void mpc8xxx_gpio_irq_cascade(struct irq_desc *desc) |
Peter Korsgaard | 345e5c8 | 2010-01-07 17:57:46 +0100 | [diff] [blame] | 101 | { |
Thomas Gleixner | ec775d0 | 2011-03-25 16:45:20 +0100 | [diff] [blame] | 102 | struct mpc8xxx_gpio_chip *mpc8xxx_gc = irq_desc_get_handler_data(desc); |
Felix Radensky | cfadd83 | 2011-10-11 10:24:21 +0200 | [diff] [blame] | 103 | struct irq_chip *chip = irq_desc_get_chip(desc); |
Peter Korsgaard | 345e5c8 | 2010-01-07 17:57:46 +0100 | [diff] [blame] | 104 | unsigned int mask; |
| 105 | |
Liu Gang | 42178e2 | 2016-02-03 19:27:34 +0800 | [diff] [blame^] | 106 | mask = mpc8xxx_gc->read_reg(mpc8xxx_gc->regs + GPIO_IER) |
| 107 | & mpc8xxx_gc->read_reg(mpc8xxx_gc->regs + GPIO_IMR); |
Peter Korsgaard | 345e5c8 | 2010-01-07 17:57:46 +0100 | [diff] [blame] | 108 | if (mask) |
| 109 | generic_handle_irq(irq_linear_revmap(mpc8xxx_gc->irq, |
| 110 | 32 - ffs(mask))); |
Thomas Gleixner | d6de85e | 2012-05-03 12:22:06 +0200 | [diff] [blame] | 111 | if (chip->irq_eoi) |
| 112 | chip->irq_eoi(&desc->irq_data); |
Peter Korsgaard | 345e5c8 | 2010-01-07 17:57:46 +0100 | [diff] [blame] | 113 | } |
| 114 | |
Lennert Buytenhek | 94347cb | 2011-03-08 22:26:58 +0000 | [diff] [blame] | 115 | static void mpc8xxx_irq_unmask(struct irq_data *d) |
Peter Korsgaard | 345e5c8 | 2010-01-07 17:57:46 +0100 | [diff] [blame] | 116 | { |
Lennert Buytenhek | 94347cb | 2011-03-08 22:26:58 +0000 | [diff] [blame] | 117 | struct mpc8xxx_gpio_chip *mpc8xxx_gc = irq_data_get_irq_chip_data(d); |
Liu Gang | 42178e2 | 2016-02-03 19:27:34 +0800 | [diff] [blame^] | 118 | struct gpio_chip *gc = &mpc8xxx_gc->gc; |
Peter Korsgaard | 345e5c8 | 2010-01-07 17:57:46 +0100 | [diff] [blame] | 119 | unsigned long flags; |
| 120 | |
Alexander Stein | 5059361 | 2015-07-21 15:54:30 +0200 | [diff] [blame] | 121 | raw_spin_lock_irqsave(&mpc8xxx_gc->lock, flags); |
Peter Korsgaard | 345e5c8 | 2010-01-07 17:57:46 +0100 | [diff] [blame] | 122 | |
Liu Gang | 42178e2 | 2016-02-03 19:27:34 +0800 | [diff] [blame^] | 123 | mpc8xxx_gc->write_reg(mpc8xxx_gc->regs + GPIO_IMR, |
| 124 | mpc8xxx_gc->read_reg(mpc8xxx_gc->regs + GPIO_IMR) |
| 125 | | gc->pin2mask(gc, irqd_to_hwirq(d))); |
Peter Korsgaard | 345e5c8 | 2010-01-07 17:57:46 +0100 | [diff] [blame] | 126 | |
Alexander Stein | 5059361 | 2015-07-21 15:54:30 +0200 | [diff] [blame] | 127 | raw_spin_unlock_irqrestore(&mpc8xxx_gc->lock, flags); |
Peter Korsgaard | 345e5c8 | 2010-01-07 17:57:46 +0100 | [diff] [blame] | 128 | } |
| 129 | |
Lennert Buytenhek | 94347cb | 2011-03-08 22:26:58 +0000 | [diff] [blame] | 130 | static void mpc8xxx_irq_mask(struct irq_data *d) |
Peter Korsgaard | 345e5c8 | 2010-01-07 17:57:46 +0100 | [diff] [blame] | 131 | { |
Lennert Buytenhek | 94347cb | 2011-03-08 22:26:58 +0000 | [diff] [blame] | 132 | struct mpc8xxx_gpio_chip *mpc8xxx_gc = irq_data_get_irq_chip_data(d); |
Liu Gang | 42178e2 | 2016-02-03 19:27:34 +0800 | [diff] [blame^] | 133 | struct gpio_chip *gc = &mpc8xxx_gc->gc; |
Peter Korsgaard | 345e5c8 | 2010-01-07 17:57:46 +0100 | [diff] [blame] | 134 | unsigned long flags; |
| 135 | |
Alexander Stein | 5059361 | 2015-07-21 15:54:30 +0200 | [diff] [blame] | 136 | raw_spin_lock_irqsave(&mpc8xxx_gc->lock, flags); |
Peter Korsgaard | 345e5c8 | 2010-01-07 17:57:46 +0100 | [diff] [blame] | 137 | |
Liu Gang | 42178e2 | 2016-02-03 19:27:34 +0800 | [diff] [blame^] | 138 | mpc8xxx_gc->write_reg(mpc8xxx_gc->regs + GPIO_IMR, |
| 139 | mpc8xxx_gc->read_reg(mpc8xxx_gc->regs + GPIO_IMR) |
| 140 | & ~(gc->pin2mask(gc, irqd_to_hwirq(d)))); |
Peter Korsgaard | 345e5c8 | 2010-01-07 17:57:46 +0100 | [diff] [blame] | 141 | |
Alexander Stein | 5059361 | 2015-07-21 15:54:30 +0200 | [diff] [blame] | 142 | raw_spin_unlock_irqrestore(&mpc8xxx_gc->lock, flags); |
Peter Korsgaard | 345e5c8 | 2010-01-07 17:57:46 +0100 | [diff] [blame] | 143 | } |
| 144 | |
Lennert Buytenhek | 94347cb | 2011-03-08 22:26:58 +0000 | [diff] [blame] | 145 | static void mpc8xxx_irq_ack(struct irq_data *d) |
Peter Korsgaard | 345e5c8 | 2010-01-07 17:57:46 +0100 | [diff] [blame] | 146 | { |
Lennert Buytenhek | 94347cb | 2011-03-08 22:26:58 +0000 | [diff] [blame] | 147 | struct mpc8xxx_gpio_chip *mpc8xxx_gc = irq_data_get_irq_chip_data(d); |
Liu Gang | 42178e2 | 2016-02-03 19:27:34 +0800 | [diff] [blame^] | 148 | struct gpio_chip *gc = &mpc8xxx_gc->gc; |
Peter Korsgaard | 345e5c8 | 2010-01-07 17:57:46 +0100 | [diff] [blame] | 149 | |
Liu Gang | 42178e2 | 2016-02-03 19:27:34 +0800 | [diff] [blame^] | 150 | mpc8xxx_gc->write_reg(mpc8xxx_gc->regs + GPIO_IER, |
| 151 | gc->pin2mask(gc, irqd_to_hwirq(d))); |
Peter Korsgaard | 345e5c8 | 2010-01-07 17:57:46 +0100 | [diff] [blame] | 152 | } |
| 153 | |
Lennert Buytenhek | 94347cb | 2011-03-08 22:26:58 +0000 | [diff] [blame] | 154 | static int mpc8xxx_irq_set_type(struct irq_data *d, unsigned int flow_type) |
Peter Korsgaard | 345e5c8 | 2010-01-07 17:57:46 +0100 | [diff] [blame] | 155 | { |
Lennert Buytenhek | 94347cb | 2011-03-08 22:26:58 +0000 | [diff] [blame] | 156 | struct mpc8xxx_gpio_chip *mpc8xxx_gc = irq_data_get_irq_chip_data(d); |
Liu Gang | 42178e2 | 2016-02-03 19:27:34 +0800 | [diff] [blame^] | 157 | struct gpio_chip *gc = &mpc8xxx_gc->gc; |
Peter Korsgaard | 345e5c8 | 2010-01-07 17:57:46 +0100 | [diff] [blame] | 158 | unsigned long flags; |
| 159 | |
| 160 | switch (flow_type) { |
| 161 | case IRQ_TYPE_EDGE_FALLING: |
Alexander Stein | 5059361 | 2015-07-21 15:54:30 +0200 | [diff] [blame] | 162 | raw_spin_lock_irqsave(&mpc8xxx_gc->lock, flags); |
Liu Gang | 42178e2 | 2016-02-03 19:27:34 +0800 | [diff] [blame^] | 163 | mpc8xxx_gc->write_reg(mpc8xxx_gc->regs + GPIO_ICR, |
| 164 | mpc8xxx_gc->read_reg(mpc8xxx_gc->regs + GPIO_ICR) |
| 165 | | gc->pin2mask(gc, irqd_to_hwirq(d))); |
Alexander Stein | 5059361 | 2015-07-21 15:54:30 +0200 | [diff] [blame] | 166 | raw_spin_unlock_irqrestore(&mpc8xxx_gc->lock, flags); |
Peter Korsgaard | 345e5c8 | 2010-01-07 17:57:46 +0100 | [diff] [blame] | 167 | break; |
| 168 | |
| 169 | case IRQ_TYPE_EDGE_BOTH: |
Alexander Stein | 5059361 | 2015-07-21 15:54:30 +0200 | [diff] [blame] | 170 | raw_spin_lock_irqsave(&mpc8xxx_gc->lock, flags); |
Liu Gang | 42178e2 | 2016-02-03 19:27:34 +0800 | [diff] [blame^] | 171 | mpc8xxx_gc->write_reg(mpc8xxx_gc->regs + GPIO_ICR, |
| 172 | mpc8xxx_gc->read_reg(mpc8xxx_gc->regs + GPIO_ICR) |
| 173 | & ~(gc->pin2mask(gc, irqd_to_hwirq(d)))); |
Alexander Stein | 5059361 | 2015-07-21 15:54:30 +0200 | [diff] [blame] | 174 | raw_spin_unlock_irqrestore(&mpc8xxx_gc->lock, flags); |
Peter Korsgaard | 345e5c8 | 2010-01-07 17:57:46 +0100 | [diff] [blame] | 175 | break; |
| 176 | |
| 177 | default: |
| 178 | return -EINVAL; |
| 179 | } |
| 180 | |
| 181 | return 0; |
| 182 | } |
| 183 | |
Lennert Buytenhek | 94347cb | 2011-03-08 22:26:58 +0000 | [diff] [blame] | 184 | static int mpc512x_irq_set_type(struct irq_data *d, unsigned int flow_type) |
Anatolij Gustschin | e39d5ef | 2010-08-09 07:58:48 +0200 | [diff] [blame] | 185 | { |
Lennert Buytenhek | 94347cb | 2011-03-08 22:26:58 +0000 | [diff] [blame] | 186 | struct mpc8xxx_gpio_chip *mpc8xxx_gc = irq_data_get_irq_chip_data(d); |
Grant Likely | 476eb49 | 2011-05-04 15:02:15 +1000 | [diff] [blame] | 187 | unsigned long gpio = irqd_to_hwirq(d); |
Anatolij Gustschin | e39d5ef | 2010-08-09 07:58:48 +0200 | [diff] [blame] | 188 | void __iomem *reg; |
| 189 | unsigned int shift; |
| 190 | unsigned long flags; |
| 191 | |
| 192 | if (gpio < 16) { |
Liu Gang | 42178e2 | 2016-02-03 19:27:34 +0800 | [diff] [blame^] | 193 | reg = mpc8xxx_gc->regs + GPIO_ICR; |
Anatolij Gustschin | e39d5ef | 2010-08-09 07:58:48 +0200 | [diff] [blame] | 194 | shift = (15 - gpio) * 2; |
| 195 | } else { |
Liu Gang | 42178e2 | 2016-02-03 19:27:34 +0800 | [diff] [blame^] | 196 | reg = mpc8xxx_gc->regs + GPIO_ICR2; |
Anatolij Gustschin | e39d5ef | 2010-08-09 07:58:48 +0200 | [diff] [blame] | 197 | shift = (15 - (gpio % 16)) * 2; |
| 198 | } |
| 199 | |
| 200 | switch (flow_type) { |
| 201 | case IRQ_TYPE_EDGE_FALLING: |
| 202 | case IRQ_TYPE_LEVEL_LOW: |
Alexander Stein | 5059361 | 2015-07-21 15:54:30 +0200 | [diff] [blame] | 203 | raw_spin_lock_irqsave(&mpc8xxx_gc->lock, flags); |
Liu Gang | 42178e2 | 2016-02-03 19:27:34 +0800 | [diff] [blame^] | 204 | mpc8xxx_gc->write_reg(reg, |
| 205 | (mpc8xxx_gc->read_reg(reg) & ~(3 << shift)) |
| 206 | | (2 << shift)); |
Alexander Stein | 5059361 | 2015-07-21 15:54:30 +0200 | [diff] [blame] | 207 | raw_spin_unlock_irqrestore(&mpc8xxx_gc->lock, flags); |
Anatolij Gustschin | e39d5ef | 2010-08-09 07:58:48 +0200 | [diff] [blame] | 208 | break; |
| 209 | |
| 210 | case IRQ_TYPE_EDGE_RISING: |
| 211 | case IRQ_TYPE_LEVEL_HIGH: |
Alexander Stein | 5059361 | 2015-07-21 15:54:30 +0200 | [diff] [blame] | 212 | raw_spin_lock_irqsave(&mpc8xxx_gc->lock, flags); |
Liu Gang | 42178e2 | 2016-02-03 19:27:34 +0800 | [diff] [blame^] | 213 | mpc8xxx_gc->write_reg(reg, |
| 214 | (mpc8xxx_gc->read_reg(reg) & ~(3 << shift)) |
| 215 | | (1 << shift)); |
Alexander Stein | 5059361 | 2015-07-21 15:54:30 +0200 | [diff] [blame] | 216 | raw_spin_unlock_irqrestore(&mpc8xxx_gc->lock, flags); |
Anatolij Gustschin | e39d5ef | 2010-08-09 07:58:48 +0200 | [diff] [blame] | 217 | break; |
| 218 | |
| 219 | case IRQ_TYPE_EDGE_BOTH: |
Alexander Stein | 5059361 | 2015-07-21 15:54:30 +0200 | [diff] [blame] | 220 | raw_spin_lock_irqsave(&mpc8xxx_gc->lock, flags); |
Liu Gang | 42178e2 | 2016-02-03 19:27:34 +0800 | [diff] [blame^] | 221 | mpc8xxx_gc->write_reg(reg, |
| 222 | (mpc8xxx_gc->read_reg(reg) & ~(3 << shift))); |
Alexander Stein | 5059361 | 2015-07-21 15:54:30 +0200 | [diff] [blame] | 223 | raw_spin_unlock_irqrestore(&mpc8xxx_gc->lock, flags); |
Anatolij Gustschin | e39d5ef | 2010-08-09 07:58:48 +0200 | [diff] [blame] | 224 | break; |
| 225 | |
| 226 | default: |
| 227 | return -EINVAL; |
| 228 | } |
| 229 | |
| 230 | return 0; |
| 231 | } |
| 232 | |
Peter Korsgaard | 345e5c8 | 2010-01-07 17:57:46 +0100 | [diff] [blame] | 233 | static struct irq_chip mpc8xxx_irq_chip = { |
| 234 | .name = "mpc8xxx-gpio", |
Lennert Buytenhek | 94347cb | 2011-03-08 22:26:58 +0000 | [diff] [blame] | 235 | .irq_unmask = mpc8xxx_irq_unmask, |
| 236 | .irq_mask = mpc8xxx_irq_mask, |
| 237 | .irq_ack = mpc8xxx_irq_ack, |
Uwe Kleine-König | 82e39b0 | 2015-07-16 21:08:22 +0200 | [diff] [blame] | 238 | /* this might get overwritten in mpc8xxx_probe() */ |
Lennert Buytenhek | 94347cb | 2011-03-08 22:26:58 +0000 | [diff] [blame] | 239 | .irq_set_type = mpc8xxx_irq_set_type, |
Peter Korsgaard | 345e5c8 | 2010-01-07 17:57:46 +0100 | [diff] [blame] | 240 | }; |
| 241 | |
Linus Walleij | 5ba17ae | 2013-10-11 19:37:30 +0200 | [diff] [blame] | 242 | static int mpc8xxx_gpio_irq_map(struct irq_domain *h, unsigned int irq, |
| 243 | irq_hw_number_t hwirq) |
Peter Korsgaard | 345e5c8 | 2010-01-07 17:57:46 +0100 | [diff] [blame] | 244 | { |
Linus Walleij | 5ba17ae | 2013-10-11 19:37:30 +0200 | [diff] [blame] | 245 | irq_set_chip_data(irq, h->host_data); |
| 246 | irq_set_chip_and_handler(irq, &mpc8xxx_irq_chip, handle_level_irq); |
Peter Korsgaard | 345e5c8 | 2010-01-07 17:57:46 +0100 | [diff] [blame] | 247 | |
| 248 | return 0; |
| 249 | } |
| 250 | |
Krzysztof Kozlowski | 0b354dc | 2015-04-27 21:54:07 +0900 | [diff] [blame] | 251 | static const struct irq_domain_ops mpc8xxx_gpio_irq_ops = { |
Peter Korsgaard | 345e5c8 | 2010-01-07 17:57:46 +0100 | [diff] [blame] | 252 | .map = mpc8xxx_gpio_irq_map, |
Grant Likely | ff8c3ab | 2012-01-24 17:09:13 -0700 | [diff] [blame] | 253 | .xlate = irq_domain_xlate_twocell, |
Peter Korsgaard | 345e5c8 | 2010-01-07 17:57:46 +0100 | [diff] [blame] | 254 | }; |
| 255 | |
Uwe Kleine-König | 82e39b0 | 2015-07-16 21:08:22 +0200 | [diff] [blame] | 256 | struct mpc8xxx_gpio_devtype { |
| 257 | int (*gpio_dir_out)(struct gpio_chip *, unsigned int, int); |
| 258 | int (*gpio_get)(struct gpio_chip *, unsigned int); |
| 259 | int (*irq_set_type)(struct irq_data *, unsigned int); |
| 260 | }; |
| 261 | |
| 262 | static const struct mpc8xxx_gpio_devtype mpc512x_gpio_devtype = { |
| 263 | .gpio_dir_out = mpc5121_gpio_dir_out, |
| 264 | .irq_set_type = mpc512x_irq_set_type, |
| 265 | }; |
| 266 | |
Uwe Kleine-König | 0ba69e0 | 2015-07-16 21:08:23 +0200 | [diff] [blame] | 267 | static const struct mpc8xxx_gpio_devtype mpc5125_gpio_devtype = { |
| 268 | .gpio_dir_out = mpc5125_gpio_dir_out, |
| 269 | .irq_set_type = mpc512x_irq_set_type, |
| 270 | }; |
| 271 | |
Uwe Kleine-König | 82e39b0 | 2015-07-16 21:08:22 +0200 | [diff] [blame] | 272 | static const struct mpc8xxx_gpio_devtype mpc8572_gpio_devtype = { |
| 273 | .gpio_get = mpc8572_gpio_get, |
| 274 | }; |
| 275 | |
| 276 | static const struct mpc8xxx_gpio_devtype mpc8xxx_gpio_devtype_default = { |
Uwe Kleine-König | 82e39b0 | 2015-07-16 21:08:22 +0200 | [diff] [blame] | 277 | .irq_set_type = mpc8xxx_irq_set_type, |
| 278 | }; |
| 279 | |
Uwe Kleine-König | 4183afe | 2015-07-16 21:08:21 +0200 | [diff] [blame] | 280 | static const struct of_device_id mpc8xxx_gpio_ids[] = { |
Anatolij Gustschin | e39d5ef | 2010-08-09 07:58:48 +0200 | [diff] [blame] | 281 | { .compatible = "fsl,mpc8349-gpio", }, |
Uwe Kleine-König | 82e39b0 | 2015-07-16 21:08:22 +0200 | [diff] [blame] | 282 | { .compatible = "fsl,mpc8572-gpio", .data = &mpc8572_gpio_devtype, }, |
Anatolij Gustschin | e39d5ef | 2010-08-09 07:58:48 +0200 | [diff] [blame] | 283 | { .compatible = "fsl,mpc8610-gpio", }, |
Uwe Kleine-König | 82e39b0 | 2015-07-16 21:08:22 +0200 | [diff] [blame] | 284 | { .compatible = "fsl,mpc5121-gpio", .data = &mpc512x_gpio_devtype, }, |
Uwe Kleine-König | 0ba69e0 | 2015-07-16 21:08:23 +0200 | [diff] [blame] | 285 | { .compatible = "fsl,mpc5125-gpio", .data = &mpc5125_gpio_devtype, }, |
Kumar Gala | 15a5148 | 2011-10-22 16:20:42 -0500 | [diff] [blame] | 286 | { .compatible = "fsl,pq3-gpio", }, |
Anatolij Gustschin | d1dcfbb | 2011-01-08 16:51:16 +0100 | [diff] [blame] | 287 | { .compatible = "fsl,qoriq-gpio", }, |
Anatolij Gustschin | e39d5ef | 2010-08-09 07:58:48 +0200 | [diff] [blame] | 288 | {} |
| 289 | }; |
| 290 | |
Ricardo Ribalda Delgado | 98686d9a5 | 2015-01-18 12:39:32 +0100 | [diff] [blame] | 291 | static int mpc8xxx_probe(struct platform_device *pdev) |
Peter Korsgaard | 1e16dfc | 2008-09-23 17:35:38 +0200 | [diff] [blame] | 292 | { |
Ricardo Ribalda Delgado | 98686d9a5 | 2015-01-18 12:39:32 +0100 | [diff] [blame] | 293 | struct device_node *np = pdev->dev.of_node; |
Peter Korsgaard | 1e16dfc | 2008-09-23 17:35:38 +0200 | [diff] [blame] | 294 | struct mpc8xxx_gpio_chip *mpc8xxx_gc; |
Liu Gang | 42178e2 | 2016-02-03 19:27:34 +0800 | [diff] [blame^] | 295 | struct gpio_chip *gc; |
Uwe Kleine-König | 82e39b0 | 2015-07-16 21:08:22 +0200 | [diff] [blame] | 296 | const struct mpc8xxx_gpio_devtype *devtype = |
| 297 | of_device_get_match_data(&pdev->dev); |
Peter Korsgaard | 1e16dfc | 2008-09-23 17:35:38 +0200 | [diff] [blame] | 298 | int ret; |
| 299 | |
Ricardo Ribalda Delgado | 98686d9a5 | 2015-01-18 12:39:32 +0100 | [diff] [blame] | 300 | mpc8xxx_gc = devm_kzalloc(&pdev->dev, sizeof(*mpc8xxx_gc), GFP_KERNEL); |
| 301 | if (!mpc8xxx_gc) |
| 302 | return -ENOMEM; |
Peter Korsgaard | 1e16dfc | 2008-09-23 17:35:38 +0200 | [diff] [blame] | 303 | |
Ricardo Ribalda Delgado | 257e107 | 2015-01-18 12:39:33 +0100 | [diff] [blame] | 304 | platform_set_drvdata(pdev, mpc8xxx_gc); |
| 305 | |
Alexander Stein | 5059361 | 2015-07-21 15:54:30 +0200 | [diff] [blame] | 306 | raw_spin_lock_init(&mpc8xxx_gc->lock); |
Peter Korsgaard | 1e16dfc | 2008-09-23 17:35:38 +0200 | [diff] [blame] | 307 | |
Liu Gang | 42178e2 | 2016-02-03 19:27:34 +0800 | [diff] [blame^] | 308 | mpc8xxx_gc->regs = of_iomap(np, 0); |
| 309 | if (!mpc8xxx_gc->regs) |
| 310 | return -ENOMEM; |
Peter Korsgaard | 1e16dfc | 2008-09-23 17:35:38 +0200 | [diff] [blame] | 311 | |
Liu Gang | 42178e2 | 2016-02-03 19:27:34 +0800 | [diff] [blame^] | 312 | gc = &mpc8xxx_gc->gc; |
| 313 | |
| 314 | if (of_property_read_bool(np, "little-endian")) { |
| 315 | ret = bgpio_init(gc, &pdev->dev, 4, |
| 316 | mpc8xxx_gc->regs + GPIO_DAT, |
| 317 | NULL, NULL, |
| 318 | mpc8xxx_gc->regs + GPIO_DIR, NULL, |
| 319 | BGPIOF_BIG_ENDIAN); |
| 320 | if (ret) |
| 321 | goto err; |
| 322 | dev_dbg(&pdev->dev, "GPIO registers are LITTLE endian\n"); |
| 323 | } else { |
| 324 | ret = bgpio_init(gc, &pdev->dev, 4, |
| 325 | mpc8xxx_gc->regs + GPIO_DAT, |
| 326 | NULL, NULL, |
| 327 | mpc8xxx_gc->regs + GPIO_DIR, NULL, |
| 328 | BGPIOF_BIG_ENDIAN |
| 329 | | BGPIOF_BIG_ENDIAN_BYTE_ORDER); |
| 330 | if (ret) |
| 331 | goto err; |
| 332 | dev_dbg(&pdev->dev, "GPIO registers are BIG endian\n"); |
| 333 | } |
| 334 | |
| 335 | mpc8xxx_gc->read_reg = gc->read_reg; |
| 336 | mpc8xxx_gc->write_reg = gc->write_reg; |
Uwe Kleine-König | 82e39b0 | 2015-07-16 21:08:22 +0200 | [diff] [blame] | 337 | |
| 338 | if (!devtype) |
| 339 | devtype = &mpc8xxx_gpio_devtype_default; |
| 340 | |
| 341 | /* |
| 342 | * It's assumed that only a single type of gpio controller is available |
| 343 | * on the current machine, so overwriting global data is fine. |
| 344 | */ |
| 345 | mpc8xxx_irq_chip.irq_set_type = devtype->irq_set_type; |
| 346 | |
Liu Gang | 42178e2 | 2016-02-03 19:27:34 +0800 | [diff] [blame^] | 347 | gc->direction_output = devtype->gpio_dir_out ?: gc->direction_output; |
| 348 | gc->get = devtype->gpio_get ?: gc->get; |
Peter Korsgaard | 345e5c8 | 2010-01-07 17:57:46 +0100 | [diff] [blame] | 349 | gc->to_irq = mpc8xxx_gpio_to_irq; |
Peter Korsgaard | 1e16dfc | 2008-09-23 17:35:38 +0200 | [diff] [blame] | 350 | |
Liu Gang | 42178e2 | 2016-02-03 19:27:34 +0800 | [diff] [blame^] | 351 | mpc8xxx_gc->direction_output = gc->direction_output; |
| 352 | |
| 353 | ret = gpiochip_add_data(gc, mpc8xxx_gc); |
| 354 | if (ret) { |
| 355 | pr_err("%s: GPIO chip registration failed with status %d\n", |
| 356 | np->full_name, ret); |
| 357 | goto err; |
| 358 | } |
Peter Korsgaard | 1e16dfc | 2008-09-23 17:35:38 +0200 | [diff] [blame] | 359 | |
Ricardo Ribalda Delgado | 257e107 | 2015-01-18 12:39:33 +0100 | [diff] [blame] | 360 | mpc8xxx_gc->irqn = irq_of_parse_and_map(np, 0); |
Liu Gang | 42178e2 | 2016-02-03 19:27:34 +0800 | [diff] [blame^] | 361 | if (!mpc8xxx_gc->irqn) |
Ricardo Ribalda Delgado | 98686d9a5 | 2015-01-18 12:39:32 +0100 | [diff] [blame] | 362 | return 0; |
Peter Korsgaard | 345e5c8 | 2010-01-07 17:57:46 +0100 | [diff] [blame] | 363 | |
Grant Likely | a8db8cf | 2012-02-14 14:06:54 -0700 | [diff] [blame] | 364 | mpc8xxx_gc->irq = irq_domain_add_linear(np, MPC8XXX_GPIO_PINS, |
| 365 | &mpc8xxx_gpio_irq_ops, mpc8xxx_gc); |
Peter Korsgaard | 345e5c8 | 2010-01-07 17:57:46 +0100 | [diff] [blame] | 366 | if (!mpc8xxx_gc->irq) |
Ricardo Ribalda Delgado | 98686d9a5 | 2015-01-18 12:39:32 +0100 | [diff] [blame] | 367 | return 0; |
Peter Korsgaard | 345e5c8 | 2010-01-07 17:57:46 +0100 | [diff] [blame] | 368 | |
Peter Korsgaard | 345e5c8 | 2010-01-07 17:57:46 +0100 | [diff] [blame] | 369 | /* ack and mask all irqs */ |
Liu Gang | 42178e2 | 2016-02-03 19:27:34 +0800 | [diff] [blame^] | 370 | mpc8xxx_gc->write_reg(mpc8xxx_gc->regs + GPIO_IER, 0xffffffff); |
| 371 | mpc8xxx_gc->write_reg(mpc8xxx_gc->regs + GPIO_IMR, 0); |
Peter Korsgaard | 345e5c8 | 2010-01-07 17:57:46 +0100 | [diff] [blame] | 372 | |
Thomas Gleixner | 0537981 | 2015-06-21 21:10:46 +0200 | [diff] [blame] | 373 | irq_set_chained_handler_and_data(mpc8xxx_gc->irqn, |
| 374 | mpc8xxx_gpio_irq_cascade, mpc8xxx_gc); |
Ricardo Ribalda Delgado | 257e107 | 2015-01-18 12:39:33 +0100 | [diff] [blame] | 375 | return 0; |
Liu Gang | 42178e2 | 2016-02-03 19:27:34 +0800 | [diff] [blame^] | 376 | err: |
| 377 | iounmap(mpc8xxx_gc->regs); |
| 378 | return ret; |
Ricardo Ribalda Delgado | 257e107 | 2015-01-18 12:39:33 +0100 | [diff] [blame] | 379 | } |
| 380 | |
| 381 | static int mpc8xxx_remove(struct platform_device *pdev) |
| 382 | { |
| 383 | struct mpc8xxx_gpio_chip *mpc8xxx_gc = platform_get_drvdata(pdev); |
| 384 | |
| 385 | if (mpc8xxx_gc->irq) { |
Thomas Gleixner | 0537981 | 2015-06-21 21:10:46 +0200 | [diff] [blame] | 386 | irq_set_chained_handler_and_data(mpc8xxx_gc->irqn, NULL, NULL); |
Ricardo Ribalda Delgado | 257e107 | 2015-01-18 12:39:33 +0100 | [diff] [blame] | 387 | irq_domain_remove(mpc8xxx_gc->irq); |
| 388 | } |
| 389 | |
Liu Gang | 42178e2 | 2016-02-03 19:27:34 +0800 | [diff] [blame^] | 390 | gpiochip_remove(&mpc8xxx_gc->gc); |
| 391 | iounmap(mpc8xxx_gc->regs); |
Peter Korsgaard | 345e5c8 | 2010-01-07 17:57:46 +0100 | [diff] [blame] | 392 | |
Peter Korsgaard | 1e16dfc | 2008-09-23 17:35:38 +0200 | [diff] [blame] | 393 | return 0; |
| 394 | } |
Ricardo Ribalda Delgado | 98686d9a5 | 2015-01-18 12:39:32 +0100 | [diff] [blame] | 395 | |
| 396 | static struct platform_driver mpc8xxx_plat_driver = { |
| 397 | .probe = mpc8xxx_probe, |
Ricardo Ribalda Delgado | 257e107 | 2015-01-18 12:39:33 +0100 | [diff] [blame] | 398 | .remove = mpc8xxx_remove, |
Ricardo Ribalda Delgado | 98686d9a5 | 2015-01-18 12:39:32 +0100 | [diff] [blame] | 399 | .driver = { |
| 400 | .name = "gpio-mpc8xxx", |
| 401 | .of_match_table = mpc8xxx_gpio_ids, |
| 402 | }, |
| 403 | }; |
| 404 | |
| 405 | static int __init mpc8xxx_init(void) |
| 406 | { |
| 407 | return platform_driver_register(&mpc8xxx_plat_driver); |
| 408 | } |
| 409 | |
| 410 | arch_initcall(mpc8xxx_init); |