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Benjamin Herrenschmidt55190f82011-09-19 17:44:52 +00001/*
2 * SMP support for PowerNV machines.
3 *
4 * Copyright 2011 IBM Corp.
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License
8 * as published by the Free Software Foundation; either version
9 * 2 of the License, or (at your option) any later version.
10 */
11
12#include <linux/kernel.h>
13#include <linux/module.h>
14#include <linux/sched.h>
15#include <linux/smp.h>
16#include <linux/interrupt.h>
17#include <linux/delay.h>
18#include <linux/init.h>
19#include <linux/spinlock.h>
20#include <linux/cpu.h>
21
22#include <asm/irq.h>
23#include <asm/smp.h>
24#include <asm/paca.h>
25#include <asm/machdep.h>
26#include <asm/cputable.h>
27#include <asm/firmware.h>
Benjamin Herrenschmidt55190f82011-09-19 17:44:52 +000028#include <asm/vdso_datapage.h>
29#include <asm/cputhreads.h>
30#include <asm/xics.h>
Benjamin Herrenschmidt14a43e62011-09-19 17:44:57 +000031#include <asm/opal.h>
Preeti U Murthyf2038912014-04-11 16:01:48 +053032#include <asm/runlatch.h>
Anton Blanchard2751b622014-03-11 11:54:06 +110033#include <asm/code-patching.h>
Michael Neulingd4e58e52014-06-11 15:59:28 +100034#include <asm/dbell.h>
Paul Mackerras755563b2015-03-19 19:29:01 +110035#include <asm/kvm_ppc.h>
36#include <asm/ppc-opcode.h>
Benjamin Herrenschmidt55190f82011-09-19 17:44:52 +000037
38#include "powernv.h"
39
Benjamin Herrenschmidt344eb012011-09-19 17:44:54 +000040#ifdef DEBUG
41#include <asm/udbg.h>
42#define DBG(fmt...) udbg_printf(fmt)
43#else
44#define DBG(fmt...)
45#endif
46
Paul Gortmaker061d19f2013-06-24 15:30:09 -040047static void pnv_smp_setup_cpu(int cpu)
Benjamin Herrenschmidt55190f82011-09-19 17:44:52 +000048{
49 if (cpu != boot_cpuid)
50 xics_setup_cpu();
Michael Neulingd4e58e52014-06-11 15:59:28 +100051
52#ifdef CONFIG_PPC_DOORBELL
53 if (cpu_has_feature(CPU_FTR_DBELL))
54 doorbell_setup_this_cpu();
55#endif
Benjamin Herrenschmidt55190f82011-09-19 17:44:52 +000056}
57
Anton Blancharde51df2c2014-08-20 08:55:18 +100058static int pnv_smp_kick_cpu(int nr)
Benjamin Herrenschmidt14a43e62011-09-19 17:44:57 +000059{
60 unsigned int pcpu = get_hard_smp_processor_id(nr);
Anton Blanchard2751b622014-03-11 11:54:06 +110061 unsigned long start_here =
62 __pa(ppc_function_entry(generic_secondary_smp_init));
Benjamin Herrenschmidt14a43e62011-09-19 17:44:57 +000063 long rc;
Stewart Smithe4d54f72015-12-09 17:18:20 +110064 uint8_t status;
Benjamin Herrenschmidt14a43e62011-09-19 17:44:57 +000065
66 BUG_ON(nr < 0 || nr >= NR_CPUS);
67
Benjamin Herrenschmidtb2b48582013-05-14 15:12:31 +100068 /*
Stewart Smithe4d54f72015-12-09 17:18:20 +110069 * If we already started or OPAL is not supported, we just
Benjamin Herrenschmidtb2b48582013-05-14 15:12:31 +100070 * kick the CPU via the PACA
Benjamin Herrenschmidt14a43e62011-09-19 17:44:57 +000071 */
Stewart Smithe4d54f72015-12-09 17:18:20 +110072 if (paca[nr].cpu_start || !firmware_has_feature(FW_FEATURE_OPAL))
Benjamin Herrenschmidtb2b48582013-05-14 15:12:31 +100073 goto kick;
74
75 /*
76 * At this point, the CPU can either be spinning on the way in
77 * from kexec or be inside OPAL waiting to be started for the
78 * first time. OPAL v3 allows us to query OPAL to know if it
79 * has the CPUs, so we do that
80 */
Stewart Smithe4d54f72015-12-09 17:18:20 +110081 rc = opal_query_cpu_status(pcpu, &status);
82 if (rc != OPAL_SUCCESS) {
83 pr_warn("OPAL Error %ld querying CPU %d state\n", rc, nr);
84 return -ENODEV;
85 }
Benjamin Herrenschmidtb2b48582013-05-14 15:12:31 +100086
Stewart Smithe4d54f72015-12-09 17:18:20 +110087 /*
88 * Already started, just kick it, probably coming from
89 * kexec and spinning
90 */
91 if (status == OPAL_THREAD_STARTED)
92 goto kick;
93
94 /*
95 * Available/inactive, let's kick it
96 */
97 if (status == OPAL_THREAD_INACTIVE) {
98 pr_devel("OPAL: Starting CPU %d (HW 0x%x)...\n", nr, pcpu);
99 rc = opal_start_cpu(pcpu, start_here);
Benjamin Herrenschmidt4ea90082013-05-03 17:21:00 +0000100 if (rc != OPAL_SUCCESS) {
Stewart Smithe4d54f72015-12-09 17:18:20 +1100101 pr_warn("OPAL Error %ld starting CPU %d\n", rc, nr);
Benjamin Herrenschmidtb2b48582013-05-14 15:12:31 +1000102 return -ENODEV;
103 }
104 } else {
105 /*
Stewart Smithe4d54f72015-12-09 17:18:20 +1100106 * An unavailable CPU (or any other unknown status)
107 * shouldn't be started. It should also
108 * not be in the possible map but currently it can
109 * happen
Benjamin Herrenschmidtb2b48582013-05-14 15:12:31 +1000110 */
Stewart Smithe4d54f72015-12-09 17:18:20 +1100111 pr_devel("OPAL: CPU %d (HW 0x%x) is unavailable"
112 " (status %d)...\n", nr, pcpu, status);
113 return -ENODEV;
Benjamin Herrenschmidt14a43e62011-09-19 17:44:57 +0000114 }
Stewart Smithe4d54f72015-12-09 17:18:20 +1100115
116kick:
Benjamin Herrenschmidt14a43e62011-09-19 17:44:57 +0000117 return smp_generic_kick_cpu(nr);
118}
119
Benjamin Herrenschmidt344eb012011-09-19 17:44:54 +0000120#ifdef CONFIG_HOTPLUG_CPU
121
122static int pnv_smp_cpu_disable(void)
123{
124 int cpu = smp_processor_id();
125
126 /* This is identical to pSeries... might consolidate by
127 * moving migrate_irqs_away to a ppc_md with default to
128 * the generic fixup_irqs. --BenH.
129 */
130 set_cpu_online(cpu, false);
131 vdso_data->processorCount--;
132 if (cpu == boot_cpuid)
133 boot_cpuid = cpumask_any(cpu_online_mask);
134 xics_migrate_irqs_away();
135 return 0;
136}
137
138static void pnv_smp_cpu_kill_self(void)
139{
140 unsigned int cpu;
Paul Mackerras755563b2015-03-19 19:29:01 +1100141 unsigned long srr1, wmask;
Shreyas B. Prabhu8eb8ac82014-12-10 00:26:51 +0530142 u32 idle_states;
Benjamin Herrenschmidt344eb012011-09-19 17:44:54 +0000143
Benjamin Herrenschmidt344eb012011-09-19 17:44:54 +0000144 /* Standard hot unplug procedure */
145 local_irq_disable();
146 idle_task_exit();
147 current->active_mm = NULL; /* for sanity */
148 cpu = smp_processor_id();
149 DBG("CPU%d offline\n", cpu);
150 generic_set_cpu_dead(cpu);
151 smp_wmb();
152
Paul Mackerras755563b2015-03-19 19:29:01 +1100153 wmask = SRR1_WAKEMASK;
154 if (cpu_has_feature(CPU_FTR_ARCH_207S))
155 wmask = SRR1_WAKEMASK_P8;
156
Shreyas B. Prabhu8eb8ac82014-12-10 00:26:51 +0530157 idle_states = pnv_get_supported_cpuidle_states();
Benjamin Herrenschmidt9b256712017-02-07 11:35:31 +1100158
Benjamin Herrenschmidt344eb012011-09-19 17:44:54 +0000159 /* We don't want to take decrementer interrupts while we are offline,
Benjamin Herrenschmidt9b256712017-02-07 11:35:31 +1100160 * so clear LPCR:PECE1. We keep PECE2 (and LPCR_PECE_HVEE on P9)
161 * enabled as to let IPIs in.
Benjamin Herrenschmidt344eb012011-09-19 17:44:54 +0000162 */
163 mtspr(SPRN_LPCR, mfspr(SPRN_LPCR) & ~(u64)LPCR_PECE1);
Paul Mackerras53c656c2015-10-21 16:06:24 +1100164
165 /*
166 * Hard-disable interrupts, and then clear irq_happened flags
167 * that we can safely ignore while off-line, since they
168 * are for things for which we do no processing when off-line
169 * (or in the case of HMI, all the processing we need to do
170 * is done in lower-level real-mode code).
171 */
172 hard_irq_disable();
173 local_paca->irq_happened &= ~(PACA_IRQ_DEC | PACA_IRQ_HMI);
174
Benjamin Herrenschmidt344eb012011-09-19 17:44:54 +0000175 while (!generic_check_cpu_restart(cpu)) {
Paul Mackerras53c656c2015-10-21 16:06:24 +1100176 /*
177 * Clear IPI flag, since we don't handle IPIs while
178 * offline, except for those when changing micro-threading
179 * mode, which are handled explicitly below, and those
180 * for coming online, which are handled via
181 * generic_check_cpu_restart() calls.
182 */
183 kvmppc_set_host_ipi(cpu, 0);
Shreyas B. Prabhu77b54e92014-12-10 00:26:53 +0530184
Preeti U Murthyf2038912014-04-11 16:01:48 +0530185 ppc64_runlatch_off();
Shreyas B. Prabhu77b54e92014-12-10 00:26:53 +0530186
Shreyas B. Prabhuc0691f92016-07-08 11:50:53 +0530187 if (cpu_has_feature(CPU_FTR_ARCH_300))
188 srr1 = power9_idle_stop(pnv_deepest_stop_state);
189 else if (idle_states & OPAL_PM_WINKLE_ENABLED)
Shreyas B. Prabhu77b54e92014-12-10 00:26:53 +0530190 srr1 = power7_winkle();
191 else if ((idle_states & OPAL_PM_SLEEP_ENABLED) ||
Shreyas B. Prabhu7cba1602014-12-10 00:26:52 +0530192 (idle_states & OPAL_PM_SLEEP_ENABLED_ER1))
Shreyas B. Prabhu8eb8ac82014-12-10 00:26:51 +0530193 srr1 = power7_sleep();
194 else
195 srr1 = power7_nap(1);
Shreyas B. Prabhu77b54e92014-12-10 00:26:53 +0530196
Preeti U Murthyf2038912014-04-11 16:01:48 +0530197 ppc64_runlatch_on();
Michael Ellermane2186022014-05-23 18:15:30 +1000198
Paul Mackerras56548fc2014-12-03 14:48:40 +1100199 /*
200 * If the SRR1 value indicates that we woke up due to
201 * an external interrupt, then clear the interrupt.
202 * We clear the interrupt before checking for the
203 * reason, so as to avoid a race where we wake up for
204 * some other reason, find nothing and clear the interrupt
205 * just as some other cpu is sending us an interrupt.
206 * If we returned from power7_nap as a result of
207 * having finished executing in a KVM guest, then srr1
208 * contains 0.
209 */
Paul Mackerras53c656c2015-10-21 16:06:24 +1100210 if (((srr1 & wmask) == SRR1_WAKEEE) ||
Benjamin Herrenschmidt9b256712017-02-07 11:35:31 +1100211 ((srr1 & wmask) == SRR1_WAKEHVI) ||
Paul Mackerras53c656c2015-10-21 16:06:24 +1100212 (local_paca->irq_happened & PACA_IRQ_EE)) {
Benjamin Herrenschmidt9b256712017-02-07 11:35:31 +1100213 if (cpu_has_feature(CPU_FTR_ARCH_300))
214 icp_opal_flush_interrupt();
215 else
216 icp_native_flush_interrupt();
Paul Mackerras755563b2015-03-19 19:29:01 +1100217 } else if ((srr1 & wmask) == SRR1_WAKEHDBELL) {
218 unsigned long msg = PPC_DBELL_TYPE(PPC_DBELL_SERVER);
219 asm volatile(PPC_MSGCLR(%0) : : "r" (msg));
Paul Mackerras56548fc2014-12-03 14:48:40 +1100220 }
Paul Mackerras53c656c2015-10-21 16:06:24 +1100221 local_paca->irq_happened &= ~(PACA_IRQ_EE | PACA_IRQ_DBELL);
222 smp_mb();
Michael Ellermane2186022014-05-23 18:15:30 +1000223
224 if (cpu_core_split_required())
225 continue;
226
Paul Mackerras53c656c2015-10-21 16:06:24 +1100227 if (srr1 && !generic_check_cpu_restart(cpu))
Benjamin Herrenschmidt344eb012011-09-19 17:44:54 +0000228 DBG("CPU%d Unexpected exit while offline !\n", cpu);
Benjamin Herrenschmidt344eb012011-09-19 17:44:54 +0000229 }
Benjamin Herrenschmidt9b256712017-02-07 11:35:31 +1100230
231 /* Re-enable decrementer interrupts */
Benjamin Herrenschmidt344eb012011-09-19 17:44:54 +0000232 mtspr(SPRN_LPCR, mfspr(SPRN_LPCR) | LPCR_PECE1);
233 DBG("CPU%d coming online...\n", cpu);
234}
235
236#endif /* CONFIG_HOTPLUG_CPU */
237
Greg Kurzd70a54e2014-12-12 12:37:40 +0100238static int pnv_cpu_bootable(unsigned int nr)
239{
240 /*
241 * Starting with POWER8, the subcore logic relies on all threads of a
242 * core being booted so that they can participate in split mode
243 * switches. So on those machines we ignore the smt_enabled_at_boot
244 * setting (smt-enabled on the kernel command line).
245 */
246 if (cpu_has_feature(CPU_FTR_ARCH_207S))
247 return 1;
248
249 return smp_generic_cpu_bootable(nr);
250}
251
Benjamin Herrenschmidt55190f82011-09-19 17:44:52 +0000252static struct smp_ops_t pnv_smp_ops = {
253 .message_pass = smp_muxed_ipi_message_pass,
254 .cause_ipi = NULL, /* Filled at runtime by xics_smp_probe() */
255 .probe = xics_smp_probe,
Benjamin Herrenschmidt14a43e62011-09-19 17:44:57 +0000256 .kick_cpu = pnv_smp_kick_cpu,
Benjamin Herrenschmidt55190f82011-09-19 17:44:52 +0000257 .setup_cpu = pnv_smp_setup_cpu,
Greg Kurzd70a54e2014-12-12 12:37:40 +0100258 .cpu_bootable = pnv_cpu_bootable,
Benjamin Herrenschmidt344eb012011-09-19 17:44:54 +0000259#ifdef CONFIG_HOTPLUG_CPU
260 .cpu_disable = pnv_smp_cpu_disable,
261 .cpu_die = generic_cpu_die,
262#endif /* CONFIG_HOTPLUG_CPU */
Benjamin Herrenschmidt55190f82011-09-19 17:44:52 +0000263};
264
265/* This is called very early during platform setup_arch */
266void __init pnv_smp_init(void)
267{
268 smp_ops = &pnv_smp_ops;
269
Benjamin Herrenschmidt344eb012011-09-19 17:44:54 +0000270#ifdef CONFIG_HOTPLUG_CPU
271 ppc_md.cpu_die = pnv_smp_cpu_kill_self;
272#endif
Benjamin Herrenschmidt55190f82011-09-19 17:44:52 +0000273}