blob: 3637bf3b1d597c6690bd34c5f7e4b8109104043d [file] [log] [blame]
Dong Aishengbc3a59c2012-03-31 21:26:57 +08001/*
2 * Copyright 2012 Freescale Semiconductor, Inc.
3 *
4 * The code contained herein is licensed under the GNU General Public
5 * License. You may obtain a copy of the GNU General Public License
6 * Version 2 or later at the following locations:
7 *
8 * http://www.opensource.org/licenses/gpl-license.html
9 * http://www.gnu.org/copyleft/gpl.html
10 */
11
12/dts-v1/;
13/include/ "imx28.dtsi"
14
15/ {
16 model = "Freescale i.MX28 Evaluation Kit";
17 compatible = "fsl,imx28-evk", "fsl,imx28";
18
19 memory {
20 reg = <0x40000000 0x08000000>;
21 };
22
23 apb@80000000 {
Shawn Guo35d23042012-05-06 16:33:34 +080024 apbh@80000000 {
Huang Shijie7a8e5142012-05-25 17:25:35 +080025 gpmi-nand@8000c000 {
26 pinctrl-names = "default";
Shawn Guodaefb692012-07-07 20:59:09 +080027 pinctrl-0 = <&gpmi_pins_a &gpmi_status_cfg
28 &gpmi_pins_evk>;
Huang Shijie7a8e5142012-05-25 17:25:35 +080029 status = "okay";
30 };
31
Shawn Guo35d23042012-05-06 16:33:34 +080032 ssp0: ssp@80010000 {
33 compatible = "fsl,imx28-mmc";
34 pinctrl-names = "default";
35 pinctrl-0 = <&mmc0_8bit_pins_a
36 &mmc0_cd_cfg &mmc0_sck_cfg>;
37 bus-width = <8>;
38 wp-gpios = <&gpio2 12 0>;
Shawn Guo64edbcd2012-06-28 11:45:01 +080039 vmmc-supply = <&reg_vddio_sd0>;
Shawn Guo35d23042012-05-06 16:33:34 +080040 status = "okay";
41 };
42
43 ssp1: ssp@80012000 {
44 compatible = "fsl,imx28-mmc";
45 bus-width = <8>;
46 wp-gpios = <&gpio0 28 0>;
Shawn Guo35d23042012-05-06 16:33:34 +080047 };
Shawn Guod54dbb52012-06-28 11:44:58 +080048
Fabio Estevam5decb4b2012-08-27 13:23:27 -030049 ssp2: ssp@80014000 {
50 #address-cells = <1>;
51 #size-cells = <0>;
52 compatible = "fsl,imx28-spi";
53 pinctrl-names = "default";
54 pinctrl-0 = <&spi2_pins_a>;
55 status = "okay";
56
57 flash: m25p80@0 {
58 #address-cells = <1>;
59 #size-cells = <1>;
60 compatible = "sst,sst25vf016b";
61 spi-max-frequency = <40000000>;
62 reg = <0>;
63 };
64 };
65
Shawn Guod54dbb52012-06-28 11:44:58 +080066 pinctrl@80018000 {
67 pinctrl-names = "default";
68 pinctrl-0 = <&hog_pins_a>;
69
Fabio Estevame0e35b42012-08-22 13:25:31 -030070 hog_pins_a: hog@0 {
Shawn Guod54dbb52012-06-28 11:44:58 +080071 reg = <0>;
72 fsl,pinmux-ids = <
73 0x20d3 /* MX28_PAD_SSP1_CMD__GPIO_2_13 */
74 0x20f3 /* MX28_PAD_SSP1_DATA3__GPIO_2_15 */
75 0x40d3 /* MX28_PAD_ENET0_RX_CLK__GPIO_4_13 */
76 0x20c3 /* MX28_PAD_SSP1_SCK__GPIO_2_12 */
77 0x31c3 /* MX28_PAD_PWM3__GPIO_3_28 */
78 0x31e3 /* MX28_PAD_LCD_RESET__GPIO_3_30 */
Richard Zhao5da01272012-07-12 10:25:27 +080079 0x3083 /* MX28_PAD_AUART2_RX__GPIO_3_8 */
80 0x3093 /* MX28_PAD_AUART2_TX__GPIO_3_9 */
Shawn Guod54dbb52012-06-28 11:44:58 +080081 >;
82 fsl,drive-strength = <0>;
83 fsl,voltage = <1>;
84 fsl,pull-up = <0>;
85 };
Shawn Guodaefb692012-07-07 20:59:09 +080086
Fabio Estevam30d6e2d2012-09-23 16:18:38 -030087 led_pin_gpio3_5: led_gpio3_5@0 {
88 reg = <0>;
89 fsl,pinmux-ids = <
90 0x3053 /* MX28_PAD_AUART1_TX__GPIO_3_5 */
91 >;
92 fsl,drive-strength = <0>;
93 fsl,voltage = <1>;
94 fsl,pull-up = <0>;
95 };
96
Shawn Guodaefb692012-07-07 20:59:09 +080097 gpmi_pins_evk: gpmi-nand-evk@0 {
98 reg = <0>;
99 fsl,pinmux-ids = <
100 0x0110 /* MX28_PAD_GPMI_CE1N__GPMI_CE1N */
101 0x0150 /* MX28_PAD_GPMI_RDY1__GPMI_READY1 */
102 >;
103 fsl,drive-strength = <0>;
104 fsl,voltage = <1>;
105 fsl,pull-up = <0>;
106 };
Shawn Guo3dba2592012-07-07 21:09:51 +0800107
108 lcdif_pins_evk: lcdif-evk@0 {
109 reg = <0>;
110 fsl,pinmux-ids = <
111 0x1181 /* MX28_PAD_LCD_RD_E__LCD_VSYNC */
112 0x1191 /* MX28_PAD_LCD_WR_RWN__LCD_HSYNC */
113 0x11a1 /* MX28_PAD_LCD_RS__LCD_DOTCLK */
114 0x11b1 /* MX28_PAD_LCD_CS__LCD_ENABLE */
115 >;
116 fsl,drive-strength = <0>;
117 fsl,voltage = <1>;
118 fsl,pull-up = <0>;
119 };
Shawn Guod54dbb52012-06-28 11:44:58 +0800120 };
Shawn Guoa915ee42012-06-28 11:45:07 +0800121
122 lcdif@80030000 {
123 pinctrl-names = "default";
Shawn Guo3dba2592012-07-07 21:09:51 +0800124 pinctrl-0 = <&lcdif_24bit_pins_a
125 &lcdif_pins_evk>;
Fabio Estevam43444292013-04-07 15:44:59 -0300126 lcd-supply = <&reg_lcd_3v3>;
Shawn Guo0d9f8212013-03-14 11:37:15 +0800127 display = <&display>;
Shawn Guoa915ee42012-06-28 11:45:07 +0800128 status = "okay";
Shawn Guo0d9f8212013-03-14 11:37:15 +0800129
130 display: display {
131 bits-per-pixel = <32>;
132 bus-width = <24>;
133
134 display-timings {
135 native-mode = <&timing0>;
136 timing0: timing0 {
137 clock-frequency = <33500000>;
138 hactive = <800>;
139 vactive = <480>;
140 hback-porch = <89>;
141 hfront-porch = <164>;
142 vback-porch = <23>;
143 vfront-porch = <10>;
144 hsync-len = <10>;
145 vsync-len = <10>;
146 hsync-active = <0>;
147 vsync-active = <0>;
148 de-active = <1>;
149 pixelclk-active = <0>;
150 };
151 };
152 };
Shawn Guoa915ee42012-06-28 11:45:07 +0800153 };
Shawn Guo6ca44ac2012-06-28 11:45:03 +0800154
155 can0: can@80032000 {
156 pinctrl-names = "default";
157 pinctrl-0 = <&can0_pins_a>;
158 status = "okay";
159 };
160
161 can1: can@80034000 {
162 pinctrl-names = "default";
163 pinctrl-0 = <&can1_pins_a>;
164 status = "okay";
165 };
Shawn Guo35d23042012-05-06 16:33:34 +0800166 };
167
Dong Aishengbc3a59c2012-03-31 21:26:57 +0800168 apbx@80040000 {
Shawn Guo530f1d42012-05-10 15:03:16 +0800169 saif0: saif@80042000 {
170 pinctrl-names = "default";
171 pinctrl-0 = <&saif0_pins_a>;
172 status = "okay";
173 };
174
175 saif1: saif@80046000 {
176 pinctrl-names = "default";
177 pinctrl-0 = <&saif1_pins_a>;
178 fsl,saif-master = <&saif0>;
179 status = "okay";
180 };
181
Fabio Estevam8495a242012-08-27 13:23:28 -0300182 lradc@80050000 {
183 status = "okay";
184 };
185
Shawn Guo2a96e392012-05-10 15:02:10 +0800186 i2c0: i2c@80058000 {
187 pinctrl-names = "default";
188 pinctrl-0 = <&i2c0_pins_a>;
189 status = "okay";
Shawn Guo530f1d42012-05-10 15:03:16 +0800190
191 sgtl5000: codec@0a {
192 compatible = "fsl,sgtl5000";
193 reg = <0x0a>;
194 VDDA-supply = <&reg_3p3v>;
195 VDDIO-supply = <&reg_3p3v>;
196
197 };
Fabio Estevamfa876ce2012-08-27 16:39:59 -0300198
199 at24@51 {
200 compatible = "at24,24c32";
201 pagesize = <32>;
202 reg = <0x51>;
203 };
Shawn Guo2a96e392012-05-10 15:02:10 +0800204 };
205
Shawn Guo52f71762012-06-28 11:45:06 +0800206 pwm: pwm@80064000 {
207 pinctrl-names = "default";
208 pinctrl-0 = <&pwm2_pins_a>;
209 status = "okay";
210 };
211
Dong Aishengbc3a59c2012-03-31 21:26:57 +0800212 duart: serial@80074000 {
213 pinctrl-names = "default";
214 pinctrl-0 = <&duart_pins_a>;
215 status = "okay";
216 };
Fabio Estevam80d969e2012-06-15 12:35:56 -0300217
218 auart0: serial@8006a000 {
219 pinctrl-names = "default";
220 pinctrl-0 = <&auart0_pins_a>;
221 status = "okay";
222 };
223
224 auart3: serial@80070000 {
225 pinctrl-names = "default";
226 pinctrl-0 = <&auart3_pins_a>;
227 status = "okay";
228 };
Richard Zhao5da01272012-07-12 10:25:27 +0800229
230 usbphy0: usbphy@8007c000 {
231 status = "okay";
232 };
233
234 usbphy1: usbphy@8007e000 {
235 status = "okay";
236 };
Dong Aishengbc3a59c2012-03-31 21:26:57 +0800237 };
238 };
239
240 ahb@80080000 {
Richard Zhao5da01272012-07-12 10:25:27 +0800241 usb0: usb@80080000 {
242 vbus-supply = <&reg_usb0_vbus>;
243 status = "okay";
244 };
245
246 usb1: usb@80090000 {
247 vbus-supply = <&reg_usb1_vbus>;
248 status = "okay";
249 };
250
Dong Aishengbc3a59c2012-03-31 21:26:57 +0800251 mac0: ethernet@800f0000 {
252 phy-mode = "rmii";
253 pinctrl-names = "default";
254 pinctrl-0 = <&mac0_pins_a>;
Shawn Guoc9987c82012-06-28 11:45:02 +0800255 phy-supply = <&reg_fec_3v3>;
256 phy-reset-gpios = <&gpio4 13 0>;
257 phy-reset-duration = <100>;
Dong Aishengbc3a59c2012-03-31 21:26:57 +0800258 status = "okay";
259 };
260
261 mac1: ethernet@800f4000 {
262 phy-mode = "rmii";
263 pinctrl-names = "default";
264 pinctrl-0 = <&mac1_pins_a>;
265 status = "okay";
266 };
267 };
Shawn Guo530f1d42012-05-10 15:03:16 +0800268
269 regulators {
270 compatible = "simple-bus";
271
272 reg_3p3v: 3p3v {
273 compatible = "regulator-fixed";
274 regulator-name = "3P3V";
275 regulator-min-microvolt = <3300000>;
276 regulator-max-microvolt = <3300000>;
277 regulator-always-on;
278 };
Shawn Guo64edbcd2012-06-28 11:45:01 +0800279
280 reg_vddio_sd0: vddio-sd0 {
281 compatible = "regulator-fixed";
282 regulator-name = "vddio-sd0";
283 regulator-min-microvolt = <3300000>;
284 regulator-max-microvolt = <3300000>;
285 gpio = <&gpio3 28 0>;
286 };
Shawn Guoc9987c82012-06-28 11:45:02 +0800287
288 reg_fec_3v3: fec-3v3 {
289 compatible = "regulator-fixed";
290 regulator-name = "fec-3v3";
291 regulator-min-microvolt = <3300000>;
292 regulator-max-microvolt = <3300000>;
293 gpio = <&gpio2 15 0>;
294 };
Richard Zhao5da01272012-07-12 10:25:27 +0800295
296 reg_usb0_vbus: usb0_vbus {
297 compatible = "regulator-fixed";
298 regulator-name = "usb0_vbus";
299 regulator-min-microvolt = <5000000>;
300 regulator-max-microvolt = <5000000>;
301 gpio = <&gpio3 9 0>;
302 enable-active-high;
303 };
304
305 reg_usb1_vbus: usb1_vbus {
306 compatible = "regulator-fixed";
307 regulator-name = "usb1_vbus";
308 regulator-min-microvolt = <5000000>;
309 regulator-max-microvolt = <5000000>;
310 gpio = <&gpio3 8 0>;
311 enable-active-high;
312 };
Fabio Estevam43444292013-04-07 15:44:59 -0300313
314 reg_lcd_3v3: lcd-3v3 {
315 compatible = "regulator-fixed";
316 regulator-name = "lcd-3v3";
317 regulator-min-microvolt = <3300000>;
318 regulator-max-microvolt = <3300000>;
319 gpio = <&gpio3 30 0>;
320 enable-active-high;
321 };
Shawn Guo530f1d42012-05-10 15:03:16 +0800322 };
323
324 sound {
325 compatible = "fsl,imx28-evk-sgtl5000",
326 "fsl,mxs-audio-sgtl5000";
327 model = "imx28-evk-sgtl5000";
328 saif-controllers = <&saif0 &saif1>;
329 audio-codec = <&sgtl5000>;
330 };
Shawn Guoa600e332012-06-28 11:45:04 +0800331
332 leds {
333 compatible = "gpio-leds";
Fabio Estevam30d6e2d2012-09-23 16:18:38 -0300334 pinctrl-names = "default";
335 pinctrl-0 = <&led_pin_gpio3_5>;
Shawn Guoa600e332012-06-28 11:45:04 +0800336
337 user {
338 label = "Heartbeat";
339 gpios = <&gpio3 5 0>;
340 linux,default-trigger = "heartbeat";
341 };
342 };
Shawn Guo52f71762012-06-28 11:45:06 +0800343
344 backlight {
345 compatible = "pwm-backlight";
346 pwms = <&pwm 2 5000000>;
347 brightness-levels = <0 4 8 16 32 64 128 255>;
348 default-brightness-level = <6>;
349 };
Dong Aishengbc3a59c2012-03-31 21:26:57 +0800350};