blob: 4568e7d8a060ecfbaec93090cdcd77c9bb87c278 [file] [log] [blame]
Ben Gamari20172632009-02-17 20:08:50 -05001/*
2 * Copyright © 2008 Intel Corporation
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
21 * IN THE SOFTWARE.
22 *
23 * Authors:
24 * Eric Anholt <eric@anholt.net>
25 * Keith Packard <keithp@keithp.com>
26 *
27 */
28
29#include <linux/seq_file.h>
Chris Wilsonf3cd4742009-10-13 22:20:20 +010030#include <linux/debugfs.h>
Tejun Heo5a0e3ad2010-03-24 17:04:11 +090031#include <linux/slab.h>
Paul Gortmaker2d1a8a42011-08-30 18:16:33 -040032#include <linux/export.h>
David Howells760285e2012-10-02 18:01:07 +010033#include <drm/drmP.h>
Simon Farnsworth4e5359c2010-09-01 17:47:52 +010034#include "intel_drv.h"
Chris Wilsone5c65262010-11-01 11:35:28 +000035#include "intel_ringbuffer.h"
David Howells760285e2012-10-02 18:01:07 +010036#include <drm/i915_drm.h>
Ben Gamari20172632009-02-17 20:08:50 -050037#include "i915_drv.h"
38
39#define DRM_I915_RING_DEBUG 1
40
41
42#if defined(CONFIG_DEBUG_FS)
43
Chris Wilsonf13d3f72010-09-20 17:36:15 +010044enum {
Chris Wilson69dc4982010-10-19 10:36:51 +010045 ACTIVE_LIST,
Chris Wilsonf13d3f72010-09-20 17:36:15 +010046 INACTIVE_LIST,
Chris Wilsond21d5972010-09-26 11:19:33 +010047 PINNED_LIST,
Chris Wilsonf13d3f72010-09-20 17:36:15 +010048};
Ben Gamari433e12f2009-02-17 20:08:51 -050049
Chris Wilson70d39fe2010-08-25 16:03:34 +010050static const char *yesno(int v)
51{
52 return v ? "yes" : "no";
53}
54
55static int i915_capabilities(struct seq_file *m, void *data)
56{
57 struct drm_info_node *node = (struct drm_info_node *) m->private;
58 struct drm_device *dev = node->minor->dev;
59 const struct intel_device_info *info = INTEL_INFO(dev);
60
61 seq_printf(m, "gen: %d\n", info->gen);
Paulo Zanoni03d00ac2011-10-14 18:17:41 -030062 seq_printf(m, "pch: %d\n", INTEL_PCH_TYPE(dev));
Daniel Vetterc96ea642012-08-08 22:01:51 +020063#define DEV_INFO_FLAG(x) seq_printf(m, #x ": %s\n", yesno(info->x))
64#define DEV_INFO_SEP ;
65 DEV_INFO_FLAGS;
66#undef DEV_INFO_FLAG
67#undef DEV_INFO_SEP
Chris Wilson70d39fe2010-08-25 16:03:34 +010068
69 return 0;
70}
Ben Gamari433e12f2009-02-17 20:08:51 -050071
Chris Wilson05394f32010-11-08 19:18:58 +000072static const char *get_pin_flag(struct drm_i915_gem_object *obj)
Chris Wilsona6172a82009-02-11 14:26:38 +000073{
Chris Wilson05394f32010-11-08 19:18:58 +000074 if (obj->user_pin_count > 0)
Chris Wilsona6172a82009-02-11 14:26:38 +000075 return "P";
Chris Wilson05394f32010-11-08 19:18:58 +000076 else if (obj->pin_count > 0)
Chris Wilsona6172a82009-02-11 14:26:38 +000077 return "p";
78 else
79 return " ";
80}
81
Chris Wilson05394f32010-11-08 19:18:58 +000082static const char *get_tiling_flag(struct drm_i915_gem_object *obj)
Chris Wilsona6172a82009-02-11 14:26:38 +000083{
Akshay Joshi0206e352011-08-16 15:34:10 -040084 switch (obj->tiling_mode) {
85 default:
86 case I915_TILING_NONE: return " ";
87 case I915_TILING_X: return "X";
88 case I915_TILING_Y: return "Y";
89 }
Chris Wilsona6172a82009-02-11 14:26:38 +000090}
91
Chris Wilson93dfb402011-03-29 16:59:50 -070092static const char *cache_level_str(int type)
Chris Wilson08c18322011-01-10 00:00:24 +000093{
94 switch (type) {
Chris Wilson93dfb402011-03-29 16:59:50 -070095 case I915_CACHE_NONE: return " uncached";
96 case I915_CACHE_LLC: return " snooped (LLC)";
97 case I915_CACHE_LLC_MLC: return " snooped (LLC+MLC)";
Chris Wilson08c18322011-01-10 00:00:24 +000098 default: return "";
99 }
100}
101
Chris Wilson37811fc2010-08-25 22:45:57 +0100102static void
103describe_obj(struct seq_file *m, struct drm_i915_gem_object *obj)
104{
Chris Wilson0201f1e2012-07-20 12:41:01 +0100105 seq_printf(m, "%p: %s%s %8zdKiB %04x %04x %d %d %d%s%s%s",
Chris Wilson37811fc2010-08-25 22:45:57 +0100106 &obj->base,
107 get_pin_flag(obj),
108 get_tiling_flag(obj),
Eric Anholta05a5862011-12-20 08:54:15 -0800109 obj->base.size / 1024,
Chris Wilson37811fc2010-08-25 22:45:57 +0100110 obj->base.read_domains,
111 obj->base.write_domain,
Chris Wilson0201f1e2012-07-20 12:41:01 +0100112 obj->last_read_seqno,
113 obj->last_write_seqno,
Chris Wilsoncaea7472010-11-12 13:53:37 +0000114 obj->last_fenced_seqno,
Chris Wilson93dfb402011-03-29 16:59:50 -0700115 cache_level_str(obj->cache_level),
Chris Wilson37811fc2010-08-25 22:45:57 +0100116 obj->dirty ? " dirty" : "",
117 obj->madv == I915_MADV_DONTNEED ? " purgeable" : "");
118 if (obj->base.name)
119 seq_printf(m, " (name: %d)", obj->base.name);
Chris Wilsonc110a6d2012-08-11 15:41:02 +0100120 if (obj->pin_count)
121 seq_printf(m, " (pinned x %d)", obj->pin_count);
Chris Wilson37811fc2010-08-25 22:45:57 +0100122 if (obj->fence_reg != I915_FENCE_REG_NONE)
123 seq_printf(m, " (fence: %d)", obj->fence_reg);
124 if (obj->gtt_space != NULL)
Chris Wilsona00b10c2010-09-24 21:15:47 +0100125 seq_printf(m, " (gtt offset: %08x, size: %08x)",
126 obj->gtt_offset, (unsigned int)obj->gtt_space->size);
Chris Wilson6299f992010-11-24 12:23:44 +0000127 if (obj->pin_mappable || obj->fault_mappable) {
128 char s[3], *t = s;
129 if (obj->pin_mappable)
130 *t++ = 'p';
131 if (obj->fault_mappable)
132 *t++ = 'f';
133 *t = '\0';
134 seq_printf(m, " (%s mappable)", s);
135 }
Chris Wilson69dc4982010-10-19 10:36:51 +0100136 if (obj->ring != NULL)
137 seq_printf(m, " (%s)", obj->ring->name);
Chris Wilson37811fc2010-08-25 22:45:57 +0100138}
139
Ben Gamari433e12f2009-02-17 20:08:51 -0500140static int i915_gem_object_list_info(struct seq_file *m, void *data)
Ben Gamari20172632009-02-17 20:08:50 -0500141{
142 struct drm_info_node *node = (struct drm_info_node *) m->private;
Ben Gamari433e12f2009-02-17 20:08:51 -0500143 uintptr_t list = (uintptr_t) node->info_ent->data;
144 struct list_head *head;
Ben Gamari20172632009-02-17 20:08:50 -0500145 struct drm_device *dev = node->minor->dev;
146 drm_i915_private_t *dev_priv = dev->dev_private;
Chris Wilson05394f32010-11-08 19:18:58 +0000147 struct drm_i915_gem_object *obj;
Chris Wilson8f2480f2010-09-26 11:44:19 +0100148 size_t total_obj_size, total_gtt_size;
149 int count, ret;
Chris Wilsonde227ef2010-07-03 07:58:38 +0100150
151 ret = mutex_lock_interruptible(&dev->struct_mutex);
152 if (ret)
153 return ret;
Ben Gamari20172632009-02-17 20:08:50 -0500154
Ben Gamari433e12f2009-02-17 20:08:51 -0500155 switch (list) {
156 case ACTIVE_LIST:
157 seq_printf(m, "Active:\n");
Chris Wilson69dc4982010-10-19 10:36:51 +0100158 head = &dev_priv->mm.active_list;
Ben Gamari433e12f2009-02-17 20:08:51 -0500159 break;
160 case INACTIVE_LIST:
Ben Gamaria17458f2009-07-01 15:01:36 -0400161 seq_printf(m, "Inactive:\n");
Ben Gamari433e12f2009-02-17 20:08:51 -0500162 head = &dev_priv->mm.inactive_list;
163 break;
Ben Gamari433e12f2009-02-17 20:08:51 -0500164 default:
Chris Wilsonde227ef2010-07-03 07:58:38 +0100165 mutex_unlock(&dev->struct_mutex);
166 return -EINVAL;
Ben Gamari433e12f2009-02-17 20:08:51 -0500167 }
168
Chris Wilson8f2480f2010-09-26 11:44:19 +0100169 total_obj_size = total_gtt_size = count = 0;
Chris Wilson05394f32010-11-08 19:18:58 +0000170 list_for_each_entry(obj, head, mm_list) {
Chris Wilson37811fc2010-08-25 22:45:57 +0100171 seq_printf(m, " ");
Chris Wilson05394f32010-11-08 19:18:58 +0000172 describe_obj(m, obj);
Eric Anholtf4ceda82009-02-17 23:53:41 -0800173 seq_printf(m, "\n");
Chris Wilson05394f32010-11-08 19:18:58 +0000174 total_obj_size += obj->base.size;
175 total_gtt_size += obj->gtt_space->size;
Chris Wilson8f2480f2010-09-26 11:44:19 +0100176 count++;
Ben Gamari20172632009-02-17 20:08:50 -0500177 }
Chris Wilsonde227ef2010-07-03 07:58:38 +0100178 mutex_unlock(&dev->struct_mutex);
Carl Worth5e118f42009-03-20 11:54:25 -0700179
Chris Wilson8f2480f2010-09-26 11:44:19 +0100180 seq_printf(m, "Total %d objects, %zu bytes, %zu GTT size\n",
181 count, total_obj_size, total_gtt_size);
Ben Gamari20172632009-02-17 20:08:50 -0500182 return 0;
183}
184
Chris Wilson6299f992010-11-24 12:23:44 +0000185#define count_objects(list, member) do { \
186 list_for_each_entry(obj, list, member) { \
187 size += obj->gtt_space->size; \
188 ++count; \
189 if (obj->map_and_fenceable) { \
190 mappable_size += obj->gtt_space->size; \
191 ++mappable_count; \
192 } \
193 } \
Akshay Joshi0206e352011-08-16 15:34:10 -0400194} while (0)
Chris Wilson6299f992010-11-24 12:23:44 +0000195
Chris Wilson73aa8082010-09-30 11:46:12 +0100196static int i915_gem_object_info(struct seq_file *m, void* data)
197{
198 struct drm_info_node *node = (struct drm_info_node *) m->private;
199 struct drm_device *dev = node->minor->dev;
200 struct drm_i915_private *dev_priv = dev->dev_private;
Chris Wilsonb7abb712012-08-20 11:33:30 +0200201 u32 count, mappable_count, purgeable_count;
202 size_t size, mappable_size, purgeable_size;
Chris Wilson6299f992010-11-24 12:23:44 +0000203 struct drm_i915_gem_object *obj;
Chris Wilson73aa8082010-09-30 11:46:12 +0100204 int ret;
205
206 ret = mutex_lock_interruptible(&dev->struct_mutex);
207 if (ret)
208 return ret;
209
Chris Wilson6299f992010-11-24 12:23:44 +0000210 seq_printf(m, "%u objects, %zu bytes\n",
211 dev_priv->mm.object_count,
212 dev_priv->mm.object_memory);
213
214 size = count = mappable_size = mappable_count = 0;
Chris Wilson6c085a72012-08-20 11:40:46 +0200215 count_objects(&dev_priv->mm.bound_list, gtt_list);
Chris Wilson6299f992010-11-24 12:23:44 +0000216 seq_printf(m, "%u [%u] objects, %zu [%zu] bytes in gtt\n",
217 count, mappable_count, size, mappable_size);
218
219 size = count = mappable_size = mappable_count = 0;
220 count_objects(&dev_priv->mm.active_list, mm_list);
Chris Wilson6299f992010-11-24 12:23:44 +0000221 seq_printf(m, " %u [%u] active objects, %zu [%zu] bytes\n",
222 count, mappable_count, size, mappable_size);
223
224 size = count = mappable_size = mappable_count = 0;
Chris Wilson6299f992010-11-24 12:23:44 +0000225 count_objects(&dev_priv->mm.inactive_list, mm_list);
226 seq_printf(m, " %u [%u] inactive objects, %zu [%zu] bytes\n",
227 count, mappable_count, size, mappable_size);
228
Chris Wilsonb7abb712012-08-20 11:33:30 +0200229 size = count = purgeable_size = purgeable_count = 0;
230 list_for_each_entry(obj, &dev_priv->mm.unbound_list, gtt_list) {
Chris Wilson6c085a72012-08-20 11:40:46 +0200231 size += obj->base.size, ++count;
Chris Wilsonb7abb712012-08-20 11:33:30 +0200232 if (obj->madv == I915_MADV_DONTNEED)
233 purgeable_size += obj->base.size, ++purgeable_count;
234 }
Chris Wilson6c085a72012-08-20 11:40:46 +0200235 seq_printf(m, "%u unbound objects, %zu bytes\n", count, size);
236
Chris Wilson6299f992010-11-24 12:23:44 +0000237 size = count = mappable_size = mappable_count = 0;
Chris Wilson6c085a72012-08-20 11:40:46 +0200238 list_for_each_entry(obj, &dev_priv->mm.bound_list, gtt_list) {
Chris Wilson6299f992010-11-24 12:23:44 +0000239 if (obj->fault_mappable) {
240 size += obj->gtt_space->size;
241 ++count;
242 }
243 if (obj->pin_mappable) {
244 mappable_size += obj->gtt_space->size;
245 ++mappable_count;
246 }
Chris Wilsonb7abb712012-08-20 11:33:30 +0200247 if (obj->madv == I915_MADV_DONTNEED) {
248 purgeable_size += obj->base.size;
249 ++purgeable_count;
250 }
Chris Wilson6299f992010-11-24 12:23:44 +0000251 }
Chris Wilsonb7abb712012-08-20 11:33:30 +0200252 seq_printf(m, "%u purgeable objects, %zu bytes\n",
253 purgeable_count, purgeable_size);
Chris Wilson6299f992010-11-24 12:23:44 +0000254 seq_printf(m, "%u pinned mappable objects, %zu bytes\n",
255 mappable_count, mappable_size);
256 seq_printf(m, "%u fault mappable objects, %zu bytes\n",
257 count, size);
258
259 seq_printf(m, "%zu [%zu] gtt total\n",
260 dev_priv->mm.gtt_total, dev_priv->mm.mappable_gtt_total);
Chris Wilson73aa8082010-09-30 11:46:12 +0100261
262 mutex_unlock(&dev->struct_mutex);
263
264 return 0;
265}
266
Chris Wilson08c18322011-01-10 00:00:24 +0000267static int i915_gem_gtt_info(struct seq_file *m, void* data)
268{
269 struct drm_info_node *node = (struct drm_info_node *) m->private;
270 struct drm_device *dev = node->minor->dev;
Chris Wilson1b502472012-04-24 15:47:30 +0100271 uintptr_t list = (uintptr_t) node->info_ent->data;
Chris Wilson08c18322011-01-10 00:00:24 +0000272 struct drm_i915_private *dev_priv = dev->dev_private;
273 struct drm_i915_gem_object *obj;
274 size_t total_obj_size, total_gtt_size;
275 int count, ret;
276
277 ret = mutex_lock_interruptible(&dev->struct_mutex);
278 if (ret)
279 return ret;
280
281 total_obj_size = total_gtt_size = count = 0;
Chris Wilson6c085a72012-08-20 11:40:46 +0200282 list_for_each_entry(obj, &dev_priv->mm.bound_list, gtt_list) {
Chris Wilson1b502472012-04-24 15:47:30 +0100283 if (list == PINNED_LIST && obj->pin_count == 0)
284 continue;
285
Chris Wilson08c18322011-01-10 00:00:24 +0000286 seq_printf(m, " ");
287 describe_obj(m, obj);
288 seq_printf(m, "\n");
289 total_obj_size += obj->base.size;
290 total_gtt_size += obj->gtt_space->size;
291 count++;
292 }
293
294 mutex_unlock(&dev->struct_mutex);
295
296 seq_printf(m, "Total %d objects, %zu bytes, %zu GTT size\n",
297 count, total_obj_size, total_gtt_size);
298
299 return 0;
300}
301
Simon Farnsworth4e5359c2010-09-01 17:47:52 +0100302static int i915_gem_pageflip_info(struct seq_file *m, void *data)
303{
304 struct drm_info_node *node = (struct drm_info_node *) m->private;
305 struct drm_device *dev = node->minor->dev;
306 unsigned long flags;
307 struct intel_crtc *crtc;
308
309 list_for_each_entry(crtc, &dev->mode_config.crtc_list, base.head) {
Jesse Barnes9db4a9c2011-02-07 12:26:52 -0800310 const char pipe = pipe_name(crtc->pipe);
311 const char plane = plane_name(crtc->plane);
Simon Farnsworth4e5359c2010-09-01 17:47:52 +0100312 struct intel_unpin_work *work;
313
314 spin_lock_irqsave(&dev->event_lock, flags);
315 work = crtc->unpin_work;
316 if (work == NULL) {
Jesse Barnes9db4a9c2011-02-07 12:26:52 -0800317 seq_printf(m, "No flip due on pipe %c (plane %c)\n",
Simon Farnsworth4e5359c2010-09-01 17:47:52 +0100318 pipe, plane);
319 } else {
320 if (!work->pending) {
Jesse Barnes9db4a9c2011-02-07 12:26:52 -0800321 seq_printf(m, "Flip queued on pipe %c (plane %c)\n",
Simon Farnsworth4e5359c2010-09-01 17:47:52 +0100322 pipe, plane);
323 } else {
Jesse Barnes9db4a9c2011-02-07 12:26:52 -0800324 seq_printf(m, "Flip pending (waiting for vsync) on pipe %c (plane %c)\n",
Simon Farnsworth4e5359c2010-09-01 17:47:52 +0100325 pipe, plane);
326 }
327 if (work->enable_stall_check)
328 seq_printf(m, "Stall check enabled, ");
329 else
330 seq_printf(m, "Stall check waiting for page flip ioctl, ");
331 seq_printf(m, "%d prepares\n", work->pending);
332
333 if (work->old_fb_obj) {
Chris Wilson05394f32010-11-08 19:18:58 +0000334 struct drm_i915_gem_object *obj = work->old_fb_obj;
335 if (obj)
336 seq_printf(m, "Old framebuffer gtt_offset 0x%08x\n", obj->gtt_offset);
Simon Farnsworth4e5359c2010-09-01 17:47:52 +0100337 }
338 if (work->pending_flip_obj) {
Chris Wilson05394f32010-11-08 19:18:58 +0000339 struct drm_i915_gem_object *obj = work->pending_flip_obj;
340 if (obj)
341 seq_printf(m, "New framebuffer gtt_offset 0x%08x\n", obj->gtt_offset);
Simon Farnsworth4e5359c2010-09-01 17:47:52 +0100342 }
343 }
344 spin_unlock_irqrestore(&dev->event_lock, flags);
345 }
346
347 return 0;
348}
349
Ben Gamari20172632009-02-17 20:08:50 -0500350static int i915_gem_request_info(struct seq_file *m, void *data)
351{
352 struct drm_info_node *node = (struct drm_info_node *) m->private;
353 struct drm_device *dev = node->minor->dev;
354 drm_i915_private_t *dev_priv = dev->dev_private;
Chris Wilsona2c7f6f2012-09-01 20:51:22 +0100355 struct intel_ring_buffer *ring;
Ben Gamari20172632009-02-17 20:08:50 -0500356 struct drm_i915_gem_request *gem_request;
Chris Wilsona2c7f6f2012-09-01 20:51:22 +0100357 int ret, count, i;
Chris Wilsonde227ef2010-07-03 07:58:38 +0100358
359 ret = mutex_lock_interruptible(&dev->struct_mutex);
360 if (ret)
361 return ret;
Ben Gamari20172632009-02-17 20:08:50 -0500362
Chris Wilsonc2c347a92010-10-27 15:11:53 +0100363 count = 0;
Chris Wilsona2c7f6f2012-09-01 20:51:22 +0100364 for_each_ring(ring, dev_priv, i) {
365 if (list_empty(&ring->request_list))
366 continue;
367
368 seq_printf(m, "%s requests:\n", ring->name);
Chris Wilsonc2c347a92010-10-27 15:11:53 +0100369 list_for_each_entry(gem_request,
Chris Wilsona2c7f6f2012-09-01 20:51:22 +0100370 &ring->request_list,
Chris Wilsonc2c347a92010-10-27 15:11:53 +0100371 list) {
372 seq_printf(m, " %d @ %d\n",
373 gem_request->seqno,
374 (int) (jiffies - gem_request->emitted_jiffies));
375 }
376 count++;
Ben Gamari20172632009-02-17 20:08:50 -0500377 }
Chris Wilsonde227ef2010-07-03 07:58:38 +0100378 mutex_unlock(&dev->struct_mutex);
379
Chris Wilsonc2c347a92010-10-27 15:11:53 +0100380 if (count == 0)
381 seq_printf(m, "No requests\n");
382
Ben Gamari20172632009-02-17 20:08:50 -0500383 return 0;
384}
385
Chris Wilsonb2223492010-10-27 15:27:33 +0100386static void i915_ring_seqno_info(struct seq_file *m,
387 struct intel_ring_buffer *ring)
388{
389 if (ring->get_seqno) {
390 seq_printf(m, "Current sequence (%s): %d\n",
Chris Wilsonb2eadbc2012-08-09 10:58:30 +0100391 ring->name, ring->get_seqno(ring, false));
Chris Wilsonb2223492010-10-27 15:27:33 +0100392 }
393}
394
Ben Gamari20172632009-02-17 20:08:50 -0500395static int i915_gem_seqno_info(struct seq_file *m, void *data)
396{
397 struct drm_info_node *node = (struct drm_info_node *) m->private;
398 struct drm_device *dev = node->minor->dev;
399 drm_i915_private_t *dev_priv = dev->dev_private;
Chris Wilsona2c7f6f2012-09-01 20:51:22 +0100400 struct intel_ring_buffer *ring;
Chris Wilson1ec14ad2010-12-04 11:30:53 +0000401 int ret, i;
Chris Wilsonde227ef2010-07-03 07:58:38 +0100402
403 ret = mutex_lock_interruptible(&dev->struct_mutex);
404 if (ret)
405 return ret;
Ben Gamari20172632009-02-17 20:08:50 -0500406
Chris Wilsona2c7f6f2012-09-01 20:51:22 +0100407 for_each_ring(ring, dev_priv, i)
408 i915_ring_seqno_info(m, ring);
Chris Wilsonde227ef2010-07-03 07:58:38 +0100409
410 mutex_unlock(&dev->struct_mutex);
411
Ben Gamari20172632009-02-17 20:08:50 -0500412 return 0;
413}
414
415
416static int i915_interrupt_info(struct seq_file *m, void *data)
417{
418 struct drm_info_node *node = (struct drm_info_node *) m->private;
419 struct drm_device *dev = node->minor->dev;
420 drm_i915_private_t *dev_priv = dev->dev_private;
Chris Wilsona2c7f6f2012-09-01 20:51:22 +0100421 struct intel_ring_buffer *ring;
Jesse Barnes9db4a9c2011-02-07 12:26:52 -0800422 int ret, i, pipe;
Chris Wilsonde227ef2010-07-03 07:58:38 +0100423
424 ret = mutex_lock_interruptible(&dev->struct_mutex);
425 if (ret)
426 return ret;
Ben Gamari20172632009-02-17 20:08:50 -0500427
Jesse Barnes7e231dbe2012-03-28 13:39:38 -0700428 if (IS_VALLEYVIEW(dev)) {
429 seq_printf(m, "Display IER:\t%08x\n",
430 I915_READ(VLV_IER));
431 seq_printf(m, "Display IIR:\t%08x\n",
432 I915_READ(VLV_IIR));
433 seq_printf(m, "Display IIR_RW:\t%08x\n",
434 I915_READ(VLV_IIR_RW));
435 seq_printf(m, "Display IMR:\t%08x\n",
436 I915_READ(VLV_IMR));
437 for_each_pipe(pipe)
438 seq_printf(m, "Pipe %c stat:\t%08x\n",
439 pipe_name(pipe),
440 I915_READ(PIPESTAT(pipe)));
441
442 seq_printf(m, "Master IER:\t%08x\n",
443 I915_READ(VLV_MASTER_IER));
444
445 seq_printf(m, "Render IER:\t%08x\n",
446 I915_READ(GTIER));
447 seq_printf(m, "Render IIR:\t%08x\n",
448 I915_READ(GTIIR));
449 seq_printf(m, "Render IMR:\t%08x\n",
450 I915_READ(GTIMR));
451
452 seq_printf(m, "PM IER:\t\t%08x\n",
453 I915_READ(GEN6_PMIER));
454 seq_printf(m, "PM IIR:\t\t%08x\n",
455 I915_READ(GEN6_PMIIR));
456 seq_printf(m, "PM IMR:\t\t%08x\n",
457 I915_READ(GEN6_PMIMR));
458
459 seq_printf(m, "Port hotplug:\t%08x\n",
460 I915_READ(PORT_HOTPLUG_EN));
461 seq_printf(m, "DPFLIPSTAT:\t%08x\n",
462 I915_READ(VLV_DPFLIPSTAT));
463 seq_printf(m, "DPINVGTT:\t%08x\n",
464 I915_READ(DPINVGTT));
465
466 } else if (!HAS_PCH_SPLIT(dev)) {
Zhenyu Wang5f6a1692009-08-10 21:37:24 +0800467 seq_printf(m, "Interrupt enable: %08x\n",
468 I915_READ(IER));
469 seq_printf(m, "Interrupt identity: %08x\n",
470 I915_READ(IIR));
471 seq_printf(m, "Interrupt mask: %08x\n",
472 I915_READ(IMR));
Jesse Barnes9db4a9c2011-02-07 12:26:52 -0800473 for_each_pipe(pipe)
474 seq_printf(m, "Pipe %c stat: %08x\n",
475 pipe_name(pipe),
476 I915_READ(PIPESTAT(pipe)));
Zhenyu Wang5f6a1692009-08-10 21:37:24 +0800477 } else {
478 seq_printf(m, "North Display Interrupt enable: %08x\n",
479 I915_READ(DEIER));
480 seq_printf(m, "North Display Interrupt identity: %08x\n",
481 I915_READ(DEIIR));
482 seq_printf(m, "North Display Interrupt mask: %08x\n",
483 I915_READ(DEIMR));
484 seq_printf(m, "South Display Interrupt enable: %08x\n",
485 I915_READ(SDEIER));
486 seq_printf(m, "South Display Interrupt identity: %08x\n",
487 I915_READ(SDEIIR));
488 seq_printf(m, "South Display Interrupt mask: %08x\n",
489 I915_READ(SDEIMR));
490 seq_printf(m, "Graphics Interrupt enable: %08x\n",
491 I915_READ(GTIER));
492 seq_printf(m, "Graphics Interrupt identity: %08x\n",
493 I915_READ(GTIIR));
494 seq_printf(m, "Graphics Interrupt mask: %08x\n",
495 I915_READ(GTIMR));
496 }
Ben Gamari20172632009-02-17 20:08:50 -0500497 seq_printf(m, "Interrupts received: %d\n",
498 atomic_read(&dev_priv->irq_received));
Chris Wilsona2c7f6f2012-09-01 20:51:22 +0100499 for_each_ring(ring, dev_priv, i) {
Jesse Barnesda64c6f2011-08-09 09:17:46 -0700500 if (IS_GEN6(dev) || IS_GEN7(dev)) {
Chris Wilsona2c7f6f2012-09-01 20:51:22 +0100501 seq_printf(m,
502 "Graphics Interrupt mask (%s): %08x\n",
503 ring->name, I915_READ_IMR(ring));
Chris Wilson9862e602011-01-04 22:22:17 +0000504 }
Chris Wilsona2c7f6f2012-09-01 20:51:22 +0100505 i915_ring_seqno_info(m, ring);
Chris Wilson9862e602011-01-04 22:22:17 +0000506 }
Chris Wilsonde227ef2010-07-03 07:58:38 +0100507 mutex_unlock(&dev->struct_mutex);
508
Ben Gamari20172632009-02-17 20:08:50 -0500509 return 0;
510}
511
Chris Wilsona6172a82009-02-11 14:26:38 +0000512static int i915_gem_fence_regs_info(struct seq_file *m, void *data)
513{
514 struct drm_info_node *node = (struct drm_info_node *) m->private;
515 struct drm_device *dev = node->minor->dev;
516 drm_i915_private_t *dev_priv = dev->dev_private;
Chris Wilsonde227ef2010-07-03 07:58:38 +0100517 int i, ret;
518
519 ret = mutex_lock_interruptible(&dev->struct_mutex);
520 if (ret)
521 return ret;
Chris Wilsona6172a82009-02-11 14:26:38 +0000522
523 seq_printf(m, "Reserved fences = %d\n", dev_priv->fence_reg_start);
524 seq_printf(m, "Total fences = %d\n", dev_priv->num_fence_regs);
525 for (i = 0; i < dev_priv->num_fence_regs; i++) {
Chris Wilson05394f32010-11-08 19:18:58 +0000526 struct drm_i915_gem_object *obj = dev_priv->fence_regs[i].obj;
Chris Wilsona6172a82009-02-11 14:26:38 +0000527
Chris Wilson6c085a72012-08-20 11:40:46 +0200528 seq_printf(m, "Fence %d, pin count = %d, object = ",
529 i, dev_priv->fence_regs[i].pin_count);
Chris Wilsonc2c347a92010-10-27 15:11:53 +0100530 if (obj == NULL)
531 seq_printf(m, "unused");
532 else
Chris Wilson05394f32010-11-08 19:18:58 +0000533 describe_obj(m, obj);
Chris Wilsonc2c347a92010-10-27 15:11:53 +0100534 seq_printf(m, "\n");
Chris Wilsona6172a82009-02-11 14:26:38 +0000535 }
536
Chris Wilson05394f32010-11-08 19:18:58 +0000537 mutex_unlock(&dev->struct_mutex);
Chris Wilsona6172a82009-02-11 14:26:38 +0000538 return 0;
539}
540
Ben Gamari20172632009-02-17 20:08:50 -0500541static int i915_hws_info(struct seq_file *m, void *data)
542{
543 struct drm_info_node *node = (struct drm_info_node *) m->private;
544 struct drm_device *dev = node->minor->dev;
545 drm_i915_private_t *dev_priv = dev->dev_private;
Chris Wilson4066c0a2010-10-29 21:00:54 +0100546 struct intel_ring_buffer *ring;
Chris Wilson311bd682011-01-13 19:06:50 +0000547 const volatile u32 __iomem *hws;
Chris Wilson4066c0a2010-10-29 21:00:54 +0100548 int i;
Ben Gamari20172632009-02-17 20:08:50 -0500549
Chris Wilson1ec14ad2010-12-04 11:30:53 +0000550 ring = &dev_priv->ring[(uintptr_t)node->info_ent->data];
Chris Wilson311bd682011-01-13 19:06:50 +0000551 hws = (volatile u32 __iomem *)ring->status_page.page_addr;
Ben Gamari20172632009-02-17 20:08:50 -0500552 if (hws == NULL)
553 return 0;
554
555 for (i = 0; i < 4096 / sizeof(u32) / 4; i += 4) {
556 seq_printf(m, "0x%08x: 0x%08x 0x%08x 0x%08x 0x%08x\n",
557 i * 4,
558 hws[i], hws[i + 1], hws[i + 2], hws[i + 3]);
559 }
560 return 0;
561}
562
Chris Wilsone5c65262010-11-01 11:35:28 +0000563static const char *ring_str(int ring)
564{
565 switch (ring) {
Daniel Vetter96154f22011-12-14 13:57:00 +0100566 case RCS: return "render";
567 case VCS: return "bsd";
568 case BCS: return "blt";
Chris Wilsone5c65262010-11-01 11:35:28 +0000569 default: return "";
570 }
571}
572
Chris Wilson9df30792010-02-18 10:24:56 +0000573static const char *pin_flag(int pinned)
574{
575 if (pinned > 0)
576 return " P";
577 else if (pinned < 0)
578 return " p";
579 else
580 return "";
581}
582
583static const char *tiling_flag(int tiling)
584{
585 switch (tiling) {
586 default:
587 case I915_TILING_NONE: return "";
588 case I915_TILING_X: return " X";
589 case I915_TILING_Y: return " Y";
590 }
591}
592
593static const char *dirty_flag(int dirty)
594{
595 return dirty ? " dirty" : "";
596}
597
598static const char *purgeable_flag(int purgeable)
599{
600 return purgeable ? " purgeable" : "";
601}
602
Chris Wilsonc724e8a2010-11-22 08:07:02 +0000603static void print_error_buffers(struct seq_file *m,
604 const char *name,
605 struct drm_i915_error_buffer *err,
606 int count)
607{
608 seq_printf(m, "%s [%d]:\n", name, count);
609
610 while (count--) {
Chris Wilson0201f1e2012-07-20 12:41:01 +0100611 seq_printf(m, " %08x %8u %04x %04x %x %x%s%s%s%s%s%s%s",
Chris Wilsonc724e8a2010-11-22 08:07:02 +0000612 err->gtt_offset,
613 err->size,
614 err->read_domains,
615 err->write_domain,
Chris Wilson0201f1e2012-07-20 12:41:01 +0100616 err->rseqno, err->wseqno,
Chris Wilsonc724e8a2010-11-22 08:07:02 +0000617 pin_flag(err->pinned),
618 tiling_flag(err->tiling),
619 dirty_flag(err->dirty),
620 purgeable_flag(err->purgeable),
Daniel Vetter96154f22011-12-14 13:57:00 +0100621 err->ring != -1 ? " " : "",
Chris Wilsona779e5a2011-01-09 21:07:49 +0000622 ring_str(err->ring),
Chris Wilson93dfb402011-03-29 16:59:50 -0700623 cache_level_str(err->cache_level));
Chris Wilsonc724e8a2010-11-22 08:07:02 +0000624
625 if (err->name)
626 seq_printf(m, " (name: %d)", err->name);
627 if (err->fence_reg != I915_FENCE_REG_NONE)
628 seq_printf(m, " (fence: %d)", err->fence_reg);
629
630 seq_printf(m, "\n");
631 err++;
632 }
633}
634
Daniel Vetterd27b1e02011-12-14 13:57:01 +0100635static void i915_ring_error_state(struct seq_file *m,
636 struct drm_device *dev,
637 struct drm_i915_error_state *error,
638 unsigned ring)
639{
Ben Widawskyec34a012012-04-03 23:03:00 -0700640 BUG_ON(ring >= I915_NUM_RINGS); /* shut up confused gcc */
Daniel Vetterd27b1e02011-12-14 13:57:01 +0100641 seq_printf(m, "%s command stream:\n", ring_str(ring));
Daniel Vetterc1cd90e2011-12-14 13:57:02 +0100642 seq_printf(m, " HEAD: 0x%08x\n", error->head[ring]);
643 seq_printf(m, " TAIL: 0x%08x\n", error->tail[ring]);
Daniel Vetterd27b1e02011-12-14 13:57:01 +0100644 seq_printf(m, " ACTHD: 0x%08x\n", error->acthd[ring]);
645 seq_printf(m, " IPEIR: 0x%08x\n", error->ipeir[ring]);
646 seq_printf(m, " IPEHR: 0x%08x\n", error->ipehr[ring]);
647 seq_printf(m, " INSTDONE: 0x%08x\n", error->instdone[ring]);
Ben Widawsky050ee912012-08-22 11:32:15 -0700648 if (ring == RCS && INTEL_INFO(dev)->gen >= 4)
Daniel Vetterc1cd90e2011-12-14 13:57:02 +0100649 seq_printf(m, " BBADDR: 0x%08llx\n", error->bbaddr);
Ben Widawsky050ee912012-08-22 11:32:15 -0700650
Daniel Vetterc1cd90e2011-12-14 13:57:02 +0100651 if (INTEL_INFO(dev)->gen >= 4)
652 seq_printf(m, " INSTPS: 0x%08x\n", error->instps[ring]);
653 seq_printf(m, " INSTPM: 0x%08x\n", error->instpm[ring]);
Daniel Vetter9d2f41f2012-04-02 21:41:45 +0200654 seq_printf(m, " FADDR: 0x%08x\n", error->faddr[ring]);
Daniel Vetter33f3f512011-12-14 13:57:39 +0100655 if (INTEL_INFO(dev)->gen >= 6) {
Chris Wilson12f55812012-07-05 17:14:01 +0100656 seq_printf(m, " RC PSMI: 0x%08x\n", error->rc_psmi[ring]);
Daniel Vetter33f3f512011-12-14 13:57:39 +0100657 seq_printf(m, " FAULT_REG: 0x%08x\n", error->fault_reg[ring]);
Daniel Vetter7e3b8732012-02-01 22:26:45 +0100658 seq_printf(m, " SYNC_0: 0x%08x\n",
659 error->semaphore_mboxes[ring][0]);
660 seq_printf(m, " SYNC_1: 0x%08x\n",
661 error->semaphore_mboxes[ring][1]);
Daniel Vetter33f3f512011-12-14 13:57:39 +0100662 }
Daniel Vetterd27b1e02011-12-14 13:57:01 +0100663 seq_printf(m, " seqno: 0x%08x\n", error->seqno[ring]);
Ben Widawsky9574b3f2012-04-26 16:03:01 -0700664 seq_printf(m, " waiting: %s\n", yesno(error->waiting[ring]));
Daniel Vetter7e3b8732012-02-01 22:26:45 +0100665 seq_printf(m, " ring->head: 0x%08x\n", error->cpu_ring_head[ring]);
666 seq_printf(m, " ring->tail: 0x%08x\n", error->cpu_ring_tail[ring]);
Daniel Vetterd27b1e02011-12-14 13:57:01 +0100667}
668
Daniel Vetterd5442302012-04-27 15:17:40 +0200669struct i915_error_state_file_priv {
670 struct drm_device *dev;
671 struct drm_i915_error_state *error;
672};
673
Jesse Barnes63eeaf32009-06-18 16:56:52 -0700674static int i915_error_state(struct seq_file *m, void *unused)
675{
Daniel Vetterd5442302012-04-27 15:17:40 +0200676 struct i915_error_state_file_priv *error_priv = m->private;
677 struct drm_device *dev = error_priv->dev;
Jesse Barnes63eeaf32009-06-18 16:56:52 -0700678 drm_i915_private_t *dev_priv = dev->dev_private;
Daniel Vetterd5442302012-04-27 15:17:40 +0200679 struct drm_i915_error_state *error = error_priv->error;
Chris Wilsonb4519512012-05-11 14:29:30 +0100680 struct intel_ring_buffer *ring;
Chris Wilson52d39a22012-02-15 11:25:37 +0000681 int i, j, page, offset, elt;
Jesse Barnes63eeaf32009-06-18 16:56:52 -0700682
Daniel Vetter742cbee2012-04-27 15:17:39 +0200683 if (!error) {
Jesse Barnes63eeaf32009-06-18 16:56:52 -0700684 seq_printf(m, "no error state collected\n");
Daniel Vetter742cbee2012-04-27 15:17:39 +0200685 return 0;
Jesse Barnes63eeaf32009-06-18 16:56:52 -0700686 }
687
Jesse Barnes8a905232009-07-11 16:48:03 -0400688 seq_printf(m, "Time: %ld s %ld us\n", error->time.tv_sec,
689 error->time.tv_usec);
Chris Wilson9df30792010-02-18 10:24:56 +0000690 seq_printf(m, "PCI ID: 0x%04x\n", dev->pci_device);
Chris Wilson1d8f38f2010-10-29 19:00:51 +0100691 seq_printf(m, "EIR: 0x%08x\n", error->eir);
Ben Widawskybe998e22012-04-26 16:03:00 -0700692 seq_printf(m, "IER: 0x%08x\n", error->ier);
Chris Wilson1d8f38f2010-10-29 19:00:51 +0100693 seq_printf(m, "PGTBL_ER: 0x%08x\n", error->pgtbl_er);
Ben Widawskyb9a39062012-06-04 14:42:52 -0700694 seq_printf(m, "CCID: 0x%08x\n", error->ccid);
Chris Wilson9df30792010-02-18 10:24:56 +0000695
Daniel Vetterbf3301a2011-05-12 22:17:12 +0100696 for (i = 0; i < dev_priv->num_fence_regs; i++)
Chris Wilson748ebc62010-10-24 10:28:47 +0100697 seq_printf(m, " fence[%d] = %08llx\n", i, error->fence[i]);
698
Ben Widawsky050ee912012-08-22 11:32:15 -0700699 for (i = 0; i < ARRAY_SIZE(error->extra_instdone); i++)
700 seq_printf(m, " INSTDONE_%d: 0x%08x\n", i, error->extra_instdone[i]);
701
Daniel Vetter33f3f512011-12-14 13:57:39 +0100702 if (INTEL_INFO(dev)->gen >= 6) {
Daniel Vetterd27b1e02011-12-14 13:57:01 +0100703 seq_printf(m, "ERROR: 0x%08x\n", error->error);
Daniel Vetter33f3f512011-12-14 13:57:39 +0100704 seq_printf(m, "DONE_REG: 0x%08x\n", error->done_reg);
705 }
Daniel Vetterd27b1e02011-12-14 13:57:01 +0100706
Ben Widawsky71e172e2012-08-20 16:15:13 -0700707 if (INTEL_INFO(dev)->gen == 7)
708 seq_printf(m, "ERR_INT: 0x%08x\n", error->err_int);
709
Chris Wilsonb4519512012-05-11 14:29:30 +0100710 for_each_ring(ring, dev_priv, i)
711 i915_ring_error_state(m, dev, error, i);
Daniel Vetterd27b1e02011-12-14 13:57:01 +0100712
Chris Wilsonc724e8a2010-11-22 08:07:02 +0000713 if (error->active_bo)
714 print_error_buffers(m, "Active",
715 error->active_bo,
716 error->active_bo_count);
Chris Wilson9df30792010-02-18 10:24:56 +0000717
Chris Wilsonc724e8a2010-11-22 08:07:02 +0000718 if (error->pinned_bo)
719 print_error_buffers(m, "Pinned",
720 error->pinned_bo,
721 error->pinned_bo_count);
Chris Wilson9df30792010-02-18 10:24:56 +0000722
Chris Wilson52d39a22012-02-15 11:25:37 +0000723 for (i = 0; i < ARRAY_SIZE(error->ring); i++) {
724 struct drm_i915_error_object *obj;
Chris Wilson9df30792010-02-18 10:24:56 +0000725
Chris Wilson52d39a22012-02-15 11:25:37 +0000726 if ((obj = error->ring[i].batchbuffer)) {
Chris Wilsonbcfb2e22011-01-07 21:06:07 +0000727 seq_printf(m, "%s --- gtt_offset = 0x%08x\n",
728 dev_priv->ring[i].name,
729 obj->gtt_offset);
Chris Wilson9df30792010-02-18 10:24:56 +0000730 offset = 0;
731 for (page = 0; page < obj->page_count; page++) {
732 for (elt = 0; elt < PAGE_SIZE/4; elt++) {
733 seq_printf(m, "%08x : %08x\n", offset, obj->pages[page][elt]);
734 offset += 4;
735 }
736 }
737 }
Chris Wilson9df30792010-02-18 10:24:56 +0000738
Chris Wilson52d39a22012-02-15 11:25:37 +0000739 if (error->ring[i].num_requests) {
740 seq_printf(m, "%s --- %d requests\n",
741 dev_priv->ring[i].name,
742 error->ring[i].num_requests);
743 for (j = 0; j < error->ring[i].num_requests; j++) {
Chris Wilsonee4f42b2012-02-15 11:25:38 +0000744 seq_printf(m, " seqno 0x%08x, emitted %ld, tail 0x%08x\n",
Chris Wilson52d39a22012-02-15 11:25:37 +0000745 error->ring[i].requests[j].seqno,
Chris Wilsonee4f42b2012-02-15 11:25:38 +0000746 error->ring[i].requests[j].jiffies,
747 error->ring[i].requests[j].tail);
Chris Wilson52d39a22012-02-15 11:25:37 +0000748 }
749 }
750
751 if ((obj = error->ring[i].ringbuffer)) {
Chris Wilsone2f973d2011-01-27 19:15:11 +0000752 seq_printf(m, "%s --- ringbuffer = 0x%08x\n",
753 dev_priv->ring[i].name,
754 obj->gtt_offset);
755 offset = 0;
756 for (page = 0; page < obj->page_count; page++) {
757 for (elt = 0; elt < PAGE_SIZE/4; elt++) {
758 seq_printf(m, "%08x : %08x\n",
759 offset,
760 obj->pages[page][elt]);
761 offset += 4;
762 }
Chris Wilson9df30792010-02-18 10:24:56 +0000763 }
764 }
765 }
Jesse Barnes63eeaf32009-06-18 16:56:52 -0700766
Chris Wilson6ef3d422010-08-04 20:26:07 +0100767 if (error->overlay)
768 intel_overlay_print_error_state(m, error->overlay);
769
Chris Wilsonc4a1d9e2010-11-21 13:12:35 +0000770 if (error->display)
771 intel_display_print_error_state(m, dev, error->display);
772
Jesse Barnes63eeaf32009-06-18 16:56:52 -0700773 return 0;
774}
Ben Gamari6911a9b2009-04-02 11:24:54 -0700775
Daniel Vetterd5442302012-04-27 15:17:40 +0200776static ssize_t
777i915_error_state_write(struct file *filp,
778 const char __user *ubuf,
779 size_t cnt,
780 loff_t *ppos)
781{
782 struct seq_file *m = filp->private_data;
783 struct i915_error_state_file_priv *error_priv = m->private;
784 struct drm_device *dev = error_priv->dev;
Daniel Vetter22bcfc62012-08-09 15:07:02 +0200785 int ret;
Daniel Vetterd5442302012-04-27 15:17:40 +0200786
787 DRM_DEBUG_DRIVER("Resetting error state\n");
788
Daniel Vetter22bcfc62012-08-09 15:07:02 +0200789 ret = mutex_lock_interruptible(&dev->struct_mutex);
790 if (ret)
791 return ret;
792
Daniel Vetterd5442302012-04-27 15:17:40 +0200793 i915_destroy_error_state(dev);
794 mutex_unlock(&dev->struct_mutex);
795
796 return cnt;
797}
798
799static int i915_error_state_open(struct inode *inode, struct file *file)
800{
801 struct drm_device *dev = inode->i_private;
802 drm_i915_private_t *dev_priv = dev->dev_private;
803 struct i915_error_state_file_priv *error_priv;
804 unsigned long flags;
805
806 error_priv = kzalloc(sizeof(*error_priv), GFP_KERNEL);
807 if (!error_priv)
808 return -ENOMEM;
809
810 error_priv->dev = dev;
811
812 spin_lock_irqsave(&dev_priv->error_lock, flags);
813 error_priv->error = dev_priv->first_error;
814 if (error_priv->error)
815 kref_get(&error_priv->error->ref);
816 spin_unlock_irqrestore(&dev_priv->error_lock, flags);
817
818 return single_open(file, i915_error_state, error_priv);
819}
820
821static int i915_error_state_release(struct inode *inode, struct file *file)
822{
823 struct seq_file *m = file->private_data;
824 struct i915_error_state_file_priv *error_priv = m->private;
825
826 if (error_priv->error)
827 kref_put(&error_priv->error->ref, i915_error_state_free);
828 kfree(error_priv);
829
830 return single_release(inode, file);
831}
832
833static const struct file_operations i915_error_state_fops = {
834 .owner = THIS_MODULE,
835 .open = i915_error_state_open,
836 .read = seq_read,
837 .write = i915_error_state_write,
838 .llseek = default_llseek,
839 .release = i915_error_state_release,
840};
841
Jesse Barnesf97108d2010-01-29 11:27:07 -0800842static int i915_rstdby_delays(struct seq_file *m, void *unused)
843{
844 struct drm_info_node *node = (struct drm_info_node *) m->private;
845 struct drm_device *dev = node->minor->dev;
846 drm_i915_private_t *dev_priv = dev->dev_private;
Ben Widawsky616fdb52011-10-05 11:44:54 -0700847 u16 crstanddelay;
848 int ret;
849
850 ret = mutex_lock_interruptible(&dev->struct_mutex);
851 if (ret)
852 return ret;
853
854 crstanddelay = I915_READ16(CRSTANDVID);
855
856 mutex_unlock(&dev->struct_mutex);
Jesse Barnesf97108d2010-01-29 11:27:07 -0800857
858 seq_printf(m, "w/ctx: %d, w/o ctx: %d\n", (crstanddelay >> 8) & 0x3f, (crstanddelay & 0x3f));
859
860 return 0;
861}
862
863static int i915_cur_delayinfo(struct seq_file *m, void *unused)
864{
865 struct drm_info_node *node = (struct drm_info_node *) m->private;
866 struct drm_device *dev = node->minor->dev;
867 drm_i915_private_t *dev_priv = dev->dev_private;
Ben Widawskyd1ebd8162011-04-25 20:11:50 +0100868 int ret;
Jesse Barnesf97108d2010-01-29 11:27:07 -0800869
Jesse Barnes3b8d8d92010-12-17 14:19:02 -0800870 if (IS_GEN5(dev)) {
871 u16 rgvswctl = I915_READ16(MEMSWCTL);
872 u16 rgvstat = I915_READ16(MEMSTAT_ILK);
873
874 seq_printf(m, "Requested P-state: %d\n", (rgvswctl >> 8) & 0xf);
875 seq_printf(m, "Requested VID: %d\n", rgvswctl & 0x3f);
876 seq_printf(m, "Current VID: %d\n", (rgvstat & MEMSTAT_VID_MASK) >>
877 MEMSTAT_VID_SHIFT);
878 seq_printf(m, "Current P-state: %d\n",
879 (rgvstat & MEMSTAT_PSTATE_MASK) >> MEMSTAT_PSTATE_SHIFT);
Jesse Barnes1c70c0c2011-06-29 13:34:36 -0700880 } else if (IS_GEN6(dev) || IS_GEN7(dev)) {
Jesse Barnes3b8d8d92010-12-17 14:19:02 -0800881 u32 gt_perf_status = I915_READ(GEN6_GT_PERF_STATUS);
882 u32 rp_state_limits = I915_READ(GEN6_RP_STATE_LIMITS);
883 u32 rp_state_cap = I915_READ(GEN6_RP_STATE_CAP);
Jesse Barnesccab5c82011-01-18 15:49:25 -0800884 u32 rpstat;
885 u32 rpupei, rpcurup, rpprevup;
886 u32 rpdownei, rpcurdown, rpprevdown;
Jesse Barnes3b8d8d92010-12-17 14:19:02 -0800887 int max_freq;
888
889 /* RPSTAT1 is in the GT power well */
Ben Widawskyd1ebd8162011-04-25 20:11:50 +0100890 ret = mutex_lock_interruptible(&dev->struct_mutex);
891 if (ret)
892 return ret;
893
Ben Widawskyfcca7922011-04-25 11:23:07 -0700894 gen6_gt_force_wake_get(dev_priv);
Jesse Barnes3b8d8d92010-12-17 14:19:02 -0800895
Jesse Barnesccab5c82011-01-18 15:49:25 -0800896 rpstat = I915_READ(GEN6_RPSTAT1);
897 rpupei = I915_READ(GEN6_RP_CUR_UP_EI);
898 rpcurup = I915_READ(GEN6_RP_CUR_UP);
899 rpprevup = I915_READ(GEN6_RP_PREV_UP);
900 rpdownei = I915_READ(GEN6_RP_CUR_DOWN_EI);
901 rpcurdown = I915_READ(GEN6_RP_CUR_DOWN);
902 rpprevdown = I915_READ(GEN6_RP_PREV_DOWN);
903
Ben Widawskyd1ebd8162011-04-25 20:11:50 +0100904 gen6_gt_force_wake_put(dev_priv);
905 mutex_unlock(&dev->struct_mutex);
906
Jesse Barnes3b8d8d92010-12-17 14:19:02 -0800907 seq_printf(m, "GT_PERF_STATUS: 0x%08x\n", gt_perf_status);
Jesse Barnesccab5c82011-01-18 15:49:25 -0800908 seq_printf(m, "RPSTAT1: 0x%08x\n", rpstat);
Jesse Barnes3b8d8d92010-12-17 14:19:02 -0800909 seq_printf(m, "Render p-state ratio: %d\n",
910 (gt_perf_status & 0xff00) >> 8);
911 seq_printf(m, "Render p-state VID: %d\n",
912 gt_perf_status & 0xff);
913 seq_printf(m, "Render p-state limit: %d\n",
914 rp_state_limits & 0xff);
Jesse Barnesccab5c82011-01-18 15:49:25 -0800915 seq_printf(m, "CAGF: %dMHz\n", ((rpstat & GEN6_CAGF_MASK) >>
Ben Widawskyc8735b02012-09-07 19:43:39 -0700916 GEN6_CAGF_SHIFT) * GT_FREQUENCY_MULTIPLIER);
Jesse Barnesccab5c82011-01-18 15:49:25 -0800917 seq_printf(m, "RP CUR UP EI: %dus\n", rpupei &
918 GEN6_CURICONT_MASK);
919 seq_printf(m, "RP CUR UP: %dus\n", rpcurup &
920 GEN6_CURBSYTAVG_MASK);
921 seq_printf(m, "RP PREV UP: %dus\n", rpprevup &
922 GEN6_CURBSYTAVG_MASK);
923 seq_printf(m, "RP CUR DOWN EI: %dus\n", rpdownei &
924 GEN6_CURIAVG_MASK);
925 seq_printf(m, "RP CUR DOWN: %dus\n", rpcurdown &
926 GEN6_CURBSYTAVG_MASK);
927 seq_printf(m, "RP PREV DOWN: %dus\n", rpprevdown &
928 GEN6_CURBSYTAVG_MASK);
Jesse Barnes3b8d8d92010-12-17 14:19:02 -0800929
930 max_freq = (rp_state_cap & 0xff0000) >> 16;
931 seq_printf(m, "Lowest (RPN) frequency: %dMHz\n",
Ben Widawskyc8735b02012-09-07 19:43:39 -0700932 max_freq * GT_FREQUENCY_MULTIPLIER);
Jesse Barnes3b8d8d92010-12-17 14:19:02 -0800933
934 max_freq = (rp_state_cap & 0xff00) >> 8;
935 seq_printf(m, "Nominal (RP1) frequency: %dMHz\n",
Ben Widawskyc8735b02012-09-07 19:43:39 -0700936 max_freq * GT_FREQUENCY_MULTIPLIER);
Jesse Barnes3b8d8d92010-12-17 14:19:02 -0800937
938 max_freq = rp_state_cap & 0xff;
939 seq_printf(m, "Max non-overclocked (RP0) frequency: %dMHz\n",
Ben Widawskyc8735b02012-09-07 19:43:39 -0700940 max_freq * GT_FREQUENCY_MULTIPLIER);
Jesse Barnes3b8d8d92010-12-17 14:19:02 -0800941 } else {
942 seq_printf(m, "no P-state info available\n");
943 }
Jesse Barnesf97108d2010-01-29 11:27:07 -0800944
945 return 0;
946}
947
948static int i915_delayfreq_table(struct seq_file *m, void *unused)
949{
950 struct drm_info_node *node = (struct drm_info_node *) m->private;
951 struct drm_device *dev = node->minor->dev;
952 drm_i915_private_t *dev_priv = dev->dev_private;
953 u32 delayfreq;
Ben Widawsky616fdb52011-10-05 11:44:54 -0700954 int ret, i;
955
956 ret = mutex_lock_interruptible(&dev->struct_mutex);
957 if (ret)
958 return ret;
Jesse Barnesf97108d2010-01-29 11:27:07 -0800959
960 for (i = 0; i < 16; i++) {
961 delayfreq = I915_READ(PXVFREQ_BASE + i * 4);
Jesse Barnes7648fa92010-05-20 14:28:11 -0700962 seq_printf(m, "P%02dVIDFREQ: 0x%08x (VID: %d)\n", i, delayfreq,
963 (delayfreq & PXVFREQ_PX_MASK) >> PXVFREQ_PX_SHIFT);
Jesse Barnesf97108d2010-01-29 11:27:07 -0800964 }
965
Ben Widawsky616fdb52011-10-05 11:44:54 -0700966 mutex_unlock(&dev->struct_mutex);
967
Jesse Barnesf97108d2010-01-29 11:27:07 -0800968 return 0;
969}
970
971static inline int MAP_TO_MV(int map)
972{
973 return 1250 - (map * 25);
974}
975
976static int i915_inttoext_table(struct seq_file *m, void *unused)
977{
978 struct drm_info_node *node = (struct drm_info_node *) m->private;
979 struct drm_device *dev = node->minor->dev;
980 drm_i915_private_t *dev_priv = dev->dev_private;
981 u32 inttoext;
Ben Widawsky616fdb52011-10-05 11:44:54 -0700982 int ret, i;
983
984 ret = mutex_lock_interruptible(&dev->struct_mutex);
985 if (ret)
986 return ret;
Jesse Barnesf97108d2010-01-29 11:27:07 -0800987
988 for (i = 1; i <= 32; i++) {
989 inttoext = I915_READ(INTTOEXT_BASE_ILK + i * 4);
990 seq_printf(m, "INTTOEXT%02d: 0x%08x\n", i, inttoext);
991 }
992
Ben Widawsky616fdb52011-10-05 11:44:54 -0700993 mutex_unlock(&dev->struct_mutex);
994
Jesse Barnesf97108d2010-01-29 11:27:07 -0800995 return 0;
996}
997
Ben Widawsky4d855292011-12-12 19:34:16 -0800998static int ironlake_drpc_info(struct seq_file *m)
Jesse Barnesf97108d2010-01-29 11:27:07 -0800999{
1000 struct drm_info_node *node = (struct drm_info_node *) m->private;
1001 struct drm_device *dev = node->minor->dev;
1002 drm_i915_private_t *dev_priv = dev->dev_private;
Ben Widawsky616fdb52011-10-05 11:44:54 -07001003 u32 rgvmodectl, rstdbyctl;
1004 u16 crstandvid;
1005 int ret;
1006
1007 ret = mutex_lock_interruptible(&dev->struct_mutex);
1008 if (ret)
1009 return ret;
1010
1011 rgvmodectl = I915_READ(MEMMODECTL);
1012 rstdbyctl = I915_READ(RSTDBYCTL);
1013 crstandvid = I915_READ16(CRSTANDVID);
1014
1015 mutex_unlock(&dev->struct_mutex);
Jesse Barnesf97108d2010-01-29 11:27:07 -08001016
1017 seq_printf(m, "HD boost: %s\n", (rgvmodectl & MEMMODE_BOOST_EN) ?
1018 "yes" : "no");
1019 seq_printf(m, "Boost freq: %d\n",
1020 (rgvmodectl & MEMMODE_BOOST_FREQ_MASK) >>
1021 MEMMODE_BOOST_FREQ_SHIFT);
1022 seq_printf(m, "HW control enabled: %s\n",
1023 rgvmodectl & MEMMODE_HWIDLE_EN ? "yes" : "no");
1024 seq_printf(m, "SW control enabled: %s\n",
1025 rgvmodectl & MEMMODE_SWMODE_EN ? "yes" : "no");
1026 seq_printf(m, "Gated voltage change: %s\n",
1027 rgvmodectl & MEMMODE_RCLK_GATE ? "yes" : "no");
1028 seq_printf(m, "Starting frequency: P%d\n",
1029 (rgvmodectl & MEMMODE_FSTART_MASK) >> MEMMODE_FSTART_SHIFT);
Jesse Barnes7648fa92010-05-20 14:28:11 -07001030 seq_printf(m, "Max P-state: P%d\n",
Jesse Barnesf97108d2010-01-29 11:27:07 -08001031 (rgvmodectl & MEMMODE_FMAX_MASK) >> MEMMODE_FMAX_SHIFT);
Jesse Barnes7648fa92010-05-20 14:28:11 -07001032 seq_printf(m, "Min P-state: P%d\n", (rgvmodectl & MEMMODE_FMIN_MASK));
1033 seq_printf(m, "RS1 VID: %d\n", (crstandvid & 0x3f));
1034 seq_printf(m, "RS2 VID: %d\n", ((crstandvid >> 8) & 0x3f));
1035 seq_printf(m, "Render standby enabled: %s\n",
1036 (rstdbyctl & RCX_SW_EXIT) ? "no" : "yes");
Jesse Barnes88271da2011-01-05 12:01:24 -08001037 seq_printf(m, "Current RS state: ");
1038 switch (rstdbyctl & RSX_STATUS_MASK) {
1039 case RSX_STATUS_ON:
1040 seq_printf(m, "on\n");
1041 break;
1042 case RSX_STATUS_RC1:
1043 seq_printf(m, "RC1\n");
1044 break;
1045 case RSX_STATUS_RC1E:
1046 seq_printf(m, "RC1E\n");
1047 break;
1048 case RSX_STATUS_RS1:
1049 seq_printf(m, "RS1\n");
1050 break;
1051 case RSX_STATUS_RS2:
1052 seq_printf(m, "RS2 (RC6)\n");
1053 break;
1054 case RSX_STATUS_RS3:
1055 seq_printf(m, "RC3 (RC6+)\n");
1056 break;
1057 default:
1058 seq_printf(m, "unknown\n");
1059 break;
1060 }
Jesse Barnesf97108d2010-01-29 11:27:07 -08001061
1062 return 0;
1063}
1064
Ben Widawsky4d855292011-12-12 19:34:16 -08001065static int gen6_drpc_info(struct seq_file *m)
1066{
1067
1068 struct drm_info_node *node = (struct drm_info_node *) m->private;
1069 struct drm_device *dev = node->minor->dev;
1070 struct drm_i915_private *dev_priv = dev->dev_private;
Ben Widawskyecd8fae2012-09-26 10:34:02 -07001071 u32 rpmodectl1, gt_core_status, rcctl1, rc6vids = 0;
Daniel Vetter93b525d2012-01-25 13:52:43 +01001072 unsigned forcewake_count;
Ben Widawsky4d855292011-12-12 19:34:16 -08001073 int count=0, ret;
1074
1075
1076 ret = mutex_lock_interruptible(&dev->struct_mutex);
1077 if (ret)
1078 return ret;
1079
Daniel Vetter93b525d2012-01-25 13:52:43 +01001080 spin_lock_irq(&dev_priv->gt_lock);
1081 forcewake_count = dev_priv->forcewake_count;
1082 spin_unlock_irq(&dev_priv->gt_lock);
1083
1084 if (forcewake_count) {
1085 seq_printf(m, "RC information inaccurate because somebody "
1086 "holds a forcewake reference \n");
Ben Widawsky4d855292011-12-12 19:34:16 -08001087 } else {
1088 /* NB: we cannot use forcewake, else we read the wrong values */
1089 while (count++ < 50 && (I915_READ_NOTRACE(FORCEWAKE_ACK) & 1))
1090 udelay(10);
1091 seq_printf(m, "RC information accurate: %s\n", yesno(count < 51));
1092 }
1093
1094 gt_core_status = readl(dev_priv->regs + GEN6_GT_CORE_STATUS);
1095 trace_i915_reg_rw(false, GEN6_GT_CORE_STATUS, gt_core_status, 4);
1096
1097 rpmodectl1 = I915_READ(GEN6_RP_CONTROL);
1098 rcctl1 = I915_READ(GEN6_RC_CONTROL);
1099 mutex_unlock(&dev->struct_mutex);
Ben Widawsky44cbd332012-11-06 14:36:36 +00001100 mutex_lock(&dev_priv->rps.hw_lock);
1101 sandybridge_pcode_read(dev_priv, GEN6_PCODE_READ_RC6VIDS, &rc6vids);
1102 mutex_unlock(&dev_priv->rps.hw_lock);
Ben Widawsky4d855292011-12-12 19:34:16 -08001103
1104 seq_printf(m, "Video Turbo Mode: %s\n",
1105 yesno(rpmodectl1 & GEN6_RP_MEDIA_TURBO));
1106 seq_printf(m, "HW control enabled: %s\n",
1107 yesno(rpmodectl1 & GEN6_RP_ENABLE));
1108 seq_printf(m, "SW control enabled: %s\n",
1109 yesno((rpmodectl1 & GEN6_RP_MEDIA_MODE_MASK) ==
1110 GEN6_RP_MEDIA_SW_MODE));
Eric Anholtfff24e22012-01-23 16:14:05 -08001111 seq_printf(m, "RC1e Enabled: %s\n",
Ben Widawsky4d855292011-12-12 19:34:16 -08001112 yesno(rcctl1 & GEN6_RC_CTL_RC1e_ENABLE));
1113 seq_printf(m, "RC6 Enabled: %s\n",
1114 yesno(rcctl1 & GEN6_RC_CTL_RC6_ENABLE));
1115 seq_printf(m, "Deep RC6 Enabled: %s\n",
1116 yesno(rcctl1 & GEN6_RC_CTL_RC6p_ENABLE));
1117 seq_printf(m, "Deepest RC6 Enabled: %s\n",
1118 yesno(rcctl1 & GEN6_RC_CTL_RC6pp_ENABLE));
1119 seq_printf(m, "Current RC state: ");
1120 switch (gt_core_status & GEN6_RCn_MASK) {
1121 case GEN6_RC0:
1122 if (gt_core_status & GEN6_CORE_CPD_STATE_MASK)
1123 seq_printf(m, "Core Power Down\n");
1124 else
1125 seq_printf(m, "on\n");
1126 break;
1127 case GEN6_RC3:
1128 seq_printf(m, "RC3\n");
1129 break;
1130 case GEN6_RC6:
1131 seq_printf(m, "RC6\n");
1132 break;
1133 case GEN6_RC7:
1134 seq_printf(m, "RC7\n");
1135 break;
1136 default:
1137 seq_printf(m, "Unknown\n");
1138 break;
1139 }
1140
1141 seq_printf(m, "Core Power Down: %s\n",
1142 yesno(gt_core_status & GEN6_CORE_CPD_STATE_MASK));
Ben Widawskycce66a22012-03-27 18:59:38 -07001143
1144 /* Not exactly sure what this is */
1145 seq_printf(m, "RC6 \"Locked to RPn\" residency since boot: %u\n",
1146 I915_READ(GEN6_GT_GFX_RC6_LOCKED));
1147 seq_printf(m, "RC6 residency since boot: %u\n",
1148 I915_READ(GEN6_GT_GFX_RC6));
1149 seq_printf(m, "RC6+ residency since boot: %u\n",
1150 I915_READ(GEN6_GT_GFX_RC6p));
1151 seq_printf(m, "RC6++ residency since boot: %u\n",
1152 I915_READ(GEN6_GT_GFX_RC6pp));
1153
Ben Widawskyecd8fae2012-09-26 10:34:02 -07001154 seq_printf(m, "RC6 voltage: %dmV\n",
1155 GEN6_DECODE_RC6_VID(((rc6vids >> 0) & 0xff)));
1156 seq_printf(m, "RC6+ voltage: %dmV\n",
1157 GEN6_DECODE_RC6_VID(((rc6vids >> 8) & 0xff)));
1158 seq_printf(m, "RC6++ voltage: %dmV\n",
1159 GEN6_DECODE_RC6_VID(((rc6vids >> 16) & 0xff)));
Ben Widawsky4d855292011-12-12 19:34:16 -08001160 return 0;
1161}
1162
1163static int i915_drpc_info(struct seq_file *m, void *unused)
1164{
1165 struct drm_info_node *node = (struct drm_info_node *) m->private;
1166 struct drm_device *dev = node->minor->dev;
1167
1168 if (IS_GEN6(dev) || IS_GEN7(dev))
1169 return gen6_drpc_info(m);
1170 else
1171 return ironlake_drpc_info(m);
1172}
1173
Jesse Barnesb5e50c32010-02-05 12:42:41 -08001174static int i915_fbc_status(struct seq_file *m, void *unused)
1175{
1176 struct drm_info_node *node = (struct drm_info_node *) m->private;
1177 struct drm_device *dev = node->minor->dev;
Jesse Barnesb5e50c32010-02-05 12:42:41 -08001178 drm_i915_private_t *dev_priv = dev->dev_private;
Jesse Barnesb5e50c32010-02-05 12:42:41 -08001179
Adam Jacksonee5382a2010-04-23 11:17:39 -04001180 if (!I915_HAS_FBC(dev)) {
Jesse Barnesb5e50c32010-02-05 12:42:41 -08001181 seq_printf(m, "FBC unsupported on this chipset\n");
1182 return 0;
1183 }
1184
Adam Jacksonee5382a2010-04-23 11:17:39 -04001185 if (intel_fbc_enabled(dev)) {
Jesse Barnesb5e50c32010-02-05 12:42:41 -08001186 seq_printf(m, "FBC enabled\n");
1187 } else {
1188 seq_printf(m, "FBC disabled: ");
1189 switch (dev_priv->no_fbc_reason) {
Chris Wilsonbed4a672010-09-11 10:47:47 +01001190 case FBC_NO_OUTPUT:
1191 seq_printf(m, "no outputs");
1192 break;
Jesse Barnesb5e50c32010-02-05 12:42:41 -08001193 case FBC_STOLEN_TOO_SMALL:
1194 seq_printf(m, "not enough stolen memory");
1195 break;
1196 case FBC_UNSUPPORTED_MODE:
1197 seq_printf(m, "mode not supported");
1198 break;
1199 case FBC_MODE_TOO_LARGE:
1200 seq_printf(m, "mode too large");
1201 break;
1202 case FBC_BAD_PLANE:
1203 seq_printf(m, "FBC unsupported on plane");
1204 break;
1205 case FBC_NOT_TILED:
1206 seq_printf(m, "scanout buffer not tiled");
1207 break;
Jesse Barnes9c928d12010-07-23 15:20:00 -07001208 case FBC_MULTIPLE_PIPES:
1209 seq_printf(m, "multiple pipes are enabled");
1210 break;
Jesse Barnesc1a9f042011-05-05 15:24:21 -07001211 case FBC_MODULE_PARAM:
1212 seq_printf(m, "disabled per module param (default off)");
1213 break;
Jesse Barnesb5e50c32010-02-05 12:42:41 -08001214 default:
1215 seq_printf(m, "unknown reason");
1216 }
1217 seq_printf(m, "\n");
1218 }
1219 return 0;
1220}
1221
Jesse Barnes4a9bef32010-02-05 12:47:35 -08001222static int i915_sr_status(struct seq_file *m, void *unused)
1223{
1224 struct drm_info_node *node = (struct drm_info_node *) m->private;
1225 struct drm_device *dev = node->minor->dev;
1226 drm_i915_private_t *dev_priv = dev->dev_private;
1227 bool sr_enabled = false;
1228
Yuanhan Liu13982612010-12-15 15:42:31 +08001229 if (HAS_PCH_SPLIT(dev))
Chris Wilson5ba2aaa2010-08-19 18:04:08 +01001230 sr_enabled = I915_READ(WM1_LP_ILK) & WM1_LP_SR_EN;
Chris Wilsona6c45cf2010-09-17 00:32:17 +01001231 else if (IS_CRESTLINE(dev) || IS_I945G(dev) || IS_I945GM(dev))
Jesse Barnes4a9bef32010-02-05 12:47:35 -08001232 sr_enabled = I915_READ(FW_BLC_SELF) & FW_BLC_SELF_EN;
1233 else if (IS_I915GM(dev))
1234 sr_enabled = I915_READ(INSTPM) & INSTPM_SELF_EN;
1235 else if (IS_PINEVIEW(dev))
1236 sr_enabled = I915_READ(DSPFW3) & PINEVIEW_SELF_REFRESH_EN;
1237
Chris Wilson5ba2aaa2010-08-19 18:04:08 +01001238 seq_printf(m, "self-refresh: %s\n",
1239 sr_enabled ? "enabled" : "disabled");
Jesse Barnes4a9bef32010-02-05 12:47:35 -08001240
1241 return 0;
1242}
1243
Jesse Barnes7648fa92010-05-20 14:28:11 -07001244static int i915_emon_status(struct seq_file *m, void *unused)
1245{
1246 struct drm_info_node *node = (struct drm_info_node *) m->private;
1247 struct drm_device *dev = node->minor->dev;
1248 drm_i915_private_t *dev_priv = dev->dev_private;
1249 unsigned long temp, chipset, gfx;
Chris Wilsonde227ef2010-07-03 07:58:38 +01001250 int ret;
1251
Chris Wilson582be6b2012-04-30 19:35:02 +01001252 if (!IS_GEN5(dev))
1253 return -ENODEV;
1254
Chris Wilsonde227ef2010-07-03 07:58:38 +01001255 ret = mutex_lock_interruptible(&dev->struct_mutex);
1256 if (ret)
1257 return ret;
Jesse Barnes7648fa92010-05-20 14:28:11 -07001258
1259 temp = i915_mch_val(dev_priv);
1260 chipset = i915_chipset_val(dev_priv);
1261 gfx = i915_gfx_val(dev_priv);
Chris Wilsonde227ef2010-07-03 07:58:38 +01001262 mutex_unlock(&dev->struct_mutex);
Jesse Barnes7648fa92010-05-20 14:28:11 -07001263
1264 seq_printf(m, "GMCH temp: %ld\n", temp);
1265 seq_printf(m, "Chipset power: %ld\n", chipset);
1266 seq_printf(m, "GFX power: %ld\n", gfx);
1267 seq_printf(m, "Total power: %ld\n", chipset + gfx);
1268
1269 return 0;
1270}
1271
Jesse Barnes23b2f8b2011-06-28 13:04:16 -07001272static int i915_ring_freq_table(struct seq_file *m, void *unused)
1273{
1274 struct drm_info_node *node = (struct drm_info_node *) m->private;
1275 struct drm_device *dev = node->minor->dev;
1276 drm_i915_private_t *dev_priv = dev->dev_private;
1277 int ret;
1278 int gpu_freq, ia_freq;
1279
Jesse Barnes1c70c0c2011-06-29 13:34:36 -07001280 if (!(IS_GEN6(dev) || IS_GEN7(dev))) {
Jesse Barnes23b2f8b2011-06-28 13:04:16 -07001281 seq_printf(m, "unsupported on this chipset\n");
1282 return 0;
1283 }
1284
Jesse Barnes4fc688c2012-11-02 11:14:01 -07001285 ret = mutex_lock_interruptible(&dev_priv->rps.hw_lock);
Jesse Barnes23b2f8b2011-06-28 13:04:16 -07001286 if (ret)
1287 return ret;
1288
1289 seq_printf(m, "GPU freq (MHz)\tEffective CPU freq (MHz)\n");
1290
Daniel Vetterc6a828d2012-08-08 23:35:35 +02001291 for (gpu_freq = dev_priv->rps.min_delay;
1292 gpu_freq <= dev_priv->rps.max_delay;
Jesse Barnes23b2f8b2011-06-28 13:04:16 -07001293 gpu_freq++) {
Ben Widawsky42c05262012-09-26 10:34:00 -07001294 ia_freq = gpu_freq;
1295 sandybridge_pcode_read(dev_priv,
1296 GEN6_PCODE_READ_MIN_FREQ_TABLE,
1297 &ia_freq);
Ben Widawskyc8735b02012-09-07 19:43:39 -07001298 seq_printf(m, "%d\t\t%d\n", gpu_freq * GT_FREQUENCY_MULTIPLIER, ia_freq * 100);
Jesse Barnes23b2f8b2011-06-28 13:04:16 -07001299 }
1300
Jesse Barnes4fc688c2012-11-02 11:14:01 -07001301 mutex_unlock(&dev_priv->rps.hw_lock);
Jesse Barnes23b2f8b2011-06-28 13:04:16 -07001302
1303 return 0;
1304}
1305
Jesse Barnes7648fa92010-05-20 14:28:11 -07001306static int i915_gfxec(struct seq_file *m, void *unused)
1307{
1308 struct drm_info_node *node = (struct drm_info_node *) m->private;
1309 struct drm_device *dev = node->minor->dev;
1310 drm_i915_private_t *dev_priv = dev->dev_private;
Ben Widawsky616fdb52011-10-05 11:44:54 -07001311 int ret;
1312
1313 ret = mutex_lock_interruptible(&dev->struct_mutex);
1314 if (ret)
1315 return ret;
Jesse Barnes7648fa92010-05-20 14:28:11 -07001316
1317 seq_printf(m, "GFXEC: %ld\n", (unsigned long)I915_READ(0x112f4));
1318
Ben Widawsky616fdb52011-10-05 11:44:54 -07001319 mutex_unlock(&dev->struct_mutex);
1320
Jesse Barnes7648fa92010-05-20 14:28:11 -07001321 return 0;
1322}
1323
Chris Wilson44834a62010-08-19 16:09:23 +01001324static int i915_opregion(struct seq_file *m, void *unused)
1325{
1326 struct drm_info_node *node = (struct drm_info_node *) m->private;
1327 struct drm_device *dev = node->minor->dev;
1328 drm_i915_private_t *dev_priv = dev->dev_private;
1329 struct intel_opregion *opregion = &dev_priv->opregion;
Daniel Vetter0d38f002012-04-21 22:49:10 +02001330 void *data = kmalloc(OPREGION_SIZE, GFP_KERNEL);
Chris Wilson44834a62010-08-19 16:09:23 +01001331 int ret;
1332
Daniel Vetter0d38f002012-04-21 22:49:10 +02001333 if (data == NULL)
1334 return -ENOMEM;
1335
Chris Wilson44834a62010-08-19 16:09:23 +01001336 ret = mutex_lock_interruptible(&dev->struct_mutex);
1337 if (ret)
Daniel Vetter0d38f002012-04-21 22:49:10 +02001338 goto out;
Chris Wilson44834a62010-08-19 16:09:23 +01001339
Daniel Vetter0d38f002012-04-21 22:49:10 +02001340 if (opregion->header) {
1341 memcpy_fromio(data, opregion->header, OPREGION_SIZE);
1342 seq_write(m, data, OPREGION_SIZE);
1343 }
Chris Wilson44834a62010-08-19 16:09:23 +01001344
1345 mutex_unlock(&dev->struct_mutex);
1346
Daniel Vetter0d38f002012-04-21 22:49:10 +02001347out:
1348 kfree(data);
Chris Wilson44834a62010-08-19 16:09:23 +01001349 return 0;
1350}
1351
Chris Wilson37811fc2010-08-25 22:45:57 +01001352static int i915_gem_framebuffer_info(struct seq_file *m, void *data)
1353{
1354 struct drm_info_node *node = (struct drm_info_node *) m->private;
1355 struct drm_device *dev = node->minor->dev;
1356 drm_i915_private_t *dev_priv = dev->dev_private;
1357 struct intel_fbdev *ifbdev;
1358 struct intel_framebuffer *fb;
1359 int ret;
1360
1361 ret = mutex_lock_interruptible(&dev->mode_config.mutex);
1362 if (ret)
1363 return ret;
1364
1365 ifbdev = dev_priv->fbdev;
1366 fb = to_intel_framebuffer(ifbdev->helper.fb);
1367
1368 seq_printf(m, "fbcon size: %d x %d, depth %d, %d bpp, obj ",
1369 fb->base.width,
1370 fb->base.height,
1371 fb->base.depth,
1372 fb->base.bits_per_pixel);
Chris Wilson05394f32010-11-08 19:18:58 +00001373 describe_obj(m, fb->obj);
Chris Wilson37811fc2010-08-25 22:45:57 +01001374 seq_printf(m, "\n");
1375
1376 list_for_each_entry(fb, &dev->mode_config.fb_list, base.head) {
1377 if (&fb->base == ifbdev->helper.fb)
1378 continue;
1379
1380 seq_printf(m, "user size: %d x %d, depth %d, %d bpp, obj ",
1381 fb->base.width,
1382 fb->base.height,
1383 fb->base.depth,
1384 fb->base.bits_per_pixel);
Chris Wilson05394f32010-11-08 19:18:58 +00001385 describe_obj(m, fb->obj);
Chris Wilson37811fc2010-08-25 22:45:57 +01001386 seq_printf(m, "\n");
1387 }
1388
1389 mutex_unlock(&dev->mode_config.mutex);
1390
1391 return 0;
1392}
1393
Ben Widawskye76d3632011-03-19 18:14:29 -07001394static int i915_context_status(struct seq_file *m, void *unused)
1395{
1396 struct drm_info_node *node = (struct drm_info_node *) m->private;
1397 struct drm_device *dev = node->minor->dev;
1398 drm_i915_private_t *dev_priv = dev->dev_private;
1399 int ret;
1400
1401 ret = mutex_lock_interruptible(&dev->mode_config.mutex);
1402 if (ret)
1403 return ret;
1404
Daniel Vetter3e373942012-11-02 19:55:04 +01001405 if (dev_priv->ips.pwrctx) {
Ben Widawskydc501fb2011-06-29 11:41:51 -07001406 seq_printf(m, "power context ");
Daniel Vetter3e373942012-11-02 19:55:04 +01001407 describe_obj(m, dev_priv->ips.pwrctx);
Ben Widawskydc501fb2011-06-29 11:41:51 -07001408 seq_printf(m, "\n");
1409 }
Ben Widawskye76d3632011-03-19 18:14:29 -07001410
Daniel Vetter3e373942012-11-02 19:55:04 +01001411 if (dev_priv->ips.renderctx) {
Ben Widawskydc501fb2011-06-29 11:41:51 -07001412 seq_printf(m, "render context ");
Daniel Vetter3e373942012-11-02 19:55:04 +01001413 describe_obj(m, dev_priv->ips.renderctx);
Ben Widawskydc501fb2011-06-29 11:41:51 -07001414 seq_printf(m, "\n");
1415 }
Ben Widawskye76d3632011-03-19 18:14:29 -07001416
1417 mutex_unlock(&dev->mode_config.mutex);
1418
1419 return 0;
1420}
1421
Ben Widawsky6d794d42011-04-25 11:25:56 -07001422static int i915_gen6_forcewake_count_info(struct seq_file *m, void *data)
1423{
1424 struct drm_info_node *node = (struct drm_info_node *) m->private;
1425 struct drm_device *dev = node->minor->dev;
1426 struct drm_i915_private *dev_priv = dev->dev_private;
Daniel Vetter9f1f46a2011-12-14 13:57:03 +01001427 unsigned forcewake_count;
Ben Widawsky6d794d42011-04-25 11:25:56 -07001428
Daniel Vetter9f1f46a2011-12-14 13:57:03 +01001429 spin_lock_irq(&dev_priv->gt_lock);
1430 forcewake_count = dev_priv->forcewake_count;
1431 spin_unlock_irq(&dev_priv->gt_lock);
1432
1433 seq_printf(m, "forcewake count = %u\n", forcewake_count);
Ben Widawsky6d794d42011-04-25 11:25:56 -07001434
1435 return 0;
1436}
1437
Daniel Vetterea16a3c2011-12-14 13:57:16 +01001438static const char *swizzle_string(unsigned swizzle)
1439{
1440 switch(swizzle) {
1441 case I915_BIT_6_SWIZZLE_NONE:
1442 return "none";
1443 case I915_BIT_6_SWIZZLE_9:
1444 return "bit9";
1445 case I915_BIT_6_SWIZZLE_9_10:
1446 return "bit9/bit10";
1447 case I915_BIT_6_SWIZZLE_9_11:
1448 return "bit9/bit11";
1449 case I915_BIT_6_SWIZZLE_9_10_11:
1450 return "bit9/bit10/bit11";
1451 case I915_BIT_6_SWIZZLE_9_17:
1452 return "bit9/bit17";
1453 case I915_BIT_6_SWIZZLE_9_10_17:
1454 return "bit9/bit10/bit17";
1455 case I915_BIT_6_SWIZZLE_UNKNOWN:
1456 return "unkown";
1457 }
1458
1459 return "bug";
1460}
1461
1462static int i915_swizzle_info(struct seq_file *m, void *data)
1463{
1464 struct drm_info_node *node = (struct drm_info_node *) m->private;
1465 struct drm_device *dev = node->minor->dev;
1466 struct drm_i915_private *dev_priv = dev->dev_private;
Daniel Vetter22bcfc62012-08-09 15:07:02 +02001467 int ret;
Daniel Vetterea16a3c2011-12-14 13:57:16 +01001468
Daniel Vetter22bcfc62012-08-09 15:07:02 +02001469 ret = mutex_lock_interruptible(&dev->struct_mutex);
1470 if (ret)
1471 return ret;
1472
Daniel Vetterea16a3c2011-12-14 13:57:16 +01001473 seq_printf(m, "bit6 swizzle for X-tiling = %s\n",
1474 swizzle_string(dev_priv->mm.bit_6_swizzle_x));
1475 seq_printf(m, "bit6 swizzle for Y-tiling = %s\n",
1476 swizzle_string(dev_priv->mm.bit_6_swizzle_y));
1477
1478 if (IS_GEN3(dev) || IS_GEN4(dev)) {
1479 seq_printf(m, "DDC = 0x%08x\n",
1480 I915_READ(DCC));
1481 seq_printf(m, "C0DRB3 = 0x%04x\n",
1482 I915_READ16(C0DRB3));
1483 seq_printf(m, "C1DRB3 = 0x%04x\n",
1484 I915_READ16(C1DRB3));
Daniel Vetter3fa7d232012-01-31 16:47:56 +01001485 } else if (IS_GEN6(dev) || IS_GEN7(dev)) {
1486 seq_printf(m, "MAD_DIMM_C0 = 0x%08x\n",
1487 I915_READ(MAD_DIMM_C0));
1488 seq_printf(m, "MAD_DIMM_C1 = 0x%08x\n",
1489 I915_READ(MAD_DIMM_C1));
1490 seq_printf(m, "MAD_DIMM_C2 = 0x%08x\n",
1491 I915_READ(MAD_DIMM_C2));
1492 seq_printf(m, "TILECTL = 0x%08x\n",
1493 I915_READ(TILECTL));
1494 seq_printf(m, "ARB_MODE = 0x%08x\n",
1495 I915_READ(ARB_MODE));
1496 seq_printf(m, "DISP_ARB_CTL = 0x%08x\n",
1497 I915_READ(DISP_ARB_CTL));
Daniel Vetterea16a3c2011-12-14 13:57:16 +01001498 }
1499 mutex_unlock(&dev->struct_mutex);
1500
1501 return 0;
1502}
1503
Daniel Vetter3cf17fc2012-02-09 17:15:49 +01001504static int i915_ppgtt_info(struct seq_file *m, void *data)
1505{
1506 struct drm_info_node *node = (struct drm_info_node *) m->private;
1507 struct drm_device *dev = node->minor->dev;
1508 struct drm_i915_private *dev_priv = dev->dev_private;
1509 struct intel_ring_buffer *ring;
1510 int i, ret;
1511
1512
1513 ret = mutex_lock_interruptible(&dev->struct_mutex);
1514 if (ret)
1515 return ret;
1516 if (INTEL_INFO(dev)->gen == 6)
1517 seq_printf(m, "GFX_MODE: 0x%08x\n", I915_READ(GFX_MODE));
1518
Chris Wilsona2c7f6f2012-09-01 20:51:22 +01001519 for_each_ring(ring, dev_priv, i) {
Daniel Vetter3cf17fc2012-02-09 17:15:49 +01001520 seq_printf(m, "%s\n", ring->name);
1521 if (INTEL_INFO(dev)->gen == 7)
1522 seq_printf(m, "GFX_MODE: 0x%08x\n", I915_READ(RING_MODE_GEN7(ring)));
1523 seq_printf(m, "PP_DIR_BASE: 0x%08x\n", I915_READ(RING_PP_DIR_BASE(ring)));
1524 seq_printf(m, "PP_DIR_BASE_READ: 0x%08x\n", I915_READ(RING_PP_DIR_BASE_READ(ring)));
1525 seq_printf(m, "PP_DIR_DCLV: 0x%08x\n", I915_READ(RING_PP_DIR_DCLV(ring)));
1526 }
1527 if (dev_priv->mm.aliasing_ppgtt) {
1528 struct i915_hw_ppgtt *ppgtt = dev_priv->mm.aliasing_ppgtt;
1529
1530 seq_printf(m, "aliasing PPGTT:\n");
1531 seq_printf(m, "pd gtt offset: 0x%08x\n", ppgtt->pd_offset);
1532 }
1533 seq_printf(m, "ECOCHK: 0x%08x\n", I915_READ(GAM_ECOCHK));
1534 mutex_unlock(&dev->struct_mutex);
1535
1536 return 0;
1537}
1538
Jesse Barnes57f350b2012-03-28 13:39:25 -07001539static int i915_dpio_info(struct seq_file *m, void *data)
1540{
1541 struct drm_info_node *node = (struct drm_info_node *) m->private;
1542 struct drm_device *dev = node->minor->dev;
1543 struct drm_i915_private *dev_priv = dev->dev_private;
1544 int ret;
1545
1546
1547 if (!IS_VALLEYVIEW(dev)) {
1548 seq_printf(m, "unsupported\n");
1549 return 0;
1550 }
1551
1552 ret = mutex_lock_interruptible(&dev->mode_config.mutex);
1553 if (ret)
1554 return ret;
1555
1556 seq_printf(m, "DPIO_CTL: 0x%08x\n", I915_READ(DPIO_CTL));
1557
1558 seq_printf(m, "DPIO_DIV_A: 0x%08x\n",
1559 intel_dpio_read(dev_priv, _DPIO_DIV_A));
1560 seq_printf(m, "DPIO_DIV_B: 0x%08x\n",
1561 intel_dpio_read(dev_priv, _DPIO_DIV_B));
1562
1563 seq_printf(m, "DPIO_REFSFR_A: 0x%08x\n",
1564 intel_dpio_read(dev_priv, _DPIO_REFSFR_A));
1565 seq_printf(m, "DPIO_REFSFR_B: 0x%08x\n",
1566 intel_dpio_read(dev_priv, _DPIO_REFSFR_B));
1567
1568 seq_printf(m, "DPIO_CORE_CLK_A: 0x%08x\n",
1569 intel_dpio_read(dev_priv, _DPIO_CORE_CLK_A));
1570 seq_printf(m, "DPIO_CORE_CLK_B: 0x%08x\n",
1571 intel_dpio_read(dev_priv, _DPIO_CORE_CLK_B));
1572
1573 seq_printf(m, "DPIO_LFP_COEFF_A: 0x%08x\n",
1574 intel_dpio_read(dev_priv, _DPIO_LFP_COEFF_A));
1575 seq_printf(m, "DPIO_LFP_COEFF_B: 0x%08x\n",
1576 intel_dpio_read(dev_priv, _DPIO_LFP_COEFF_B));
1577
1578 seq_printf(m, "DPIO_FASTCLK_DISABLE: 0x%08x\n",
1579 intel_dpio_read(dev_priv, DPIO_FASTCLK_DISABLE));
1580
1581 mutex_unlock(&dev->mode_config.mutex);
1582
1583 return 0;
1584}
1585
Chris Wilsonf3cd4742009-10-13 22:20:20 +01001586static ssize_t
1587i915_wedged_read(struct file *filp,
1588 char __user *ubuf,
1589 size_t max,
1590 loff_t *ppos)
1591{
1592 struct drm_device *dev = filp->private_data;
1593 drm_i915_private_t *dev_priv = dev->dev_private;
1594 char buf[80];
1595 int len;
1596
Akshay Joshi0206e352011-08-16 15:34:10 -04001597 len = snprintf(buf, sizeof(buf),
Chris Wilsonf3cd4742009-10-13 22:20:20 +01001598 "wedged : %d\n",
1599 atomic_read(&dev_priv->mm.wedged));
1600
Akshay Joshi0206e352011-08-16 15:34:10 -04001601 if (len > sizeof(buf))
1602 len = sizeof(buf);
Dan Carpenterf4433a82010-09-08 21:44:47 +02001603
Chris Wilsonf3cd4742009-10-13 22:20:20 +01001604 return simple_read_from_buffer(ubuf, max, ppos, buf, len);
1605}
1606
1607static ssize_t
1608i915_wedged_write(struct file *filp,
1609 const char __user *ubuf,
1610 size_t cnt,
1611 loff_t *ppos)
1612{
1613 struct drm_device *dev = filp->private_data;
Chris Wilsonf3cd4742009-10-13 22:20:20 +01001614 char buf[20];
1615 int val = 1;
1616
1617 if (cnt > 0) {
Akshay Joshi0206e352011-08-16 15:34:10 -04001618 if (cnt > sizeof(buf) - 1)
Chris Wilsonf3cd4742009-10-13 22:20:20 +01001619 return -EINVAL;
1620
1621 if (copy_from_user(buf, ubuf, cnt))
1622 return -EFAULT;
1623 buf[cnt] = 0;
1624
1625 val = simple_strtoul(buf, NULL, 0);
1626 }
1627
1628 DRM_INFO("Manually setting wedged to %d\n", val);
Chris Wilson527f9e92010-11-11 01:16:58 +00001629 i915_handle_error(dev, val);
Chris Wilsonf3cd4742009-10-13 22:20:20 +01001630
1631 return cnt;
1632}
1633
1634static const struct file_operations i915_wedged_fops = {
1635 .owner = THIS_MODULE,
Stephen Boyd234e3402012-04-05 14:25:11 -07001636 .open = simple_open,
Chris Wilsonf3cd4742009-10-13 22:20:20 +01001637 .read = i915_wedged_read,
1638 .write = i915_wedged_write,
Arnd Bergmann6038f372010-08-15 18:52:59 +02001639 .llseek = default_llseek,
Chris Wilsonf3cd4742009-10-13 22:20:20 +01001640};
1641
Jesse Barnes358733e2011-07-27 11:53:01 -07001642static ssize_t
Daniel Vettere5eb3d62012-05-03 14:48:16 +02001643i915_ring_stop_read(struct file *filp,
1644 char __user *ubuf,
1645 size_t max,
1646 loff_t *ppos)
1647{
1648 struct drm_device *dev = filp->private_data;
1649 drm_i915_private_t *dev_priv = dev->dev_private;
1650 char buf[20];
1651 int len;
1652
1653 len = snprintf(buf, sizeof(buf),
1654 "0x%08x\n", dev_priv->stop_rings);
1655
1656 if (len > sizeof(buf))
1657 len = sizeof(buf);
1658
1659 return simple_read_from_buffer(ubuf, max, ppos, buf, len);
1660}
1661
1662static ssize_t
1663i915_ring_stop_write(struct file *filp,
1664 const char __user *ubuf,
1665 size_t cnt,
1666 loff_t *ppos)
1667{
1668 struct drm_device *dev = filp->private_data;
1669 struct drm_i915_private *dev_priv = dev->dev_private;
1670 char buf[20];
Daniel Vetter22bcfc62012-08-09 15:07:02 +02001671 int val = 0, ret;
Daniel Vettere5eb3d62012-05-03 14:48:16 +02001672
1673 if (cnt > 0) {
1674 if (cnt > sizeof(buf) - 1)
1675 return -EINVAL;
1676
1677 if (copy_from_user(buf, ubuf, cnt))
1678 return -EFAULT;
1679 buf[cnt] = 0;
1680
1681 val = simple_strtoul(buf, NULL, 0);
1682 }
1683
1684 DRM_DEBUG_DRIVER("Stopping rings 0x%08x\n", val);
1685
Daniel Vetter22bcfc62012-08-09 15:07:02 +02001686 ret = mutex_lock_interruptible(&dev->struct_mutex);
1687 if (ret)
1688 return ret;
1689
Daniel Vettere5eb3d62012-05-03 14:48:16 +02001690 dev_priv->stop_rings = val;
1691 mutex_unlock(&dev->struct_mutex);
1692
1693 return cnt;
1694}
1695
1696static const struct file_operations i915_ring_stop_fops = {
1697 .owner = THIS_MODULE,
1698 .open = simple_open,
1699 .read = i915_ring_stop_read,
1700 .write = i915_ring_stop_write,
1701 .llseek = default_llseek,
1702};
Daniel Vetterd5442302012-04-27 15:17:40 +02001703
Daniel Vettere5eb3d62012-05-03 14:48:16 +02001704static ssize_t
Jesse Barnes358733e2011-07-27 11:53:01 -07001705i915_max_freq_read(struct file *filp,
1706 char __user *ubuf,
1707 size_t max,
1708 loff_t *ppos)
1709{
1710 struct drm_device *dev = filp->private_data;
1711 drm_i915_private_t *dev_priv = dev->dev_private;
1712 char buf[80];
Daniel Vetter004777c2012-08-09 15:07:01 +02001713 int len, ret;
1714
1715 if (!(IS_GEN6(dev) || IS_GEN7(dev)))
1716 return -ENODEV;
1717
Jesse Barnes4fc688c2012-11-02 11:14:01 -07001718 ret = mutex_lock_interruptible(&dev_priv->rps.hw_lock);
Daniel Vetter004777c2012-08-09 15:07:01 +02001719 if (ret)
1720 return ret;
Jesse Barnes358733e2011-07-27 11:53:01 -07001721
Akshay Joshi0206e352011-08-16 15:34:10 -04001722 len = snprintf(buf, sizeof(buf),
Ben Widawskyc8735b02012-09-07 19:43:39 -07001723 "max freq: %d\n", dev_priv->rps.max_delay * GT_FREQUENCY_MULTIPLIER);
Jesse Barnes4fc688c2012-11-02 11:14:01 -07001724 mutex_unlock(&dev_priv->rps.hw_lock);
Jesse Barnes358733e2011-07-27 11:53:01 -07001725
Akshay Joshi0206e352011-08-16 15:34:10 -04001726 if (len > sizeof(buf))
1727 len = sizeof(buf);
Jesse Barnes358733e2011-07-27 11:53:01 -07001728
1729 return simple_read_from_buffer(ubuf, max, ppos, buf, len);
1730}
1731
1732static ssize_t
1733i915_max_freq_write(struct file *filp,
1734 const char __user *ubuf,
1735 size_t cnt,
1736 loff_t *ppos)
1737{
1738 struct drm_device *dev = filp->private_data;
1739 struct drm_i915_private *dev_priv = dev->dev_private;
1740 char buf[20];
Daniel Vetter004777c2012-08-09 15:07:01 +02001741 int val = 1, ret;
1742
1743 if (!(IS_GEN6(dev) || IS_GEN7(dev)))
1744 return -ENODEV;
Jesse Barnes358733e2011-07-27 11:53:01 -07001745
1746 if (cnt > 0) {
Akshay Joshi0206e352011-08-16 15:34:10 -04001747 if (cnt > sizeof(buf) - 1)
Jesse Barnes358733e2011-07-27 11:53:01 -07001748 return -EINVAL;
1749
1750 if (copy_from_user(buf, ubuf, cnt))
1751 return -EFAULT;
1752 buf[cnt] = 0;
1753
1754 val = simple_strtoul(buf, NULL, 0);
1755 }
1756
1757 DRM_DEBUG_DRIVER("Manually setting max freq to %d\n", val);
1758
Jesse Barnes4fc688c2012-11-02 11:14:01 -07001759 ret = mutex_lock_interruptible(&dev_priv->rps.hw_lock);
Daniel Vetter004777c2012-08-09 15:07:01 +02001760 if (ret)
1761 return ret;
1762
Jesse Barnes358733e2011-07-27 11:53:01 -07001763 /*
1764 * Turbo will still be enabled, but won't go above the set value.
1765 */
Ben Widawskyc8735b02012-09-07 19:43:39 -07001766 dev_priv->rps.max_delay = val / GT_FREQUENCY_MULTIPLIER;
Jesse Barnes358733e2011-07-27 11:53:01 -07001767
Ben Widawskyc8735b02012-09-07 19:43:39 -07001768 gen6_set_rps(dev, val / GT_FREQUENCY_MULTIPLIER);
Jesse Barnes4fc688c2012-11-02 11:14:01 -07001769 mutex_unlock(&dev_priv->rps.hw_lock);
Jesse Barnes358733e2011-07-27 11:53:01 -07001770
1771 return cnt;
1772}
1773
1774static const struct file_operations i915_max_freq_fops = {
1775 .owner = THIS_MODULE,
Stephen Boyd234e3402012-04-05 14:25:11 -07001776 .open = simple_open,
Jesse Barnes358733e2011-07-27 11:53:01 -07001777 .read = i915_max_freq_read,
1778 .write = i915_max_freq_write,
1779 .llseek = default_llseek,
1780};
1781
Jesse Barnes07b7ddd2011-08-03 11:28:44 -07001782static ssize_t
Jesse Barnes1523c312012-05-25 12:34:54 -07001783i915_min_freq_read(struct file *filp, char __user *ubuf, size_t max,
1784 loff_t *ppos)
1785{
1786 struct drm_device *dev = filp->private_data;
1787 drm_i915_private_t *dev_priv = dev->dev_private;
1788 char buf[80];
Daniel Vetter004777c2012-08-09 15:07:01 +02001789 int len, ret;
1790
1791 if (!(IS_GEN6(dev) || IS_GEN7(dev)))
1792 return -ENODEV;
1793
Jesse Barnes4fc688c2012-11-02 11:14:01 -07001794 ret = mutex_lock_interruptible(&dev_priv->rps.hw_lock);
Daniel Vetter004777c2012-08-09 15:07:01 +02001795 if (ret)
1796 return ret;
Jesse Barnes1523c312012-05-25 12:34:54 -07001797
1798 len = snprintf(buf, sizeof(buf),
Ben Widawskyc8735b02012-09-07 19:43:39 -07001799 "min freq: %d\n", dev_priv->rps.min_delay * GT_FREQUENCY_MULTIPLIER);
Jesse Barnes4fc688c2012-11-02 11:14:01 -07001800 mutex_unlock(&dev_priv->rps.hw_lock);
Jesse Barnes1523c312012-05-25 12:34:54 -07001801
1802 if (len > sizeof(buf))
1803 len = sizeof(buf);
1804
1805 return simple_read_from_buffer(ubuf, max, ppos, buf, len);
1806}
1807
1808static ssize_t
1809i915_min_freq_write(struct file *filp, const char __user *ubuf, size_t cnt,
1810 loff_t *ppos)
1811{
1812 struct drm_device *dev = filp->private_data;
1813 struct drm_i915_private *dev_priv = dev->dev_private;
1814 char buf[20];
Daniel Vetter004777c2012-08-09 15:07:01 +02001815 int val = 1, ret;
1816
1817 if (!(IS_GEN6(dev) || IS_GEN7(dev)))
1818 return -ENODEV;
Jesse Barnes1523c312012-05-25 12:34:54 -07001819
1820 if (cnt > 0) {
1821 if (cnt > sizeof(buf) - 1)
1822 return -EINVAL;
1823
1824 if (copy_from_user(buf, ubuf, cnt))
1825 return -EFAULT;
1826 buf[cnt] = 0;
1827
1828 val = simple_strtoul(buf, NULL, 0);
1829 }
1830
1831 DRM_DEBUG_DRIVER("Manually setting min freq to %d\n", val);
1832
Jesse Barnes4fc688c2012-11-02 11:14:01 -07001833 ret = mutex_lock_interruptible(&dev_priv->rps.hw_lock);
Daniel Vetter004777c2012-08-09 15:07:01 +02001834 if (ret)
1835 return ret;
1836
Jesse Barnes1523c312012-05-25 12:34:54 -07001837 /*
1838 * Turbo will still be enabled, but won't go below the set value.
1839 */
Ben Widawskyc8735b02012-09-07 19:43:39 -07001840 dev_priv->rps.min_delay = val / GT_FREQUENCY_MULTIPLIER;
Jesse Barnes1523c312012-05-25 12:34:54 -07001841
Ben Widawskyc8735b02012-09-07 19:43:39 -07001842 gen6_set_rps(dev, val / GT_FREQUENCY_MULTIPLIER);
Jesse Barnes4fc688c2012-11-02 11:14:01 -07001843 mutex_unlock(&dev_priv->rps.hw_lock);
Jesse Barnes1523c312012-05-25 12:34:54 -07001844
1845 return cnt;
1846}
1847
1848static const struct file_operations i915_min_freq_fops = {
1849 .owner = THIS_MODULE,
1850 .open = simple_open,
1851 .read = i915_min_freq_read,
1852 .write = i915_min_freq_write,
1853 .llseek = default_llseek,
1854};
1855
1856static ssize_t
Jesse Barnes07b7ddd2011-08-03 11:28:44 -07001857i915_cache_sharing_read(struct file *filp,
1858 char __user *ubuf,
1859 size_t max,
1860 loff_t *ppos)
1861{
1862 struct drm_device *dev = filp->private_data;
1863 drm_i915_private_t *dev_priv = dev->dev_private;
1864 char buf[80];
1865 u32 snpcr;
Daniel Vetter22bcfc62012-08-09 15:07:02 +02001866 int len, ret;
Jesse Barnes07b7ddd2011-08-03 11:28:44 -07001867
Daniel Vetter004777c2012-08-09 15:07:01 +02001868 if (!(IS_GEN6(dev) || IS_GEN7(dev)))
1869 return -ENODEV;
1870
Daniel Vetter22bcfc62012-08-09 15:07:02 +02001871 ret = mutex_lock_interruptible(&dev->struct_mutex);
1872 if (ret)
1873 return ret;
1874
Jesse Barnes07b7ddd2011-08-03 11:28:44 -07001875 snpcr = I915_READ(GEN6_MBCUNIT_SNPCR);
1876 mutex_unlock(&dev_priv->dev->struct_mutex);
1877
Akshay Joshi0206e352011-08-16 15:34:10 -04001878 len = snprintf(buf, sizeof(buf),
Jesse Barnes07b7ddd2011-08-03 11:28:44 -07001879 "%d\n", (snpcr & GEN6_MBC_SNPCR_MASK) >>
1880 GEN6_MBC_SNPCR_SHIFT);
1881
Akshay Joshi0206e352011-08-16 15:34:10 -04001882 if (len > sizeof(buf))
1883 len = sizeof(buf);
Jesse Barnes07b7ddd2011-08-03 11:28:44 -07001884
1885 return simple_read_from_buffer(ubuf, max, ppos, buf, len);
1886}
1887
1888static ssize_t
1889i915_cache_sharing_write(struct file *filp,
1890 const char __user *ubuf,
1891 size_t cnt,
1892 loff_t *ppos)
1893{
1894 struct drm_device *dev = filp->private_data;
1895 struct drm_i915_private *dev_priv = dev->dev_private;
1896 char buf[20];
1897 u32 snpcr;
1898 int val = 1;
1899
Daniel Vetter004777c2012-08-09 15:07:01 +02001900 if (!(IS_GEN6(dev) || IS_GEN7(dev)))
1901 return -ENODEV;
1902
Jesse Barnes07b7ddd2011-08-03 11:28:44 -07001903 if (cnt > 0) {
Akshay Joshi0206e352011-08-16 15:34:10 -04001904 if (cnt > sizeof(buf) - 1)
Jesse Barnes07b7ddd2011-08-03 11:28:44 -07001905 return -EINVAL;
1906
1907 if (copy_from_user(buf, ubuf, cnt))
1908 return -EFAULT;
1909 buf[cnt] = 0;
1910
1911 val = simple_strtoul(buf, NULL, 0);
1912 }
1913
1914 if (val < 0 || val > 3)
1915 return -EINVAL;
1916
1917 DRM_DEBUG_DRIVER("Manually setting uncore sharing to %d\n", val);
1918
1919 /* Update the cache sharing policy here as well */
1920 snpcr = I915_READ(GEN6_MBCUNIT_SNPCR);
1921 snpcr &= ~GEN6_MBC_SNPCR_MASK;
1922 snpcr |= (val << GEN6_MBC_SNPCR_SHIFT);
1923 I915_WRITE(GEN6_MBCUNIT_SNPCR, snpcr);
1924
1925 return cnt;
1926}
1927
1928static const struct file_operations i915_cache_sharing_fops = {
1929 .owner = THIS_MODULE,
Stephen Boyd234e3402012-04-05 14:25:11 -07001930 .open = simple_open,
Jesse Barnes07b7ddd2011-08-03 11:28:44 -07001931 .read = i915_cache_sharing_read,
1932 .write = i915_cache_sharing_write,
1933 .llseek = default_llseek,
1934};
1935
Chris Wilsonf3cd4742009-10-13 22:20:20 +01001936/* As the drm_debugfs_init() routines are called before dev->dev_private is
1937 * allocated we need to hook into the minor for release. */
1938static int
1939drm_add_fake_info_node(struct drm_minor *minor,
1940 struct dentry *ent,
1941 const void *key)
1942{
1943 struct drm_info_node *node;
1944
1945 node = kmalloc(sizeof(struct drm_info_node), GFP_KERNEL);
1946 if (node == NULL) {
1947 debugfs_remove(ent);
1948 return -ENOMEM;
1949 }
1950
1951 node->minor = minor;
1952 node->dent = ent;
1953 node->info_ent = (void *) key;
Marcin Slusarzb3e067c2011-11-09 22:20:35 +01001954
1955 mutex_lock(&minor->debugfs_lock);
1956 list_add(&node->list, &minor->debugfs_list);
1957 mutex_unlock(&minor->debugfs_lock);
Chris Wilsonf3cd4742009-10-13 22:20:20 +01001958
1959 return 0;
1960}
1961
Ben Widawsky6d794d42011-04-25 11:25:56 -07001962static int i915_forcewake_open(struct inode *inode, struct file *file)
1963{
1964 struct drm_device *dev = inode->i_private;
1965 struct drm_i915_private *dev_priv = dev->dev_private;
Ben Widawsky6d794d42011-04-25 11:25:56 -07001966
Daniel Vetter075edca2012-01-24 09:44:28 +01001967 if (INTEL_INFO(dev)->gen < 6)
Ben Widawsky6d794d42011-04-25 11:25:56 -07001968 return 0;
1969
Ben Widawsky6d794d42011-04-25 11:25:56 -07001970 gen6_gt_force_wake_get(dev_priv);
Ben Widawsky6d794d42011-04-25 11:25:56 -07001971
1972 return 0;
1973}
1974
Ben Widawskyc43b5632012-04-16 14:07:40 -07001975static int i915_forcewake_release(struct inode *inode, struct file *file)
Ben Widawsky6d794d42011-04-25 11:25:56 -07001976{
1977 struct drm_device *dev = inode->i_private;
1978 struct drm_i915_private *dev_priv = dev->dev_private;
1979
Daniel Vetter075edca2012-01-24 09:44:28 +01001980 if (INTEL_INFO(dev)->gen < 6)
Ben Widawsky6d794d42011-04-25 11:25:56 -07001981 return 0;
1982
Ben Widawsky6d794d42011-04-25 11:25:56 -07001983 gen6_gt_force_wake_put(dev_priv);
Ben Widawsky6d794d42011-04-25 11:25:56 -07001984
1985 return 0;
1986}
1987
1988static const struct file_operations i915_forcewake_fops = {
1989 .owner = THIS_MODULE,
1990 .open = i915_forcewake_open,
1991 .release = i915_forcewake_release,
1992};
1993
1994static int i915_forcewake_create(struct dentry *root, struct drm_minor *minor)
1995{
1996 struct drm_device *dev = minor->dev;
1997 struct dentry *ent;
1998
1999 ent = debugfs_create_file("i915_forcewake_user",
Ben Widawsky8eb57292011-05-11 15:10:58 -07002000 S_IRUSR,
Ben Widawsky6d794d42011-04-25 11:25:56 -07002001 root, dev,
2002 &i915_forcewake_fops);
2003 if (IS_ERR(ent))
2004 return PTR_ERR(ent);
2005
Ben Widawsky8eb57292011-05-11 15:10:58 -07002006 return drm_add_fake_info_node(minor, ent, &i915_forcewake_fops);
Ben Widawsky6d794d42011-04-25 11:25:56 -07002007}
2008
Daniel Vetter6a9c3082011-12-14 13:57:11 +01002009static int i915_debugfs_create(struct dentry *root,
2010 struct drm_minor *minor,
2011 const char *name,
2012 const struct file_operations *fops)
Jesse Barnes358733e2011-07-27 11:53:01 -07002013{
2014 struct drm_device *dev = minor->dev;
2015 struct dentry *ent;
2016
Daniel Vetter6a9c3082011-12-14 13:57:11 +01002017 ent = debugfs_create_file(name,
Jesse Barnes358733e2011-07-27 11:53:01 -07002018 S_IRUGO | S_IWUSR,
2019 root, dev,
Daniel Vetter6a9c3082011-12-14 13:57:11 +01002020 fops);
Jesse Barnes358733e2011-07-27 11:53:01 -07002021 if (IS_ERR(ent))
2022 return PTR_ERR(ent);
2023
Daniel Vetter6a9c3082011-12-14 13:57:11 +01002024 return drm_add_fake_info_node(minor, ent, fops);
Jesse Barnes07b7ddd2011-08-03 11:28:44 -07002025}
2026
Ben Gamari27c202a2009-07-01 22:26:52 -04002027static struct drm_info_list i915_debugfs_list[] = {
Chris Wilson311bd682011-01-13 19:06:50 +00002028 {"i915_capabilities", i915_capabilities, 0},
Chris Wilson73aa8082010-09-30 11:46:12 +01002029 {"i915_gem_objects", i915_gem_object_info, 0},
Chris Wilson08c18322011-01-10 00:00:24 +00002030 {"i915_gem_gtt", i915_gem_gtt_info, 0},
Chris Wilson1b502472012-04-24 15:47:30 +01002031 {"i915_gem_pinned", i915_gem_gtt_info, 0, (void *) PINNED_LIST},
Ben Gamari433e12f2009-02-17 20:08:51 -05002032 {"i915_gem_active", i915_gem_object_list_info, 0, (void *) ACTIVE_LIST},
Ben Gamari433e12f2009-02-17 20:08:51 -05002033 {"i915_gem_inactive", i915_gem_object_list_info, 0, (void *) INACTIVE_LIST},
Simon Farnsworth4e5359c2010-09-01 17:47:52 +01002034 {"i915_gem_pageflip", i915_gem_pageflip_info, 0},
Ben Gamari20172632009-02-17 20:08:50 -05002035 {"i915_gem_request", i915_gem_request_info, 0},
2036 {"i915_gem_seqno", i915_gem_seqno_info, 0},
Chris Wilsona6172a82009-02-11 14:26:38 +00002037 {"i915_gem_fence_regs", i915_gem_fence_regs_info, 0},
Ben Gamari20172632009-02-17 20:08:50 -05002038 {"i915_gem_interrupt", i915_interrupt_info, 0},
Chris Wilson1ec14ad2010-12-04 11:30:53 +00002039 {"i915_gem_hws", i915_hws_info, 0, (void *)RCS},
2040 {"i915_gem_hws_blt", i915_hws_info, 0, (void *)BCS},
2041 {"i915_gem_hws_bsd", i915_hws_info, 0, (void *)VCS},
Jesse Barnesf97108d2010-01-29 11:27:07 -08002042 {"i915_rstdby_delays", i915_rstdby_delays, 0},
2043 {"i915_cur_delayinfo", i915_cur_delayinfo, 0},
2044 {"i915_delayfreq_table", i915_delayfreq_table, 0},
2045 {"i915_inttoext_table", i915_inttoext_table, 0},
2046 {"i915_drpc_info", i915_drpc_info, 0},
Jesse Barnes7648fa92010-05-20 14:28:11 -07002047 {"i915_emon_status", i915_emon_status, 0},
Jesse Barnes23b2f8b2011-06-28 13:04:16 -07002048 {"i915_ring_freq_table", i915_ring_freq_table, 0},
Jesse Barnes7648fa92010-05-20 14:28:11 -07002049 {"i915_gfxec", i915_gfxec, 0},
Jesse Barnesb5e50c32010-02-05 12:42:41 -08002050 {"i915_fbc_status", i915_fbc_status, 0},
Jesse Barnes4a9bef32010-02-05 12:47:35 -08002051 {"i915_sr_status", i915_sr_status, 0},
Chris Wilson44834a62010-08-19 16:09:23 +01002052 {"i915_opregion", i915_opregion, 0},
Chris Wilson37811fc2010-08-25 22:45:57 +01002053 {"i915_gem_framebuffer", i915_gem_framebuffer_info, 0},
Ben Widawskye76d3632011-03-19 18:14:29 -07002054 {"i915_context_status", i915_context_status, 0},
Ben Widawsky6d794d42011-04-25 11:25:56 -07002055 {"i915_gen6_forcewake_count", i915_gen6_forcewake_count_info, 0},
Daniel Vetterea16a3c2011-12-14 13:57:16 +01002056 {"i915_swizzle_info", i915_swizzle_info, 0},
Daniel Vetter3cf17fc2012-02-09 17:15:49 +01002057 {"i915_ppgtt_info", i915_ppgtt_info, 0},
Jesse Barnes57f350b2012-03-28 13:39:25 -07002058 {"i915_dpio", i915_dpio_info, 0},
Ben Gamari20172632009-02-17 20:08:50 -05002059};
Ben Gamari27c202a2009-07-01 22:26:52 -04002060#define I915_DEBUGFS_ENTRIES ARRAY_SIZE(i915_debugfs_list)
Ben Gamari20172632009-02-17 20:08:50 -05002061
Ben Gamari27c202a2009-07-01 22:26:52 -04002062int i915_debugfs_init(struct drm_minor *minor)
Ben Gamari20172632009-02-17 20:08:50 -05002063{
Chris Wilsonf3cd4742009-10-13 22:20:20 +01002064 int ret;
2065
Daniel Vetter6a9c3082011-12-14 13:57:11 +01002066 ret = i915_debugfs_create(minor->debugfs_root, minor,
2067 "i915_wedged",
2068 &i915_wedged_fops);
Chris Wilsonf3cd4742009-10-13 22:20:20 +01002069 if (ret)
2070 return ret;
2071
Ben Widawsky6d794d42011-04-25 11:25:56 -07002072 ret = i915_forcewake_create(minor->debugfs_root, minor);
2073 if (ret)
2074 return ret;
Daniel Vetter6a9c3082011-12-14 13:57:11 +01002075
2076 ret = i915_debugfs_create(minor->debugfs_root, minor,
2077 "i915_max_freq",
2078 &i915_max_freq_fops);
Jesse Barnes358733e2011-07-27 11:53:01 -07002079 if (ret)
2080 return ret;
Daniel Vetter6a9c3082011-12-14 13:57:11 +01002081
2082 ret = i915_debugfs_create(minor->debugfs_root, minor,
Jesse Barnes1523c312012-05-25 12:34:54 -07002083 "i915_min_freq",
2084 &i915_min_freq_fops);
2085 if (ret)
2086 return ret;
2087
2088 ret = i915_debugfs_create(minor->debugfs_root, minor,
Daniel Vetter6a9c3082011-12-14 13:57:11 +01002089 "i915_cache_sharing",
2090 &i915_cache_sharing_fops);
Jesse Barnes07b7ddd2011-08-03 11:28:44 -07002091 if (ret)
2092 return ret;
Daniel Vetter004777c2012-08-09 15:07:01 +02002093
Daniel Vettere5eb3d62012-05-03 14:48:16 +02002094 ret = i915_debugfs_create(minor->debugfs_root, minor,
2095 "i915_ring_stop",
2096 &i915_ring_stop_fops);
2097 if (ret)
2098 return ret;
Ben Widawsky6d794d42011-04-25 11:25:56 -07002099
Daniel Vetterd5442302012-04-27 15:17:40 +02002100 ret = i915_debugfs_create(minor->debugfs_root, minor,
2101 "i915_error_state",
2102 &i915_error_state_fops);
2103 if (ret)
2104 return ret;
2105
Ben Gamari27c202a2009-07-01 22:26:52 -04002106 return drm_debugfs_create_files(i915_debugfs_list,
2107 I915_DEBUGFS_ENTRIES,
Ben Gamari20172632009-02-17 20:08:50 -05002108 minor->debugfs_root, minor);
2109}
2110
Ben Gamari27c202a2009-07-01 22:26:52 -04002111void i915_debugfs_cleanup(struct drm_minor *minor)
Ben Gamari20172632009-02-17 20:08:50 -05002112{
Ben Gamari27c202a2009-07-01 22:26:52 -04002113 drm_debugfs_remove_files(i915_debugfs_list,
2114 I915_DEBUGFS_ENTRIES, minor);
Ben Widawsky6d794d42011-04-25 11:25:56 -07002115 drm_debugfs_remove_files((struct drm_info_list *) &i915_forcewake_fops,
2116 1, minor);
Kristian Høgsberg33db6792009-11-11 12:19:16 -05002117 drm_debugfs_remove_files((struct drm_info_list *) &i915_wedged_fops,
2118 1, minor);
Jesse Barnes358733e2011-07-27 11:53:01 -07002119 drm_debugfs_remove_files((struct drm_info_list *) &i915_max_freq_fops,
2120 1, minor);
Jesse Barnes1523c312012-05-25 12:34:54 -07002121 drm_debugfs_remove_files((struct drm_info_list *) &i915_min_freq_fops,
2122 1, minor);
Jesse Barnes07b7ddd2011-08-03 11:28:44 -07002123 drm_debugfs_remove_files((struct drm_info_list *) &i915_cache_sharing_fops,
2124 1, minor);
Daniel Vettere5eb3d62012-05-03 14:48:16 +02002125 drm_debugfs_remove_files((struct drm_info_list *) &i915_ring_stop_fops,
2126 1, minor);
Daniel Vetter6bd459d2012-05-21 19:56:52 +02002127 drm_debugfs_remove_files((struct drm_info_list *) &i915_error_state_fops,
2128 1, minor);
Ben Gamari20172632009-02-17 20:08:50 -05002129}
2130
2131#endif /* CONFIG_DEBUG_FS */