blob: 4f799e567fc870502ae147f3c26c5bb402315a9d [file] [log] [blame]
Linus Torvalds1da177e2005-04-16 15:20:36 -07001config ARM
2 bool
3 default y
Catalin Marinas74634492012-07-30 14:41:09 -07004 select ARCH_HAS_ATOMIC64_DEC_IF_POSITIVE
Dan Williams21266be2015-11-19 18:19:29 -08005 select ARCH_HAS_DEVMEM_IS_ALLOWED
Kees Cook2b68f6c2015-04-14 15:48:00 -07006 select ARCH_HAS_ELF_RANDOMIZE
Mark Rutland3d067702012-10-30 12:13:42 +00007 select ARCH_HAS_TICK_BROADCAST if GENERIC_CLOCKEVENTS_BROADCAST
Russell King171b3f02013-09-12 21:24:42 +01008 select ARCH_HAVE_CUSTOM_GPIO_H
Riku Voipio957e3fa2014-12-12 16:57:44 -08009 select ARCH_HAS_GCOV_PROFILE_ALL
Mark Salterd7018842013-10-07 22:07:58 -040010 select ARCH_MIGHT_HAVE_PC_PARPORT
Peter Zijlstra4badad32014-06-06 19:53:16 +020011 select ARCH_SUPPORTS_ATOMIC_RMW
Kim Phillips017f1612013-11-06 05:15:24 +010012 select ARCH_USE_BUILTIN_BSWAP
Will Deacon0cbad9c2013-10-09 17:19:22 +010013 select ARCH_USE_CMPXCHG_LOCKREF
Russell Kingb1b3f492012-10-06 17:12:25 +010014 select ARCH_WANT_IPC_PARSE_VERSION
Stephen Boydee951c62012-10-29 19:19:34 +010015 select BUILDTIME_EXTABLE_SORT if MMU
Russell King171b3f02013-09-12 21:24:42 +010016 select CLONE_BACKWARDS
Russell Kingb1b3f492012-10-06 17:12:25 +010017 select CPU_PM if (SUSPEND || CPU_IDLE)
Will Deacondce5c9e2013-12-17 19:50:16 +010018 select DCACHE_WORD_ACCESS if HAVE_EFFICIENT_UNALIGNED_ACCESS
Borislav Petkovb01aec92015-05-21 19:59:31 +020019 select EDAC_SUPPORT
20 select EDAC_ATOMIC_SCRUB
Laura Abbott36d0fd22014-10-09 15:26:42 -070021 select GENERIC_ALLOCATOR
Uwe Kleine-König4477ca42013-03-21 21:02:37 +010022 select GENERIC_ATOMIC64 if (CPU_V7M || CPU_V6 || !CPU_32v6K || !AEABI)
Russell Kingb1b3f492012-10-06 17:12:25 +010023 select GENERIC_CLOCKEVENTS_BROADCAST if SMP
Ard Biesheuvel29373672015-09-01 08:59:28 +020024 select GENERIC_EARLY_IOREMAP
Russell King171b3f02013-09-12 21:24:42 +010025 select GENERIC_IDLE_POLL_SETUP
Russell Kingb1b3f492012-10-06 17:12:25 +010026 select GENERIC_IRQ_PROBE
27 select GENERIC_IRQ_SHOW
Geert Uytterhoeven7c070052015-04-01 13:37:11 +010028 select GENERIC_IRQ_SHOW_LEVEL
Russell Kingb1b3f492012-10-06 17:12:25 +010029 select GENERIC_PCI_IOMAP
Stephen Boyd38ff87f2013-06-01 23:39:40 -070030 select GENERIC_SCHED_CLOCK
Russell Kingb1b3f492012-10-06 17:12:25 +010031 select GENERIC_SMP_IDLE_THREAD
32 select GENERIC_STRNCPY_FROM_USER
33 select GENERIC_STRNLEN_USER
Marc Zyngiera71b0922014-08-26 11:03:18 +010034 select HANDLE_DOMAIN_IRQ
Russell Kingb1b3f492012-10-06 17:12:25 +010035 select HARDIRQS_SW_RESEND
AKASHI Takahiro7a017722014-02-25 18:16:24 +090036 select HAVE_ARCH_AUDITSYSCALL if (AEABI && !OABI_COMPAT)
Yalin Wang0b7857d2015-01-16 02:45:55 +010037 select HAVE_ARCH_BITREVERSE if (CPU_32v7M || CPU_32v7) && !CPU_32v6
Arnd Bergmann437682ee2015-11-19 13:30:42 +010038 select HAVE_ARCH_JUMP_LABEL if !XIP_KERNEL && !CPU_ENDIAN_BE32 && MMU
39 select HAVE_ARCH_KGDB if !CPU_ENDIAN_BE32 && MMU
Daniel Cashmane0c25d92016-01-14 15:19:57 -080040 select HAVE_ARCH_MMAP_RND_BITS if MMU
Kees Cook91702172013-11-09 00:51:56 +010041 select HAVE_ARCH_SECCOMP_FILTER if (AEABI && !OABI_COMPAT)
Wade Farnsworth0693bf62012-04-04 16:19:47 +010042 select HAVE_ARCH_TRACEHOOK
Jens Wiklanderb329f952016-01-04 15:42:55 +010043 select HAVE_ARM_SMCCC if CPU_V7
Russell Kingb1b3f492012-10-06 17:12:25 +010044 select HAVE_BPF_JIT
Russell King51aaf812014-04-22 22:26:27 +010045 select HAVE_CC_STACKPROTECTOR
Russell King171b3f02013-09-12 21:24:42 +010046 select HAVE_CONTEXT_TRACKING
Russell Kingb1b3f492012-10-06 17:12:25 +010047 select HAVE_C_RECORDMCOUNT
48 select HAVE_DEBUG_KMEMLEAK
49 select HAVE_DMA_API_DEBUG
Russell Kingb1b3f492012-10-06 17:12:25 +010050 select HAVE_DMA_CONTIGUOUS if MMU
Arnd Bergmann437682ee2015-11-19 13:30:42 +010051 select HAVE_DYNAMIC_FTRACE if (!XIP_KERNEL) && !CPU_ENDIAN_BE32 && MMU
Will Deacondce5c9e2013-12-17 19:50:16 +010052 select HAVE_EFFICIENT_UNALIGNED_ACCESS if (CPU_V6 || CPU_V6K || CPU_V7) && MMU
Russell Kingb1b3f492012-10-06 17:12:25 +010053 select HAVE_FTRACE_MCOUNT_RECORD if (!XIP_KERNEL)
54 select HAVE_FUNCTION_GRAPH_TRACER if (!THUMB2_KERNEL)
55 select HAVE_FUNCTION_TRACER if (!XIP_KERNEL)
56 select HAVE_GENERIC_DMA_COHERENT
Russell Kingb1b3f492012-10-06 17:12:25 +010057 select HAVE_HW_BREAKPOINT if (PERF_EVENTS && (CPU_V6 || CPU_V6K || CPU_V7))
58 select HAVE_IDE if PCI || ISA || PCMCIA
Russell King87c46b62013-05-04 14:38:59 +010059 select HAVE_IRQ_TIME_ACCOUNTING
Russell Kingb1b3f492012-10-06 17:12:25 +010060 select HAVE_KERNEL_GZIP
Kyungsik Leef9b493a2013-07-08 16:01:48 -070061 select HAVE_KERNEL_LZ4
Russell Kingb1b3f492012-10-06 17:12:25 +010062 select HAVE_KERNEL_LZMA
63 select HAVE_KERNEL_LZO
64 select HAVE_KERNEL_XZ
Arnd Bergmanncb1293e2015-05-26 15:40:44 +010065 select HAVE_KPROBES if !XIP_KERNEL && !CPU_ENDIAN_BE32 && !CPU_V7M
Ananth N Mavinakayanahalli9edddaa2008-03-04 14:28:37 -080066 select HAVE_KRETPROBES if (HAVE_KPROBES)
Russell Kingb1b3f492012-10-06 17:12:25 +010067 select HAVE_MEMBLOCK
Ard Biesheuvel7d485f62014-11-24 16:54:35 +010068 select HAVE_MOD_ARCH_SPECIFIC
Russell Kingb1b3f492012-10-06 17:12:25 +010069 select HAVE_OPROFILE if (HAVE_PERF_EVENTS)
Wang Nan0dc016d2015-01-09 14:37:36 +080070 select HAVE_OPTPROBES if !THUMB2_KERNEL
Jamie Iles7ada1892010-02-02 20:24:58 +010071 select HAVE_PERF_EVENTS
Will Deacon49863892013-09-26 12:36:35 +010072 select HAVE_PERF_REGS
73 select HAVE_PERF_USER_STACK_DUMP
Steve Cappera0ad5492014-10-09 15:29:18 -070074 select HAVE_RCU_TABLE_FREE if (SMP && ARM_LPAE)
Will Deacone513f8b2010-06-25 12:24:53 +010075 select HAVE_REGS_AND_STACK_ACCESS_API
Russell Kingb1b3f492012-10-06 17:12:25 +010076 select HAVE_SYSCALL_TRACEPOINTS
Catalin Marinasaf1839e2012-10-08 16:28:08 -070077 select HAVE_UID16
Kevin Hilman31c1fc82013-09-16 15:28:22 -070078 select HAVE_VIRT_CPU_ACCOUNTING_GEN
Thomas Gleixnerda0ec6f2013-08-14 20:43:17 +010079 select IRQ_FORCED_THREADING
Russell King171b3f02013-09-12 21:24:42 +010080 select MODULES_USE_ELF_REL
Santosh Shilimkar84f452b2013-06-30 00:28:46 -040081 select NO_BOOTMEM
Arnd Bergmannaa7d5f12015-11-19 13:20:54 +010082 select OF_EARLY_FLATTREE if OF
83 select OF_RESERVED_MEM if OF
Russell King171b3f02013-09-12 21:24:42 +010084 select OLD_SIGACTION
85 select OLD_SIGSUSPEND3
Russell Kingb1b3f492012-10-06 17:12:25 +010086 select PERF_USE_VMALLOC
87 select RTC_LIB
88 select SYS_SUPPORTS_APM_EMULATION
Russell King171b3f02013-09-12 21:24:42 +010089 # Above selects are sorted alphabetically; please add new ones
90 # according to that. Thanks.
Linus Torvalds1da177e2005-04-16 15:20:36 -070091 help
92 The ARM series is a line of low-power-consumption RISC chip designs
Martin Michlmayrf6c89652006-02-08 21:09:07 +000093 licensed by ARM Ltd and targeted at embedded applications and
Linus Torvalds1da177e2005-04-16 15:20:36 -070094 handhelds such as the Compaq IPAQ. ARM-based PCs are no longer
Martin Michlmayrf6c89652006-02-08 21:09:07 +000095 manufactured, but legacy ARM-based PC hardware remains popular in
Linus Torvalds1da177e2005-04-16 15:20:36 -070096 Europe. There is an ARM Linux project with a web page at
97 <http://www.arm.linux.org.uk/>.
98
Russell King74facff2011-06-02 11:16:22 +010099config ARM_HAS_SG_CHAIN
Laura Abbott308c09f2014-08-08 14:23:25 -0700100 select ARCH_HAS_SG_CHAIN
Russell King74facff2011-06-02 11:16:22 +0100101 bool
102
Marek Szyprowski4ce63fc2012-05-16 15:48:21 +0200103config NEED_SG_DMA_LENGTH
104 bool
105
106config ARM_DMA_USE_IOMMU
Marek Szyprowski4ce63fc2012-05-16 15:48:21 +0200107 bool
Russell Kingb1b3f492012-10-06 17:12:25 +0100108 select ARM_HAS_SG_CHAIN
109 select NEED_SG_DMA_LENGTH
Marek Szyprowski4ce63fc2012-05-16 15:48:21 +0200110
Seung-Woo Kim60460ab2013-02-06 13:21:14 +0900111if ARM_DMA_USE_IOMMU
112
113config ARM_DMA_IOMMU_ALIGNMENT
114 int "Maximum PAGE_SIZE order of alignment for DMA IOMMU buffers"
115 range 4 9
116 default 8
117 help
118 DMA mapping framework by default aligns all buffers to the smallest
119 PAGE_SIZE order which is greater than or equal to the requested buffer
120 size. This works well for buffers up to a few hundreds kilobytes, but
121 for larger buffers it just a waste of address space. Drivers which has
122 relatively small addressing window (like 64Mib) might run out of
123 virtual space with just a few allocations.
124
125 With this parameter you can specify the maximum PAGE_SIZE order for
126 DMA IOMMU buffers. Larger buffers will be aligned only to this
127 specified order. The order is expressed as a power of two multiplied
128 by the PAGE_SIZE.
129
130endif
131
Hans Ulli Kroll0b05da72010-12-02 12:32:15 +0100132config MIGHT_HAVE_PCI
133 bool
134
Ralf Baechle75e71532007-02-09 17:08:58 +0000135config SYS_SUPPORTS_APM_EMULATION
136 bool
137
Linus Walleijbc581772009-09-15 17:30:37 +0100138config HAVE_TCM
139 bool
140 select GENERIC_ALLOCATOR
141
Russell Kinge119bff2010-01-10 17:23:29 +0000142config HAVE_PROC_CPU
143 bool
144
Uwe Kleine-Königce816fa2014-04-07 15:39:19 -0700145config NO_IOPORT_MAP
Al Viro5ea81762007-02-11 15:41:31 +0000146 bool
Al Viro5ea81762007-02-11 15:41:31 +0000147
Linus Torvalds1da177e2005-04-16 15:20:36 -0700148config EISA
149 bool
150 ---help---
151 The Extended Industry Standard Architecture (EISA) bus was
152 developed as an open alternative to the IBM MicroChannel bus.
153
154 The EISA bus provided some of the features of the IBM MicroChannel
155 bus while maintaining backward compatibility with cards made for
156 the older ISA bus. The EISA bus saw limited use between 1988 and
157 1995 when it was made obsolete by the PCI bus.
158
159 Say Y here if you are building a kernel for an EISA-based machine.
160
161 Otherwise, say N.
162
163config SBUS
164 bool
165
Russell Kingf16fb1e2007-04-28 09:59:37 +0100166config STACKTRACE_SUPPORT
167 bool
168 default y
169
170config LOCKDEP_SUPPORT
171 bool
172 default y
173
Russell King7ad1bcb2006-08-27 12:07:02 +0100174config TRACE_IRQFLAGS_SUPPORT
175 bool
Arnd Bergmanncb1293e2015-05-26 15:40:44 +0100176 default !CPU_V7M
Russell King7ad1bcb2006-08-27 12:07:02 +0100177
Linus Torvalds1da177e2005-04-16 15:20:36 -0700178config RWSEM_XCHGADD_ALGORITHM
179 bool
Will Deacon8a874112014-05-02 17:06:19 +0100180 default y
Linus Torvalds1da177e2005-04-16 15:20:36 -0700181
David Howellsf0d1b0b2006-12-08 02:37:49 -0800182config ARCH_HAS_ILOG2_U32
183 bool
David Howellsf0d1b0b2006-12-08 02:37:49 -0800184
185config ARCH_HAS_ILOG2_U64
186 bool
David Howellsf0d1b0b2006-12-08 02:37:49 -0800187
Eduardo Valentin4a1b5732013-06-13 22:58:52 +0100188config ARCH_HAS_BANDGAP
189 bool
190
Stefan Agnera5f4c562015-08-13 00:01:52 +0100191config FIX_EARLYCON_MEM
192 def_bool y if MMU
193
Akinobu Mitab89c3b12006-03-26 01:39:19 -0800194config GENERIC_HWEIGHT
195 bool
196 default y
197
Linus Torvalds1da177e2005-04-16 15:20:36 -0700198config GENERIC_CALIBRATE_DELAY
199 bool
200 default y
201
viro@ZenIV.linux.org.uka08b6b72005-09-06 01:48:42 +0100202config ARCH_MAY_HAVE_PC_FDC
203 bool
204
Christoph Lameter5ac6da62007-02-10 01:43:14 -0800205config ZONE_DMA
206 bool
Christoph Lameter5ac6da62007-02-10 01:43:14 -0800207
FUJITA Tomonoriccd7ab72010-03-10 15:23:23 -0800208config NEED_DMA_MAP_STATE
209 def_bool y
210
David A. Longc7edc9e2014-03-07 11:23:04 -0500211config ARCH_SUPPORTS_UPROBES
212 def_bool y
213
Rob Herring58af4a22012-03-20 14:33:01 -0500214config ARCH_HAS_DMA_SET_COHERENT_MASK
215 bool
216
Linus Torvalds1da177e2005-04-16 15:20:36 -0700217config GENERIC_ISA_DMA
218 bool
219
Linus Torvalds1da177e2005-04-16 15:20:36 -0700220config FIQ
221 bool
222
Rob Herring13a50452012-02-07 09:28:22 -0600223config NEED_RET_TO_USER
224 bool
225
Al Viro034d2f52005-12-19 16:27:59 -0500226config ARCH_MTD_XIP
227 bool
228
Hyok S. Choic760fc12006-03-27 15:18:50 +0100229config VECTORS_BASE
230 hex
Hyok S. Choi6afd6fa2006-09-28 21:46:34 +0900231 default 0xffff0000 if MMU || CPU_HIGH_VECTOR
Hyok S. Choic760fc12006-03-27 15:18:50 +0100232 default DRAM_BASE if REMAP_VECTORS_TO_RAM
233 default 0x00000000
234 help
Russell King19accfd2013-07-04 11:40:32 +0100235 The base address of exception vectors. This must be two pages
236 in size.
Hyok S. Choic760fc12006-03-27 15:18:50 +0100237
Russell Kingdc21af92011-01-04 19:09:43 +0000238config ARM_PATCH_PHYS_VIRT
Russell Kingc1beced2011-08-10 10:23:45 +0100239 bool "Patch physical to virtual translations at runtime" if EMBEDDED
240 default y
Nicolas Pitreb511d752011-02-21 06:53:35 +0100241 depends on !XIP_KERNEL && MMU
Russell Kingdc21af92011-01-04 19:09:43 +0000242 help
Russell King111e9a52011-05-12 10:02:42 +0100243 Patch phys-to-virt and virt-to-phys translation functions at
244 boot and module load time according to the position of the
245 kernel in system memory.
Russell Kingdc21af92011-01-04 19:09:43 +0000246
Russell King111e9a52011-05-12 10:02:42 +0100247 This can only be used with non-XIP MMU kernels where the base
Nicolas Pitredaece592011-08-12 00:14:29 +0100248 of physical memory is at a 16MB boundary.
Russell Kingdc21af92011-01-04 19:09:43 +0000249
Russell Kingc1beced2011-08-10 10:23:45 +0100250 Only disable this option if you know that you do not require
251 this feature (eg, building a kernel for a single machine) and
252 you need to shrink the kernel to the minimal size.
253
Rob Herringc334bc12012-03-04 22:03:33 -0600254config NEED_MACH_IO_H
255 bool
256 help
257 Select this when mach/io.h is required to provide special
258 definitions for this platform. The need for mach/io.h should
259 be avoided when possible.
260
Nicolas Pitre0cdc8b92011-09-02 22:26:55 -0400261config NEED_MACH_MEMORY_H
Nicolas Pitre1b9f95f2011-07-05 22:52:51 -0400262 bool
Russell King111e9a52011-05-12 10:02:42 +0100263 help
Nicolas Pitre0cdc8b92011-09-02 22:26:55 -0400264 Select this when mach/memory.h is required to provide special
265 definitions for this platform. The need for mach/memory.h should
266 be avoided when possible.
Nicolas Pitre1b9f95f2011-07-05 22:52:51 -0400267
268config PHYS_OFFSET
Nicolas Pitre974c0722011-12-02 23:09:42 +0100269 hex "Physical address of main memory" if MMU
Uwe Kleine-Königc6f54a92014-07-23 20:37:43 +0100270 depends on !ARM_PATCH_PHYS_VIRT
Nicolas Pitre974c0722011-12-02 23:09:42 +0100271 default DRAM_BASE if !MMU
Uwe Kleine-Königc6f54a92014-07-23 20:37:43 +0100272 default 0x00000000 if ARCH_EBSA110 || \
Uwe Kleine-Königc6f54a92014-07-23 20:37:43 +0100273 ARCH_FOOTBRIDGE || \
274 ARCH_INTEGRATOR || \
275 ARCH_IOP13XX || \
276 ARCH_KS8695 || \
277 (ARCH_REALVIEW && !REALVIEW_HIGH_PHYS_OFFSET)
278 default 0x10000000 if ARCH_OMAP1 || ARCH_RPC
279 default 0x20000000 if ARCH_S5PV210
280 default 0x70000000 if REALVIEW_HIGH_PHYS_OFFSET
H Hartley Sweetenb8824c92015-06-15 10:35:06 -0700281 default 0xc0000000 if ARCH_SA1100
Nicolas Pitre1b9f95f2011-07-05 22:52:51 -0400282 help
283 Please provide the physical address corresponding to the
284 location of main memory in your system.
Russell Kingcada3c02011-01-04 19:39:29 +0000285
Simon Glass87e040b2011-08-16 23:44:26 +0100286config GENERIC_BUG
287 def_bool y
288 depends on BUG
289
Kirill A. Shutemov1bcad262015-04-14 15:45:42 -0700290config PGTABLE_LEVELS
291 int
292 default 3 if ARM_LPAE
293 default 2
294
Linus Torvalds1da177e2005-04-16 15:20:36 -0700295source "init/Kconfig"
296
Matt Helsleydc52ddc2008-10-18 20:27:21 -0700297source "kernel/Kconfig.freezer"
298
Linus Torvalds1da177e2005-04-16 15:20:36 -0700299menu "System Type"
300
Hyok S. Choi3c427972009-07-24 12:35:00 +0100301config MMU
302 bool "MMU-based Paged Memory Management Support"
303 default y
304 help
305 Select if you want MMU-based virtualised addressing space
306 support by paged memory management. If unsure, say 'Y'.
307
Daniel Cashmane0c25d92016-01-14 15:19:57 -0800308config ARCH_MMAP_RND_BITS_MIN
309 default 8
310
311config ARCH_MMAP_RND_BITS_MAX
312 default 14 if PAGE_OFFSET=0x40000000
313 default 15 if PAGE_OFFSET=0x80000000
314 default 16
315
Russell Kingccf50e22010-03-15 19:03:06 +0000316#
317# The "ARM system type" choice list is ordered alphabetically by option
318# text. Please add new entries in the option alphabetic order.
319#
Linus Torvalds1da177e2005-04-16 15:20:36 -0700320choice
321 prompt "ARM system type"
Arnd Bergmann70722802015-12-17 17:45:47 +0100322 default ARM_SINGLE_ARMV7M if !MMU
Arnd Bergmann1420b222013-02-14 13:33:36 +0100323 default ARCH_MULTIPLATFORM if MMU
Linus Torvalds1da177e2005-04-16 15:20:36 -0700324
Rob Herring387798b2012-09-06 13:41:12 -0500325config ARCH_MULTIPLATFORM
326 bool "Allow multiple platforms to be selected"
Russell Kingb1b3f492012-10-06 17:12:25 +0100327 depends on MMU
Rob Herringddb902c2013-11-22 09:29:37 -0600328 select ARCH_WANT_OPTIONAL_GPIOLIB
Olof Johansson42dc8362014-03-09 12:46:59 -0700329 select ARM_HAS_SG_CHAIN
Rob Herring387798b2012-09-06 13:41:12 -0500330 select ARM_PATCH_PHYS_VIRT
331 select AUTO_ZRELADDR
Rob Herring6d0add42014-04-16 08:42:13 -0500332 select CLKSRC_OF
Dinh Nguyen66314222012-07-18 16:07:18 -0600333 select COMMON_CLK
Rob Herringddb902c2013-11-22 09:29:37 -0600334 select GENERIC_CLOCKEVENTS
Will Deacon08d38be2014-05-27 23:26:35 +0100335 select MIGHT_HAVE_PCI
Rob Herring387798b2012-09-06 13:41:12 -0500336 select MULTI_IRQ_HANDLER
Dinh Nguyen66314222012-07-18 16:07:18 -0600337 select SPARSE_IRQ
338 select USE_OF
Dinh Nguyen66314222012-07-18 16:07:18 -0600339
Stefan Agner9c77bc42015-05-20 00:03:51 +0200340config ARM_SINGLE_ARMV7M
341 bool "ARMv7-M based platforms (Cortex-M0/M3/M4)"
342 depends on !MMU
343 select ARCH_WANT_OPTIONAL_GPIOLIB
344 select ARM_NVIC
Stefan Agner499f1642015-05-21 00:35:44 +0200345 select AUTO_ZRELADDR
Stefan Agner9c77bc42015-05-20 00:03:51 +0200346 select CLKSRC_OF
347 select COMMON_CLK
348 select CPU_V7M
349 select GENERIC_CLOCKEVENTS
350 select NO_IOPORT_MAP
351 select SPARSE_IRQ
352 select USE_OF
353
Deepak Saxena4af6fee2006-06-20 21:30:44 +0100354
Russell King93e22562012-10-12 14:20:52 +0100355config ARCH_CLPS711X
356 bool "Cirrus Logic CLPS711x/EP721x/EP731x-based"
Alexander Shiyana3b8d4a2012-10-09 20:05:56 +0400357 select ARCH_REQUIRE_GPIOLIB
Alexander Shiyanea7d1bc2012-11-17 17:57:11 +0400358 select AUTO_ZRELADDR
Alexander Shiyanc99f72a2013-05-13 21:07:32 +0400359 select CLKSRC_MMIO
Russell King93e22562012-10-12 14:20:52 +0100360 select COMMON_CLK
361 select CPU_ARM720T
Alexander Shiyan4a8355c2012-10-10 19:45:27 +0400362 select GENERIC_CLOCKEVENTS
Alexander Shiyan65976192013-05-13 21:07:36 +0400363 select MFD_SYSCON
Alexander Shiyane4e3a372014-08-19 16:31:15 +0400364 select SOC_BUS
Russell King93e22562012-10-12 14:20:52 +0100365 help
366 Support for Cirrus Logic 711x/721x/731x based boards.
367
Russell King788c9702009-04-26 14:21:59 +0100368config ARCH_GEMINI
369 bool "Cortina Systems Gemini"
Russell King788c9702009-04-26 14:21:59 +0100370 select ARCH_REQUIRE_GPIOLIB
Linus Walleijf3372c02013-10-01 12:57:20 +0200371 select CLKSRC_MMIO
Russell Kingb1b3f492012-10-06 17:12:25 +0100372 select CPU_FA526
Linus Walleijf3372c02013-10-01 12:57:20 +0200373 select GENERIC_CLOCKEVENTS
Russell King788c9702009-04-26 14:21:59 +0100374 help
375 Support for the Cortina Systems Gemini family SoCs
376
Linus Torvalds1da177e2005-04-16 15:20:36 -0700377config ARCH_EBSA110
378 bool "EBSA-110"
Russell Kingb1b3f492012-10-06 17:12:25 +0100379 select ARCH_USES_GETTIMEOFFSET
Russell Kingc7508152008-10-26 10:55:14 +0000380 select CPU_SA110
Russell Kingf7e68bb2005-05-05 14:49:01 +0100381 select ISA
Rob Herringc334bc12012-03-04 22:03:33 -0600382 select NEED_MACH_IO_H
Nicolas Pitre0cdc8b92011-09-02 22:26:55 -0400383 select NEED_MACH_MEMORY_H
Uwe Kleine-Königce816fa2014-04-07 15:39:19 -0700384 select NO_IOPORT_MAP
Linus Torvalds1da177e2005-04-16 15:20:36 -0700385 help
386 This is an evaluation board for the StrongARM processor available
Martin Michlmayrf6c89652006-02-08 21:09:07 +0000387 from Digital. It has limited hardware on-board, including an
Linus Torvalds1da177e2005-04-16 15:20:36 -0700388 Ethernet interface, two PCMCIA sockets, two serial ports and a
389 parallel port.
390
Lennert Buytenheke7736d42006-03-20 17:10:13 +0000391config ARCH_EP93XX
392 bool "EP93xx-based"
Russell Kingb1b3f492012-10-06 17:12:25 +0100393 select ARCH_HAS_HOLES_MEMORYMODEL
394 select ARCH_REQUIRE_GPIOLIB
Lennert Buytenheke7736d42006-03-20 17:10:13 +0000395 select ARM_AMBA
H Hartley Sweetenb8824c92015-06-15 10:35:06 -0700396 select ARM_PATCH_PHYS_VIRT
Lennert Buytenheke7736d42006-03-20 17:10:13 +0000397 select ARM_VIC
H Hartley Sweetenb8824c92015-06-15 10:35:06 -0700398 select AUTO_ZRELADDR
Jean-Christop PLAGNIOL-VILLARD6d803ba2010-11-17 10:04:33 +0100399 select CLKDEV_LOOKUP
Linus Walleij000bc172015-06-15 14:34:03 +0200400 select CLKSRC_MMIO
Russell Kingb1b3f492012-10-06 17:12:25 +0100401 select CPU_ARM920T
Linus Walleij000bc172015-06-15 14:34:03 +0200402 select GENERIC_CLOCKEVENTS
Lennert Buytenheke7736d42006-03-20 17:10:13 +0000403 help
404 This enables support for the Cirrus EP93xx series of CPUs.
405
Linus Torvalds1da177e2005-04-16 15:20:36 -0700406config ARCH_FOOTBRIDGE
407 bool "FootBridge"
Russell Kingc7508152008-10-26 10:55:14 +0000408 select CPU_SA110
Linus Torvalds1da177e2005-04-16 15:20:36 -0700409 select FOOTBRIDGE
Russell King4e8d7632011-01-28 21:00:39 +0000410 select GENERIC_CLOCKEVENTS
Arnd Bergmannd0ee9f42011-10-01 21:10:32 +0200411 select HAVE_IDE
Rob Herring8ef6e622012-03-01 20:48:12 -0600412 select NEED_MACH_IO_H if !MMU
Nicolas Pitre0cdc8b92011-09-02 22:26:55 -0400413 select NEED_MACH_MEMORY_H
Martin Michlmayrf999b8b2006-02-08 21:09:05 +0000414 help
415 Support for systems based on the DC21285 companion chip
416 ("FootBridge"), such as the Simtec CATS and the Rebel NetWinder.
Linus Torvalds1da177e2005-04-16 15:20:36 -0700417
Deepak Saxena4af6fee2006-06-20 21:30:44 +0100418config ARCH_NETX
419 bool "Hilscher NetX based"
Russell Kingb1b3f492012-10-06 17:12:25 +0100420 select ARM_VIC
Russell King234b6ced2011-05-08 14:09:47 +0100421 select CLKSRC_MMIO
Russell Kingc7508152008-10-26 10:55:14 +0000422 select CPU_ARM926T
Uwe Kleine-König2fcfe6b2008-12-09 21:57:24 +0100423 select GENERIC_CLOCKEVENTS
Martin Michlmayrf999b8b2006-02-08 21:09:05 +0000424 help
Deepak Saxena4af6fee2006-06-20 21:30:44 +0100425 This enables support for systems based on the Hilscher NetX Soc
426
Russell King3b938be2007-05-12 11:25:44 +0100427config ARCH_IOP13XX
428 bool "IOP13xx-based"
429 depends on MMU
Russell Kingb1b3f492012-10-06 17:12:25 +0100430 select CPU_XSC3
Nicolas Pitre0cdc8b92011-09-02 22:26:55 -0400431 select NEED_MACH_MEMORY_H
Rob Herring13a50452012-02-07 09:28:22 -0600432 select NEED_RET_TO_USER
Russell Kingb1b3f492012-10-06 17:12:25 +0100433 select PCI
434 select PLAT_IOP
435 select VMSPLIT_1G
Thomas Gleixner37ebbcf2014-05-07 15:44:04 +0000436 select SPARSE_IRQ
Russell King3b938be2007-05-12 11:25:44 +0100437 help
438 Support for Intel's IOP13XX (XScale) family of processors.
439
Lennert Buytenhek3f7e5812006-09-18 23:10:26 +0100440config ARCH_IOP32X
441 bool "IOP32x-based"
Russell Kinga4f7e762006-06-28 12:52:41 +0100442 depends on MMU
Russell Kingb1b3f492012-10-06 17:12:25 +0100443 select ARCH_REQUIRE_GPIOLIB
Russell Kingc7508152008-10-26 10:55:14 +0000444 select CPU_XSCALE
Linus Walleije9004f52013-09-09 11:59:51 +0200445 select GPIO_IOP
Rob Herring13a50452012-02-07 09:28:22 -0600446 select NEED_RET_TO_USER
Russell Kingf7e68bb2005-05-05 14:49:01 +0100447 select PCI
Russell Kingb1b3f492012-10-06 17:12:25 +0100448 select PLAT_IOP
Martin Michlmayrf999b8b2006-02-08 21:09:05 +0000449 help
Lennert Buytenhek3f7e5812006-09-18 23:10:26 +0100450 Support for Intel's 80219 and IOP32X (XScale) family of
451 processors.
452
453config ARCH_IOP33X
454 bool "IOP33x-based"
455 depends on MMU
Russell Kingb1b3f492012-10-06 17:12:25 +0100456 select ARCH_REQUIRE_GPIOLIB
Russell Kingc7508152008-10-26 10:55:14 +0000457 select CPU_XSCALE
Linus Walleije9004f52013-09-09 11:59:51 +0200458 select GPIO_IOP
Rob Herring13a50452012-02-07 09:28:22 -0600459 select NEED_RET_TO_USER
Lennert Buytenhek3f7e5812006-09-18 23:10:26 +0100460 select PCI
Russell Kingb1b3f492012-10-06 17:12:25 +0100461 select PLAT_IOP
Lennert Buytenhek3f7e5812006-09-18 23:10:26 +0100462 help
463 Support for Intel's IOP33X (XScale) family of processors.
Linus Torvalds1da177e2005-04-16 15:20:36 -0700464
Russell King3b938be2007-05-12 11:25:44 +0100465config ARCH_IXP4XX
466 bool "IXP4xx-based"
Russell Kinga4f7e762006-06-28 12:52:41 +0100467 depends on MMU
Rob Herring58af4a22012-03-20 14:33:01 -0500468 select ARCH_HAS_DMA_SET_COHERENT_MASK
Russell Kingb1b3f492012-10-06 17:12:25 +0100469 select ARCH_REQUIRE_GPIOLIB
Russell King51aaf812014-04-22 22:26:27 +0100470 select ARCH_SUPPORTS_BIG_ENDIAN
Russell King234b6ced2011-05-08 14:09:47 +0100471 select CLKSRC_MMIO
Russell Kingc7508152008-10-26 10:55:14 +0000472 select CPU_XSCALE
Russell Kingb1b3f492012-10-06 17:12:25 +0100473 select DMABOUNCE if PCI
Russell King3b938be2007-05-12 11:25:44 +0100474 select GENERIC_CLOCKEVENTS
Hans Ulli Kroll0b05da72010-12-02 12:32:15 +0100475 select MIGHT_HAVE_PCI
Rob Herringc334bc12012-03-04 22:03:33 -0600476 select NEED_MACH_IO_H
Florian Fainelli9296d942013-04-09 14:29:26 +0200477 select USB_EHCI_BIG_ENDIAN_DESC
Russell King171b3f02013-09-12 21:24:42 +0100478 select USB_EHCI_BIG_ENDIAN_MMIO
Lennert Buytenhekc4713072006-03-28 21:18:54 +0100479 help
Russell King3b938be2007-05-12 11:25:44 +0100480 Support for Intel's IXP4XX (XScale) family of processors.
Lennert Buytenhekc4713072006-03-28 21:18:54 +0100481
Saeed Bisharaedabd382009-08-06 15:12:43 +0300482config ARCH_DOVE
483 bool "Marvell Dove"
Saeed Bisharaedabd382009-08-06 15:12:43 +0300484 select ARCH_REQUIRE_GPIOLIB
Sebastian Hesselbarth756b2532013-05-02 19:56:12 +0100485 select CPU_PJ4
Saeed Bisharaedabd382009-08-06 15:12:43 +0300486 select GENERIC_CLOCKEVENTS
Russell King0f81bd42012-09-09 20:34:13 +0100487 select MIGHT_HAVE_PCI
Arnd Bergmannb8cd3372015-12-02 22:27:04 +0100488 select MULTI_IRQ_HANDLER
Russell King171b3f02013-09-12 21:24:42 +0100489 select MVEBU_MBUS
Sebastian Hesselbarth9139acd2012-11-19 10:39:55 +0100490 select PINCTRL
491 select PINCTRL_DOVE
Thomas Petazzoniabcda1d2012-09-11 14:27:27 +0200492 select PLAT_ORION_LEGACY
Arnd Bergmann5cdbe5d2015-12-02 22:27:05 +0100493 select SPARSE_IRQ
Russell Kingc5d431e2015-12-08 10:58:09 +0000494 select PM_GENERIC_DOMAINS if PM
Saeed Bisharaedabd382009-08-06 15:12:43 +0300495 help
496 Support for the Marvell Dove SoC 88AP510
497
Andrew Victorc53c9cf2007-05-11 21:01:28 +0100498config ARCH_KS8695
499 bool "Micrel/Kendin KS8695"
Hartley Sweeten98830bc2010-05-17 17:18:10 +0100500 select ARCH_REQUIRE_GPIOLIB
Linus Walleijc7e783d2012-08-29 20:27:22 +0200501 select CLKSRC_MMIO
Russell Kingb1b3f492012-10-06 17:12:25 +0100502 select CPU_ARM922T
Linus Walleijc7e783d2012-08-29 20:27:22 +0200503 select GENERIC_CLOCKEVENTS
Russell Kingb1b3f492012-10-06 17:12:25 +0100504 select NEED_MACH_MEMORY_H
Andrew Victorc53c9cf2007-05-11 21:01:28 +0100505 help
506 Support for Micrel/Kendin KS8695 "Centaur" (ARM922T) based
507 System-on-Chip devices.
508
Russell King788c9702009-04-26 14:21:59 +0100509config ARCH_W90X900
510 bool "Nuvoton W90X900 CPU"
wanzongshunc52d3d62009-06-10 15:49:32 +0100511 select ARCH_REQUIRE_GPIOLIB
Jean-Christop PLAGNIOL-VILLARD6d803ba2010-11-17 10:04:33 +0100512 select CLKDEV_LOOKUP
Russell King6fa5d5f2011-05-08 15:34:39 +0100513 select CLKSRC_MMIO
Russell Kingb1b3f492012-10-06 17:12:25 +0100514 select CPU_ARM926T
wanzongshun58b53692009-08-14 15:36:44 +0100515 select GENERIC_CLOCKEVENTS
Lennert Buytenhek777f9be2008-06-22 22:45:02 +0200516 help
wanzongshuna8bc4ea2009-08-14 15:38:29 +0100517 Support for Nuvoton (Winbond logic dept.) ARM9 processor,
518 At present, the w90x900 has been renamed nuc900, regarding
519 the ARM series product line, you can login the following
520 link address to know more.
521
522 <http://www.nuvoton.com/hq/enu/ProductAndSales/ProductLines/
523 ConsumerElectronicsIC/ARMMicrocontroller/ARMMicrocontroller>
Tzachi Perelstein585cf172007-10-23 15:14:41 -0400524
Russell King93e22562012-10-12 14:20:52 +0100525config ARCH_LPC32XX
526 bool "NXP LPC32XX"
527 select ARCH_REQUIRE_GPIOLIB
528 select ARM_AMBA
Russell King40737232011-01-06 22:32:52 +0000529 select CLKDEV_LOOKUP
Russell King234b6ced2011-05-08 14:09:47 +0100530 select CLKSRC_MMIO
Russell King93e22562012-10-12 14:20:52 +0100531 select CPU_ARM926T
532 select GENERIC_CLOCKEVENTS
533 select HAVE_IDE
Russell King93e22562012-10-12 14:20:52 +0100534 select USE_OF
535 help
536 Support for the NXP LPC32XX family of processors
537
Linus Torvalds1da177e2005-04-16 15:20:36 -0700538config ARCH_PXA
eric miao2c8086a2007-09-11 19:13:17 -0700539 bool "PXA2xx/PXA3xx-based"
Russell Kinga4f7e762006-06-28 12:52:41 +0100540 depends on MMU
Russell Kingb1b3f492012-10-06 17:12:25 +0100541 select ARCH_MTD_XIP
542 select ARCH_REQUIRE_GPIOLIB
543 select ARM_CPU_SUSPEND if PM
544 select AUTO_ZRELADDR
Robert Jarzmika1c0a6a2015-02-07 22:54:03 +0100545 select COMMON_CLK
Jean-Christop PLAGNIOL-VILLARD6d803ba2010-11-17 10:04:33 +0100546 select CLKDEV_LOOKUP
Daniel Lezcano389d9b52015-10-09 15:48:38 +0200547 select CLKSRC_PXA
Russell King234b6ced2011-05-08 14:09:47 +0100548 select CLKSRC_MMIO
Robert Jarzmik6f6caea2014-07-14 18:52:03 +0200549 select CLKSRC_OF
Eric Miao981d0f32007-07-24 01:22:43 +0100550 select GENERIC_CLOCKEVENTS
Haojian Zhuang157d2642011-10-17 20:37:52 +0800551 select GPIO_PXA
Russell Kingb1b3f492012-10-06 17:12:25 +0100552 select HAVE_IDE
Robert Jarzmikd6cf30c2015-02-14 22:41:56 +0100553 select IRQ_DOMAIN
Russell Kingb1b3f492012-10-06 17:12:25 +0100554 select MULTI_IRQ_HANDLER
Eric Miaobd5ce432009-01-20 12:06:01 +0800555 select PLAT_PXA
Haojian Zhuang6ac6b812010-08-20 15:23:59 +0800556 select SPARSE_IRQ
Martin Michlmayrf999b8b2006-02-08 21:09:05 +0000557 help
eric miao2c8086a2007-09-11 19:13:17 -0700558 Support for Intel/Marvell's PXA2xx/PXA3xx processor line.
Linus Torvalds1da177e2005-04-16 15:20:36 -0700559
560config ARCH_RPC
561 bool "RiscPC"
Russell King868e87c2015-09-28 10:31:50 +0100562 depends on MMU
Linus Torvalds1da177e2005-04-16 15:20:36 -0700563 select ARCH_ACORN
viro@ZenIV.linux.org.uka08b6b72005-09-06 01:48:42 +0100564 select ARCH_MAY_HAVE_PC_FDC
Russell King07f841b2008-10-01 17:11:06 +0100565 select ARCH_SPARSEMEM_ENABLE
John Stultz5cfc8ee2010-03-24 00:22:36 +0000566 select ARCH_USES_GETTIMEOFFSET
Arnd Bergmannfa04e202014-02-26 17:39:12 +0100567 select CPU_SA110
Russell Kingb1b3f492012-10-06 17:12:25 +0100568 select FIQ
Arnd Bergmannd0ee9f42011-10-01 21:10:32 +0200569 select HAVE_IDE
Russell Kingb1b3f492012-10-06 17:12:25 +0100570 select HAVE_PATA_PLATFORM
571 select ISA_DMA_API
Rob Herringc334bc12012-03-04 22:03:33 -0600572 select NEED_MACH_IO_H
Nicolas Pitre0cdc8b92011-09-02 22:26:55 -0400573 select NEED_MACH_MEMORY_H
Uwe Kleine-Königce816fa2014-04-07 15:39:19 -0700574 select NO_IOPORT_MAP
Arnd Bergmannb4811ba2013-03-13 17:36:37 +0100575 select VIRT_TO_BUS
Linus Torvalds1da177e2005-04-16 15:20:36 -0700576 help
577 On the Acorn Risc-PC, Linux can support the internal IDE disk and
578 CD-ROM interface, serial and parallel port, and the floppy drive.
579
580config ARCH_SA1100
581 bool "SA1100-based"
Russell Kingb1b3f492012-10-06 17:12:25 +0100582 select ARCH_MTD_XIP
Michael Buesch7444a722008-07-25 01:46:11 -0700583 select ARCH_REQUIRE_GPIOLIB
Russell Kingb1b3f492012-10-06 17:12:25 +0100584 select ARCH_SPARSEMEM_ENABLE
585 select CLKDEV_LOOKUP
586 select CLKSRC_MMIO
Daniel Lezcano389d9b52015-10-09 15:48:38 +0200587 select CLKSRC_PXA
588 select CLKSRC_OF if OF
Russell Kingb1b3f492012-10-06 17:12:25 +0100589 select CPU_FREQ
590 select CPU_SA1100
591 select GENERIC_CLOCKEVENTS
Arnd Bergmannd0ee9f42011-10-01 21:10:32 +0200592 select HAVE_IDE
Dmitry Eremin-Solenikov1eca42b2014-11-28 15:56:54 +0100593 select IRQ_DOMAIN
Russell Kingb1b3f492012-10-06 17:12:25 +0100594 select ISA
Dmitry Eremin-Solenikovaffcab32014-11-28 15:55:16 +0100595 select MULTI_IRQ_HANDLER
Nicolas Pitre0cdc8b92011-09-02 22:26:55 -0400596 select NEED_MACH_MEMORY_H
Russell King375dec92012-02-23 14:29:33 +0100597 select SPARSE_IRQ
Martin Michlmayrf999b8b2006-02-08 21:09:05 +0000598 help
599 Support for StrongARM 11x0 based boards.
Linus Torvalds1da177e2005-04-16 15:20:36 -0700600
Kukjin Kimb130d5c2012-02-03 14:29:23 +0900601config ARCH_S3C24XX
602 bool "Samsung S3C24XX SoCs"
Kukjin Kim53650432013-04-04 09:04:30 +0900603 select ARCH_REQUIRE_GPIOLIB
Arnd Bergmann335cce72014-03-13 14:11:16 +0100604 select ATAGS
Russell Kingb1b3f492012-10-06 17:12:25 +0100605 select CLKDEV_LOOKUP
Tomasz Figa42805062013-04-28 02:25:01 +0200606 select CLKSRC_SAMSUNG_PWM
Romain Naour7f78b6e2013-01-09 18:47:04 -0800607 select GENERIC_CLOCKEVENTS
Tomasz Figa880cf072013-06-19 01:22:20 +0900608 select GPIO_SAMSUNG
Kukjin Kim20676c12010-11-13 16:08:32 +0900609 select HAVE_S3C2410_I2C if I2C
Kukjin Kimb130d5c2012-02-03 14:29:23 +0900610 select HAVE_S3C2410_WATCHDOG if WATCHDOG
Russell Kingb1b3f492012-10-06 17:12:25 +0100611 select HAVE_S3C_RTC if RTC_CLASS
Heiko Stuebner17453dd2013-03-07 12:38:25 +0900612 select MULTI_IRQ_HANDLER
Rob Herringc334bc12012-03-04 22:03:33 -0600613 select NEED_MACH_IO_H
Tomasz Figacd8dc7a2013-06-15 09:01:49 +0900614 select SAMSUNG_ATAGS
Linus Torvalds1da177e2005-04-16 15:20:36 -0700615 help
Kukjin Kimb130d5c2012-02-03 14:29:23 +0900616 Samsung S3C2410, S3C2412, S3C2413, S3C2416, S3C2440, S3C2442, S3C2443
617 and S3C2450 SoCs based systems, such as the Simtec Electronics BAST
618 (<http://www.simtec.co.uk/products/EB110ITX/>), the IPAQ 1940 or the
619 Samsung SMDK2410 development board (and derivatives).
Ben Dooks63b1f512010-04-30 16:32:26 +0900620
Kevin Hilman7c6337e2007-04-30 19:37:19 +0100621config ARCH_DAVINCI
622 bool "TI DaVinci"
Russell Kingb1b3f492012-10-06 17:12:25 +0100623 select ARCH_HAS_HOLES_MEMORYMODEL
David Brownelldce11152008-09-07 23:41:04 -0700624 select ARCH_REQUIRE_GPIOLIB
Jean-Christop PLAGNIOL-VILLARD6d803ba2010-11-17 10:04:33 +0100625 select CLKDEV_LOOKUP
David Brownell20e99692009-05-07 09:31:42 -0700626 select GENERIC_ALLOCATOR
Russell Kingb1b3f492012-10-06 17:12:25 +0100627 select GENERIC_CLOCKEVENTS
Russell Kingdc7ad3b2011-05-22 10:01:21 +0100628 select GENERIC_IRQ_CHIP
Russell Kingb1b3f492012-10-06 17:12:25 +0100629 select HAVE_IDE
Sekhar Nori689e3312012-08-28 15:27:52 +0530630 select USE_OF
Russell Kingb1b3f492012-10-06 17:12:25 +0100631 select ZONE_DMA
Kevin Hilman7c6337e2007-04-30 19:37:19 +0100632 help
633 Support for TI's DaVinci platform.
634
Tony Lindgrena0694862013-01-11 11:24:20 -0800635config ARCH_OMAP1
636 bool "TI OMAP1"
Arnd Bergmann00a36692012-06-07 18:50:51 -0600637 depends on MMU
Russell Kingb1b3f492012-10-06 17:12:25 +0100638 select ARCH_HAS_HOLES_MEMORYMODEL
Tony Lindgrena0694862013-01-11 11:24:20 -0800639 select ARCH_OMAP
Alexey Charkov21f47fb2010-12-23 13:11:21 +0100640 select ARCH_REQUIRE_GPIOLIB
Tony Priske9a91de2012-08-03 21:00:06 +1200641 select CLKDEV_LOOKUP
viresh kumarcee37e52010-04-01 12:31:05 +0100642 select CLKSRC_MMIO
Russell Kingb1b3f492012-10-06 17:12:25 +0100643 select GENERIC_CLOCKEVENTS
Tony Lindgrena0694862013-01-11 11:24:20 -0800644 select GENERIC_IRQ_CHIP
Tony Lindgrena0694862013-01-11 11:24:20 -0800645 select HAVE_IDE
646 select IRQ_DOMAIN
Tony Lindgrenb6943312015-05-20 09:01:21 -0700647 select MULTI_IRQ_HANDLER
Tony Lindgrena0694862013-01-11 11:24:20 -0800648 select NEED_MACH_IO_H if PCCARD
649 select NEED_MACH_MEMORY_H
Tony Lindgren685e2d02015-05-20 09:01:21 -0700650 select SPARSE_IRQ
Alexey Charkov21f47fb2010-12-23 13:11:21 +0100651 help
Tony Lindgrena0694862013-01-11 11:24:20 -0800652 Support for older TI OMAP1 (omap7xx, omap15xx or omap16xx)
Binghua Duan02c981c2011-07-08 17:40:12 +0800653
Linus Torvalds1da177e2005-04-16 15:20:36 -0700654endchoice
655
Rob Herring387798b2012-09-06 13:41:12 -0500656menu "Multiple platform selection"
657 depends on ARCH_MULTIPLATFORM
658
659comment "CPU Core family selection"
660
Arnd Bergmannf8afae42014-03-25 22:19:00 +0100661config ARCH_MULTI_V4
662 bool "ARMv4 based platforms (FA526)"
663 depends on !ARCH_MULTI_V6_V7
664 select ARCH_MULTI_V4_V5
665 select CPU_FA526
666
Rob Herring387798b2012-09-06 13:41:12 -0500667config ARCH_MULTI_V4T
668 bool "ARMv4T based platforms (ARM720T, ARM920T, ...)"
Rob Herring387798b2012-09-06 13:41:12 -0500669 depends on !ARCH_MULTI_V6_V7
Russell Kingb1b3f492012-10-06 17:12:25 +0100670 select ARCH_MULTI_V4_V5
Arnd Bergmann24e860f2013-06-03 15:38:58 +0200671 select CPU_ARM920T if !(CPU_ARM7TDMI || CPU_ARM720T || \
672 CPU_ARM740T || CPU_ARM9TDMI || CPU_ARM922T || \
673 CPU_ARM925T || CPU_ARM940T)
Rob Herring387798b2012-09-06 13:41:12 -0500674
675config ARCH_MULTI_V5
676 bool "ARMv5 based platforms (ARM926T, XSCALE, PJ1, ...)"
Rob Herring387798b2012-09-06 13:41:12 -0500677 depends on !ARCH_MULTI_V6_V7
Russell Kingb1b3f492012-10-06 17:12:25 +0100678 select ARCH_MULTI_V4_V5
Andrew Lunn12567bb2014-02-22 20:14:54 +0100679 select CPU_ARM926T if !(CPU_ARM946E || CPU_ARM1020 || \
Arnd Bergmann24e860f2013-06-03 15:38:58 +0200680 CPU_ARM1020E || CPU_ARM1022 || CPU_ARM1026 || \
681 CPU_XSCALE || CPU_XSC3 || CPU_MOHAWK || CPU_FEROCEON)
Rob Herring387798b2012-09-06 13:41:12 -0500682
683config ARCH_MULTI_V4_V5
684 bool
685
686config ARCH_MULTI_V6
Stephen Boyd8dda05c2013-03-04 15:19:19 -0800687 bool "ARMv6 based platforms (ARM11)"
Rob Herring387798b2012-09-06 13:41:12 -0500688 select ARCH_MULTI_V6_V7
Rob Herring42f47542014-01-31 14:26:04 -0600689 select CPU_V6K
Rob Herring387798b2012-09-06 13:41:12 -0500690
691config ARCH_MULTI_V7
Stephen Boyd8dda05c2013-03-04 15:19:19 -0800692 bool "ARMv7 based platforms (Cortex-A, PJ4, Scorpion, Krait)"
Rob Herring387798b2012-09-06 13:41:12 -0500693 default y
694 select ARCH_MULTI_V6_V7
Russell Kingb1b3f492012-10-06 17:12:25 +0100695 select CPU_V7
Rob Herring90bc8ac2014-01-31 15:32:02 -0600696 select HAVE_SMP
Rob Herring387798b2012-09-06 13:41:12 -0500697
698config ARCH_MULTI_V6_V7
699 bool
Rob Herring9352b052014-01-31 15:36:10 -0600700 select MIGHT_HAVE_CACHE_L2X0
Rob Herring387798b2012-09-06 13:41:12 -0500701
702config ARCH_MULTI_CPU_AUTO
703 def_bool !(ARCH_MULTI_V4 || ARCH_MULTI_V4T || ARCH_MULTI_V6_V7)
704 select ARCH_MULTI_V5
705
706endmenu
707
Rob Herring05e2a3d2013-12-05 10:04:54 -0600708config ARCH_VIRT
Masahiro Yamadae3246542015-11-16 12:06:10 +0900709 bool "Dummy Virtual Machine"
710 depends on ARCH_MULTI_V7
Rob Herring4b8b5f22013-12-05 10:10:34 -0600711 select ARM_AMBA
Rob Herring05e2a3d2013-12-05 10:04:54 -0600712 select ARM_GIC
Pavel Fedin0e2f91e2015-11-27 12:56:26 +0100713 select ARM_GIC_V2M if PCI_MSI
Jean-Philippe Brucker0b28f1d2015-10-01 13:47:18 +0100714 select ARM_GIC_V3
Rob Herring05e2a3d2013-12-05 10:04:54 -0600715 select ARM_PSCI
Rob Herring4b8b5f22013-12-05 10:10:34 -0600716 select HAVE_ARM_ARCH_TIMER
Rob Herring05e2a3d2013-12-05 10:04:54 -0600717
Russell Kingccf50e22010-03-15 19:03:06 +0000718#
719# This is sorted alphabetically by mach-* pathname. However, plat-*
720# Kconfigs may be included either alphabetically (according to the
721# plat- suffix) or along side the corresponding mach-* source.
722#
Gregory CLEMENT3e93a222012-06-04 18:38:56 +0200723source "arch/arm/mach-mvebu/Kconfig"
724
Tsahee Zidenberg445d9b32015-03-12 13:53:00 +0200725source "arch/arm/mach-alpine/Kconfig"
726
Oleksij Rempeld9bfc862014-11-24 12:08:27 +0100727source "arch/arm/mach-asm9260/Kconfig"
728
Russell King95b8f202010-01-14 11:43:54 +0000729source "arch/arm/mach-at91/Kconfig"
730
Anders Berg1d22924e2014-05-23 11:08:35 +0200731source "arch/arm/mach-axxia/Kconfig"
732
Christian Daudt8ac49e02012-11-19 09:46:10 -0800733source "arch/arm/mach-bcm/Kconfig"
734
Sebastian Hesselbarth1c37fa12013-09-09 14:36:19 +0200735source "arch/arm/mach-berlin/Kconfig"
736
Linus Torvalds1da177e2005-04-16 15:20:36 -0700737source "arch/arm/mach-clps711x/Kconfig"
738
Anton Vorontsovd94f9442010-03-25 17:12:41 +0300739source "arch/arm/mach-cns3xxx/Kconfig"
740
Russell King95b8f202010-01-14 11:43:54 +0000741source "arch/arm/mach-davinci/Kconfig"
742
Baruch Siachdf8d7422015-01-14 10:40:30 +0200743source "arch/arm/mach-digicolor/Kconfig"
744
Russell King95b8f202010-01-14 11:43:54 +0000745source "arch/arm/mach-dove/Kconfig"
746
Lennert Buytenheke7736d42006-03-20 17:10:13 +0000747source "arch/arm/mach-ep93xx/Kconfig"
748
Linus Torvalds1da177e2005-04-16 15:20:36 -0700749source "arch/arm/mach-footbridge/Kconfig"
750
Paulius Zaleckas59d3a192009-03-26 10:06:08 +0200751source "arch/arm/mach-gemini/Kconfig"
752
Rob Herring387798b2012-09-06 13:41:12 -0500753source "arch/arm/mach-highbank/Kconfig"
754
Haojian Zhuang389ee0c2013-12-20 10:52:56 +0800755source "arch/arm/mach-hisi/Kconfig"
756
Linus Torvalds1da177e2005-04-16 15:20:36 -0700757source "arch/arm/mach-integrator/Kconfig"
758
Lennert Buytenhek3f7e5812006-09-18 23:10:26 +0100759source "arch/arm/mach-iop32x/Kconfig"
760
761source "arch/arm/mach-iop33x/Kconfig"
Linus Torvalds1da177e2005-04-16 15:20:36 -0700762
Dan Williams285f5fa2006-12-07 02:59:39 +0100763source "arch/arm/mach-iop13xx/Kconfig"
764
Linus Torvalds1da177e2005-04-16 15:20:36 -0700765source "arch/arm/mach-ixp4xx/Kconfig"
766
Santosh Shilimkar828989a2013-06-10 11:27:13 -0400767source "arch/arm/mach-keystone/Kconfig"
768
Russell King95b8f202010-01-14 11:43:54 +0000769source "arch/arm/mach-ks8695/Kconfig"
770
Carlo Caione3b8f5032014-09-10 22:16:59 +0200771source "arch/arm/mach-meson/Kconfig"
772
Jonas Jensen17723fd32013-12-18 13:58:45 +0100773source "arch/arm/mach-moxart/Kconfig"
774
Stanislav Samsonov794d15b2008-06-22 22:45:10 +0200775source "arch/arm/mach-mv78xx0/Kconfig"
776
Shawn Guo3995eb82012-09-13 19:48:07 +0800777source "arch/arm/mach-imx/Kconfig"
Linus Torvalds1da177e2005-04-16 15:20:36 -0700778
Matthias Bruggerf682a212014-05-13 01:06:13 +0200779source "arch/arm/mach-mediatek/Kconfig"
780
Shawn Guo1d3f33d2010-12-13 20:55:03 +0800781source "arch/arm/mach-mxs/Kconfig"
782
Russell King95b8f202010-01-14 11:43:54 +0000783source "arch/arm/mach-netx/Kconfig"
Eric Miao49cbe782009-01-20 14:15:18 +0800784
Russell King95b8f202010-01-14 11:43:54 +0000785source "arch/arm/mach-nomadik/Kconfig"
Russell King95b8f202010-01-14 11:43:54 +0000786
Daniel Tang9851ca52013-06-11 18:40:17 +1000787source "arch/arm/mach-nspire/Kconfig"
788
Tony Lindgrend48af152005-07-10 19:58:17 +0100789source "arch/arm/plat-omap/Kconfig"
790
791source "arch/arm/mach-omap1/Kconfig"
Linus Torvalds1da177e2005-04-16 15:20:36 -0700792
Tony Lindgren1dbae812005-11-10 14:26:51 +0000793source "arch/arm/mach-omap2/Kconfig"
794
Lennert Buytenhek9dd0b192008-03-27 14:51:41 -0400795source "arch/arm/mach-orion5x/Kconfig"
Tzachi Perelstein585cf172007-10-23 15:14:41 -0400796
Rob Herring387798b2012-09-06 13:41:12 -0500797source "arch/arm/mach-picoxcell/Kconfig"
798
Russell King95b8f202010-01-14 11:43:54 +0000799source "arch/arm/mach-pxa/Kconfig"
800source "arch/arm/plat-pxa/Kconfig"
Linus Torvalds1da177e2005-04-16 15:20:36 -0700801
Russell King95b8f202010-01-14 11:43:54 +0000802source "arch/arm/mach-mmp/Kconfig"
803
Kumar Gala8fc1b0f2014-01-21 17:14:10 -0600804source "arch/arm/mach-qcom/Kconfig"
805
Russell King95b8f202010-01-14 11:43:54 +0000806source "arch/arm/mach-realview/Kconfig"
807
Heiko Stuebnerd63dc052013-06-02 23:09:41 +0200808source "arch/arm/mach-rockchip/Kconfig"
809
Russell King95b8f202010-01-14 11:43:54 +0000810source "arch/arm/mach-sa1100/Kconfig"
Saeed Bisharaedabd382009-08-06 15:12:43 +0300811
Rob Herring387798b2012-09-06 13:41:12 -0500812source "arch/arm/mach-socfpga/Kconfig"
813
Arnd Bergmanna7ed0992012-12-02 15:12:47 +0100814source "arch/arm/mach-spear/Kconfig"
Ben Dooksa21765a2007-02-11 18:31:01 +0100815
Srinivas Kandagatla65ebcc12013-06-25 12:15:10 +0100816source "arch/arm/mach-sti/Kconfig"
817
Kukjin Kim85fd6d62012-02-06 09:38:19 +0900818source "arch/arm/mach-s3c24xx/Kconfig"
Linus Torvalds1da177e2005-04-16 15:20:36 -0700819
Ben Dooks431107e2010-01-26 10:11:04 +0900820source "arch/arm/mach-s3c64xx/Kconfig"
Ben Dooksa08ab632008-10-21 14:06:39 +0100821
Kukjin Kim170f4e42010-02-24 16:40:44 +0900822source "arch/arm/mach-s5pv210/Kconfig"
823
Kukjin Kim83014572011-11-06 13:54:56 +0900824source "arch/arm/mach-exynos/Kconfig"
Rob Herringe509b282014-06-10 09:06:09 -0500825source "arch/arm/plat-samsung/Kconfig"
Changhwan Youncc0e72b2010-07-16 12:15:38 +0900826
Russell King882d01f2010-03-02 23:40:15 +0000827source "arch/arm/mach-shmobile/Kconfig"
Linus Torvalds1da177e2005-04-16 15:20:36 -0700828
Maxime Ripard3b526342012-11-08 12:40:16 +0100829source "arch/arm/mach-sunxi/Kconfig"
830
Barry Song156a0992012-08-23 13:41:58 +0800831source "arch/arm/mach-prima2/Kconfig"
832
Marc Gonzalezd6de5b02015-12-15 10:41:13 +0100833source "arch/arm/mach-tango/Kconfig"
834
Erik Gillingc5f80062010-01-21 16:53:02 -0800835source "arch/arm/mach-tegra/Kconfig"
836
Russell King95b8f202010-01-14 11:43:54 +0000837source "arch/arm/mach-u300/Kconfig"
Linus Torvalds1da177e2005-04-16 15:20:36 -0700838
Masahiro Yamadaba56a982015-05-08 13:07:11 +0900839source "arch/arm/mach-uniphier/Kconfig"
840
Russell King95b8f202010-01-14 11:43:54 +0000841source "arch/arm/mach-ux500/Kconfig"
Linus Torvalds1da177e2005-04-16 15:20:36 -0700842
843source "arch/arm/mach-versatile/Kconfig"
844
Russell Kingceade892010-02-11 21:44:53 +0000845source "arch/arm/mach-vexpress/Kconfig"
Russell King420c34e2011-01-18 20:08:06 +0000846source "arch/arm/plat-versatile/Kconfig"
Russell Kingceade892010-02-11 21:44:53 +0000847
Tony Prisk6f35f9a2012-10-11 20:13:09 +1300848source "arch/arm/mach-vt8500/Kconfig"
849
wanzongshun7ec80dd2008-12-03 03:55:38 +0100850source "arch/arm/mach-w90x900/Kconfig"
851
Jun Nieacede512015-04-28 17:18:05 +0800852source "arch/arm/mach-zx/Kconfig"
853
Josh Cartwright9a45eb62012-11-19 11:38:29 -0600854source "arch/arm/mach-zynq/Kconfig"
855
Stefan Agner499f1642015-05-21 00:35:44 +0200856# ARMv7-M architecture
857config ARCH_EFM32
858 bool "Energy Micro efm32"
859 depends on ARM_SINGLE_ARMV7M
860 select ARCH_REQUIRE_GPIOLIB
861 help
862 Support for Energy Micro's (now Silicon Labs) efm32 Giant Gecko
863 processors.
864
865config ARCH_LPC18XX
866 bool "NXP LPC18xx/LPC43xx"
867 depends on ARM_SINGLE_ARMV7M
868 select ARCH_HAS_RESET_CONTROLLER
869 select ARM_AMBA
870 select CLKSRC_LPC32XX
871 select PINCTRL
872 help
873 Support for NXP's LPC18xx Cortex-M3 and LPC43xx Cortex-M4
874 high performance microcontrollers.
875
876config ARCH_STM32
877 bool "STMicrolectronics STM32"
878 depends on ARM_SINGLE_ARMV7M
879 select ARCH_HAS_RESET_CONTROLLER
880 select ARMV7M_SYSTICK
Maxime Coquelin25263182015-05-22 23:50:52 +0200881 select CLKSRC_STM32
Stefan Agner499f1642015-05-21 00:35:44 +0200882 select RESET_CONTROLLER
883 help
884 Support for STMicroelectronics STM32 processors.
885
Linus Torvalds1da177e2005-04-16 15:20:36 -0700886# Definitions to make life easier
887config ARCH_ACORN
888 bool
889
Lennert Buytenhek7ae1f7e2006-09-18 23:12:53 +0100890config PLAT_IOP
891 bool
Mikael Pettersson469d30442009-10-29 11:46:54 -0700892 select GENERIC_CLOCKEVENTS
Lennert Buytenhek7ae1f7e2006-09-18 23:12:53 +0100893
Lennert Buytenhek69b02f62008-03-27 14:51:39 -0400894config PLAT_ORION
895 bool
Russell Kingbfe45e02011-05-08 15:33:30 +0100896 select CLKSRC_MMIO
Russell Kingb1b3f492012-10-06 17:12:25 +0100897 select COMMON_CLK
Russell Kingdc7ad3b2011-05-22 10:01:21 +0100898 select GENERIC_IRQ_CHIP
Andrew Lunn278b45b2012-06-27 13:40:04 +0200899 select IRQ_DOMAIN
Lennert Buytenhek69b02f62008-03-27 14:51:39 -0400900
Thomas Petazzoniabcda1d2012-09-11 14:27:27 +0200901config PLAT_ORION_LEGACY
902 bool
903 select PLAT_ORION
904
Eric Miaobd5ce432009-01-20 12:06:01 +0800905config PLAT_PXA
906 bool
907
Russell Kingf4b8b312010-01-14 12:48:06 +0000908config PLAT_VERSATILE
909 bool
910
Alexandre Courbotd9a1bea2013-11-24 15:30:46 +0900911source "arch/arm/firmware/Kconfig"
912
Linus Torvalds1da177e2005-04-16 15:20:36 -0700913source arch/arm/mm/Kconfig
914
Lennert Buytenhekafe4b252006-12-03 18:51:14 +0100915config IWMMXT
Sebastian Hesselbarthd93003e2014-04-24 22:58:30 +0100916 bool "Enable iWMMXt support"
917 depends on CPU_XSCALE || CPU_XSC3 || CPU_MOHAWK || CPU_PJ4 || CPU_PJ4B
918 default y if PXA27x || PXA3xx || ARCH_MMP || CPU_PJ4 || CPU_PJ4B
Lennert Buytenhekafe4b252006-12-03 18:51:14 +0100919 help
920 Enable support for iWMMXt context switching at run time if
921 running on a CPU that supports it.
922
eric miao52108642010-12-13 09:42:34 +0100923config MULTI_IRQ_HANDLER
924 bool
925 help
926 Allow each machine to specify it's own IRQ handler at run time.
927
Hyok S. Choi3b93e7b2006-06-22 11:48:56 +0100928if !MMU
929source "arch/arm/Kconfig-nommu"
930endif
931
Gregory CLEMENT3e0a07f2013-06-23 10:17:11 +0100932config PJ4B_ERRATA_4742
933 bool "PJ4B Errata 4742: IDLE Wake Up Commands can Cause the CPU Core to Cease Operation"
934 depends on CPU_PJ4B && MACH_ARMADA_370
935 default y
936 help
937 When coming out of either a Wait for Interrupt (WFI) or a Wait for
938 Event (WFE) IDLE states, a specific timing sensitivity exists between
939 the retiring WFI/WFE instructions and the newly issued subsequent
940 instructions. This sensitivity can result in a CPU hang scenario.
941 Workaround:
942 The software must insert either a Data Synchronization Barrier (DSB)
943 or Data Memory Barrier (DMB) command immediately after the WFI/WFE
944 instruction
945
Will Deaconf0c4b8d2012-04-20 17:20:08 +0100946config ARM_ERRATA_326103
947 bool "ARM errata: FSR write bit incorrect on a SWP to read-only memory"
948 depends on CPU_V6
949 help
950 Executing a SWP instruction to read-only memory does not set bit 11
951 of the FSR on the ARM 1136 prior to r1p0. This causes the kernel to
952 treat the access as a read, preventing a COW from occurring and
953 causing the faulting task to livelock.
954
Catalin Marinas9cba3cc2009-04-30 17:06:03 +0100955config ARM_ERRATA_411920
956 bool "ARM errata: Invalidation of the Instruction Cache operation can fail"
Russell Kinge399b1a2011-01-17 15:08:32 +0000957 depends on CPU_V6 || CPU_V6K
Catalin Marinas9cba3cc2009-04-30 17:06:03 +0100958 help
959 Invalidation of the Instruction Cache operation can
960 fail. This erratum is present in 1136 (before r1p4), 1156 and 1176.
961 It does not affect the MPCore. This option enables the ARM Ltd.
962 recommended workaround.
963
Catalin Marinas7ce236f2009-04-30 17:06:09 +0100964config ARM_ERRATA_430973
965 bool "ARM errata: Stale prediction on replaced interworking branch"
966 depends on CPU_V7
967 help
968 This option enables the workaround for the 430973 Cortex-A8
Russell King79403cd2015-04-13 16:14:37 +0100969 r1p* erratum. If a code sequence containing an ARM/Thumb
Catalin Marinas7ce236f2009-04-30 17:06:09 +0100970 interworking branch is replaced with another code sequence at the
971 same virtual address, whether due to self-modifying code or virtual
972 to physical address re-mapping, Cortex-A8 does not recover from the
973 stale interworking branch prediction. This results in Cortex-A8
974 executing the new code sequence in the incorrect ARM or Thumb state.
975 The workaround enables the BTB/BTAC operations by setting ACTLR.IBE
976 and also flushes the branch target cache at every context switch.
977 Note that setting specific bits in the ACTLR register may not be
978 available in non-secure mode.
979
Catalin Marinas855c5512009-04-30 17:06:15 +0100980config ARM_ERRATA_458693
981 bool "ARM errata: Processor deadlock when a false hazard is created"
982 depends on CPU_V7
Rob Herring62e4d352012-12-21 22:42:40 +0100983 depends on !ARCH_MULTIPLATFORM
Catalin Marinas855c5512009-04-30 17:06:15 +0100984 help
985 This option enables the workaround for the 458693 Cortex-A8 (r2p0)
986 erratum. For very specific sequences of memory operations, it is
987 possible for a hazard condition intended for a cache line to instead
988 be incorrectly associated with a different cache line. This false
989 hazard might then cause a processor deadlock. The workaround enables
990 the L1 caching of the NEON accesses and disables the PLD instruction
991 in the ACTLR register. Note that setting specific bits in the ACTLR
992 register may not be available in non-secure mode.
993
Catalin Marinas0516e462009-04-30 17:06:20 +0100994config ARM_ERRATA_460075
995 bool "ARM errata: Data written to the L2 cache can be overwritten with stale data"
996 depends on CPU_V7
Rob Herring62e4d352012-12-21 22:42:40 +0100997 depends on !ARCH_MULTIPLATFORM
Catalin Marinas0516e462009-04-30 17:06:20 +0100998 help
999 This option enables the workaround for the 460075 Cortex-A8 (r2p0)
1000 erratum. Any asynchronous access to the L2 cache may encounter a
1001 situation in which recent store transactions to the L2 cache are lost
1002 and overwritten with stale memory contents from external memory. The
1003 workaround disables the write-allocate mode for the L2 cache via the
1004 ACTLR register. Note that setting specific bits in the ACTLR register
1005 may not be available in non-secure mode.
1006
Will Deacon9f050272010-09-14 09:51:43 +01001007config ARM_ERRATA_742230
1008 bool "ARM errata: DMB operation may be faulty"
1009 depends on CPU_V7 && SMP
Rob Herring62e4d352012-12-21 22:42:40 +01001010 depends on !ARCH_MULTIPLATFORM
Will Deacon9f050272010-09-14 09:51:43 +01001011 help
1012 This option enables the workaround for the 742230 Cortex-A9
1013 (r1p0..r2p2) erratum. Under rare circumstances, a DMB instruction
1014 between two write operations may not ensure the correct visibility
1015 ordering of the two writes. This workaround sets a specific bit in
1016 the diagnostic register of the Cortex-A9 which causes the DMB
1017 instruction to behave as a DSB, ensuring the correct behaviour of
1018 the two writes.
1019
Will Deacona672e992010-09-14 09:53:02 +01001020config ARM_ERRATA_742231
1021 bool "ARM errata: Incorrect hazard handling in the SCU may lead to data corruption"
1022 depends on CPU_V7 && SMP
Rob Herring62e4d352012-12-21 22:42:40 +01001023 depends on !ARCH_MULTIPLATFORM
Will Deacona672e992010-09-14 09:53:02 +01001024 help
1025 This option enables the workaround for the 742231 Cortex-A9
1026 (r2p0..r2p2) erratum. Under certain conditions, specific to the
1027 Cortex-A9 MPCore micro-architecture, two CPUs working in SMP mode,
1028 accessing some data located in the same cache line, may get corrupted
1029 data due to bad handling of the address hazard when the line gets
1030 replaced from one of the CPUs at the same time as another CPU is
1031 accessing it. This workaround sets specific bits in the diagnostic
1032 register of the Cortex-A9 which reduces the linefill issuing
1033 capabilities of the processor.
1034
Jon Medhurst69155792013-06-07 10:35:35 +01001035config ARM_ERRATA_643719
1036 bool "ARM errata: LoUIS bit field in CLIDR register is incorrect"
1037 depends on CPU_V7 && SMP
Russell Kinge5a5de42015-04-02 23:58:55 +01001038 default y
Jon Medhurst69155792013-06-07 10:35:35 +01001039 help
1040 This option enables the workaround for the 643719 Cortex-A9 (prior to
1041 r1p0) erratum. On affected cores the LoUIS bit field of the CLIDR
1042 register returns zero when it should return one. The workaround
1043 corrects this value, ensuring cache maintenance operations which use
1044 it behave as intended and avoiding data corruption.
1045
Will Deaconcdf357f2010-08-05 11:20:51 +01001046config ARM_ERRATA_720789
1047 bool "ARM errata: TLBIASIDIS and TLBIMVAIS operations can broadcast a faulty ASID"
Dave Martine66dc742011-12-08 13:37:46 +01001048 depends on CPU_V7
Will Deaconcdf357f2010-08-05 11:20:51 +01001049 help
1050 This option enables the workaround for the 720789 Cortex-A9 (prior to
1051 r2p0) erratum. A faulty ASID can be sent to the other CPUs for the
1052 broadcasted CP15 TLB maintenance operations TLBIASIDIS and TLBIMVAIS.
1053 As a consequence of this erratum, some TLB entries which should be
1054 invalidated are not, resulting in an incoherency in the system page
1055 tables. The workaround changes the TLB flushing routines to invalidate
1056 entries regardless of the ASID.
Will Deacon475d92f2010-09-28 14:02:02 +01001057
1058config ARM_ERRATA_743622
1059 bool "ARM errata: Faulty hazard checking in the Store Buffer may lead to data corruption"
1060 depends on CPU_V7
Rob Herring62e4d352012-12-21 22:42:40 +01001061 depends on !ARCH_MULTIPLATFORM
Will Deacon475d92f2010-09-28 14:02:02 +01001062 help
1063 This option enables the workaround for the 743622 Cortex-A9
Will Deaconefbc74a2012-02-24 12:12:38 +01001064 (r2p*) erratum. Under very rare conditions, a faulty
Will Deacon475d92f2010-09-28 14:02:02 +01001065 optimisation in the Cortex-A9 Store Buffer may lead to data
1066 corruption. This workaround sets a specific bit in the diagnostic
1067 register of the Cortex-A9 which disables the Store Buffer
1068 optimisation, preventing the defect from occurring. This has no
1069 visible impact on the overall performance or power consumption of the
1070 processor.
1071
Will Deacon9a27c272011-02-18 16:36:35 +01001072config ARM_ERRATA_751472
1073 bool "ARM errata: Interrupted ICIALLUIS may prevent completion of broadcasted operation"
Dave Martinba90c512011-12-08 13:41:06 +01001074 depends on CPU_V7
Rob Herring62e4d352012-12-21 22:42:40 +01001075 depends on !ARCH_MULTIPLATFORM
Will Deacon9a27c272011-02-18 16:36:35 +01001076 help
1077 This option enables the workaround for the 751472 Cortex-A9 (prior
1078 to r3p0) erratum. An interrupted ICIALLUIS operation may prevent the
1079 completion of a following broadcasted operation if the second
1080 operation is received by a CPU before the ICIALLUIS has completed,
1081 potentially leading to corrupted entries in the cache or TLB.
1082
Will Deaconfcbdc5fe2011-02-28 18:15:16 +01001083config ARM_ERRATA_754322
1084 bool "ARM errata: possible faulty MMU translations following an ASID switch"
1085 depends on CPU_V7
1086 help
1087 This option enables the workaround for the 754322 Cortex-A9 (r2p*,
1088 r3p*) erratum. A speculative memory access may cause a page table walk
1089 which starts prior to an ASID switch but completes afterwards. This
1090 can populate the micro-TLB with a stale entry which may be hit with
1091 the new ASID. This workaround places two dsb instructions in the mm
1092 switching code so that no page table walks can cross the ASID switch.
1093
Will Deacon5dab26a2011-03-04 12:38:54 +01001094config ARM_ERRATA_754327
1095 bool "ARM errata: no automatic Store Buffer drain"
1096 depends on CPU_V7 && SMP
1097 help
1098 This option enables the workaround for the 754327 Cortex-A9 (prior to
1099 r2p0) erratum. The Store Buffer does not have any automatic draining
1100 mechanism and therefore a livelock may occur if an external agent
1101 continuously polls a memory location waiting to observe an update.
1102 This workaround defines cpu_relax() as smp_mb(), preventing correctly
1103 written polling loops from denying visibility of updates to memory.
1104
Catalin Marinas145e10e2011-08-15 11:04:41 +01001105config ARM_ERRATA_364296
1106 bool "ARM errata: Possible cache data corruption with hit-under-miss enabled"
Fabio Estevamfd832472013-07-09 18:34:01 +01001107 depends on CPU_V6
Catalin Marinas145e10e2011-08-15 11:04:41 +01001108 help
1109 This options enables the workaround for the 364296 ARM1136
1110 r0p2 erratum (possible cache data corruption with
1111 hit-under-miss enabled). It sets the undocumented bit 31 in
1112 the auxiliary control register and the FI bit in the control
1113 register, thus disabling hit-under-miss without putting the
1114 processor into full low interrupt latency mode. ARM11MPCore
1115 is not affected.
1116
Will Deaconf630c1b2011-09-15 11:45:15 +01001117config ARM_ERRATA_764369
1118 bool "ARM errata: Data cache line maintenance operation by MVA may not succeed"
1119 depends on CPU_V7 && SMP
1120 help
1121 This option enables the workaround for erratum 764369
1122 affecting Cortex-A9 MPCore with two or more processors (all
1123 current revisions). Under certain timing circumstances, a data
1124 cache line maintenance operation by MVA targeting an Inner
1125 Shareable memory region may fail to proceed up to either the
1126 Point of Coherency or to the Point of Unification of the
1127 system. This workaround adds a DSB instruction before the
1128 relevant cache maintenance functions and sets a specific bit
1129 in the diagnostic control register of the SCU.
1130
Simon Horman7253b852012-09-28 02:12:45 +01001131config ARM_ERRATA_775420
1132 bool "ARM errata: A data cache maintenance operation which aborts, might lead to deadlock"
1133 depends on CPU_V7
1134 help
1135 This option enables the workaround for the 775420 Cortex-A9 (r2p2,
1136 r2p6,r2p8,r2p10,r3p0) erratum. In case a date cache maintenance
1137 operation aborts with MMU exception, it might cause the processor
1138 to deadlock. This workaround puts DSB before executing ISB if
1139 an abort may occur on cache maintenance.
1140
Catalin Marinas93dc6882013-03-26 23:35:04 +01001141config ARM_ERRATA_798181
1142 bool "ARM errata: TLBI/DSB failure on Cortex-A15"
1143 depends on CPU_V7 && SMP
1144 help
1145 On Cortex-A15 (r0p0..r3p2) the TLBI*IS/DSB operations are not
1146 adequately shooting down all use of the old entries. This
1147 option enables the Linux kernel workaround for this erratum
1148 which sends an IPI to the CPUs that are running the same ASID
1149 as the one being invalidated.
1150
Will Deacon84b65042013-08-20 17:29:55 +01001151config ARM_ERRATA_773022
1152 bool "ARM errata: incorrect instructions may be executed from loop buffer"
1153 depends on CPU_V7
1154 help
1155 This option enables the workaround for the 773022 Cortex-A15
1156 (up to r0p4) erratum. In certain rare sequences of code, the
1157 loop buffer may deliver incorrect instructions. This
1158 workaround disables the loop buffer to avoid the erratum.
1159
Linus Torvalds1da177e2005-04-16 15:20:36 -07001160endmenu
1161
1162source "arch/arm/common/Kconfig"
1163
Linus Torvalds1da177e2005-04-16 15:20:36 -07001164menu "Bus support"
1165
Linus Torvalds1da177e2005-04-16 15:20:36 -07001166config ISA
1167 bool
Linus Torvalds1da177e2005-04-16 15:20:36 -07001168 help
1169 Find out whether you have ISA slots on your motherboard. ISA is the
1170 name of a bus system, i.e. the way the CPU talks to the other stuff
1171 inside your box. Other bus systems are PCI, EISA, MicroChannel
1172 (MCA) or VESA. ISA is an older system, now being displaced by PCI;
1173 newer boards don't support it. If you have ISA, say Y, otherwise N.
1174
Russell King065909b2006-01-04 15:44:16 +00001175# Select ISA DMA controller support
Linus Torvalds1da177e2005-04-16 15:20:36 -07001176config ISA_DMA
1177 bool
Russell King065909b2006-01-04 15:44:16 +00001178 select ISA_DMA_API
Linus Torvalds1da177e2005-04-16 15:20:36 -07001179
Russell King065909b2006-01-04 15:44:16 +00001180# Select ISA DMA interface
Al Viro5cae8412005-05-04 05:39:22 +01001181config ISA_DMA_API
1182 bool
Al Viro5cae8412005-05-04 05:39:22 +01001183
Linus Torvalds1da177e2005-04-16 15:20:36 -07001184config PCI
Hans Ulli Kroll0b05da72010-12-02 12:32:15 +01001185 bool "PCI support" if MIGHT_HAVE_PCI
Linus Torvalds1da177e2005-04-16 15:20:36 -07001186 help
1187 Find out whether you have a PCI motherboard. PCI is the name of a
1188 bus system, i.e. the way the CPU talks to the other stuff inside
1189 your box. Other bus systems are ISA, EISA, MicroChannel (MCA) or
1190 VESA. If you have PCI, say Y, otherwise N.
1191
Anton Vorontsov52882172010-04-19 13:20:49 +01001192config PCI_DOMAINS
1193 bool
1194 depends on PCI
1195
Lorenzo Pieralisi8c7d14742014-11-21 11:29:26 +00001196config PCI_DOMAINS_GENERIC
1197 def_bool PCI_DOMAINS
1198
Marcelo Roberto Jimenezb080ac82010-12-16 21:34:51 +01001199config PCI_NANOENGINE
1200 bool "BSE nanoEngine PCI support"
1201 depends on SA1100_NANOENGINE
1202 help
1203 Enable PCI on the BSE nanoEngine board.
1204
Matthew Wilcox36e23592007-07-10 10:54:40 -06001205config PCI_SYSCALL
1206 def_bool PCI
1207
Mike Rapoporta0113a92007-11-25 08:55:34 +01001208config PCI_HOST_ITE8152
1209 bool
1210 depends on PCI && MACH_ARMCORE
1211 default y
1212 select DMABOUNCE
1213
Linus Torvalds1da177e2005-04-16 15:20:36 -07001214source "drivers/pci/Kconfig"
Jingoo Han3f06d152013-06-21 16:25:29 +09001215source "drivers/pci/pcie/Kconfig"
Linus Torvalds1da177e2005-04-16 15:20:36 -07001216
1217source "drivers/pcmcia/Kconfig"
1218
1219endmenu
1220
1221menu "Kernel Features"
1222
Dave Martin3b556582011-12-07 15:38:04 +00001223config HAVE_SMP
1224 bool
1225 help
1226 This option should be selected by machines which have an SMP-
1227 capable CPU.
1228
1229 The only effect of this option is to make the SMP-related
1230 options available to the user for configuration.
1231
Linus Torvalds1da177e2005-04-16 15:20:36 -07001232config SMP
Russell Kingbb2d8132011-05-12 09:52:02 +01001233 bool "Symmetric Multi-Processing"
Russell Kingfbb4dda2011-01-17 18:01:58 +00001234 depends on CPU_V6K || CPU_V7
Russell Kingbc282482009-05-17 18:58:34 +01001235 depends on GENERIC_CLOCKEVENTS
Dave Martin3b556582011-12-07 15:38:04 +00001236 depends on HAVE_SMP
Jonathan Austin801bb212013-02-22 18:56:04 +00001237 depends on MMU || ARM_MPU
Arnd Bergmann03617482015-05-26 15:36:58 +01001238 select IRQ_WORK
Linus Torvalds1da177e2005-04-16 15:20:36 -07001239 help
1240 This enables support for systems with more than one CPU. If you have
Robert Graffham4a474152014-01-23 15:55:29 -08001241 a system with only one CPU, say N. If you have a system with more
1242 than one CPU, say Y.
Linus Torvalds1da177e2005-04-16 15:20:36 -07001243
Robert Graffham4a474152014-01-23 15:55:29 -08001244 If you say N here, the kernel will run on uni- and multiprocessor
Linus Torvalds1da177e2005-04-16 15:20:36 -07001245 machines, but will use only one CPU of a multiprocessor machine. If
Robert Graffham4a474152014-01-23 15:55:29 -08001246 you say Y here, the kernel will run on many, but not all,
1247 uniprocessor machines. On a uniprocessor machine, the kernel
1248 will run faster if you say N here.
Linus Torvalds1da177e2005-04-16 15:20:36 -07001249
Paul Bolle395cf962011-08-15 02:02:26 +02001250 See also <file:Documentation/x86/i386/IO-APIC.txt>,
Linus Torvalds1da177e2005-04-16 15:20:36 -07001251 <file:Documentation/nmi_watchdog.txt> and the SMP-HOWTO available at
Justin P. Mattock50a23e62010-10-16 10:36:23 -07001252 <http://tldp.org/HOWTO/SMP-HOWTO.html>.
Linus Torvalds1da177e2005-04-16 15:20:36 -07001253
1254 If you don't know what to do here, say N.
1255
Russell Kingf00ec482010-09-04 10:47:48 +01001256config SMP_ON_UP
Russell King5744ff42015-02-13 11:04:21 +00001257 bool "Allow booting SMP kernel on uniprocessor systems"
Jonathan Austin801bb212013-02-22 18:56:04 +00001258 depends on SMP && !XIP_KERNEL && MMU
Russell Kingf00ec482010-09-04 10:47:48 +01001259 default y
1260 help
1261 SMP kernels contain instructions which fail on non-SMP processors.
1262 Enabling this option allows the kernel to modify itself to make
1263 these instructions safe. Disabling it allows about 1K of space
1264 savings.
1265
1266 If you don't know what to do here, say Y.
1267
Vincent Guittotc9018aa2011-08-08 13:21:59 +01001268config ARM_CPU_TOPOLOGY
1269 bool "Support cpu topology definition"
1270 depends on SMP && CPU_V7
1271 default y
1272 help
1273 Support ARM cpu topology definition. The MPIDR register defines
1274 affinity between processors which is then used to describe the cpu
1275 topology of an ARM System.
1276
1277config SCHED_MC
1278 bool "Multi-core scheduler support"
1279 depends on ARM_CPU_TOPOLOGY
1280 help
1281 Multi-core scheduler support improves the CPU scheduler's decision
1282 making when dealing with multi-core CPU chips at a cost of slightly
1283 increased overhead in some places. If unsure say N here.
1284
1285config SCHED_SMT
1286 bool "SMT scheduler support"
1287 depends on ARM_CPU_TOPOLOGY
1288 help
1289 Improves the CPU scheduler's decision making when dealing with
1290 MultiThreading at a cost of slightly increased overhead in some
1291 places. If unsure say N here.
1292
Russell Kinga8cbcd92009-05-16 11:51:14 +01001293config HAVE_ARM_SCU
1294 bool
Russell Kinga8cbcd92009-05-16 11:51:14 +01001295 help
1296 This option enables support for the ARM system coherency unit
1297
Mark Rutland8a4da6e2012-11-12 14:33:44 +00001298config HAVE_ARM_ARCH_TIMER
Marc Zyngier022c03a2012-01-11 17:25:17 +00001299 bool "Architected timer support"
1300 depends on CPU_V7
Mark Rutland8a4da6e2012-11-12 14:33:44 +00001301 select ARM_ARCH_TIMER
Will Deacon0c4034622013-11-19 15:46:17 +01001302 select GENERIC_CLOCKEVENTS
Marc Zyngier022c03a2012-01-11 17:25:17 +00001303 help
1304 This option enables support for the ARM architected timer
1305
Russell Kingf32f4ce2009-05-16 12:14:21 +01001306config HAVE_ARM_TWD
1307 bool
Rob Herringda4a6862013-02-06 21:17:47 -06001308 select CLKSRC_OF if OF
Russell Kingf32f4ce2009-05-16 12:14:21 +01001309 help
1310 This options enables support for the ARM timer and watchdog unit
1311
Nicolas Pitree8db2882012-04-12 02:45:22 -04001312config MCPM
1313 bool "Multi-Cluster Power Management"
1314 depends on CPU_V7 && SMP
1315 help
1316 This option provides the common power management infrastructure
1317 for (multi-)cluster based systems, such as big.LITTLE based
1318 systems.
1319
Haojian Zhuangebf4a5c2014-04-15 14:52:00 +08001320config MCPM_QUAD_CLUSTER
1321 bool
1322 depends on MCPM
1323 help
1324 To avoid wasting resources unnecessarily, MCPM only supports up
1325 to 2 clusters by default.
1326 Platforms with 3 or 4 clusters that use MCPM must select this
1327 option to allow the additional clusters to be managed.
1328
Nicolas Pitre1c33be52012-04-12 02:56:10 -04001329config BIG_LITTLE
1330 bool "big.LITTLE support (Experimental)"
1331 depends on CPU_V7 && SMP
1332 select MCPM
1333 help
1334 This option enables support selections for the big.LITTLE
1335 system architecture.
1336
1337config BL_SWITCHER
1338 bool "big.LITTLE switcher support"
Arnd Bergmann6c044fe2015-11-19 15:49:23 +01001339 depends on BIG_LITTLE && MCPM && HOTPLUG_CPU && ARM_GIC
Nicolas Pitre1c33be52012-04-12 02:56:10 -04001340 select ARM_CPU_SUSPEND
Russell King51aaf812014-04-22 22:26:27 +01001341 select CPU_PM
Nicolas Pitre1c33be52012-04-12 02:56:10 -04001342 help
1343 The big.LITTLE "switcher" provides the core functionality to
1344 transparently handle transition between a cluster of A15's
1345 and a cluster of A7's in a big.LITTLE system.
1346
Nicolas Pitreb22537c2012-04-12 03:04:28 -04001347config BL_SWITCHER_DUMMY_IF
1348 tristate "Simple big.LITTLE switcher user interface"
1349 depends on BL_SWITCHER && DEBUG_KERNEL
1350 help
1351 This is a simple and dummy char dev interface to control
1352 the big.LITTLE switcher core code. It is meant for
1353 debugging purposes only.
1354
Lennert Buytenhek8d5796d2008-08-25 21:03:32 +01001355choice
1356 prompt "Memory split"
Russell King006fa252014-02-26 19:40:46 +00001357 depends on MMU
Lennert Buytenhek8d5796d2008-08-25 21:03:32 +01001358 default VMSPLIT_3G
1359 help
1360 Select the desired split between kernel and user memory.
1361
1362 If you are not absolutely sure what you are doing, leave this
1363 option alone!
1364
1365 config VMSPLIT_3G
1366 bool "3G/1G user/kernel split"
Nicolas Pitre63ce4462015-09-13 03:30:11 +01001367 config VMSPLIT_3G_OPT
1368 bool "3G/1G user/kernel split (for full 1G low memory)"
Lennert Buytenhek8d5796d2008-08-25 21:03:32 +01001369 config VMSPLIT_2G
1370 bool "2G/2G user/kernel split"
1371 config VMSPLIT_1G
1372 bool "1G/3G user/kernel split"
1373endchoice
1374
1375config PAGE_OFFSET
1376 hex
Russell King006fa252014-02-26 19:40:46 +00001377 default PHYS_OFFSET if !MMU
Lennert Buytenhek8d5796d2008-08-25 21:03:32 +01001378 default 0x40000000 if VMSPLIT_1G
1379 default 0x80000000 if VMSPLIT_2G
Nicolas Pitre63ce4462015-09-13 03:30:11 +01001380 default 0xB0000000 if VMSPLIT_3G_OPT
Lennert Buytenhek8d5796d2008-08-25 21:03:32 +01001381 default 0xC0000000
1382
Linus Torvalds1da177e2005-04-16 15:20:36 -07001383config NR_CPUS
1384 int "Maximum number of CPUs (2-32)"
1385 range 2 32
1386 depends on SMP
1387 default "4"
1388
Russell Kinga054a812005-11-02 22:24:33 +00001389config HOTPLUG_CPU
Russell King00b7ded2012-10-22 22:54:30 +01001390 bool "Support for hot-pluggable CPUs"
Stephen Rothwell40b31362013-05-21 13:49:35 +10001391 depends on SMP
Russell Kinga054a812005-11-02 22:24:33 +00001392 help
1393 Say Y here to experiment with turning CPUs off and on. CPUs
1394 can be controlled through /sys/devices/system/cpu.
1395
Will Deacon2bdd4242012-12-12 19:20:52 +00001396config ARM_PSCI
1397 bool "Support for the ARM Power State Coordination Interface (PSCI)"
Jens Wiklandere6796602016-01-04 15:46:47 +01001398 depends on HAVE_ARM_SMCCC
Mark Rutlandbe120392015-07-31 15:46:19 +01001399 select ARM_PSCI_FW
Will Deacon2bdd4242012-12-12 19:20:52 +00001400 help
1401 Say Y here if you want Linux to communicate with system firmware
1402 implementing the PSCI specification for CPU-centric power
1403 management operations described in ARM document number ARM DEN
1404 0022A ("Power State Coordination Interface System Software on
1405 ARM processors").
1406
Maxime Ripard2a6ad872013-02-03 12:24:48 +01001407# The GPIO number here must be sorted by descending number. In case of
1408# a multiplatform kernel, we just want the highest value required by the
1409# selected platforms.
Peter De Schrijver (NVIDIA)44986ab2011-12-21 10:48:45 +01001410config ARCH_NR_GPIO
1411 int
Gregory Fongb35d2e52015-05-28 19:14:10 -07001412 default 1024 if ARCH_BRCMSTB || ARCH_SHMOBILE || ARCH_TEGRA || \
1413 ARCH_ZYNQ
Tomasz Figaaa425872014-07-03 13:17:12 +02001414 default 512 if ARCH_EXYNOS || ARCH_KEYSTONE || SOC_OMAP5 || \
1415 SOC_DRA7XX || ARCH_S3C24XX || ARCH_S3C64XX || ARCH_S5PV210
Boris BREZILLONeb171a92014-04-10 15:52:46 +02001416 default 416 if ARCH_SUNXI
Olof Johansson06b851e2013-04-02 18:33:58 -07001417 default 392 if ARCH_U8500
Tony Prisk01bb9142013-03-09 18:22:30 +13001418 default 352 if ARCH_VT8500
Heiko Stuebner7b5da4c2014-05-26 00:13:51 +02001419 default 288 if ARCH_ROCKCHIP
Maxime Ripard2a6ad872013-02-03 12:24:48 +01001420 default 264 if MACH_H4700
Peter De Schrijver (NVIDIA)44986ab2011-12-21 10:48:45 +01001421 default 0
1422 help
1423 Maximum number of GPIOs in the system.
1424
1425 If unsure, leave the default value.
1426
Uwe Kleine-Königd45a3982009-08-13 20:38:17 +02001427source kernel/Kconfig.preempt
Linus Torvalds1da177e2005-04-16 15:20:36 -07001428
Russell Kingc9218b12013-04-27 23:31:10 +01001429config HZ_FIXED
Russell Kingf8065812006-03-02 22:41:59 +00001430 int
Kukjin Kim070b8b42014-07-02 07:50:15 +09001431 default 200 if ARCH_EBSA110 || ARCH_S3C24XX || \
Kukjin Kima73ddc62011-05-11 16:27:51 +09001432 ARCH_S5PV210 || ARCH_EXYNOS4
Alexandre Belloni1164f672015-03-13 22:57:24 +01001433 default 128 if SOC_AT91RM9200
Russell King47d84682013-09-10 23:47:55 +01001434 default 0
Russell Kingc9218b12013-04-27 23:31:10 +01001435
1436choice
Russell King47d84682013-09-10 23:47:55 +01001437 depends on HZ_FIXED = 0
Russell Kingc9218b12013-04-27 23:31:10 +01001438 prompt "Timer frequency"
1439
1440config HZ_100
1441 bool "100 Hz"
1442
1443config HZ_200
1444 bool "200 Hz"
1445
1446config HZ_250
1447 bool "250 Hz"
1448
1449config HZ_300
1450 bool "300 Hz"
1451
1452config HZ_500
1453 bool "500 Hz"
1454
1455config HZ_1000
1456 bool "1000 Hz"
1457
1458endchoice
1459
1460config HZ
1461 int
Russell King47d84682013-09-10 23:47:55 +01001462 default HZ_FIXED if HZ_FIXED != 0
Russell Kingc9218b12013-04-27 23:31:10 +01001463 default 100 if HZ_100
1464 default 200 if HZ_200
1465 default 250 if HZ_250
1466 default 300 if HZ_300
1467 default 500 if HZ_500
1468 default 1000
1469
1470config SCHED_HRTICK
1471 def_bool HIGH_RES_TIMERS
Russell Kingf8065812006-03-02 22:41:59 +00001472
Catalin Marinas16c79652009-07-24 12:33:02 +01001473config THUMB2_KERNEL
Uwe Kleine-Königbc7dea02011-12-09 20:52:10 +01001474 bool "Compile the kernel in Thumb-2 mode" if !CPU_THUMBONLY
Uwe Kleine-König4477ca42013-03-21 21:02:37 +01001475 depends on (CPU_V7 || CPU_V7M) && !CPU_V6 && !CPU_V6K
Uwe Kleine-Königbc7dea02011-12-09 20:52:10 +01001476 default y if CPU_THUMBONLY
Catalin Marinas16c79652009-07-24 12:33:02 +01001477 select AEABI
1478 select ARM_ASM_UNIFIED
Arnd Bergmann89bace62011-06-10 14:12:21 +00001479 select ARM_UNWIND
Catalin Marinas16c79652009-07-24 12:33:02 +01001480 help
1481 By enabling this option, the kernel will be compiled in
1482 Thumb-2 mode. A compiler/assembler that understand the unified
1483 ARM-Thumb syntax is needed.
1484
1485 If unsure, say N.
1486
Dave Martin6f685c52011-03-03 11:41:12 +01001487config THUMB2_AVOID_R_ARM_THM_JUMP11
1488 bool "Work around buggy Thumb-2 short branch relocations in gas"
1489 depends on THUMB2_KERNEL && MODULES
1490 default y
1491 help
1492 Various binutils versions can resolve Thumb-2 branches to
1493 locally-defined, preemptible global symbols as short-range "b.n"
1494 branch instructions.
1495
1496 This is a problem, because there's no guarantee the final
1497 destination of the symbol, or any candidate locations for a
1498 trampoline, are within range of the branch. For this reason, the
1499 kernel does not support fixing up the R_ARM_THM_JUMP11 (102)
1500 relocation in modules at all, and it makes little sense to add
1501 support.
1502
1503 The symptom is that the kernel fails with an "unsupported
1504 relocation" error when loading some modules.
1505
1506 Until fixed tools are available, passing
1507 -fno-optimize-sibling-calls to gcc should prevent gcc generating
1508 code which hits this problem, at the cost of a bit of extra runtime
1509 stack usage in some cases.
1510
1511 The problem is described in more detail at:
1512 https://bugs.launchpad.net/binutils-linaro/+bug/725126
1513
1514 Only Thumb-2 kernels are affected.
1515
1516 Unless you are sure your tools don't have this problem, say Y.
1517
Catalin Marinas0becb082009-07-24 12:32:53 +01001518config ARM_ASM_UNIFIED
1519 bool
1520
Nicolas Pitre42f25bd2015-12-12 02:49:21 +01001521config ARM_PATCH_IDIV
1522 bool "Runtime patch udiv/sdiv instructions into __aeabi_{u}idiv()"
1523 depends on CPU_32v7 && !XIP_KERNEL
1524 default y
1525 help
1526 The ARM compiler inserts calls to __aeabi_idiv() and
1527 __aeabi_uidiv() when it needs to perform division on signed
1528 and unsigned integers. Some v7 CPUs have support for the sdiv
1529 and udiv instructions that can be used to implement those
1530 functions.
1531
1532 Enabling this option allows the kernel to modify itself to
1533 replace the first two instructions of these library functions
1534 with the sdiv or udiv plus "bx lr" instructions when the CPU
1535 it is running on supports them. Typically this will be faster
1536 and less power intensive than running the original library
1537 code to do integer division.
1538
Nicolas Pitre704bdda2006-01-14 16:33:50 +00001539config AEABI
1540 bool "Use the ARM EABI to compile the kernel"
1541 help
1542 This option allows for the kernel to be compiled using the latest
1543 ARM ABI (aka EABI). This is only useful if you are using a user
1544 space environment that is also compiled with EABI.
1545
1546 Since there are major incompatibilities between the legacy ABI and
1547 EABI, especially with regard to structure member alignment, this
1548 option also changes the kernel syscall calling convention to
1549 disambiguate both ABIs and allow for backward compatibility support
1550 (selected with CONFIG_OABI_COMPAT).
1551
1552 To use this you need GCC version 4.0.0 or later.
1553
Nicolas Pitre6c90c872006-01-14 16:37:15 +00001554config OABI_COMPAT
Russell Kinga73a3ff2006-02-08 21:09:55 +00001555 bool "Allow old ABI binaries to run with this kernel (EXPERIMENTAL)"
Kees Cookd6f94fa2013-01-16 18:53:14 -08001556 depends on AEABI && !THUMB2_KERNEL
Nicolas Pitre6c90c872006-01-14 16:37:15 +00001557 help
1558 This option preserves the old syscall interface along with the
1559 new (ARM EABI) one. It also provides a compatibility layer to
1560 intercept syscalls that have structure arguments which layout
1561 in memory differs between the legacy ABI and the new ARM EABI
1562 (only for non "thumb" binaries). This option adds a tiny
1563 overhead to all syscalls and produces a slightly larger kernel.
Kees Cook91702172013-11-09 00:51:56 +01001564
1565 The seccomp filter system will not be available when this is
1566 selected, since there is no way yet to sensibly distinguish
1567 between calling conventions during filtering.
1568
Nicolas Pitre6c90c872006-01-14 16:37:15 +00001569 If you know you'll be using only pure EABI user space then you
1570 can say N here. If this option is not selected and you attempt
1571 to execute a legacy ABI binary then the result will be
1572 UNPREDICTABLE (in fact it can be predicted that it won't work
Kees Cookb02f8462013-11-09 00:31:11 +01001573 at all). If in doubt say N.
Nicolas Pitre6c90c872006-01-14 16:37:15 +00001574
Mel Gormaneb335752009-05-13 17:34:48 +01001575config ARCH_HAS_HOLES_MEMORYMODEL
Mel Gormane80d6a22008-08-14 11:10:14 +01001576 bool
Mel Gormane80d6a22008-08-14 11:10:14 +01001577
Russell King05944d72006-11-30 20:43:51 +00001578config ARCH_SPARSEMEM_ENABLE
1579 bool
1580
Russell King07a2f732008-10-01 21:39:58 +01001581config ARCH_SPARSEMEM_DEFAULT
1582 def_bool ARCH_SPARSEMEM_ENABLE
1583
Russell King05944d72006-11-30 20:43:51 +00001584config ARCH_SELECT_MEMORY_MODEL
Russell Kingbe370302010-05-07 17:40:33 +01001585 def_bool ARCH_SPARSEMEM_ENABLE
Yasunori Gotoc80d79d2006-04-10 22:53:53 -07001586
Will Deacon7b7bf492011-05-19 13:21:14 +01001587config HAVE_ARCH_PFN_VALID
1588 def_bool ARCH_HAS_HOLES_MEMORYMODEL || !SPARSEMEM
1589
Steve Capperb8cd51a2014-10-09 15:29:20 -07001590config HAVE_GENERIC_RCU_GUP
1591 def_bool y
1592 depends on ARM_LPAE
1593
Nicolas Pitre053a96c2008-09-19 00:36:12 -04001594config HIGHMEM
Russell Kinge8db89a2011-05-12 09:53:05 +01001595 bool "High Memory Support"
1596 depends on MMU
Nicolas Pitre053a96c2008-09-19 00:36:12 -04001597 help
1598 The address space of ARM processors is only 4 Gigabytes large
1599 and it has to accommodate user address space, kernel address
1600 space as well as some memory mapped IO. That means that, if you
1601 have a large amount of physical memory and/or IO, not all of the
1602 memory can be "permanently mapped" by the kernel. The physical
1603 memory that is not permanently mapped is called "high memory".
1604
1605 Depending on the selected kernel/user memory split, minimum
1606 vmalloc space and actual amount of RAM, you may not need this
1607 option which should result in a slightly faster kernel.
1608
1609 If unsure, say n.
1610
Russell King65cec8e2009-08-17 20:02:06 +01001611config HIGHPTE
Russell King9a431bd2015-06-25 10:44:08 +01001612 bool "Allocate 2nd-level pagetables from highmem" if EXPERT
Russell King65cec8e2009-08-17 20:02:06 +01001613 depends on HIGHMEM
Russell King9a431bd2015-06-25 10:44:08 +01001614 default y
Russell Kingb4d103d2015-06-25 10:49:45 +01001615 help
1616 The VM uses one page of physical memory for each page table.
1617 For systems with a lot of processes, this can use a lot of
1618 precious low memory, eventually leading to low memory being
1619 consumed by page tables. Setting this option will allow
1620 user-space 2nd level page tables to reside in high memory.
Russell King65cec8e2009-08-17 20:02:06 +01001621
Russell Kinga5e090a2015-08-19 20:40:41 +01001622config CPU_SW_DOMAIN_PAN
1623 bool "Enable use of CPU domains to implement privileged no-access"
1624 depends on MMU && !ARM_LPAE
Jamie Iles1b8873a2010-02-02 20:25:44 +01001625 default y
1626 help
Russell Kinga5e090a2015-08-19 20:40:41 +01001627 Increase kernel security by ensuring that normal kernel accesses
1628 are unable to access userspace addresses. This can help prevent
1629 use-after-free bugs becoming an exploitable privilege escalation
1630 by ensuring that magic values (such as LIST_POISON) will always
1631 fault when dereferenced.
1632
1633 CPUs with low-vector mappings use a best-efforts implementation.
1634 Their lower 1MB needs to remain accessible for the vectors, but
1635 the remainder of userspace will become appropriately inaccessible.
Linus Torvalds1da177e2005-04-16 15:20:36 -07001636
1637config HW_PERF_EVENTS
Mark Rutlandfa8ad782015-07-06 12:23:53 +01001638 def_bool y
1639 depends on ARM_PMU
Jamie Iles1b8873a2010-02-02 20:25:44 +01001640
Catalin Marinas1355e2a2012-07-25 14:32:38 +01001641config SYS_SUPPORTS_HUGETLBFS
1642 def_bool y
1643 depends on ARM_LPAE
1644
Catalin Marinas8d962502012-07-25 14:39:26 +01001645config HAVE_ARCH_TRANSPARENT_HUGEPAGE
1646 def_bool y
1647 depends on ARM_LPAE
1648
Steven Capper4bfab202013-07-26 14:58:22 +01001649config ARCH_WANT_GENERAL_HUGETLB
1650 def_bool y
1651
Ard Biesheuvel7d485f62014-11-24 16:54:35 +01001652config ARM_MODULE_PLTS
1653 bool "Use PLTs to allow module memory to spill over into vmalloc area"
1654 depends on MODULES
1655 help
1656 Allocate PLTs when loading modules so that jumps and calls whose
1657 targets are too far away for their relative offsets to be encoded
1658 in the instructions themselves can be bounced via veneers in the
1659 module's PLT. This allows modules to be allocated in the generic
1660 vmalloc area after the dedicated module memory area has been
1661 exhausted. The modules will use slightly more memory, but after
1662 rounding up to page size, the actual memory footprint is usually
1663 the same.
1664
1665 Say y if you are getting out of memory errors while loading modules
1666
Linus Torvalds1da177e2005-04-16 15:20:36 -07001667source "mm/Kconfig"
1668
Magnus Dammc1b2d972010-07-05 10:00:11 +01001669config FORCE_MAX_ZONEORDER
Ulrich Hecht36d6c922015-08-14 15:51:06 +02001670 int "Maximum zone order"
Yegor Yefremov898f08e2012-10-08 14:37:53 -07001671 default "12" if SOC_AM33XX
Uwe Kleine-König6d85e2b2011-11-17 14:36:23 +01001672 default "9" if SA1111 || ARCH_EFM32
Magnus Dammc1b2d972010-07-05 10:00:11 +01001673 default "11"
1674 help
1675 The kernel memory allocator divides physically contiguous memory
1676 blocks into "zones", where each zone is a power of two number of
1677 pages. This option selects the largest power of two that the kernel
1678 keeps in the memory allocator. If you need to allocate very large
1679 blocks of physically contiguous memory, then you may need to
1680 increase this value.
1681
1682 This config option is actually maximum order plus one. For example,
1683 a value of 11 means that the largest free memory block is 2^10 pages.
1684
Linus Torvalds1da177e2005-04-16 15:20:36 -07001685config ALIGNMENT_TRAP
1686 bool
Hyok S. Choif12d0d72006-09-26 17:36:37 +09001687 depends on CPU_CP15_MMU
Linus Torvalds1da177e2005-04-16 15:20:36 -07001688 default y if !ARCH_EBSA110
Russell Kinge119bff2010-01-10 17:23:29 +00001689 select HAVE_PROC_CPU if PROC_FS
Linus Torvalds1da177e2005-04-16 15:20:36 -07001690 help
Matt LaPlante84eb8d02006-10-03 22:53:09 +02001691 ARM processors cannot fetch/store information which is not
Linus Torvalds1da177e2005-04-16 15:20:36 -07001692 naturally aligned on the bus, i.e., a 4 byte fetch must start at an
1693 address divisible by 4. On 32-bit ARM processors, these non-aligned
1694 fetch/store instructions will be emulated in software if you say
1695 here, which has a severe performance impact. This is necessary for
1696 correct operation of some network protocols. With an IP-only
1697 configuration it is safe to say N, otherwise say Y.
1698
Lennert Buytenhek39ec58f2009-03-09 14:30:09 -04001699config UACCESS_WITH_MEMCPY
Linus Walleij38ef2ad2012-09-10 16:36:37 +01001700 bool "Use kernel mem{cpy,set}() for {copy_to,clear}_user()"
1701 depends on MMU
Lennert Buytenhek39ec58f2009-03-09 14:30:09 -04001702 default y if CPU_FEROCEON
1703 help
1704 Implement faster copy_to_user and clear_user methods for CPU
1705 cores where a 8-word STM instruction give significantly higher
1706 memory write throughput than a sequence of individual 32bit stores.
1707
1708 A possible side effect is a slight increase in scheduling latency
1709 between threads sharing the same address space if they invoke
1710 such copy operations with large buffers.
1711
1712 However, if the CPU data cache is using a write-allocate mode,
1713 this option is unlikely to provide any performance gain.
1714
Nicolas Pitre70c70d92010-08-26 15:08:35 -07001715config SECCOMP
1716 bool
1717 prompt "Enable seccomp to safely compute untrusted bytecode"
1718 ---help---
1719 This kernel feature is useful for number crunching applications
1720 that may need to compute untrusted bytecode during their
1721 execution. By using pipes or other transports made available to
1722 the process as file descriptors supporting the read/write
1723 syscalls, it's possible to isolate those applications in
1724 their own address space using seccomp. Once seccomp is
1725 enabled via prctl(PR_SET_SECCOMP), it cannot be disabled
1726 and the task is only allowed to execute a few safe syscalls
1727 defined by each seccomp mode.
1728
Stefano Stabellini06e62952013-10-15 15:47:14 +00001729config SWIOTLB
1730 def_bool y
1731
1732config IOMMU_HELPER
1733 def_bool SWIOTLB
1734
Stefano Stabellini02c24332015-11-23 10:32:57 +00001735config PARAVIRT
1736 bool "Enable paravirtualization code"
1737 help
1738 This changes the kernel so it can modify itself when it is run
1739 under a hypervisor, potentially improving performance significantly
1740 over full virtualization.
1741
1742config PARAVIRT_TIME_ACCOUNTING
1743 bool "Paravirtual steal time accounting"
1744 select PARAVIRT
1745 default n
1746 help
1747 Select this option to enable fine granularity task steal time
1748 accounting. Time spent executing other tasks in parallel with
1749 the current vCPU is discounted from the vCPU power. To account for
1750 that, there can be a small performance impact.
1751
1752 If in doubt, say N here.
1753
Stefano Stabellinieff8d642012-09-17 14:58:17 +00001754config XEN_DOM0
1755 def_bool y
1756 depends on XEN
1757
1758config XEN
Julien Grallc2ba1f72014-09-17 14:07:06 -07001759 bool "Xen guest support on ARM"
Ian Campbell85323a92013-03-07 07:17:25 +00001760 depends on ARM && AEABI && OF
Arnd Bergmannf880b672012-10-09 10:33:52 +00001761 depends on CPU_V7 && !CPU_V6
Ian Campbell85323a92013-03-07 07:17:25 +00001762 depends on !GENERIC_ATOMIC64
Uwe Kleine-König7693dec2014-03-03 09:25:52 -05001763 depends on MMU
Russell King51aaf812014-04-22 22:26:27 +01001764 select ARCH_DMA_ADDR_T_64BIT
Stefano Stabellini17b7ab82013-04-24 18:47:18 +00001765 select ARM_PSCI
Stefano Stabellini83862cc2013-10-10 13:40:44 +00001766 select SWIOTLB_XEN
Stefano Stabellini02c24332015-11-23 10:32:57 +00001767 select PARAVIRT
Stefano Stabellinieff8d642012-09-17 14:58:17 +00001768 help
1769 Say Y if you want to run Linux in a Virtual Machine on Xen on ARM.
1770
Linus Torvalds1da177e2005-04-16 15:20:36 -07001771endmenu
1772
1773menu "Boot options"
1774
Grant Likely9eb8f672011-04-28 14:27:20 -06001775config USE_OF
1776 bool "Flattened Device Tree support"
Russell Kingb1b3f492012-10-06 17:12:25 +01001777 select IRQ_DOMAIN
Grant Likely9eb8f672011-04-28 14:27:20 -06001778 select OF
Grant Likely9eb8f672011-04-28 14:27:20 -06001779 help
1780 Include support for flattened device tree machine descriptions.
1781
Nicolas Pitrebd51e2f2012-09-01 03:03:25 +01001782config ATAGS
1783 bool "Support for the traditional ATAGS boot data passing" if USE_OF
1784 default y
1785 help
1786 This is the traditional way of passing data to the kernel at boot
1787 time. If you are solely relying on the flattened device tree (or
1788 the ARM_ATAG_DTB_COMPAT option) then you may unselect this option
1789 to remove ATAGS support from your kernel binary. If unsure,
1790 leave this to y.
1791
1792config DEPRECATED_PARAM_STRUCT
1793 bool "Provide old way to pass kernel parameters"
1794 depends on ATAGS
1795 help
1796 This was deprecated in 2001 and announced to live on for 5 years.
1797 Some old boot loaders still use this way.
1798
Linus Torvalds1da177e2005-04-16 15:20:36 -07001799# Compressed boot loader in ROM. Yes, we really want to ask about
1800# TEXT and BSS so we preserve their values in the config files.
1801config ZBOOT_ROM_TEXT
1802 hex "Compressed ROM boot loader base address"
1803 default "0"
1804 help
1805 The physical address at which the ROM-able zImage is to be
1806 placed in the target. Platforms which normally make use of
1807 ROM-able zImage formats normally set this to a suitable
1808 value in their defconfig file.
1809
1810 If ZBOOT_ROM is not enabled, this has no effect.
1811
1812config ZBOOT_ROM_BSS
1813 hex "Compressed ROM boot loader BSS address"
1814 default "0"
1815 help
Dan Fandrichf8c440b2006-09-20 23:28:51 +01001816 The base address of an area of read/write memory in the target
1817 for the ROM-able zImage which must be available while the
1818 decompressor is running. It must be large enough to hold the
1819 entire decompressed kernel plus an additional 128 KiB.
1820 Platforms which normally make use of ROM-able zImage formats
1821 normally set this to a suitable value in their defconfig file.
Linus Torvalds1da177e2005-04-16 15:20:36 -07001822
1823 If ZBOOT_ROM is not enabled, this has no effect.
1824
1825config ZBOOT_ROM
1826 bool "Compressed boot loader in ROM/flash"
1827 depends on ZBOOT_ROM_TEXT != ZBOOT_ROM_BSS
Russell King10968132014-01-01 11:59:44 +00001828 depends on !ARM_APPENDED_DTB && !XIP_KERNEL && !AUTO_ZRELADDR
Linus Torvalds1da177e2005-04-16 15:20:36 -07001829 help
1830 Say Y here if you intend to execute your compressed kernel image
1831 (zImage) directly from ROM or flash. If unsure, say N.
1832
John Bonesioe2a6a3a2011-05-27 18:45:50 -04001833config ARM_APPENDED_DTB
1834 bool "Use appended device tree blob to zImage (EXPERIMENTAL)"
Russell King10968132014-01-01 11:59:44 +00001835 depends on OF
John Bonesioe2a6a3a2011-05-27 18:45:50 -04001836 help
1837 With this option, the boot code will look for a device tree binary
1838 (DTB) appended to zImage
1839 (e.g. cat zImage <filename>.dtb > zImage_w_dtb).
1840
1841 This is meant as a backward compatibility convenience for those
1842 systems with a bootloader that can't be upgraded to accommodate
1843 the documented boot protocol using a device tree.
1844
1845 Beware that there is very little in terms of protection against
1846 this option being confused by leftover garbage in memory that might
1847 look like a DTB header after a reboot if no actual DTB is appended
1848 to zImage. Do not leave this option active in a production kernel
1849 if you don't intend to always append a DTB. Proper passing of the
1850 location into r2 of a bootloader provided DTB is always preferable
1851 to this option.
1852
Nicolas Pitreb90b9a32011-09-13 22:37:07 -04001853config ARM_ATAG_DTB_COMPAT
1854 bool "Supplement the appended DTB with traditional ATAG information"
1855 depends on ARM_APPENDED_DTB
1856 help
1857 Some old bootloaders can't be updated to a DTB capable one, yet
1858 they provide ATAGs with memory configuration, the ramdisk address,
1859 the kernel cmdline string, etc. Such information is dynamically
1860 provided by the bootloader and can't always be stored in a static
1861 DTB. To allow a device tree enabled kernel to be used with such
1862 bootloaders, this option allows zImage to extract the information
1863 from the ATAG list and store it at run time into the appended DTB.
1864
Genoud Richardd0f34a12012-06-26 16:37:59 +01001865choice
1866 prompt "Kernel command line type" if ARM_ATAG_DTB_COMPAT
1867 default ARM_ATAG_DTB_COMPAT_CMDLINE_FROM_BOOTLOADER
1868
1869config ARM_ATAG_DTB_COMPAT_CMDLINE_FROM_BOOTLOADER
1870 bool "Use bootloader kernel arguments if available"
1871 help
1872 Uses the command-line options passed by the boot loader instead of
1873 the device tree bootargs property. If the boot loader doesn't provide
1874 any, the device tree bootargs property will be used.
1875
1876config ARM_ATAG_DTB_COMPAT_CMDLINE_EXTEND
1877 bool "Extend with bootloader kernel arguments"
1878 help
1879 The command-line arguments provided by the boot loader will be
1880 appended to the the device tree bootargs property.
1881
1882endchoice
1883
Linus Torvalds1da177e2005-04-16 15:20:36 -07001884config CMDLINE
1885 string "Default kernel command string"
1886 default ""
1887 help
1888 On some architectures (EBSA110 and CATS), there is currently no way
1889 for the boot loader to pass arguments to the kernel. For these
1890 architectures, you should supply some command-line options at build
1891 time by entering them here. As a minimum, you should specify the
1892 memory size and the root device (e.g., mem=64M root=/dev/nfs).
1893
Victor Boivie4394c122011-05-04 17:07:55 +01001894choice
1895 prompt "Kernel command line type" if CMDLINE != ""
1896 default CMDLINE_FROM_BOOTLOADER
Nicolas Pitrebd51e2f2012-09-01 03:03:25 +01001897 depends on ATAGS
Victor Boivie4394c122011-05-04 17:07:55 +01001898
1899config CMDLINE_FROM_BOOTLOADER
1900 bool "Use bootloader kernel arguments if available"
1901 help
1902 Uses the command-line options passed by the boot loader. If
1903 the boot loader doesn't provide any, the default kernel command
1904 string provided in CMDLINE will be used.
1905
1906config CMDLINE_EXTEND
1907 bool "Extend bootloader kernel arguments"
1908 help
1909 The command-line arguments provided by the boot loader will be
1910 appended to the default kernel command string.
1911
Alexander Holler92d20402010-02-16 19:04:53 +01001912config CMDLINE_FORCE
1913 bool "Always use the default kernel command string"
Alexander Holler92d20402010-02-16 19:04:53 +01001914 help
1915 Always use the default kernel command string, even if the boot
1916 loader passes other arguments to the kernel.
1917 This is useful if you cannot or don't want to change the
1918 command-line options your boot loader passes to the kernel.
Victor Boivie4394c122011-05-04 17:07:55 +01001919endchoice
Alexander Holler92d20402010-02-16 19:04:53 +01001920
Linus Torvalds1da177e2005-04-16 15:20:36 -07001921config XIP_KERNEL
1922 bool "Kernel Execute-In-Place from ROM"
Russell King10968132014-01-01 11:59:44 +00001923 depends on !ARM_LPAE && !ARCH_MULTIPLATFORM
Linus Torvalds1da177e2005-04-16 15:20:36 -07001924 help
1925 Execute-In-Place allows the kernel to run from non-volatile storage
1926 directly addressable by the CPU, such as NOR flash. This saves RAM
1927 space since the text section of the kernel is not loaded from flash
1928 to RAM. Read-write sections, such as the data section and stack,
1929 are still copied to RAM. The XIP kernel is not compressed since
1930 it has to run directly from flash, so it will take more space to
1931 store it. The flash address used to link the kernel object files,
1932 and for storing it, is configuration dependent. Therefore, if you
1933 say Y here, you must know the proper physical address where to
1934 store the kernel image depending on your own flash memory usage.
1935
1936 Also note that the make target becomes "make xipImage" rather than
1937 "make zImage" or "make Image". The final kernel binary to put in
1938 ROM memory will be arch/arm/boot/xipImage.
1939
1940 If unsure, say N.
1941
1942config XIP_PHYS_ADDR
1943 hex "XIP Kernel Physical Location"
1944 depends on XIP_KERNEL
1945 default "0x00080000"
1946 help
1947 This is the physical address in your flash memory the kernel will
1948 be linked for and stored to. This address is dependent on your
1949 own flash usage.
1950
Richard Purdiec587e4a2007-02-06 21:29:00 +01001951config KEXEC
1952 bool "Kexec system call (EXPERIMENTAL)"
Stephen Warren19ab4282013-06-14 16:14:14 +01001953 depends on (!SMP || PM_SLEEP_SMP)
Arnd Bergmanncb1293e2015-05-26 15:40:44 +01001954 depends on !CPU_V7M
Dave Young2965faa2015-09-09 15:38:55 -07001955 select KEXEC_CORE
Richard Purdiec587e4a2007-02-06 21:29:00 +01001956 help
1957 kexec is a system call that implements the ability to shutdown your
1958 current kernel, and to start another kernel. It is like a reboot
Matt LaPlante01dd2fb2007-10-20 01:34:40 +02001959 but it is independent of the system firmware. And like a reboot
Richard Purdiec587e4a2007-02-06 21:29:00 +01001960 you can start any kernel with it, not just Linux.
1961
1962 It is an ongoing process to be certain the hardware in a machine
1963 is properly shutdown, so do not be surprised if this code does not
Geert Uytterhoevenbf220692013-08-20 21:38:03 +02001964 initially work for you.
Richard Purdiec587e4a2007-02-06 21:29:00 +01001965
Richard Purdie4cd9d6f2008-01-02 00:56:46 +01001966config ATAGS_PROC
1967 bool "Export atags in procfs"
Nicolas Pitrebd51e2f2012-09-01 03:03:25 +01001968 depends on ATAGS && KEXEC
Uli Luckasb98d7292008-02-22 16:45:18 +01001969 default y
Richard Purdie4cd9d6f2008-01-02 00:56:46 +01001970 help
1971 Should the atags used to boot the kernel be exported in an "atags"
1972 file in procfs. Useful with kexec.
1973
Mika Westerbergcb5d39b2010-11-18 19:14:52 +01001974config CRASH_DUMP
1975 bool "Build kdump crash kernel (EXPERIMENTAL)"
Mika Westerbergcb5d39b2010-11-18 19:14:52 +01001976 help
1977 Generate crash dump after being started by kexec. This should
1978 be normally only set in special crash dump kernels which are
1979 loaded in the main kernel with kexec-tools into a specially
1980 reserved region and then later executed after a crash by
1981 kdump/kexec. The crash dump kernel must be compiled to a
1982 memory address not used by the main kernel
1983
1984 For more details see Documentation/kdump/kdump.txt
1985
Eric Miaoe69edc792010-07-05 15:56:50 +02001986config AUTO_ZRELADDR
1987 bool "Auto calculation of the decompressed kernel image address"
Eric Miaoe69edc792010-07-05 15:56:50 +02001988 help
1989 ZRELADDR is the physical address where the decompressed kernel
1990 image will be placed. If AUTO_ZRELADDR is selected, the address
1991 will be determined at run-time by masking the current IP with
1992 0xf8000000. This assumes the zImage being placed in the first 128MB
1993 from start of memory.
1994
Roy Franz81a0bc32015-09-23 20:17:54 -07001995config EFI_STUB
1996 bool
1997
1998config EFI
1999 bool "UEFI runtime support"
2000 depends on OF && !CPU_BIG_ENDIAN && MMU && AUTO_ZRELADDR && !XIP_KERNEL
2001 select UCS2_STRING
2002 select EFI_PARAMS_FROM_FDT
2003 select EFI_STUB
2004 select EFI_ARMSTUB
2005 select EFI_RUNTIME_WRAPPERS
2006 ---help---
2007 This option provides support for runtime services provided
2008 by UEFI firmware (such as non-volatile variables, realtime
2009 clock, and platform reset). A UEFI stub is also provided to
2010 allow the kernel to be booted as an EFI application. This
2011 is only useful for kernels that may run on systems that have
2012 UEFI firmware.
2013
Linus Torvalds1da177e2005-04-16 15:20:36 -07002014endmenu
2015
Russell Kingac9d7ef2008-08-18 17:26:00 +01002016menu "CPU Power Management"
Linus Torvalds1da177e2005-04-16 15:20:36 -07002017
Linus Torvalds1da177e2005-04-16 15:20:36 -07002018source "drivers/cpufreq/Kconfig"
Linus Torvalds1da177e2005-04-16 15:20:36 -07002019
Russell Kingac9d7ef2008-08-18 17:26:00 +01002020source "drivers/cpuidle/Kconfig"
2021
2022endmenu
2023
Linus Torvalds1da177e2005-04-16 15:20:36 -07002024menu "Floating point emulation"
2025
2026comment "At least one emulation must be selected"
2027
2028config FPE_NWFPE
2029 bool "NWFPE math emulation"
Dave Martin593c2522010-12-13 21:56:03 +01002030 depends on (!AEABI || OABI_COMPAT) && !THUMB2_KERNEL
Linus Torvalds1da177e2005-04-16 15:20:36 -07002031 ---help---
2032 Say Y to include the NWFPE floating point emulator in the kernel.
2033 This is necessary to run most binaries. Linux does not currently
2034 support floating point hardware so you need to say Y here even if
2035 your machine has an FPA or floating point co-processor podule.
2036
2037 You may say N here if you are going to load the Acorn FPEmulator
2038 early in the bootup.
2039
2040config FPE_NWFPE_XP
2041 bool "Support extended precision"
Lennert Buytenhekbedf1422005-11-07 21:12:08 +00002042 depends on FPE_NWFPE
Linus Torvalds1da177e2005-04-16 15:20:36 -07002043 help
2044 Say Y to include 80-bit support in the kernel floating-point
2045 emulator. Otherwise, only 32 and 64-bit support is compiled in.
2046 Note that gcc does not generate 80-bit operations by default,
2047 so in most cases this option only enlarges the size of the
2048 floating point emulator without any good reason.
2049
2050 You almost surely want to say N here.
2051
2052config FPE_FASTFPE
2053 bool "FastFPE math emulation (EXPERIMENTAL)"
Kees Cookd6f94fa2013-01-16 18:53:14 -08002054 depends on (!AEABI || OABI_COMPAT) && !CPU_32v3
Linus Torvalds1da177e2005-04-16 15:20:36 -07002055 ---help---
2056 Say Y here to include the FAST floating point emulator in the kernel.
2057 This is an experimental much faster emulator which now also has full
2058 precision for the mantissa. It does not support any exceptions.
2059 It is very simple, and approximately 3-6 times faster than NWFPE.
2060
2061 It should be sufficient for most programs. It may be not suitable
2062 for scientific calculations, but you have to check this for yourself.
2063 If you do not feel you need a faster FP emulation you should better
2064 choose NWFPE.
2065
2066config VFP
2067 bool "VFP-format floating point maths"
Russell Kinge399b1a2011-01-17 15:08:32 +00002068 depends on CPU_V6 || CPU_V6K || CPU_ARM926T || CPU_V7 || CPU_FEROCEON
Linus Torvalds1da177e2005-04-16 15:20:36 -07002069 help
2070 Say Y to include VFP support code in the kernel. This is needed
2071 if your hardware includes a VFP unit.
2072
2073 Please see <file:Documentation/arm/VFP/release-notes.txt> for
2074 release notes and additional status information.
2075
2076 Say N if your target does not have VFP hardware.
2077
Catalin Marinas25ebee02007-09-25 15:22:24 +01002078config VFPv3
2079 bool
2080 depends on VFP
2081 default y if CPU_V7
2082
Catalin Marinasb5872db2008-01-10 19:16:17 +01002083config NEON
2084 bool "Advanced SIMD (NEON) Extension support"
2085 depends on VFPv3 && CPU_V7
2086 help
2087 Say Y to include support code for NEON, the ARMv7 Advanced SIMD
2088 Extension.
2089
Ard Biesheuvel73c132c2013-05-16 11:41:48 +02002090config KERNEL_MODE_NEON
2091 bool "Support for NEON in kernel mode"
Russell Kingc4a30c32013-09-22 11:08:50 +01002092 depends on NEON && AEABI
Ard Biesheuvel73c132c2013-05-16 11:41:48 +02002093 help
2094 Say Y to include support for NEON in kernel mode.
2095
Linus Torvalds1da177e2005-04-16 15:20:36 -07002096endmenu
2097
2098menu "Userspace binary formats"
2099
2100source "fs/Kconfig.binfmt"
2101
Linus Torvalds1da177e2005-04-16 15:20:36 -07002102endmenu
2103
2104menu "Power management options"
2105
Russell Kingeceab4a2005-11-15 11:31:41 +00002106source "kernel/power/Kconfig"
Linus Torvalds1da177e2005-04-16 15:20:36 -07002107
Johannes Bergf4cb5702007-12-08 02:14:00 +01002108config ARCH_SUSPEND_POSSIBLE
Ezequiel Garcia19a05192013-08-16 10:28:24 +01002109 depends on CPU_ARM920T || CPU_ARM926T || CPU_FEROCEON || CPU_SA1100 || \
Uwe Kleine-Königf0d75152012-02-01 10:00:00 +01002110 CPU_V6 || CPU_V6K || CPU_V7 || CPU_V7M || CPU_XSC3 || CPU_XSCALE || CPU_MOHAWK
Johannes Bergf4cb5702007-12-08 02:14:00 +01002111 def_bool y
2112
Arnd Bergmann15e0d9e2011-10-01 21:09:39 +02002113config ARM_CPU_SUSPEND
2114 def_bool PM_SLEEP
2115
Sebastian Capella603fb422014-03-25 01:20:29 +01002116config ARCH_HIBERNATION_POSSIBLE
2117 bool
2118 depends on MMU
2119 default y if ARCH_SUSPEND_POSSIBLE
2120
Linus Torvalds1da177e2005-04-16 15:20:36 -07002121endmenu
2122
Sam Ravnborgd5950b42005-07-11 21:03:49 -07002123source "net/Kconfig"
2124
Uwe Kleine-Königac251502009-08-13 21:09:21 +02002125source "drivers/Kconfig"
Linus Torvalds1da177e2005-04-16 15:20:36 -07002126
Kumar Gala916f7432015-02-26 15:49:09 -06002127source "drivers/firmware/Kconfig"
2128
Linus Torvalds1da177e2005-04-16 15:20:36 -07002129source "fs/Kconfig"
2130
Linus Torvalds1da177e2005-04-16 15:20:36 -07002131source "arch/arm/Kconfig.debug"
2132
2133source "security/Kconfig"
2134
2135source "crypto/Kconfig"
Ard Biesheuvel652ccae2015-03-10 09:47:44 +01002136if CRYPTO
2137source "arch/arm/crypto/Kconfig"
2138endif
Linus Torvalds1da177e2005-04-16 15:20:36 -07002139
2140source "lib/Kconfig"
Christoffer Dall749cf76c2013-01-20 18:28:06 -05002141
2142source "arch/arm/kvm/Kconfig"