blob: ee15b40891270270716f7f5f1fd0c1f399787e04 [file] [log] [blame]
Tony Lindgren1a8bfa12005-11-10 14:26:50 +00001/*
2 * linux/arch/arm/plat-omap/devices.c
3 *
4 * Common platform device setup/initialization for OMAP1 and OMAP2
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
10 */
11
12#include <linux/config.h>
13#include <linux/module.h>
14#include <linux/kernel.h>
15#include <linux/init.h>
16#include <linux/platform_device.h>
17
18#include <asm/hardware.h>
19#include <asm/io.h>
20#include <asm/mach-types.h>
21#include <asm/mach/map.h>
22
23#include <asm/arch/tc.h>
24#include <asm/arch/board.h>
25#include <asm/arch/mux.h>
26#include <asm/arch/gpio.h>
Tony Lindgren9b6553c2006-04-02 17:46:30 +010027#include <asm/arch/menelaus.h>
Tony Lindgren1a8bfa12005-11-10 14:26:50 +000028
Tony Lindgren1a8bfa12005-11-10 14:26:50 +000029#if defined(CONFIG_I2C_OMAP) || defined(CONFIG_I2C_OMAP_MODULE)
30
31#define OMAP1_I2C_BASE 0xfffb3800
32#define OMAP2_I2C_BASE1 0x48070000
33#define OMAP_I2C_SIZE 0x3f
34#define OMAP1_I2C_INT INT_I2C
35#define OMAP2_I2C_INT1 56
36
37static struct resource i2c_resources1[] = {
38 {
39 .start = 0,
40 .end = 0,
41 .flags = IORESOURCE_MEM,
42 },
43 {
44 .start = 0,
45 .flags = IORESOURCE_IRQ,
46 },
47};
48
49/* DMA not used; works around erratum writing to non-empty i2c fifo */
50
51static struct platform_device omap_i2c_device1 = {
52 .name = "i2c_omap",
53 .id = 1,
Tony Lindgren1a8bfa12005-11-10 14:26:50 +000054 .num_resources = ARRAY_SIZE(i2c_resources1),
55 .resource = i2c_resources1,
56};
57
58/* See also arch/arm/mach-omap2/devices.c for second I2C on 24xx */
59static void omap_init_i2c(void)
60{
61 if (cpu_is_omap24xx()) {
62 i2c_resources1[0].start = OMAP2_I2C_BASE1;
63 i2c_resources1[0].end = OMAP2_I2C_BASE1 + OMAP_I2C_SIZE;
64 i2c_resources1[1].start = OMAP2_I2C_INT1;
65 } else {
66 i2c_resources1[0].start = OMAP1_I2C_BASE;
67 i2c_resources1[0].end = OMAP1_I2C_BASE + OMAP_I2C_SIZE;
68 i2c_resources1[1].start = OMAP1_I2C_INT;
69 }
70
71 /* FIXME define and use a boot tag, in case of boards that
72 * either don't wire up I2C, or chips that mux it differently...
73 * it can include clocking and address info, maybe more.
74 */
75 if (cpu_is_omap24xx()) {
76 omap_cfg_reg(M19_24XX_I2C1_SCL);
77 omap_cfg_reg(L15_24XX_I2C1_SDA);
78 } else {
79 omap_cfg_reg(I2C_SCL);
80 omap_cfg_reg(I2C_SDA);
81 }
82
83 (void) platform_device_register(&omap_i2c_device1);
84}
85
86#else
87static inline void omap_init_i2c(void) {}
88#endif
89
90/*-------------------------------------------------------------------------*/
Tony Lindgren9b6553c2006-04-02 17:46:30 +010091#if defined(CONFIG_KEYBOARD_OMAP) || defined(CONFIG_KEYBOARD_OMAP_MODULE)
92
93static void omap_init_kp(void)
94{
95 if (machine_is_omap_h2() || machine_is_omap_h3()) {
96 omap_cfg_reg(F18_1610_KBC0);
97 omap_cfg_reg(D20_1610_KBC1);
98 omap_cfg_reg(D19_1610_KBC2);
99 omap_cfg_reg(E18_1610_KBC3);
100 omap_cfg_reg(C21_1610_KBC4);
101
102 omap_cfg_reg(G18_1610_KBR0);
103 omap_cfg_reg(F19_1610_KBR1);
104 omap_cfg_reg(H14_1610_KBR2);
105 omap_cfg_reg(E20_1610_KBR3);
106 omap_cfg_reg(E19_1610_KBR4);
107 omap_cfg_reg(N19_1610_KBR5);
Brian Swetland495f71d2006-06-26 16:16:03 -0700108 } else if (machine_is_omap_perseus2() || machine_is_omap_fsample()) {
Tony Lindgren9b6553c2006-04-02 17:46:30 +0100109 omap_cfg_reg(E2_730_KBR0);
110 omap_cfg_reg(J7_730_KBR1);
111 omap_cfg_reg(E1_730_KBR2);
112 omap_cfg_reg(F3_730_KBR3);
113 omap_cfg_reg(D2_730_KBR4);
114
115 omap_cfg_reg(C2_730_KBC0);
116 omap_cfg_reg(D3_730_KBC1);
117 omap_cfg_reg(E4_730_KBC2);
118 omap_cfg_reg(F4_730_KBC3);
119 omap_cfg_reg(E3_730_KBC4);
120 } else if (machine_is_omap_h4()) {
121 omap_cfg_reg(T19_24XX_KBR0);
122 omap_cfg_reg(R19_24XX_KBR1);
123 omap_cfg_reg(V18_24XX_KBR2);
124 omap_cfg_reg(M21_24XX_KBR3);
125 omap_cfg_reg(E5__24XX_KBR4);
126 if (omap_has_menelaus()) {
127 omap_cfg_reg(B3__24XX_KBR5);
128 omap_cfg_reg(AA4_24XX_KBC2);
129 omap_cfg_reg(B13_24XX_KBC6);
130 } else {
131 omap_cfg_reg(M18_24XX_KBR5);
132 omap_cfg_reg(H19_24XX_KBC2);
133 omap_cfg_reg(N19_24XX_KBC6);
134 }
135 omap_cfg_reg(R20_24XX_KBC0);
136 omap_cfg_reg(M14_24XX_KBC1);
137 omap_cfg_reg(V17_24XX_KBC3);
138 omap_cfg_reg(P21_24XX_KBC4);
139 omap_cfg_reg(L14_24XX_KBC5);
140 }
141}
142#else
143static inline void omap_init_kp(void) {}
144#endif
145
146/*-------------------------------------------------------------------------*/
Tony Lindgren1a8bfa12005-11-10 14:26:50 +0000147
148#if defined(CONFIG_MMC_OMAP) || defined(CONFIG_MMC_OMAP_MODULE)
149
150#ifdef CONFIG_ARCH_OMAP24XX
151#define OMAP_MMC1_BASE 0x4809c000
152#define OMAP_MMC1_INT 83
153#else
154#define OMAP_MMC1_BASE 0xfffb7800
155#define OMAP_MMC1_INT INT_MMC
156#endif
157#define OMAP_MMC2_BASE 0xfffb7c00 /* omap16xx only */
158
159static struct omap_mmc_conf mmc1_conf;
160
161static u64 mmc1_dmamask = 0xffffffff;
162
163static struct resource mmc1_resources[] = {
164 {
165 .start = IO_ADDRESS(OMAP_MMC1_BASE),
166 .end = IO_ADDRESS(OMAP_MMC1_BASE) + 0x7f,
167 .flags = IORESOURCE_MEM,
168 },
169 {
170 .start = OMAP_MMC1_INT,
171 .flags = IORESOURCE_IRQ,
172 },
173};
174
175static struct platform_device mmc_omap_device1 = {
176 .name = "mmci-omap",
177 .id = 1,
178 .dev = {
Tony Lindgren1a8bfa12005-11-10 14:26:50 +0000179 .dma_mask = &mmc1_dmamask,
180 .platform_data = &mmc1_conf,
181 },
182 .num_resources = ARRAY_SIZE(mmc1_resources),
183 .resource = mmc1_resources,
184};
185
186#ifdef CONFIG_ARCH_OMAP16XX
187
188static struct omap_mmc_conf mmc2_conf;
189
190static u64 mmc2_dmamask = 0xffffffff;
191
192static struct resource mmc2_resources[] = {
193 {
194 .start = IO_ADDRESS(OMAP_MMC2_BASE),
195 .end = IO_ADDRESS(OMAP_MMC2_BASE) + 0x7f,
196 .flags = IORESOURCE_MEM,
197 },
198 {
199 .start = INT_1610_MMC2,
200 .flags = IORESOURCE_IRQ,
201 },
202};
203
204static struct platform_device mmc_omap_device2 = {
205 .name = "mmci-omap",
206 .id = 2,
207 .dev = {
Tony Lindgren1a8bfa12005-11-10 14:26:50 +0000208 .dma_mask = &mmc2_dmamask,
209 .platform_data = &mmc2_conf,
210 },
211 .num_resources = ARRAY_SIZE(mmc2_resources),
212 .resource = mmc2_resources,
213};
214#endif
215
216static void __init omap_init_mmc(void)
217{
218 const struct omap_mmc_config *mmc_conf;
219 const struct omap_mmc_conf *mmc;
220
221 /* NOTE: assumes MMC was never (wrongly) enabled */
222 mmc_conf = omap_get_config(OMAP_TAG_MMC, struct omap_mmc_config);
223 if (!mmc_conf)
224 return;
225
226 /* block 1 is always available and has just one pinout option */
227 mmc = &mmc_conf->mmc[0];
228 if (mmc->enabled) {
229 if (!cpu_is_omap24xx()) {
230 omap_cfg_reg(MMC_CMD);
231 omap_cfg_reg(MMC_CLK);
232 omap_cfg_reg(MMC_DAT0);
233 if (cpu_is_omap1710()) {
234 omap_cfg_reg(M15_1710_MMC_CLKI);
235 omap_cfg_reg(P19_1710_MMC_CMDDIR);
236 omap_cfg_reg(P20_1710_MMC_DATDIR0);
237 }
238 }
239 if (mmc->wire4) {
240 if (!cpu_is_omap24xx()) {
241 omap_cfg_reg(MMC_DAT1);
242 /* NOTE: DAT2 can be on W10 (here) or M15 */
243 if (!mmc->nomux)
244 omap_cfg_reg(MMC_DAT2);
245 omap_cfg_reg(MMC_DAT3);
246 }
247 }
248 mmc1_conf = *mmc;
249 (void) platform_device_register(&mmc_omap_device1);
250 }
251
252#ifdef CONFIG_ARCH_OMAP16XX
253 /* block 2 is on newer chips, and has many pinout options */
254 mmc = &mmc_conf->mmc[1];
255 if (mmc->enabled) {
256 if (!mmc->nomux) {
257 omap_cfg_reg(Y8_1610_MMC2_CMD);
258 omap_cfg_reg(Y10_1610_MMC2_CLK);
259 omap_cfg_reg(R18_1610_MMC2_CLKIN);
260 omap_cfg_reg(W8_1610_MMC2_DAT0);
261 if (mmc->wire4) {
262 omap_cfg_reg(V8_1610_MMC2_DAT1);
263 omap_cfg_reg(W15_1610_MMC2_DAT2);
264 omap_cfg_reg(R10_1610_MMC2_DAT3);
265 }
266
267 /* These are needed for the level shifter */
268 omap_cfg_reg(V9_1610_MMC2_CMDDIR);
269 omap_cfg_reg(V5_1610_MMC2_DATDIR0);
270 omap_cfg_reg(W19_1610_MMC2_DATDIR1);
271 }
272
273 /* Feedback clock must be set on OMAP-1710 MMC2 */
274 if (cpu_is_omap1710())
275 omap_writel(omap_readl(MOD_CONF_CTRL_1) | (1 << 24),
276 MOD_CONF_CTRL_1);
277 mmc2_conf = *mmc;
278 (void) platform_device_register(&mmc_omap_device2);
279 }
280#endif
281 return;
282}
283#else
284static inline void omap_init_mmc(void) {}
285#endif
286
Tony Lindgren9b6553c2006-04-02 17:46:30 +0100287/*-------------------------------------------------------------------------*/
288
289/* Numbering for the SPI-capable controllers when used for SPI:
290 * spi = 1
291 * uwire = 2
292 * mmc1..2 = 3..4
293 * mcbsp1..3 = 5..7
294 */
295
296#if defined(CONFIG_SPI_OMAP_UWIRE) || defined(CONFIG_SPI_OMAP_UWIRE_MODULE)
297
298#define OMAP_UWIRE_BASE 0xfffb3000
299
300static struct resource uwire_resources[] = {
301 {
302 .start = OMAP_UWIRE_BASE,
303 .end = OMAP_UWIRE_BASE + 0x20,
304 .flags = IORESOURCE_MEM,
305 },
306};
307
308static struct platform_device omap_uwire_device = {
309 .name = "omap_uwire",
310 .id = -1,
Tony Lindgren9b6553c2006-04-02 17:46:30 +0100311 .num_resources = ARRAY_SIZE(uwire_resources),
312 .resource = uwire_resources,
313};
314
315static void omap_init_uwire(void)
316{
317 /* FIXME define and use a boot tag; not all boards will be hooking
318 * up devices to the microwire controller, and multi-board configs
319 * mean that CONFIG_SPI_OMAP_UWIRE may be configured anyway...
320 */
321
322 /* board-specific code must configure chipselects (only a few
323 * are normally used) and SCLK/SDI/SDO (each has two choices).
324 */
325 (void) platform_device_register(&omap_uwire_device);
326}
327#else
328static inline void omap_init_uwire(void) {}
329#endif
330
331/*-------------------------------------------------------------------------*/
332
Tony Lindgren1a8bfa12005-11-10 14:26:50 +0000333#if defined(CONFIG_OMAP_WATCHDOG) || defined(CONFIG_OMAP_WATCHDOG_MODULE)
334
335#ifdef CONFIG_ARCH_OMAP24XX
336#define OMAP_WDT_BASE 0x48022000
337#else
338#define OMAP_WDT_BASE 0xfffeb000
339#endif
340
341static struct resource wdt_resources[] = {
342 {
343 .start = OMAP_WDT_BASE,
344 .end = OMAP_WDT_BASE + 0x4f,
345 .flags = IORESOURCE_MEM,
346 },
347};
348
349static struct platform_device omap_wdt_device = {
350 .name = "omap_wdt",
351 .id = -1,
Tony Lindgren1a8bfa12005-11-10 14:26:50 +0000352 .num_resources = ARRAY_SIZE(wdt_resources),
353 .resource = wdt_resources,
354};
355
356static void omap_init_wdt(void)
357{
358 (void) platform_device_register(&omap_wdt_device);
359}
360#else
361static inline void omap_init_wdt(void) {}
362#endif
363
364/*-------------------------------------------------------------------------*/
365
366#if defined(CONFIG_OMAP_RNG) || defined(CONFIG_OMAP_RNG_MODULE)
367
368#ifdef CONFIG_ARCH_OMAP24XX
369#define OMAP_RNG_BASE 0x480A0000
370#else
371#define OMAP_RNG_BASE 0xfffe5000
372#endif
373
374static struct resource rng_resources[] = {
375 {
376 .start = OMAP_RNG_BASE,
377 .end = OMAP_RNG_BASE + 0x4f,
378 .flags = IORESOURCE_MEM,
379 },
380};
381
382static struct platform_device omap_rng_device = {
383 .name = "omap_rng",
384 .id = -1,
Tony Lindgren1a8bfa12005-11-10 14:26:50 +0000385 .num_resources = ARRAY_SIZE(rng_resources),
386 .resource = rng_resources,
387};
388
389static void omap_init_rng(void)
390{
391 (void) platform_device_register(&omap_rng_device);
392}
393#else
394static inline void omap_init_rng(void) {}
395#endif
396
Tony Lindgren1a8bfa12005-11-10 14:26:50 +0000397/*
398 * This gets called after board-specific INIT_MACHINE, and initializes most
399 * on-chip peripherals accessible on this board (except for few like USB):
400 *
401 * (a) Does any "standard config" pin muxing needed. Board-specific
402 * code will have muxed GPIO pins and done "nonstandard" setup;
403 * that code could live in the boot loader.
404 * (b) Populating board-specific platform_data with the data drivers
405 * rely on to handle wiring variations.
406 * (c) Creating platform devices as meaningful on this board and
407 * with this kernel configuration.
408 *
409 * Claiming GPIOs, and setting their direction and initial values, is the
410 * responsibility of the device drivers. So is responding to probe().
411 *
412 * Board-specific knowlege like creating devices or pin setup is to be
413 * kept out of drivers as much as possible. In particular, pin setup
414 * may be handled by the boot loader, and drivers should expect it will
415 * normally have been done by the time they're probed.
416 */
417static int __init omap_init_devices(void)
418{
419 /* please keep these calls, and their implementations above,
420 * in alphabetical order so they're easier to sort through.
421 */
Tony Lindgren1a8bfa12005-11-10 14:26:50 +0000422 omap_init_i2c();
Tony Lindgren9b6553c2006-04-02 17:46:30 +0100423 omap_init_kp();
Tony Lindgren1a8bfa12005-11-10 14:26:50 +0000424 omap_init_mmc();
Tony Lindgren9b6553c2006-04-02 17:46:30 +0100425 omap_init_uwire();
Tony Lindgren1a8bfa12005-11-10 14:26:50 +0000426 omap_init_wdt();
427 omap_init_rng();
428
429 return 0;
430}
431arch_initcall(omap_init_devices);
432