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Greg Kroah-Hartmanb2441312017-11-01 15:07:57 +01001// SPDX-License-Identifier: GPL-2.0
Linus Walleij4980f9b2012-09-06 09:08:24 +01002/*
3 * SoC core Device Tree for the ARM Integrator platforms
4 */
5
6/include/ "skeleton.dtsi"
7
8/ {
Linus Walleijbb4dbef2013-06-16 02:44:27 +02009 core-module@10000000 {
Linus Walleij480aa742015-03-03 10:06:16 +010010 compatible = "arm,core-module-integrator", "syscon", "simple-mfd";
Linus Walleijbb4dbef2013-06-16 02:44:27 +020011 reg = <0x10000000 0x200>;
Linus Walleijbcc397d2014-10-22 10:05:44 +020012
13 /* Use core module LED to indicate CPU load */
Rob Herring8dccafa2017-10-13 12:54:51 -050014 led@c.0 {
Linus Walleijbcc397d2014-10-22 10:05:44 +020015 compatible = "register-bit-led";
16 offset = <0x0c>;
17 mask = <0x01>;
18 label = "integrator:core_module";
19 linux,default-trigger = "cpu0";
20 default-state = "on";
21 };
Linus Walleijbb4dbef2013-06-16 02:44:27 +020022 };
23
Linus Walleij307b9662013-06-17 23:58:25 +020024 ebi@12000000 {
25 compatible = "arm,external-bus-interface";
26 reg = <0x12000000 0x100>;
27 };
28
Linus Walleij4980f9b2012-09-06 09:08:24 +010029 timer@13000000 {
30 reg = <0x13000000 0x100>;
31 interrupt-parent = <&pic>;
32 interrupts = <5>;
33 };
34
35 timer@13000100 {
36 reg = <0x13000100 0x100>;
37 interrupt-parent = <&pic>;
38 interrupts = <6>;
39 };
40
41 timer@13000200 {
42 reg = <0x13000200 0x100>;
43 interrupt-parent = <&pic>;
44 interrupts = <7>;
45 };
46
47 pic@14000000 {
48 compatible = "arm,versatile-fpga-irq";
49 #interrupt-cells = <1>;
50 interrupt-controller;
51 reg = <0x14000000 0x100>;
52 clear-mask = <0xffffffff>;
53 };
Linus Walleij4672cdd2012-09-06 09:08:47 +010054
Linus Walleij73efd532012-09-06 09:09:11 +010055 flash@24000000 {
Linus Walleij91011a72016-01-26 11:09:22 +010056 compatible = "arm,versatile-flash", "cfi-flash";
Linus Walleij73efd532012-09-06 09:09:11 +010057 reg = <0x24000000 0x02000000>;
Linus Walleij91011a72016-01-26 11:09:22 +010058 bank-width = <4>;
Linus Walleij73efd532012-09-06 09:09:11 +010059 };
60
Linus Walleij4672cdd2012-09-06 09:08:47 +010061 fpga {
Masahiro Yamada2ef7d5f2016-03-09 13:26:45 +090062 compatible = "simple-bus";
Linus Walleij4672cdd2012-09-06 09:08:47 +010063 #address-cells = <1>;
64 #size-cells = <1>;
65 ranges;
66 interrupt-parent = <&pic>;
67
68 /*
69 * These PrimeCells are in the same locations and using the
70 * same interrupts in all Integrators, however the silicon
71 * version deployed is different.
72 */
73 rtc@15000000 {
74 reg = <0x15000000 0x1000>;
75 interrupts = <8>;
76 };
77
78 uart@16000000 {
79 reg = <0x16000000 0x1000>;
80 interrupts = <1>;
81 };
82
83 uart@17000000 {
84 reg = <0x17000000 0x1000>;
85 interrupts = <2>;
86 };
87
88 kmi@18000000 {
89 reg = <0x18000000 0x1000>;
90 interrupts = <3>;
91 };
92
93 kmi@19000000 {
94 reg = <0x19000000 0x1000>;
95 interrupts = <4>;
96 };
Linus Walleij7e610062014-10-15 17:33:13 +020097
98 syscon {
99 /* Debug registers mapped as syscon */
Linus Walleij480aa742015-03-03 10:06:16 +0100100 compatible = "syscon", "simple-mfd";
Linus Walleij7e610062014-10-15 17:33:13 +0200101 reg = <0x1a000000 0x10>;
102
Rob Herring8dccafa2017-10-13 12:54:51 -0500103 led@4.0 {
Linus Walleij7e610062014-10-15 17:33:13 +0200104 compatible = "register-bit-led";
105 offset = <0x04>;
106 mask = <0x01>;
107 label = "integrator:green0";
108 linux,default-trigger = "heartbeat";
109 default-state = "on";
110 };
Rob Herring8dccafa2017-10-13 12:54:51 -0500111 led@4.1 {
Linus Walleij7e610062014-10-15 17:33:13 +0200112 compatible = "register-bit-led";
113 offset = <0x04>;
114 mask = <0x02>;
115 label = "integrator:yellow";
116 default-state = "off";
117 };
Rob Herring8dccafa2017-10-13 12:54:51 -0500118 led@4.2 {
Linus Walleij7e610062014-10-15 17:33:13 +0200119 compatible = "register-bit-led";
120 offset = <0x04>;
121 mask = <0x04>;
122 label = "integrator:red";
123 default-state = "off";
124 };
Rob Herring8dccafa2017-10-13 12:54:51 -0500125 led@4.3 {
Linus Walleij7e610062014-10-15 17:33:13 +0200126 compatible = "register-bit-led";
127 offset = <0x04>;
128 mask = <0x08>;
129 label = "integrator:green1";
130 default-state = "off";
131 };
132 };
Linus Walleij4672cdd2012-09-06 09:08:47 +0100133 };
Linus Walleij4980f9b2012-09-06 09:08:24 +0100134};