Mike Frysinger | 780431e | 2007-10-21 23:37:54 +0800 | [diff] [blame] | 1 | /* |
| 2 | * include/asm/bf5xx_timers.h |
| 3 | * |
| 4 | * This file contains the major Data structures and constants |
| 5 | * used for General Purpose Timer Implementation in BF5xx |
| 6 | * |
| 7 | * Copyright (C) 2005 John DeHority |
| 8 | * Copyright (C) 2006 Hella Aglaia GmbH (awe@aglaia-gmbh.de) |
| 9 | * |
| 10 | */ |
| 11 | |
| 12 | #ifndef _BLACKFIN_TIMERS_H_ |
| 13 | #define _BLACKFIN_TIMERS_H_ |
| 14 | |
| 15 | #include <linux/types.h> |
| 16 | #include <asm/blackfin.h> |
| 17 | |
| 18 | /* |
| 19 | * BF537/BF527: 8 timers: |
| 20 | */ |
| 21 | #if defined(BF527_FAMILY) || defined(BF537_FAMILY) |
| 22 | # define MAX_BLACKFIN_GPTIMERS 8 |
| 23 | # define TIMER0_GROUP_REG TIMER_ENABLE |
| 24 | #endif |
| 25 | /* |
| 26 | * BF561: 12 timers: |
| 27 | */ |
| 28 | #if defined(CONFIG_BF561) |
| 29 | # define MAX_BLACKFIN_GPTIMERS 12 |
| 30 | # define TIMER0_GROUP_REG TMRS8_ENABLE |
| 31 | # define TIMER8_GROUP_REG TMRS4_ENABLE |
| 32 | #endif |
| 33 | /* |
| 34 | * All others: 3 timers: |
| 35 | */ |
| 36 | #if !defined(MAX_BLACKFIN_GPTIMERS) |
| 37 | # define MAX_BLACKFIN_GPTIMERS 3 |
| 38 | # define TIMER0_GROUP_REG TIMER_ENABLE |
| 39 | #endif |
| 40 | |
| 41 | #define BLACKFIN_GPTIMER_IDMASK ((1UL << MAX_BLACKFIN_GPTIMERS) - 1) |
| 42 | #define BFIN_TIMER_OCTET(x) ((x) >> 3) |
| 43 | |
| 44 | /* used in masks for timer_enable() and timer_disable() */ |
| 45 | #define TIMER0bit 0x0001 /* 0001b */ |
| 46 | #define TIMER1bit 0x0002 /* 0010b */ |
| 47 | #define TIMER2bit 0x0004 /* 0100b */ |
| 48 | |
| 49 | #if (MAX_BLACKFIN_GPTIMERS > 3) |
| 50 | # define TIMER3bit 0x0008 |
| 51 | # define TIMER4bit 0x0010 |
| 52 | # define TIMER5bit 0x0020 |
| 53 | # define TIMER6bit 0x0040 |
| 54 | # define TIMER7bit 0x0080 |
| 55 | #endif |
| 56 | |
| 57 | #if (MAX_BLACKFIN_GPTIMERS > 8) |
| 58 | # define TIMER8bit 0x0100 |
| 59 | # define TIMER9bit 0x0200 |
| 60 | # define TIMER10bit 0x0400 |
| 61 | # define TIMER11bit 0x0800 |
| 62 | #endif |
| 63 | |
| 64 | #define TIMER0_id 0 |
| 65 | #define TIMER1_id 1 |
| 66 | #define TIMER2_id 2 |
| 67 | |
| 68 | #if (MAX_BLACKFIN_GPTIMERS > 3) |
| 69 | # define TIMER3_id 3 |
| 70 | # define TIMER4_id 4 |
| 71 | # define TIMER5_id 5 |
| 72 | # define TIMER6_id 6 |
| 73 | # define TIMER7_id 7 |
| 74 | #endif |
| 75 | |
| 76 | #if (MAX_BLACKFIN_GPTIMERS > 8) |
| 77 | # define TIMER8_id 8 |
| 78 | # define TIMER9_id 9 |
| 79 | # define TIMER10_id 10 |
| 80 | # define TIMER11_id 11 |
| 81 | #endif |
| 82 | |
| 83 | /* associated timers for ppi framesync: */ |
| 84 | |
| 85 | #if defined(CONFIG_BF561) |
| 86 | # define FS0_1_TIMER_ID TIMER8_id |
| 87 | # define FS0_2_TIMER_ID TIMER9_id |
| 88 | # define FS1_1_TIMER_ID TIMER10_id |
| 89 | # define FS1_2_TIMER_ID TIMER11_id |
| 90 | # define FS0_1_TIMER_BIT TIMER8bit |
| 91 | # define FS0_2_TIMER_BIT TIMER9bit |
| 92 | # define FS1_1_TIMER_BIT TIMER10bit |
| 93 | # define FS1_2_TIMER_BIT TIMER11bit |
| 94 | # undef FS1_TIMER_ID |
| 95 | # undef FS2_TIMER_ID |
| 96 | # undef FS1_TIMER_BIT |
| 97 | # undef FS2_TIMER_BIT |
| 98 | #else |
| 99 | # define FS1_TIMER_ID TIMER0_id |
| 100 | # define FS2_TIMER_ID TIMER1_id |
| 101 | # define FS1_TIMER_BIT TIMER0bit |
| 102 | # define FS2_TIMER_BIT TIMER1bit |
| 103 | #endif |
| 104 | |
| 105 | /* |
| 106 | * Timer Configuration Register Bits |
| 107 | */ |
| 108 | #define TIMER_ERR 0xC000 |
| 109 | #define TIMER_ERR_OVFL 0x4000 |
| 110 | #define TIMER_ERR_PROG_PER 0x8000 |
| 111 | #define TIMER_ERR_PROG_PW 0xC000 |
| 112 | #define TIMER_EMU_RUN 0x0200 |
| 113 | #define TIMER_TOGGLE_HI 0x0100 |
| 114 | #define TIMER_CLK_SEL 0x0080 |
| 115 | #define TIMER_OUT_DIS 0x0040 |
| 116 | #define TIMER_TIN_SEL 0x0020 |
| 117 | #define TIMER_IRQ_ENA 0x0010 |
| 118 | #define TIMER_PERIOD_CNT 0x0008 |
| 119 | #define TIMER_PULSE_HI 0x0004 |
| 120 | #define TIMER_MODE 0x0003 |
| 121 | #define TIMER_MODE_PWM 0x0001 |
| 122 | #define TIMER_MODE_WDTH 0x0002 |
| 123 | #define TIMER_MODE_EXT_CLK 0x0003 |
| 124 | |
| 125 | /* |
| 126 | * Timer Status Register Bits |
| 127 | */ |
| 128 | #define TIMER_STATUS_TIMIL0 0x0001 |
| 129 | #define TIMER_STATUS_TIMIL1 0x0002 |
| 130 | #define TIMER_STATUS_TIMIL2 0x0004 |
| 131 | #if (MAX_BLACKFIN_GPTIMERS > 3) |
| 132 | # define TIMER_STATUS_TIMIL3 0x00000008 |
| 133 | # define TIMER_STATUS_TIMIL4 0x00010000 |
| 134 | # define TIMER_STATUS_TIMIL5 0x00020000 |
| 135 | # define TIMER_STATUS_TIMIL6 0x00040000 |
| 136 | # define TIMER_STATUS_TIMIL7 0x00080000 |
| 137 | # if (MAX_BLACKFIN_GPTIMERS > 8) |
| 138 | # define TIMER_STATUS_TIMIL8 0x0001 |
| 139 | # define TIMER_STATUS_TIMIL9 0x0002 |
| 140 | # define TIMER_STATUS_TIMIL10 0x0004 |
| 141 | # define TIMER_STATUS_TIMIL11 0x0008 |
| 142 | # endif |
| 143 | # define TIMER_STATUS_INTR 0x000F000F |
| 144 | #else |
| 145 | # define TIMER_STATUS_INTR 0x0007 /* any timer interrupt */ |
| 146 | #endif |
| 147 | |
| 148 | #define TIMER_STATUS_TOVF0 0x0010 /* timer 0 overflow error */ |
| 149 | #define TIMER_STATUS_TOVF1 0x0020 |
| 150 | #define TIMER_STATUS_TOVF2 0x0040 |
| 151 | #if (MAX_BLACKFIN_GPTIMERS > 3) |
| 152 | # define TIMER_STATUS_TOVF3 0x00000080 |
| 153 | # define TIMER_STATUS_TOVF4 0x00100000 |
| 154 | # define TIMER_STATUS_TOVF5 0x00200000 |
| 155 | # define TIMER_STATUS_TOVF6 0x00400000 |
| 156 | # define TIMER_STATUS_TOVF7 0x00800000 |
| 157 | # if (MAX_BLACKFIN_GPTIMERS > 8) |
| 158 | # define TIMER_STATUS_TOVF8 0x0010 |
| 159 | # define TIMER_STATUS_TOVF9 0x0020 |
| 160 | # define TIMER_STATUS_TOVF10 0x0040 |
| 161 | # define TIMER_STATUS_TOVF11 0x0080 |
| 162 | # endif |
| 163 | # define TIMER_STATUS_OFLOW 0x00F000F0 |
| 164 | #else |
| 165 | # define TIMER_STATUS_OFLOW 0x0070 /* any timer overflow */ |
| 166 | #endif |
| 167 | |
| 168 | /* |
| 169 | * Timer Slave Enable Status : write 1 to clear |
| 170 | */ |
| 171 | #define TIMER_STATUS_TRUN0 0x1000 |
| 172 | #define TIMER_STATUS_TRUN1 0x2000 |
| 173 | #define TIMER_STATUS_TRUN2 0x4000 |
| 174 | #if (MAX_BLACKFIN_GPTIMERS > 3) |
| 175 | # define TIMER_STATUS_TRUN3 0x00008000 |
| 176 | # define TIMER_STATUS_TRUN4 0x10000000 |
| 177 | # define TIMER_STATUS_TRUN5 0x20000000 |
| 178 | # define TIMER_STATUS_TRUN6 0x40000000 |
| 179 | # define TIMER_STATUS_TRUN7 0x80000000 |
| 180 | # define TIMER_STATUS_TRUN 0xF000F000 |
| 181 | # if (MAX_BLACKFIN_GPTIMERS > 8) |
| 182 | # define TIMER_STATUS_TRUN8 0x1000 |
| 183 | # define TIMER_STATUS_TRUN9 0x2000 |
| 184 | # define TIMER_STATUS_TRUN10 0x4000 |
| 185 | # define TIMER_STATUS_TRUN11 0x8000 |
| 186 | # endif |
| 187 | #else |
| 188 | # define TIMER_STATUS_TRUN 0x7000 |
| 189 | #endif |
| 190 | |
| 191 | /* The actual gptimer API */ |
| 192 | |
| 193 | void set_gptimer_pwidth (int timer_id, uint32_t width); |
| 194 | uint32_t get_gptimer_pwidth (int timer_id); |
| 195 | void set_gptimer_period (int timer_id, uint32_t period); |
| 196 | uint32_t get_gptimer_period (int timer_id); |
| 197 | uint32_t get_gptimer_count (int timer_id); |
| 198 | uint16_t get_gptimer_intr (int timer_id); |
| 199 | void clear_gptimer_intr (int timer_id); |
Mike Frysinger | 4ad1ec7 | 2007-10-29 18:02:09 +0800 | [diff] [blame^] | 200 | uint16_t get_gptimer_over (int timer_id); |
| 201 | void clear_gptimer_over (int timer_id); |
Mike Frysinger | 780431e | 2007-10-21 23:37:54 +0800 | [diff] [blame] | 202 | void set_gptimer_config (int timer_id, uint16_t config); |
| 203 | uint16_t get_gptimer_config (int timer_id); |
| 204 | void set_gptimer_pulse_hi (int timer_id); |
| 205 | void clear_gptimer_pulse_hi(int timer_id); |
| 206 | void enable_gptimers (uint16_t mask); |
| 207 | void disable_gptimers (uint16_t mask); |
| 208 | uint16_t get_enabled_gptimers (void); |
| 209 | uint32_t get_gptimer_status (int group); |
| 210 | void set_gptimer_status (int group, uint32_t value); |
| 211 | |
| 212 | #endif |