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gerrit-public.fairphone.software / kernel / msm-4.19 / 4b756ffb58a62ed8661126ca1b3209e2cf436852 / . / arch / arm / boot / dts / kirkwood-ts219-6282.dts
blob: 345562f7589182975d27ae5e95b1e4319bc7f843 [file] [log] [blame]
Andrew Lunn9eb61f42012-05-12 14:57:59 +0200[diff] [blame]1/dts-v1/;
2
Ezequiel Garcia0ab61292013-07-26 10:18:02 -0300[diff] [blame]3#include "kirkwood.dtsi"
4#include "kirkwood-6282.dtsi"
5#include "kirkwood-ts219.dtsi"
Andrew Lunn9eb61f42012-05-12 14:57:59 +0200[diff] [blame]6
7/ {
Ezequiel Garcia54397d82013-07-26 10:18:05 -0300[diff] [blame]8 mbus {
Ezequiel Garcia54397d82013-07-26 10:18:05 -0300[diff] [blame]9 pcie-controller {
10 status = "okay";
11
12 pcie@2,0 {
13 status = "okay";
14 };
15 };
16 };
17
Andrew Lunn1f6e46b2012-11-17 17:00:46 +0100[diff] [blame]18 ocp@f1000000 {
19 pinctrl: pinctrl@10000 {
20
Thomas Petazzonia4936cf2013-05-24 11:44:56 +0200[diff] [blame]21 pinctrl-0 = <&pmx_ram_size &pmx_board_id>;
Andrew Lunn1f6e46b2012-11-17 17:00:46 +0100[diff] [blame]22 pinctrl-names = "default";
23
24 pmx_ram_size: pmx-ram-size {
25 /* RAM: 0: 256 MB, 1: 512 MB */
26 marvell,pins = "mpp36";
27 marvell,function = "gpio";
28 };
29 pmx_reset_button: pmx-reset-button {
30 marvell,pins = "mpp37";
31 marvell,function = "gpio";
32 };
33 pmx_USB_copy_button: pmx-USB-copy-button {
34 marvell,pins = "mpp43";
35 marvell,function = "gpio";
36 };
37 pmx_board_id: pmx-board-id {
38 /* 0: TS-11x, 1: TS-21x */
39 marvell,pins = "mpp44";
40 marvell,function = "gpio";
41 };
42 };
43 };
44
Andrew Lunn9eb61f42012-05-12 14:57:59 +0200[diff] [blame]45 gpio_keys {
46 compatible = "gpio-keys";
47 #address-cells = <1>;
48 #size-cells = <0>;
Thomas Petazzonia4936cf2013-05-24 11:44:56 +0200[diff] [blame]49 pinctrl-0 = <&pmx_reset_button &pmx_USB_copy_button>;
50 pinctrl-names = "default";
51
Andrew Lunn9eb61f42012-05-12 14:57:59 +0200[diff] [blame]52 button@1 {
53 label = "USB Copy";
54 linux,code = <133>;
55 gpios = <&gpio1 11 1>;
56 };
57 button@2 {
58 label = "Reset";
59 linux,code = <0x198>;
60 gpios = <&gpio1 5 1>;
61 };
62 };
Sebastian Hesselbarth876e2332013-07-07 22:34:56 +0200[diff] [blame]63};
64
65&ethphy0 { reg = <0>; };