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Linus Walleij60013b92013-09-22 21:49:18 +02001/*
2 * Core driver for STw4810/STw4811
3 *
4 * Copyright (C) 2013 ST-Ericsson SA
5 * Written on behalf of Linaro for ST-Ericsson
6 *
7 * Author: Linus Walleij <linus.walleij@linaro.org>
8 *
9 * License terms: GNU General Public License (GPL) version 2
10 */
11
12#include <linux/err.h>
13#include <linux/i2c.h>
14#include <linux/init.h>
15#include <linux/mfd/core.h>
16#include <linux/mfd/stw481x.h>
17#include <linux/module.h>
18#include <linux/regmap.h>
19#include <linux/spinlock.h>
20#include <linux/slab.h>
21
22/*
23 * This driver can only access the non-USB portions of STw4811, the register
24 * range 0x00-0x10 dealing with USB is bound to the two special I2C pins used
25 * for USB control.
26 */
27
28/* Registers inside the power control address space */
29#define STW_PC_VCORE_SEL 0x05U
30#define STW_PC_VAUX_SEL 0x06U
31#define STW_PC_VPLL_SEL 0x07U
32
33/**
34 * stw481x_get_pctl_reg() - get a power control register
35 * @stw481x: handle to the stw481x chip
36 * @reg: power control register to fetch
37 *
38 * The power control registers is a set of one-time-programmable registers
39 * in its own register space, accessed by writing addess bits to these
40 * two registers: bits 7,6,5 of PCTL_REG_LO corresponds to the 3 LSBs of
41 * the address and bits 8,9 of PCTL_REG_HI corresponds to the 2 MSBs of
42 * the address, forming an address space of 5 bits, i.e. 32 registers
43 * 0x00 ... 0x1f can be obtained.
44 */
45static int stw481x_get_pctl_reg(struct stw481x *stw481x, u8 reg)
46{
47 u8 msb = (reg >> 3) & 0x03;
48 u8 lsb = (reg << 5) & 0xe0;
49 unsigned int val;
50 u8 vrfy;
51 int ret;
52
53 ret = regmap_write(stw481x->map, STW_PCTL_REG_HI, msb);
54 if (ret)
55 return ret;
56 ret = regmap_write(stw481x->map, STW_PCTL_REG_LO, lsb);
57 if (ret)
58 return ret;
59 ret = regmap_read(stw481x->map, STW_PCTL_REG_HI, &val);
60 if (ret)
61 return ret;
62 vrfy = (val & 0x03) << 3;
63 ret = regmap_read(stw481x->map, STW_PCTL_REG_LO, &val);
64 if (ret)
65 return ret;
66 vrfy |= ((val >> 5) & 0x07);
67 if (vrfy != reg)
68 return -EIO;
69 return (val >> 1) & 0x0f;
70}
71
72static int stw481x_startup(struct stw481x *stw481x)
73{
74 /* Voltages multiplied by 100 */
Colin Ian King223fd9f2017-09-05 12:27:12 +010075 static const u8 vcore_val[] = {
76 100, 105, 110, 115, 120, 122, 124, 126, 128,
77 130, 132, 134, 136, 138, 140, 145
78 };
79 static const u8 vpll_val[] = { 105, 120, 130, 180 };
80 static const u8 vaux_val[] = { 15, 18, 25, 28 };
Linus Walleij60013b92013-09-22 21:49:18 +020081 u8 vcore;
82 u8 vcore_slp;
83 u8 vpll;
84 u8 vaux;
85 bool vaux_en;
86 bool it_warn;
87 int ret;
88 unsigned int val;
89
90 ret = regmap_read(stw481x->map, STW_CONF1, &val);
91 if (ret)
92 return ret;
93 vaux_en = !!(val & STW_CONF1_PDN_VAUX);
94 it_warn = !!(val & STW_CONF1_IT_WARN);
95
96 dev_info(&stw481x->client->dev, "voltages %s\n",
97 (val & STW_CONF1_V_MONITORING) ? "OK" : "LOW");
98 dev_info(&stw481x->client->dev, "MMC level shifter %s\n",
99 (val & STW_CONF1_MMC_LS_STATUS) ? "high impedance" : "ON");
100 dev_info(&stw481x->client->dev, "VMMC: %s\n",
101 (val & STW_CONF1_PDN_VMMC) ? "ON" : "disabled");
102
103 dev_info(&stw481x->client->dev, "STw481x power control registers:\n");
104
105 ret = stw481x_get_pctl_reg(stw481x, STW_PC_VCORE_SEL);
106 if (ret < 0)
107 return ret;
108 vcore = ret & 0x0f;
109
110 ret = stw481x_get_pctl_reg(stw481x, STW_PC_VAUX_SEL);
111 if (ret < 0)
112 return ret;
113 vaux = (ret >> 2) & 3;
114 vpll = (ret >> 4) & 1; /* Save bit 4 */
115
116 ret = stw481x_get_pctl_reg(stw481x, STW_PC_VPLL_SEL);
117 if (ret < 0)
118 return ret;
119 vpll |= (ret >> 1) & 2;
120
121 dev_info(&stw481x->client->dev, "VCORE: %u.%uV %s\n",
122 vcore_val[vcore] / 100, vcore_val[vcore] % 100,
123 (ret & 4) ? "ON" : "OFF");
124
125 dev_info(&stw481x->client->dev, "VPLL: %u.%uV %s\n",
126 vpll_val[vpll] / 100, vpll_val[vpll] % 100,
127 (ret & 0x10) ? "ON" : "OFF");
128
129 dev_info(&stw481x->client->dev, "VAUX: %u.%uV %s\n",
130 vaux_val[vaux] / 10, vaux_val[vaux] % 10,
131 vaux_en ? "ON" : "OFF");
132
133 ret = regmap_read(stw481x->map, STW_CONF2, &val);
134 if (ret)
135 return ret;
136
137 dev_info(&stw481x->client->dev, "TWARN: %s threshold, %s\n",
138 it_warn ? "below" : "above",
139 (val & STW_CONF2_MASK_TWARN) ?
140 "enabled" : "mask through VDDOK");
141 dev_info(&stw481x->client->dev, "VMMC: %s\n",
142 (val & STW_CONF2_VMMC_EXT) ? "internal" : "external");
143 dev_info(&stw481x->client->dev, "IT WAKE UP: %s\n",
144 (val & STW_CONF2_MASK_IT_WAKE_UP) ? "enabled" : "masked");
145 dev_info(&stw481x->client->dev, "GPO1: %s\n",
146 (val & STW_CONF2_GPO1) ? "low" : "high impedance");
147 dev_info(&stw481x->client->dev, "GPO2: %s\n",
148 (val & STW_CONF2_GPO2) ? "low" : "high impedance");
149
150 ret = regmap_read(stw481x->map, STW_VCORE_SLEEP, &val);
151 if (ret)
152 return ret;
153 vcore_slp = val & 0x0f;
154 dev_info(&stw481x->client->dev, "VCORE SLEEP: %u.%uV\n",
155 vcore_val[vcore_slp] / 100, vcore_val[vcore_slp] % 100);
156
157 return 0;
158}
159
160/*
161 * MFD cells - we have one cell which is selected operation
162 * mode, and we always have a GPIO cell.
163 */
164static struct mfd_cell stw481x_cells[] = {
165 {
166 .of_compatible = "st,stw481x-vmmc",
167 .name = "stw481x-vmmc-regulator",
168 .id = -1,
169 },
170};
171
Sachin Kamate2f3e9b2014-02-12 14:40:12 +0530172static const struct regmap_config stw481x_regmap_config = {
Linus Walleij60013b92013-09-22 21:49:18 +0200173 .reg_bits = 8,
174 .val_bits = 8,
175};
176
177static int stw481x_probe(struct i2c_client *client,
178 const struct i2c_device_id *id)
179{
180 struct stw481x *stw481x;
181 int ret;
182 int i;
183
184 stw481x = devm_kzalloc(&client->dev, sizeof(*stw481x), GFP_KERNEL);
185 if (!stw481x)
186 return -ENOMEM;
187
188 i2c_set_clientdata(client, stw481x);
189 stw481x->client = client;
190 stw481x->map = devm_regmap_init_i2c(client, &stw481x_regmap_config);
Sachin Kamatc88fd912014-02-12 14:40:13 +0530191 if (IS_ERR(stw481x->map)) {
192 ret = PTR_ERR(stw481x->map);
193 dev_err(&client->dev, "Failed to allocate register map: %d\n",
194 ret);
195 return ret;
196 }
Linus Walleij60013b92013-09-22 21:49:18 +0200197
198 ret = stw481x_startup(stw481x);
199 if (ret) {
200 dev_err(&client->dev, "chip initialization failed\n");
201 return ret;
202 }
203
204 /* Set up and register the platform devices. */
205 for (i = 0; i < ARRAY_SIZE(stw481x_cells); i++) {
206 /* One state holder for all drivers, this is simple */
207 stw481x_cells[i].platform_data = stw481x;
208 stw481x_cells[i].pdata_size = sizeof(*stw481x);
209 }
210
Laxman Dewangane253fb02016-04-08 00:13:10 +0530211 ret = devm_mfd_add_devices(&client->dev, 0, stw481x_cells,
212 ARRAY_SIZE(stw481x_cells), NULL, 0, NULL);
Linus Walleij60013b92013-09-22 21:49:18 +0200213 if (ret)
214 return ret;
215
216 dev_info(&client->dev, "initialized STw481x device\n");
217
218 return ret;
219}
220
Linus Walleij60013b92013-09-22 21:49:18 +0200221/*
222 * This ID table is completely unused, as this is a pure
223 * device-tree probed driver, but it has to be here due to
224 * the structure of the I2C core.
225 */
226static const struct i2c_device_id stw481x_id[] = {
227 { "stw481x", 0 },
228 { },
229};
Javier Martinez Canillas0f63bde2015-07-30 18:18:26 +0200230MODULE_DEVICE_TABLE(i2c, stw481x_id);
Linus Walleij60013b92013-09-22 21:49:18 +0200231
232static const struct of_device_id stw481x_match[] = {
233 { .compatible = "st,stw4810", },
234 { .compatible = "st,stw4811", },
235 { },
236};
237MODULE_DEVICE_TABLE(of, stw481x_match);
238
239static struct i2c_driver stw481x_driver = {
240 .driver = {
241 .name = "stw481x",
242 .of_match_table = stw481x_match,
243 },
244 .probe = stw481x_probe,
Linus Walleij60013b92013-09-22 21:49:18 +0200245 .id_table = stw481x_id,
246};
247
248module_i2c_driver(stw481x_driver);
249
250MODULE_AUTHOR("Linus Walleij");
251MODULE_DESCRIPTION("STw481x PMIC driver");
252MODULE_LICENSE("GPL v2");