Kristoffer Glembo | d4ac42a | 2009-11-04 08:39:46 -0800 | [diff] [blame] | 1 | #ifndef __GRLIB_APBUART_H__ |
| 2 | #define __GRLIB_APBUART_H__ |
| 3 | |
| 4 | #include <asm/io.h> |
| 5 | |
| 6 | #define UART_NR 8 |
| 7 | static int grlib_apbuart_port_nr; |
| 8 | |
| 9 | struct grlib_apbuart_regs_map { |
| 10 | u32 data; |
| 11 | u32 status; |
| 12 | u32 ctrl; |
| 13 | u32 scaler; |
| 14 | }; |
| 15 | |
| 16 | struct amba_prom_registers { |
| 17 | unsigned int phys_addr; |
| 18 | unsigned int reg_size; |
| 19 | }; |
| 20 | |
| 21 | /* |
| 22 | * The following defines the bits in the APBUART Status Registers. |
| 23 | */ |
| 24 | #define UART_STATUS_DR 0x00000001 /* Data Ready */ |
| 25 | #define UART_STATUS_TSE 0x00000002 /* TX Send Register Empty */ |
| 26 | #define UART_STATUS_THE 0x00000004 /* TX Hold Register Empty */ |
| 27 | #define UART_STATUS_BR 0x00000008 /* Break Error */ |
| 28 | #define UART_STATUS_OE 0x00000010 /* RX Overrun Error */ |
| 29 | #define UART_STATUS_PE 0x00000020 /* RX Parity Error */ |
| 30 | #define UART_STATUS_FE 0x00000040 /* RX Framing Error */ |
| 31 | #define UART_STATUS_ERR 0x00000078 /* Error Mask */ |
| 32 | |
| 33 | /* |
| 34 | * The following defines the bits in the APBUART Ctrl Registers. |
| 35 | */ |
| 36 | #define UART_CTRL_RE 0x00000001 /* Receiver enable */ |
| 37 | #define UART_CTRL_TE 0x00000002 /* Transmitter enable */ |
| 38 | #define UART_CTRL_RI 0x00000004 /* Receiver interrupt enable */ |
| 39 | #define UART_CTRL_TI 0x00000008 /* Transmitter irq */ |
| 40 | #define UART_CTRL_PS 0x00000010 /* Parity select */ |
| 41 | #define UART_CTRL_PE 0x00000020 /* Parity enable */ |
| 42 | #define UART_CTRL_FL 0x00000040 /* Flow control enable */ |
| 43 | #define UART_CTRL_LB 0x00000080 /* Loopback enable */ |
| 44 | |
| 45 | #define APBBASE(port) ((struct grlib_apbuart_regs_map *)((port)->membase)) |
| 46 | |
| 47 | #define APBBASE_DATA_P(port) (&(APBBASE(port)->data)) |
| 48 | #define APBBASE_STATUS_P(port) (&(APBBASE(port)->status)) |
| 49 | #define APBBASE_CTRL_P(port) (&(APBBASE(port)->ctrl)) |
| 50 | #define APBBASE_SCALAR_P(port) (&(APBBASE(port)->scaler)) |
| 51 | |
| 52 | #define UART_GET_CHAR(port) (__raw_readl(APBBASE_DATA_P(port))) |
| 53 | #define UART_PUT_CHAR(port, v) (__raw_writel(v, APBBASE_DATA_P(port))) |
| 54 | #define UART_GET_STATUS(port) (__raw_readl(APBBASE_STATUS_P(port))) |
| 55 | #define UART_PUT_STATUS(port, v)(__raw_writel(v, APBBASE_STATUS_P(port))) |
| 56 | #define UART_GET_CTRL(port) (__raw_readl(APBBASE_CTRL_P(port))) |
| 57 | #define UART_PUT_CTRL(port, v) (__raw_writel(v, APBBASE_CTRL_P(port))) |
| 58 | #define UART_GET_SCAL(port) (__raw_readl(APBBASE_SCALAR_P(port))) |
| 59 | #define UART_PUT_SCAL(port, v) (__raw_writel(v, APBBASE_SCALAR_P(port))) |
| 60 | |
| 61 | #define UART_RX_DATA(s) (((s) & UART_STATUS_DR) != 0) |
| 62 | #define UART_TX_READY(s) (((s) & UART_STATUS_THE) != 0) |
| 63 | |
| 64 | #endif /* __GRLIB_APBUART_H__ */ |