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Paul Walmsley543d9372008-03-18 10:22:06 +02001/*
2 * linux/arch/arm/mach-omap2/clock.h
3 *
Paul Walmsleyd8a94452009-12-08 16:21:29 -07004 * Copyright (C) 2005-2009 Texas Instruments, Inc.
Paul Walmsley530e5442011-02-25 15:39:28 -07005 * Copyright (C) 2004-2011 Nokia Corporation
Tony Lindgrena16e9702008-03-18 11:56:39 +02006 *
7 * Contacts:
Paul Walmsley543d9372008-03-18 10:22:06 +02008 * Richard Woodruff <r-woodruff2@ti.com>
Paul Walmsley543d9372008-03-18 10:22:06 +02009 * Paul Walmsley
10 *
11 * This program is free software; you can redistribute it and/or modify
12 * it under the terms of the GNU General Public License version 2 as
13 * published by the Free Software Foundation.
14 */
15
16#ifndef __ARCH_ARM_MACH_OMAP2_CLOCK_H
17#define __ARCH_ARM_MACH_OMAP2_CLOCK_H
18
Paul Walmsley12706c52011-07-10 05:57:06 -060019#include <linux/kernel.h>
Paul Walmsleya135eaa2012-09-27 10:33:34 -060020#include <linux/list.h>
Paul Walmsley12706c52011-07-10 05:57:06 -060021
Paul Walmsleye10dd622012-09-27 10:33:35 -060022#include <linux/clkdev.h>
Mike Turquettef9ae32a2012-11-07 13:14:47 -080023#include <linux/clk-provider.h>
Tero Kristof38b0dd2013-06-12 16:04:34 +030024#include <linux/clk/ti.h>
Paul Walmsleye10dd622012-09-27 10:33:35 -060025
Paul Walmsleya135eaa2012-09-27 10:33:34 -060026/* struct clksel_rate.flags possibilities */
27#define RATE_IN_242X (1 << 0)
28#define RATE_IN_243X (1 << 1)
29#define RATE_IN_3430ES1 (1 << 2) /* 3430ES1 rates only */
30#define RATE_IN_3430ES2PLUS (1 << 3) /* 3430 ES >= 2 rates only */
31#define RATE_IN_36XX (1 << 4)
32#define RATE_IN_4430 (1 << 5)
33#define RATE_IN_TI816X (1 << 6)
34#define RATE_IN_4460 (1 << 7)
35#define RATE_IN_AM33XX (1 << 8)
36#define RATE_IN_TI814X (1 << 9)
37
38#define RATE_IN_24XX (RATE_IN_242X | RATE_IN_243X)
39#define RATE_IN_34XX (RATE_IN_3430ES1 | RATE_IN_3430ES2PLUS)
40#define RATE_IN_3XXX (RATE_IN_34XX | RATE_IN_36XX)
41#define RATE_IN_44XX (RATE_IN_4430 | RATE_IN_4460)
42
43/* RATE_IN_3430ES2PLUS_36XX includes 34xx/35xx with ES >=2, and all 36xx/37xx */
44#define RATE_IN_3430ES2PLUS_36XX (RATE_IN_3430ES2PLUS | RATE_IN_36XX)
45
Russell Kingc0bf3132009-02-19 13:29:22 +000046/* CM_CLKSEL2_PLL.CORE_CLK_SRC bits (2XXX) */
47#define CORE_CLK_SRC_32K 0x0
48#define CORE_CLK_SRC_DPLL 0x1
49#define CORE_CLK_SRC_DPLL_X2 0x2
50
51/* OMAP2xxx CM_CLKEN_PLL.EN_DPLL bits - for omap2_get_dpll_rate() */
52#define OMAP2XXX_EN_DPLL_LPBYPASS 0x1
53#define OMAP2XXX_EN_DPLL_FRBYPASS 0x2
54#define OMAP2XXX_EN_DPLL_LOCKED 0x3
55
56/* OMAP3xxx CM_CLKEN_PLL*.EN_*_DPLL bits - for omap2_get_dpll_rate() */
57#define OMAP3XXX_EN_DPLL_LPBYPASS 0x5
58#define OMAP3XXX_EN_DPLL_FRBYPASS 0x6
59#define OMAP3XXX_EN_DPLL_LOCKED 0x7
60
Rajendra Nayak16975a72009-12-08 18:47:16 -070061/* OMAP4xxx CM_CLKMODE_DPLL*.EN_*_DPLL bits - for omap2_get_dpll_rate() */
62#define OMAP4XXX_EN_DPLL_MNBYPASS 0x4
63#define OMAP4XXX_EN_DPLL_LPBYPASS 0x5
64#define OMAP4XXX_EN_DPLL_FRBYPASS 0x6
65#define OMAP4XXX_EN_DPLL_LOCKED 0x7
66
Tero Kristo6c0afb52017-02-09 11:24:37 +020067extern struct ti_clk_ll_ops omap_clk_ll_ops;
68
Afzal Mohammed99541192011-12-13 10:46:43 -080069extern u16 cpu_mask;
Paul Walmsleyd8a94452009-12-08 16:21:29 -070070
Russell Kingb36ee722008-11-04 17:59:52 +000071extern const struct clkops clkops_omap2_dflt_wait;
Russell Kingbc51da42008-11-04 18:59:32 +000072extern const struct clkops clkops_omap2_dflt;
Russell Kingb36ee722008-11-04 17:59:52 +000073
Paul Walmsley82e9bd52009-12-08 16:18:47 -070074extern struct clk_functions omap2_clk_functions;
75
Tero Kristoe9e63082015-04-27 21:55:42 +030076int __init omap2_clk_setup_ll_ops(void);
Tero Kristo9f029b12014-10-22 15:15:36 +030077
Tero Kristo8111e012014-07-02 11:47:39 +030078void __init ti_clk_init_features(void);
Paul Walmsley543d9372008-03-18 10:22:06 +020079#endif