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Sascha Hauer54df5262009-02-06 15:42:26 +01001/*
2 * Copyright (C) 2009 Sascha Hauer, Pengutronix
3 *
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License as published by
6 * the Free Software Foundation; either version 2 of the License, or
7 * (at your option) any later version.
8 *
9 * This program is distributed in the hope that it will be useful,
10 * but WITHOUT ANY WARRANTY; without even the implied warranty of
11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
12 * GNU General Public License for more details.
13 *
14 * You should have received a copy of the GNU General Public License
15 * along with this program; if not, write to the Free Software
16 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
17 */
18
19#include <linux/types.h>
20#include <linux/init.h>
21
22#include <linux/platform_device.h>
23#include <linux/mtd/physmap.h>
24#include <linux/mtd/plat-ram.h>
25#include <linux/memory.h>
26#include <linux/gpio.h>
27#include <linux/smc911x.h>
28#include <linux/interrupt.h>
29#include <linux/i2c.h>
30#include <linux/i2c/at24.h>
31
32#include <asm/mach-types.h>
33#include <asm/mach/arch.h>
34#include <asm/mach/time.h>
35#include <asm/mach/map.h>
36
37#include <mach/hardware.h>
38#include <mach/common.h>
39#include <mach/imx-uart.h>
40#if defined CONFIG_I2C_IMX || defined CONFIG_I2C_IMX_MODULE
41#include <mach/i2c.h>
42#endif
43#include <mach/iomux-mx35.h>
44#include <mach/ipu.h>
45#include <mach/mx3fb.h>
Sascha Hauer4f43c2e2009-11-12 11:30:26 +010046#include <mach/mxc_nand.h>
Sascha Hauer54df5262009-02-06 15:42:26 +010047
48#include "devices.h"
49
50static const struct fb_videomode fb_modedb[] = {
51 {
52 /* 240x320 @ 60 Hz */
53 .name = "Sharp-LQ035Q7",
54 .refresh = 60,
55 .xres = 240,
56 .yres = 320,
57 .pixclock = 185925,
58 .left_margin = 9,
59 .right_margin = 16,
60 .upper_margin = 7,
61 .lower_margin = 9,
62 .hsync_len = 1,
63 .vsync_len = 1,
64 .sync = FB_SYNC_HOR_HIGH_ACT | FB_SYNC_SHARP_MODE | FB_SYNC_CLK_INVERT | FB_SYNC_CLK_IDLE_EN,
65 .vmode = FB_VMODE_NONINTERLACED,
66 .flag = 0,
67 }, {
68 /* 240x320 @ 60 Hz */
69 .name = "TX090",
70 .refresh = 60,
71 .xres = 240,
72 .yres = 320,
73 .pixclock = 38255,
74 .left_margin = 144,
75 .right_margin = 0,
76 .upper_margin = 7,
77 .lower_margin = 40,
78 .hsync_len = 96,
79 .vsync_len = 1,
80 .sync = FB_SYNC_VERT_HIGH_ACT | FB_SYNC_OE_ACT_HIGH,
81 .vmode = FB_VMODE_NONINTERLACED,
82 .flag = 0,
83 },
84};
85
86static struct ipu_platform_data mx3_ipu_data = {
87 .irq_base = MXC_IPU_IRQ_START,
88};
89
90static struct mx3fb_platform_data mx3fb_pdata = {
91 .dma_dev = &mx3_ipu.dev,
92 .name = "Sharp-LQ035Q7",
93 .mode = fb_modedb,
94 .num_modes = ARRAY_SIZE(fb_modedb),
95};
96
97static struct physmap_flash_data pcm043_flash_data = {
98 .width = 2,
99};
100
101static struct resource pcm043_flash_resource = {
102 .start = 0xa0000000,
103 .end = 0xa1ffffff,
104 .flags = IORESOURCE_MEM,
105};
106
107static struct platform_device pcm043_flash = {
108 .name = "physmap-flash",
109 .id = 0,
110 .dev = {
111 .platform_data = &pcm043_flash_data,
112 },
113 .resource = &pcm043_flash_resource,
114 .num_resources = 1,
115};
116
117static struct imxuart_platform_data uart_pdata = {
118 .flags = IMXUART_HAVE_RTSCTS,
119};
120
121#if defined CONFIG_I2C_IMX || defined CONFIG_I2C_IMX_MODULE
122static struct imxi2c_platform_data pcm043_i2c_1_data = {
123 .bitrate = 50000,
124};
125
126static struct at24_platform_data board_eeprom = {
127 .byte_len = 4096,
128 .page_size = 32,
129 .flags = AT24_FLAG_ADDR16,
130};
131
132static struct i2c_board_info pcm043_i2c_devices[] = {
133 {
134 I2C_BOARD_INFO("at24", 0x52), /* E0=0, E1=1, E2=0 */
135 .platform_data = &board_eeprom,
136 }, {
Sascha Hauercf87a6e2009-07-20 08:18:47 +0200137 I2C_BOARD_INFO("pcf8563", 0x51),
Sascha Hauer54df5262009-02-06 15:42:26 +0100138 }
139};
140#endif
141
142static struct platform_device *devices[] __initdata = {
143 &pcm043_flash,
144 &mxc_fec_device,
145};
146
147static struct pad_desc pcm043_pads[] = {
148 /* UART1 */
149 MX35_PAD_CTS1__UART1_CTS,
150 MX35_PAD_RTS1__UART1_RTS,
151 MX35_PAD_TXD1__UART1_TXD_MUX,
152 MX35_PAD_RXD1__UART1_RXD_MUX,
153 /* UART2 */
154 MX35_PAD_CTS2__UART2_CTS,
155 MX35_PAD_RTS2__UART2_RTS,
156 MX35_PAD_TXD2__UART2_TXD_MUX,
157 MX35_PAD_RXD2__UART2_RXD_MUX,
158 /* FEC */
159 MX35_PAD_FEC_TX_CLK__FEC_TX_CLK,
160 MX35_PAD_FEC_RX_CLK__FEC_RX_CLK,
161 MX35_PAD_FEC_RX_DV__FEC_RX_DV,
162 MX35_PAD_FEC_COL__FEC_COL,
163 MX35_PAD_FEC_RDATA0__FEC_RDATA_0,
164 MX35_PAD_FEC_TDATA0__FEC_TDATA_0,
165 MX35_PAD_FEC_TX_EN__FEC_TX_EN,
166 MX35_PAD_FEC_MDC__FEC_MDC,
167 MX35_PAD_FEC_MDIO__FEC_MDIO,
168 MX35_PAD_FEC_TX_ERR__FEC_TX_ERR,
169 MX35_PAD_FEC_RX_ERR__FEC_RX_ERR,
170 MX35_PAD_FEC_CRS__FEC_CRS,
171 MX35_PAD_FEC_RDATA1__FEC_RDATA_1,
172 MX35_PAD_FEC_TDATA1__FEC_TDATA_1,
173 MX35_PAD_FEC_RDATA2__FEC_RDATA_2,
174 MX35_PAD_FEC_TDATA2__FEC_TDATA_2,
175 MX35_PAD_FEC_RDATA3__FEC_RDATA_3,
176 MX35_PAD_FEC_TDATA3__FEC_TDATA_3,
177 /* I2C1 */
178 MX35_PAD_I2C1_CLK__I2C1_SCL,
179 MX35_PAD_I2C1_DAT__I2C1_SDA,
180 /* Display */
181 MX35_PAD_LD0__IPU_DISPB_DAT_0,
182 MX35_PAD_LD1__IPU_DISPB_DAT_1,
183 MX35_PAD_LD2__IPU_DISPB_DAT_2,
184 MX35_PAD_LD3__IPU_DISPB_DAT_3,
185 MX35_PAD_LD4__IPU_DISPB_DAT_4,
186 MX35_PAD_LD5__IPU_DISPB_DAT_5,
187 MX35_PAD_LD6__IPU_DISPB_DAT_6,
188 MX35_PAD_LD7__IPU_DISPB_DAT_7,
189 MX35_PAD_LD8__IPU_DISPB_DAT_8,
190 MX35_PAD_LD9__IPU_DISPB_DAT_9,
191 MX35_PAD_LD10__IPU_DISPB_DAT_10,
192 MX35_PAD_LD11__IPU_DISPB_DAT_11,
193 MX35_PAD_LD12__IPU_DISPB_DAT_12,
194 MX35_PAD_LD13__IPU_DISPB_DAT_13,
195 MX35_PAD_LD14__IPU_DISPB_DAT_14,
196 MX35_PAD_LD15__IPU_DISPB_DAT_15,
197 MX35_PAD_LD16__IPU_DISPB_DAT_16,
198 MX35_PAD_LD17__IPU_DISPB_DAT_17,
199 MX35_PAD_D3_HSYNC__IPU_DISPB_D3_HSYNC,
200 MX35_PAD_D3_FPSHIFT__IPU_DISPB_D3_CLK,
201 MX35_PAD_D3_DRDY__IPU_DISPB_D3_DRDY,
202 MX35_PAD_CONTRAST__IPU_DISPB_CONTR,
203 MX35_PAD_D3_VSYNC__IPU_DISPB_D3_VSYNC,
204 MX35_PAD_D3_REV__IPU_DISPB_D3_REV,
205 MX35_PAD_D3_CLS__IPU_DISPB_D3_CLS,
Luotao Fu8d5c1ed2009-06-18 14:15:22 +0200206 /* gpio */
207 MX35_PAD_ATA_CS0__GPIO2_6,
Sascha Hauer54df5262009-02-06 15:42:26 +0100208};
209
Sascha Hauer4f43c2e2009-11-12 11:30:26 +0100210static struct mxc_nand_platform_data pcm037_nand_board_info = {
211 .width = 1,
212 .hw_ecc = 1,
213};
214
Sascha Hauer54df5262009-02-06 15:42:26 +0100215/*
216 * Board specific initialization.
217 */
218static void __init mxc_board_init(void)
219{
220 mxc_iomux_v3_setup_multiple_pads(pcm043_pads, ARRAY_SIZE(pcm043_pads));
221
222 platform_add_devices(devices, ARRAY_SIZE(devices));
223
224 mxc_register_device(&mxc_uart_device0, &uart_pdata);
Sascha Hauer4f43c2e2009-11-12 11:30:26 +0100225 mxc_register_device(&mxc_nand_device, &pcm037_nand_board_info);
Sascha Hauer54df5262009-02-06 15:42:26 +0100226
227 mxc_register_device(&mxc_uart_device1, &uart_pdata);
228
229#if defined CONFIG_I2C_IMX || defined CONFIG_I2C_IMX_MODULE
230 i2c_register_board_info(0, pcm043_i2c_devices,
231 ARRAY_SIZE(pcm043_i2c_devices));
232
233 mxc_register_device(&mxc_i2c_device0, &pcm043_i2c_1_data);
234#endif
235
236 mxc_register_device(&mx3_ipu, &mx3_ipu_data);
237 mxc_register_device(&mx3_fb, &mx3fb_pdata);
238}
239
240static void __init pcm043_timer_init(void)
241{
242 mx35_clocks_init();
243}
244
245struct sys_timer pcm043_timer = {
246 .init = pcm043_timer_init,
247};
248
249MACHINE_START(PCM043, "Phytec Phycore pcm043")
250 /* Maintainer: Pengutronix */
251 .phys_io = AIPS1_BASE_ADDR,
252 .io_pg_offst = ((AIPS1_BASE_ADDR_VIRT) >> 18) & 0xfffc,
253 .boot_params = PHYS_OFFSET + 0x100,
Sascha Hauercd4a05f2009-04-02 22:32:10 +0200254 .map_io = mx35_map_io,
Sascha Hauerc5aa0ad2009-05-25 17:36:19 +0200255 .init_irq = mx35_init_irq,
Sascha Hauer54df5262009-02-06 15:42:26 +0100256 .init_machine = mxc_board_init,
257 .timer = &pcm043_timer,
258MACHINE_END
259