blob: 5cb8b883ae83221ace183c463d0232ea9d556980 [file] [log] [blame]
Mauro Carvalho Chehab79ab3b02017-05-17 09:10:48 -03001===================
Christoph Lametera1b2a552013-04-04 14:41:08 +00002this_cpu operations
Mauro Carvalho Chehab79ab3b02017-05-17 09:10:48 -03003===================
4
5:Author: Christoph Lameter, August 4th, 2014
6:Author: Pranith Kumar, Aug 2nd, 2014
Christoph Lametera1b2a552013-04-04 14:41:08 +00007
8this_cpu operations are a way of optimizing access to per cpu
Pranith Kumarac490f42014-08-24 18:17:32 -07009variables associated with the *currently* executing processor. This is
10done through the use of segment registers (or a dedicated register where
11the cpu permanently stored the beginning of the per cpu area for a
12specific processor).
Christoph Lametera1b2a552013-04-04 14:41:08 +000013
Pranith Kumarac490f42014-08-24 18:17:32 -070014this_cpu operations add a per cpu variable offset to the processor
15specific per cpu base and encode that operation in the instruction
Christoph Lametera1b2a552013-04-04 14:41:08 +000016operating on the per cpu variable.
17
Pranith Kumarac490f42014-08-24 18:17:32 -070018This means that there are no atomicity issues between the calculation of
Christoph Lametera1b2a552013-04-04 14:41:08 +000019the offset and the operation on the data. Therefore it is not
Pranith Kumarac490f42014-08-24 18:17:32 -070020necessary to disable preemption or interrupts to ensure that the
Christoph Lametera1b2a552013-04-04 14:41:08 +000021processor is not changed between the calculation of the address and
22the operation on the data.
23
24Read-modify-write operations are of particular interest. Frequently
25processors have special lower latency instructions that can operate
Pranith Kumarac490f42014-08-24 18:17:32 -070026without the typical synchronization overhead, but still provide some
27sort of relaxed atomicity guarantees. The x86, for example, can execute
28RMW (Read Modify Write) instructions like inc/dec/cmpxchg without the
Christoph Lametera1b2a552013-04-04 14:41:08 +000029lock prefix and the associated latency penalty.
30
31Access to the variable without the lock prefix is not synchronized but
32synchronization is not necessary since we are dealing with per cpu
33data specific to the currently executing processor. Only the current
34processor should be accessing that variable and therefore there are no
35concurrency issues with other processors in the system.
36
Pranith Kumarac490f42014-08-24 18:17:32 -070037Please note that accesses by remote processors to a per cpu area are
38exceptional situations and may impact performance and/or correctness
39(remote write operations) of local RMW operations via this_cpu_*.
40
41The main use of the this_cpu operations has been to optimize counter
42operations.
43
44The following this_cpu() operations with implied preemption protection
45are defined. These operations can be used without worrying about
Mauro Carvalho Chehab79ab3b02017-05-17 09:10:48 -030046preemption and interrupts::
Pranith Kumarac490f42014-08-24 18:17:32 -070047
Pranith Kumarac490f42014-08-24 18:17:32 -070048 this_cpu_read(pcp)
49 this_cpu_write(pcp, val)
50 this_cpu_add(pcp, val)
51 this_cpu_and(pcp, val)
52 this_cpu_or(pcp, val)
53 this_cpu_add_return(pcp, val)
54 this_cpu_xchg(pcp, nval)
55 this_cpu_cmpxchg(pcp, oval, nval)
56 this_cpu_cmpxchg_double(pcp1, pcp2, oval1, oval2, nval1, nval2)
57 this_cpu_sub(pcp, val)
58 this_cpu_inc(pcp)
59 this_cpu_dec(pcp)
60 this_cpu_sub_return(pcp, val)
61 this_cpu_inc_return(pcp)
62 this_cpu_dec_return(pcp)
63
64
65Inner working of this_cpu operations
66------------------------------------
67
Christoph Lametera1b2a552013-04-04 14:41:08 +000068On x86 the fs: or the gs: segment registers contain the base of the
69per cpu area. It is then possible to simply use the segment override
70to relocate a per cpu relative address to the proper per cpu area for
71the processor. So the relocation to the per cpu base is encoded in the
72instruction via a segment register prefix.
73
Mauro Carvalho Chehab79ab3b02017-05-17 09:10:48 -030074For example::
Christoph Lametera1b2a552013-04-04 14:41:08 +000075
76 DEFINE_PER_CPU(int, x);
77 int z;
78
79 z = this_cpu_read(x);
80
Mauro Carvalho Chehab79ab3b02017-05-17 09:10:48 -030081results in a single instruction::
Christoph Lametera1b2a552013-04-04 14:41:08 +000082
83 mov ax, gs:[x]
84
85instead of a sequence of calculation of the address and then a fetch
Pranith Kumarac490f42014-08-24 18:17:32 -070086from that address which occurs with the per cpu operations. Before
Christoph Lametera1b2a552013-04-04 14:41:08 +000087this_cpu_ops such sequence also required preempt disable/enable to
88prevent the kernel from moving the thread to a different processor
89while the calculation is performed.
90
Mauro Carvalho Chehab79ab3b02017-05-17 09:10:48 -030091Consider the following this_cpu operation::
Christoph Lametera1b2a552013-04-04 14:41:08 +000092
93 this_cpu_inc(x)
94
Mauro Carvalho Chehab79ab3b02017-05-17 09:10:48 -030095The above results in the following single instruction (no lock prefix!)::
Christoph Lametera1b2a552013-04-04 14:41:08 +000096
97 inc gs:[x]
98
99instead of the following operations required if there is no segment
Mauro Carvalho Chehab79ab3b02017-05-17 09:10:48 -0300100register::
Christoph Lametera1b2a552013-04-04 14:41:08 +0000101
102 int *y;
103 int cpu;
104
105 cpu = get_cpu();
106 y = per_cpu_ptr(&x, cpu);
107 (*y)++;
108 put_cpu();
109
Pranith Kumarac490f42014-08-24 18:17:32 -0700110Note that these operations can only be used on per cpu data that is
Christoph Lametera1b2a552013-04-04 14:41:08 +0000111reserved for a specific processor. Without disabling preemption in the
112surrounding code this_cpu_inc() will only guarantee that one of the
Pranith Kumarac490f42014-08-24 18:17:32 -0700113per cpu counters is correctly incremented. However, there is no
Christoph Lametera1b2a552013-04-04 14:41:08 +0000114guarantee that the OS will not move the process directly before or
115after the this_cpu instruction is executed. In general this means that
116the value of the individual counters for each processor are
117meaningless. The sum of all the per cpu counters is the only value
118that is of interest.
119
120Per cpu variables are used for performance reasons. Bouncing cache
121lines can be avoided if multiple processors concurrently go through
122the same code paths. Since each processor has its own per cpu
Pranith Kumarac490f42014-08-24 18:17:32 -0700123variables no concurrent cache line updates take place. The price that
Christoph Lametera1b2a552013-04-04 14:41:08 +0000124has to be paid for this optimization is the need to add up the per cpu
Pranith Kumarac490f42014-08-24 18:17:32 -0700125counters when the value of a counter is needed.
Christoph Lametera1b2a552013-04-04 14:41:08 +0000126
127
Mauro Carvalho Chehab79ab3b02017-05-17 09:10:48 -0300128Special operations
129------------------
130
131::
Christoph Lametera1b2a552013-04-04 14:41:08 +0000132
133 y = this_cpu_ptr(&x)
134
135Takes the offset of a per cpu variable (&x !) and returns the address
136of the per cpu variable that belongs to the currently executing
137processor. this_cpu_ptr avoids multiple steps that the common
138get_cpu/put_cpu sequence requires. No processor number is
Pranith Kumarac490f42014-08-24 18:17:32 -0700139available. Instead, the offset of the local per cpu area is simply
140added to the per cpu offset.
Christoph Lametera1b2a552013-04-04 14:41:08 +0000141
Pranith Kumarac490f42014-08-24 18:17:32 -0700142Note that this operation is usually used in a code segment when
143preemption has been disabled. The pointer is then used to
144access local per cpu data in a critical section. When preemption
145is re-enabled this pointer is usually no longer useful since it may
146no longer point to per cpu data of the current processor.
Christoph Lametera1b2a552013-04-04 14:41:08 +0000147
148
149Per cpu variables and offsets
150-----------------------------
151
Pranith Kumarac490f42014-08-24 18:17:32 -0700152Per cpu variables have *offsets* to the beginning of the per cpu
Christoph Lametera1b2a552013-04-04 14:41:08 +0000153area. They do not have addresses although they look like that in the
154code. Offsets cannot be directly dereferenced. The offset must be
Pranith Kumarac490f42014-08-24 18:17:32 -0700155added to a base pointer of a per cpu area of a processor in order to
Christoph Lametera1b2a552013-04-04 14:41:08 +0000156form a valid address.
157
158Therefore the use of x or &x outside of the context of per cpu
159operations is invalid and will generally be treated like a NULL
160pointer dereference.
161
Mauro Carvalho Chehab79ab3b02017-05-17 09:10:48 -0300162::
163
Pranith Kumarac490f42014-08-24 18:17:32 -0700164 DEFINE_PER_CPU(int, x);
Christoph Lametera1b2a552013-04-04 14:41:08 +0000165
Pranith Kumarac490f42014-08-24 18:17:32 -0700166In the context of per cpu operations the above implies that x is a per
167cpu variable. Most this_cpu operations take a cpu variable.
Christoph Lametera1b2a552013-04-04 14:41:08 +0000168
Mauro Carvalho Chehab79ab3b02017-05-17 09:10:48 -0300169::
170
Pranith Kumarac490f42014-08-24 18:17:32 -0700171 int __percpu *p = &x;
Christoph Lametera1b2a552013-04-04 14:41:08 +0000172
Pranith Kumarac490f42014-08-24 18:17:32 -0700173&x and hence p is the *offset* of a per cpu variable. this_cpu_ptr()
174takes the offset of a per cpu variable which makes this look a bit
175strange.
Christoph Lametera1b2a552013-04-04 14:41:08 +0000176
177
178Operations on a field of a per cpu structure
179--------------------------------------------
180
Mauro Carvalho Chehab79ab3b02017-05-17 09:10:48 -0300181Let's say we have a percpu structure::
Christoph Lametera1b2a552013-04-04 14:41:08 +0000182
183 struct s {
184 int n,m;
185 };
186
187 DEFINE_PER_CPU(struct s, p);
188
189
Mauro Carvalho Chehab79ab3b02017-05-17 09:10:48 -0300190Operations on these fields are straightforward::
Christoph Lametera1b2a552013-04-04 14:41:08 +0000191
192 this_cpu_inc(p.m)
193
194 z = this_cpu_cmpxchg(p.m, 0, 1);
195
196
Mauro Carvalho Chehab79ab3b02017-05-17 09:10:48 -0300197If we have an offset to struct s::
Christoph Lametera1b2a552013-04-04 14:41:08 +0000198
199 struct s __percpu *ps = &p;
200
Pranith Kumarac490f42014-08-24 18:17:32 -0700201 this_cpu_dec(ps->m);
Christoph Lametera1b2a552013-04-04 14:41:08 +0000202
203 z = this_cpu_inc_return(ps->n);
204
205
206The calculation of the pointer may require the use of this_cpu_ptr()
Mauro Carvalho Chehab79ab3b02017-05-17 09:10:48 -0300207if we do not make use of this_cpu ops later to manipulate fields::
Christoph Lametera1b2a552013-04-04 14:41:08 +0000208
209 struct s *pp;
210
211 pp = this_cpu_ptr(&p);
212
213 pp->m--;
214
215 z = pp->n++;
216
217
218Variants of this_cpu ops
Mauro Carvalho Chehab79ab3b02017-05-17 09:10:48 -0300219------------------------
Christoph Lametera1b2a552013-04-04 14:41:08 +0000220
Pranith Kumarac490f42014-08-24 18:17:32 -0700221this_cpu ops are interrupt safe. Some architectures do not support
Christoph Lametera1b2a552013-04-04 14:41:08 +0000222these per cpu local operations. In that case the operation must be
223replaced by code that disables interrupts, then does the operations
Pranith Kumarac490f42014-08-24 18:17:32 -0700224that are guaranteed to be atomic and then re-enable interrupts. Doing
Christoph Lametera1b2a552013-04-04 14:41:08 +0000225so is expensive. If there are other reasons why the scheduler cannot
226change the processor we are executing on then there is no reason to
Pranith Kumarac490f42014-08-24 18:17:32 -0700227disable interrupts. For that purpose the following __this_cpu operations
228are provided.
Christoph Lametera1b2a552013-04-04 14:41:08 +0000229
Pranith Kumarac490f42014-08-24 18:17:32 -0700230These operations have no guarantee against concurrent interrupts or
231preemption. If a per cpu variable is not used in an interrupt context
232and the scheduler cannot preempt, then they are safe. If any interrupts
233still occur while an operation is in progress and if the interrupt too
234modifies the variable, then RMW actions can not be guaranteed to be
Mauro Carvalho Chehab79ab3b02017-05-17 09:10:48 -0300235safe::
Christoph Lametera1b2a552013-04-04 14:41:08 +0000236
Pranith Kumarac490f42014-08-24 18:17:32 -0700237 __this_cpu_read(pcp)
238 __this_cpu_write(pcp, val)
239 __this_cpu_add(pcp, val)
240 __this_cpu_and(pcp, val)
241 __this_cpu_or(pcp, val)
242 __this_cpu_add_return(pcp, val)
243 __this_cpu_xchg(pcp, nval)
244 __this_cpu_cmpxchg(pcp, oval, nval)
245 __this_cpu_cmpxchg_double(pcp1, pcp2, oval1, oval2, nval1, nval2)
246 __this_cpu_sub(pcp, val)
247 __this_cpu_inc(pcp)
248 __this_cpu_dec(pcp)
249 __this_cpu_sub_return(pcp, val)
250 __this_cpu_inc_return(pcp)
251 __this_cpu_dec_return(pcp)
252
253
254Will increment x and will not fall-back to code that disables
Christoph Lametera1b2a552013-04-04 14:41:08 +0000255interrupts on platforms that cannot accomplish atomicity through
256address relocation and a Read-Modify-Write operation in the same
257instruction.
258
259
Christoph Lametera1b2a552013-04-04 14:41:08 +0000260&this_cpu_ptr(pp)->n vs this_cpu_ptr(&pp->n)
261--------------------------------------------
262
263The first operation takes the offset and forms an address and then
Pranith Kumarac490f42014-08-24 18:17:32 -0700264adds the offset of the n field. This may result in two add
265instructions emitted by the compiler.
Christoph Lametera1b2a552013-04-04 14:41:08 +0000266
267The second one first adds the two offsets and then does the
268relocation. IMHO the second form looks cleaner and has an easier time
269with (). The second form also is consistent with the way
270this_cpu_read() and friends are used.
271
272
Pranith Kumarac490f42014-08-24 18:17:32 -0700273Remote access to per cpu data
274------------------------------
275
276Per cpu data structures are designed to be used by one cpu exclusively.
277If you use the variables as intended, this_cpu_ops() are guaranteed to
278be "atomic" as no other CPU has access to these data structures.
279
280There are special cases where you might need to access per cpu data
281structures remotely. It is usually safe to do a remote read access
282and that is frequently done to summarize counters. Remote write access
283something which could be problematic because this_cpu ops do not
284have lock semantics. A remote write may interfere with a this_cpu
285RMW operation.
286
287Remote write accesses to percpu data structures are highly discouraged
288unless absolutely necessary. Please consider using an IPI to wake up
289the remote CPU and perform the update to its per cpu area.
290
291To access per-cpu data structure remotely, typically the per_cpu_ptr()
Mauro Carvalho Chehab79ab3b02017-05-17 09:10:48 -0300292function is used::
Pranith Kumarac490f42014-08-24 18:17:32 -0700293
294
295 DEFINE_PER_CPU(struct data, datap);
296
297 struct data *p = per_cpu_ptr(&datap, cpu);
298
299This makes it explicit that we are getting ready to access a percpu
300area remotely.
301
Mauro Carvalho Chehab79ab3b02017-05-17 09:10:48 -0300302You can also do the following to convert the datap offset to an address::
Pranith Kumarac490f42014-08-24 18:17:32 -0700303
304 struct data *p = this_cpu_ptr(&datap);
305
306but, passing of pointers calculated via this_cpu_ptr to other cpus is
307unusual and should be avoided.
308
309Remote access are typically only for reading the status of another cpus
310per cpu data. Write accesses can cause unique problems due to the
311relaxed synchronization requirements for this_cpu operations.
312
313One example that illustrates some concerns with write operations is
314the following scenario that occurs because two per cpu variables
315share a cache-line but the relaxed synchronization is applied to
316only one process updating the cache-line.
317
Mauro Carvalho Chehab79ab3b02017-05-17 09:10:48 -0300318Consider the following example::
Pranith Kumarac490f42014-08-24 18:17:32 -0700319
320
321 struct test {
322 atomic_t a;
323 int b;
324 };
325
326 DEFINE_PER_CPU(struct test, onecacheline);
327
328There is some concern about what would happen if the field 'a' is updated
329remotely from one processor and the local processor would use this_cpu ops
330to update field b. Care should be taken that such simultaneous accesses to
331data within the same cache line are avoided. Also costly synchronization
332may be necessary. IPIs are generally recommended in such scenarios instead
333of a remote write to the per cpu area of another processor.
334
335Even in cases where the remote writes are rare, please bear in
336mind that a remote write will evict the cache line from the processor
337that most likely will access it. If the processor wakes up and finds a
338missing local cache line of a per cpu area, its performance and hence
339the wake up times will be affected.