Ingo Molnar | 06fcb0c | 2006-06-29 02:24:40 -0700 | [diff] [blame] | 1 | #ifndef _LINUX_IRQ_H |
| 2 | #define _LINUX_IRQ_H |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 3 | |
| 4 | /* |
| 5 | * Please do not include this file in generic code. There is currently |
| 6 | * no requirement for any architecture to implement anything held |
| 7 | * within this file. |
| 8 | * |
| 9 | * Thanks. --rmk |
| 10 | */ |
| 11 | |
Adrian Bunk | 23f9b31 | 2005-12-21 02:27:50 +0100 | [diff] [blame] | 12 | #include <linux/smp.h> |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 13 | |
Ingo Molnar | 06fcb0c | 2006-06-29 02:24:40 -0700 | [diff] [blame] | 14 | #ifndef CONFIG_S390 |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 15 | |
| 16 | #include <linux/linkage.h> |
| 17 | #include <linux/cache.h> |
| 18 | #include <linux/spinlock.h> |
| 19 | #include <linux/cpumask.h> |
Ralf Baechle | 503e576 | 2009-03-29 12:59:50 +0200 | [diff] [blame^] | 20 | #include <linux/gfp.h> |
Jan Beulich | 908dcec | 2006-06-23 02:06:00 -0700 | [diff] [blame] | 21 | #include <linux/irqreturn.h> |
Thomas Gleixner | dd3a1db | 2008-10-16 18:20:58 +0200 | [diff] [blame] | 22 | #include <linux/irqnr.h> |
David Howells | 77904fd | 2007-02-28 20:13:26 -0800 | [diff] [blame] | 23 | #include <linux/errno.h> |
Ralf Baechle | 503e576 | 2009-03-29 12:59:50 +0200 | [diff] [blame^] | 24 | #include <linux/topology.h> |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 25 | |
| 26 | #include <asm/irq.h> |
| 27 | #include <asm/ptrace.h> |
David Howells | 7d12e78 | 2006-10-05 14:55:46 +0100 | [diff] [blame] | 28 | #include <asm/irq_regs.h> |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 29 | |
David Howells | 57a58a9 | 2006-10-05 13:06:34 +0100 | [diff] [blame] | 30 | struct irq_desc; |
Harvey Harrison | ec70158 | 2008-02-08 04:19:55 -0800 | [diff] [blame] | 31 | typedef void (*irq_flow_handler_t)(unsigned int irq, |
David Howells | 7d12e78 | 2006-10-05 14:55:46 +0100 | [diff] [blame] | 32 | struct irq_desc *desc); |
David Howells | 57a58a9 | 2006-10-05 13:06:34 +0100 | [diff] [blame] | 33 | |
| 34 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 35 | /* |
| 36 | * IRQ line status. |
Thomas Gleixner | 6e21361 | 2006-07-01 19:29:03 -0700 | [diff] [blame] | 37 | * |
Thomas Gleixner | 950f442 | 2007-02-16 01:27:24 -0800 | [diff] [blame] | 38 | * Bits 0-7 are reserved for the IRQF_* bits in linux/interrupt.h |
Thomas Gleixner | 6e21361 | 2006-07-01 19:29:03 -0700 | [diff] [blame] | 39 | * |
| 40 | * IRQ types |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 41 | */ |
Thomas Gleixner | 6e21361 | 2006-07-01 19:29:03 -0700 | [diff] [blame] | 42 | #define IRQ_TYPE_NONE 0x00000000 /* Default, unspecified type */ |
| 43 | #define IRQ_TYPE_EDGE_RISING 0x00000001 /* Edge rising type */ |
| 44 | #define IRQ_TYPE_EDGE_FALLING 0x00000002 /* Edge falling type */ |
| 45 | #define IRQ_TYPE_EDGE_BOTH (IRQ_TYPE_EDGE_FALLING | IRQ_TYPE_EDGE_RISING) |
| 46 | #define IRQ_TYPE_LEVEL_HIGH 0x00000004 /* Level high type */ |
| 47 | #define IRQ_TYPE_LEVEL_LOW 0x00000008 /* Level low type */ |
| 48 | #define IRQ_TYPE_SENSE_MASK 0x0000000f /* Mask of the above */ |
| 49 | #define IRQ_TYPE_PROBE 0x00000010 /* Probing in progress */ |
| 50 | |
| 51 | /* Internal flags */ |
Thomas Gleixner | 950f442 | 2007-02-16 01:27:24 -0800 | [diff] [blame] | 52 | #define IRQ_INPROGRESS 0x00000100 /* IRQ handler active - do not enter! */ |
| 53 | #define IRQ_DISABLED 0x00000200 /* IRQ disabled - do not enter! */ |
| 54 | #define IRQ_PENDING 0x00000400 /* IRQ pending - replay on enable */ |
| 55 | #define IRQ_REPLAY 0x00000800 /* IRQ has been replayed but not acked yet */ |
| 56 | #define IRQ_AUTODETECT 0x00001000 /* IRQ is being autodetected */ |
| 57 | #define IRQ_WAITING 0x00002000 /* IRQ not yet seen - for autodetection */ |
| 58 | #define IRQ_LEVEL 0x00004000 /* IRQ level triggered */ |
| 59 | #define IRQ_MASKED 0x00008000 /* IRQ masked - shouldn't be seen again */ |
| 60 | #define IRQ_PER_CPU 0x00010000 /* IRQ is per CPU */ |
| 61 | #define IRQ_NOPROBE 0x00020000 /* IRQ is not valid for probing */ |
| 62 | #define IRQ_NOREQUEST 0x00040000 /* IRQ cannot be requested */ |
| 63 | #define IRQ_NOAUTOEN 0x00080000 /* IRQ will not be enabled on request irq */ |
Ingo Molnar | d7e25f3 | 2007-02-16 01:28:24 -0800 | [diff] [blame] | 64 | #define IRQ_WAKEUP 0x00100000 /* IRQ triggers system wakeup */ |
| 65 | #define IRQ_MOVE_PENDING 0x00200000 /* need to re-target IRQ destination */ |
| 66 | #define IRQ_NO_BALANCING 0x00400000 /* IRQ is excluded from balancing */ |
Thomas Gleixner | 1adb085 | 2008-04-28 17:01:56 +0200 | [diff] [blame] | 67 | #define IRQ_SPURIOUS_DISABLED 0x00800000 /* IRQ was disabled by the spurious trap */ |
Thomas Gleixner | f6d87f4 | 2008-11-07 13:18:30 +0100 | [diff] [blame] | 68 | #define IRQ_MOVE_PCNTXT 0x01000000 /* IRQ migration from process context */ |
| 69 | #define IRQ_AFFINITY_SET 0x02000000 /* IRQ affinity was set from userspace*/ |
Thomas Gleixner | 950f442 | 2007-02-16 01:27:24 -0800 | [diff] [blame] | 70 | |
Ingo Molnar | 0d7012a | 2006-06-29 02:24:43 -0700 | [diff] [blame] | 71 | #ifdef CONFIG_IRQ_PER_CPU |
Karsten Wiese | f26fdd5 | 2005-09-06 15:17:25 -0700 | [diff] [blame] | 72 | # define CHECK_IRQ_PER_CPU(var) ((var) & IRQ_PER_CPU) |
Thomas Gleixner | 950f442 | 2007-02-16 01:27:24 -0800 | [diff] [blame] | 73 | # define IRQ_NO_BALANCING_MASK (IRQ_PER_CPU | IRQ_NO_BALANCING) |
Karsten Wiese | f26fdd5 | 2005-09-06 15:17:25 -0700 | [diff] [blame] | 74 | #else |
| 75 | # define CHECK_IRQ_PER_CPU(var) 0 |
Thomas Gleixner | 950f442 | 2007-02-16 01:27:24 -0800 | [diff] [blame] | 76 | # define IRQ_NO_BALANCING_MASK IRQ_NO_BALANCING |
Karsten Wiese | f26fdd5 | 2005-09-06 15:17:25 -0700 | [diff] [blame] | 77 | #endif |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 78 | |
Thomas Gleixner | 6a6de9e | 2006-06-29 02:24:51 -0700 | [diff] [blame] | 79 | struct proc_dir_entry; |
Eric W. Biederman | 5b912c1 | 2007-01-28 12:52:03 -0700 | [diff] [blame] | 80 | struct msi_desc; |
Thomas Gleixner | 6a6de9e | 2006-06-29 02:24:51 -0700 | [diff] [blame] | 81 | |
Ingo Molnar | 8fee5c3 | 2006-06-29 02:24:45 -0700 | [diff] [blame] | 82 | /** |
Thomas Gleixner | 6a6de9e | 2006-06-29 02:24:51 -0700 | [diff] [blame] | 83 | * struct irq_chip - hardware interrupt chip descriptor |
Ingo Molnar | 8fee5c3 | 2006-06-29 02:24:45 -0700 | [diff] [blame] | 84 | * |
| 85 | * @name: name for /proc/interrupts |
| 86 | * @startup: start up the interrupt (defaults to ->enable if NULL) |
| 87 | * @shutdown: shut down the interrupt (defaults to ->disable if NULL) |
| 88 | * @enable: enable the interrupt (defaults to chip->unmask if NULL) |
| 89 | * @disable: disable the interrupt (defaults to chip->mask if NULL) |
Ingo Molnar | 8fee5c3 | 2006-06-29 02:24:45 -0700 | [diff] [blame] | 90 | * @ack: start of a new interrupt |
| 91 | * @mask: mask an interrupt source |
| 92 | * @mask_ack: ack and mask an interrupt source |
| 93 | * @unmask: unmask an interrupt source |
Ingo Molnar | 47c2a3a | 2006-06-29 02:25:03 -0700 | [diff] [blame] | 94 | * @eoi: end of interrupt - chip level |
| 95 | * @end: end of interrupt - flow level |
Ingo Molnar | 8fee5c3 | 2006-06-29 02:24:45 -0700 | [diff] [blame] | 96 | * @set_affinity: set the CPU affinity on SMP machines |
| 97 | * @retrigger: resend an IRQ to the CPU |
| 98 | * @set_type: set the flow type (IRQ_TYPE_LEVEL/etc.) of an IRQ |
| 99 | * @set_wake: enable/disable power-management wake-on of an IRQ |
| 100 | * |
| 101 | * @release: release function solely used by UML |
Thomas Gleixner | 6a6de9e | 2006-06-29 02:24:51 -0700 | [diff] [blame] | 102 | * @typename: obsoleted by name, kept as migration helper |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 103 | */ |
Thomas Gleixner | 6a6de9e | 2006-06-29 02:24:51 -0700 | [diff] [blame] | 104 | struct irq_chip { |
| 105 | const char *name; |
Ingo Molnar | 71d218b | 2006-06-29 02:24:41 -0700 | [diff] [blame] | 106 | unsigned int (*startup)(unsigned int irq); |
| 107 | void (*shutdown)(unsigned int irq); |
| 108 | void (*enable)(unsigned int irq); |
| 109 | void (*disable)(unsigned int irq); |
Thomas Gleixner | 6a6de9e | 2006-06-29 02:24:51 -0700 | [diff] [blame] | 110 | |
Ingo Molnar | 71d218b | 2006-06-29 02:24:41 -0700 | [diff] [blame] | 111 | void (*ack)(unsigned int irq); |
Thomas Gleixner | 6a6de9e | 2006-06-29 02:24:51 -0700 | [diff] [blame] | 112 | void (*mask)(unsigned int irq); |
| 113 | void (*mask_ack)(unsigned int irq); |
| 114 | void (*unmask)(unsigned int irq); |
Ingo Molnar | 47c2a3a | 2006-06-29 02:25:03 -0700 | [diff] [blame] | 115 | void (*eoi)(unsigned int irq); |
Thomas Gleixner | 6a6de9e | 2006-06-29 02:24:51 -0700 | [diff] [blame] | 116 | |
Ingo Molnar | 71d218b | 2006-06-29 02:24:41 -0700 | [diff] [blame] | 117 | void (*end)(unsigned int irq); |
Rusty Russell | 0de2652 | 2008-12-13 21:20:26 +1030 | [diff] [blame] | 118 | void (*set_affinity)(unsigned int irq, |
| 119 | const struct cpumask *dest); |
Ingo Molnar | c0ad90a | 2006-06-29 02:24:44 -0700 | [diff] [blame] | 120 | int (*retrigger)(unsigned int irq); |
Thomas Gleixner | 6a6de9e | 2006-06-29 02:24:51 -0700 | [diff] [blame] | 121 | int (*set_type)(unsigned int irq, unsigned int flow_type); |
| 122 | int (*set_wake)(unsigned int irq, unsigned int on); |
Ingo Molnar | c0ad90a | 2006-06-29 02:24:44 -0700 | [diff] [blame] | 123 | |
Paolo 'Blaisorblade' Giarrusso | b77d6ad | 2005-06-21 17:16:24 -0700 | [diff] [blame] | 124 | /* Currently used only by UML, might disappear one day.*/ |
| 125 | #ifdef CONFIG_IRQ_RELEASE_METHOD |
Ingo Molnar | 71d218b | 2006-06-29 02:24:41 -0700 | [diff] [blame] | 126 | void (*release)(unsigned int irq, void *dev_id); |
Paolo 'Blaisorblade' Giarrusso | b77d6ad | 2005-06-21 17:16:24 -0700 | [diff] [blame] | 127 | #endif |
Thomas Gleixner | 6a6de9e | 2006-06-29 02:24:51 -0700 | [diff] [blame] | 128 | /* |
| 129 | * For compatibility, ->typename is copied into ->name. |
| 130 | * Will disappear. |
| 131 | */ |
| 132 | const char *typename; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 133 | }; |
| 134 | |
Yinghai Lu | 0b8f1ef | 2008-12-05 18:58:31 -0800 | [diff] [blame] | 135 | struct timer_rand_state; |
| 136 | struct irq_2_iommu; |
Ingo Molnar | 8fee5c3 | 2006-06-29 02:24:45 -0700 | [diff] [blame] | 137 | /** |
| 138 | * struct irq_desc - interrupt descriptor |
Randy Dunlap | 2ed1cdc | 2008-11-21 16:59:57 -0800 | [diff] [blame] | 139 | * @irq: interrupt number for this descriptor |
Yinghai Lu | 078a55d | 2008-12-18 16:57:52 -0800 | [diff] [blame] | 140 | * @timer_rand_state: pointer to timer rand state struct |
| 141 | * @kstat_irqs: irq stats per cpu |
| 142 | * @irq_2_iommu: iommu with this irq |
Thomas Gleixner | 6a6de9e | 2006-06-29 02:24:51 -0700 | [diff] [blame] | 143 | * @handle_irq: highlevel irq-events handler [if NULL, __do_IRQ()] |
| 144 | * @chip: low level interrupt hardware access |
Randy Dunlap | 472900b | 2007-02-16 01:28:25 -0800 | [diff] [blame] | 145 | * @msi_desc: MSI descriptor |
Thomas Gleixner | 6a6de9e | 2006-06-29 02:24:51 -0700 | [diff] [blame] | 146 | * @handler_data: per-IRQ data for the irq_chip methods |
| 147 | * @chip_data: platform-specific per-chip private data for the chip |
| 148 | * methods, to allow shared chip implementations |
Ingo Molnar | 8fee5c3 | 2006-06-29 02:24:45 -0700 | [diff] [blame] | 149 | * @action: the irq action chain |
| 150 | * @status: status information |
| 151 | * @depth: disable-depth, for nested irq_disable() calls |
David Brownell | 15a647e | 2006-07-30 03:03:08 -0700 | [diff] [blame] | 152 | * @wake_depth: enable depth, for multiple set_irq_wake() callers |
Ingo Molnar | 8fee5c3 | 2006-06-29 02:24:45 -0700 | [diff] [blame] | 153 | * @irq_count: stats field to detect stalled irqs |
Randy Dunlap | 5ac4d82 | 2007-07-31 00:39:03 -0700 | [diff] [blame] | 154 | * @last_unhandled: aging timer for unhandled count |
Richard Kennedy | e262a7b | 2008-11-23 14:34:43 +0000 | [diff] [blame] | 155 | * @irqs_unhandled: stats field for spurious unhandled interrupts |
Ingo Molnar | 8fee5c3 | 2006-06-29 02:24:45 -0700 | [diff] [blame] | 156 | * @lock: locking for SMP |
| 157 | * @affinity: IRQ affinity on SMP |
Thomas Gleixner | 6a6de9e | 2006-06-29 02:24:51 -0700 | [diff] [blame] | 158 | * @cpu: cpu index useful for balancing |
Ingo Molnar | 8fee5c3 | 2006-06-29 02:24:45 -0700 | [diff] [blame] | 159 | * @pending_mask: pending rebalanced interrupts |
Ingo Molnar | 8fee5c3 | 2006-06-29 02:24:45 -0700 | [diff] [blame] | 160 | * @dir: /proc/irq/ procfs entry |
Ingo Molnar | a460e74 | 2006-10-17 00:10:03 -0700 | [diff] [blame] | 161 | * @name: flow handler name for /proc/interrupts output |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 162 | */ |
Ingo Molnar | 34ffdb7 | 2006-06-29 02:24:40 -0700 | [diff] [blame] | 163 | struct irq_desc { |
Yinghai Lu | 08678b0 | 2008-08-19 20:50:05 -0700 | [diff] [blame] | 164 | unsigned int irq; |
Yinghai Lu | 0b8f1ef | 2008-12-05 18:58:31 -0800 | [diff] [blame] | 165 | struct timer_rand_state *timer_rand_state; |
| 166 | unsigned int *kstat_irqs; |
Yinghai Lu | d7e51e6 | 2009-01-07 15:03:13 -0800 | [diff] [blame] | 167 | #ifdef CONFIG_INTR_REMAP |
Yinghai Lu | 0b8f1ef | 2008-12-05 18:58:31 -0800 | [diff] [blame] | 168 | struct irq_2_iommu *irq_2_iommu; |
Yinghai Lu | 0b8f1ef | 2008-12-05 18:58:31 -0800 | [diff] [blame] | 169 | #endif |
David Howells | 57a58a9 | 2006-10-05 13:06:34 +0100 | [diff] [blame] | 170 | irq_flow_handler_t handle_irq; |
Thomas Gleixner | 6a6de9e | 2006-06-29 02:24:51 -0700 | [diff] [blame] | 171 | struct irq_chip *chip; |
Eric W. Biederman | 5b912c1 | 2007-01-28 12:52:03 -0700 | [diff] [blame] | 172 | struct msi_desc *msi_desc; |
Thomas Gleixner | 6a6de9e | 2006-06-29 02:24:51 -0700 | [diff] [blame] | 173 | void *handler_data; |
Ingo Molnar | 71d218b | 2006-06-29 02:24:41 -0700 | [diff] [blame] | 174 | void *chip_data; |
| 175 | struct irqaction *action; /* IRQ action list */ |
| 176 | unsigned int status; /* IRQ status */ |
Thomas Gleixner | 6a6de9e | 2006-06-29 02:24:51 -0700 | [diff] [blame] | 177 | |
Ingo Molnar | 71d218b | 2006-06-29 02:24:41 -0700 | [diff] [blame] | 178 | unsigned int depth; /* nested irq disables */ |
David Brownell | 15a647e | 2006-07-30 03:03:08 -0700 | [diff] [blame] | 179 | unsigned int wake_depth; /* nested wake enables */ |
Ingo Molnar | 71d218b | 2006-06-29 02:24:41 -0700 | [diff] [blame] | 180 | unsigned int irq_count; /* For detecting broken IRQs */ |
Alan Cox | 4f27c00 | 2007-07-15 23:40:55 -0700 | [diff] [blame] | 181 | unsigned long last_unhandled; /* Aging timer for unhandled count */ |
Richard Kennedy | e262a7b | 2008-11-23 14:34:43 +0000 | [diff] [blame] | 182 | unsigned int irqs_unhandled; |
Ingo Molnar | 71d218b | 2006-06-29 02:24:41 -0700 | [diff] [blame] | 183 | spinlock_t lock; |
Ingo Molnar | a53da52 | 2006-06-29 02:24:38 -0700 | [diff] [blame] | 184 | #ifdef CONFIG_SMP |
Mike Travis | 7f7ace0 | 2009-01-10 21:58:08 -0800 | [diff] [blame] | 185 | cpumask_var_t affinity; |
Thomas Gleixner | 6a6de9e | 2006-06-29 02:24:51 -0700 | [diff] [blame] | 186 | unsigned int cpu; |
Yinghai Lu | 8b8e8c1 | 2008-08-19 20:50:23 -0700 | [diff] [blame] | 187 | #ifdef CONFIG_GENERIC_PENDING_IRQ |
Mike Travis | 7f7ace0 | 2009-01-10 21:58:08 -0800 | [diff] [blame] | 188 | cpumask_var_t pending_mask; |
| 189 | #endif |
Ashok Raj | 54d5d42 | 2005-09-06 15:16:15 -0700 | [diff] [blame] | 190 | #endif |
Ingo Molnar | 4a733ee | 2006-06-29 02:24:42 -0700 | [diff] [blame] | 191 | #ifdef CONFIG_PROC_FS |
Ingo Molnar | a460e74 | 2006-10-17 00:10:03 -0700 | [diff] [blame] | 192 | struct proc_dir_entry *dir; |
Ingo Molnar | 4a733ee | 2006-06-29 02:24:42 -0700 | [diff] [blame] | 193 | #endif |
Ingo Molnar | a460e74 | 2006-10-17 00:10:03 -0700 | [diff] [blame] | 194 | const char *name; |
Ravikiran G Thirumalai | e729aa1 | 2007-05-08 00:29:13 -0700 | [diff] [blame] | 195 | } ____cacheline_internodealigned_in_smp; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 196 | |
Yinghai Lu | 0b8f1ef | 2008-12-05 18:58:31 -0800 | [diff] [blame] | 197 | extern void arch_init_copy_chip_data(struct irq_desc *old_desc, |
| 198 | struct irq_desc *desc, int cpu); |
| 199 | extern void arch_free_chip_data(struct irq_desc *old_desc, struct irq_desc *desc); |
Yinghai Lu | 9059d8f | 2008-08-19 20:50:10 -0700 | [diff] [blame] | 200 | |
Yinghai Lu | 0b8f1ef | 2008-12-05 18:58:31 -0800 | [diff] [blame] | 201 | #ifndef CONFIG_SPARSE_IRQ |
Ingo Molnar | 34ffdb7 | 2006-06-29 02:24:40 -0700 | [diff] [blame] | 202 | extern struct irq_desc irq_desc[NR_IRQS]; |
KOSAKI Motohiro | f9af0e7 | 2008-12-26 12:24:24 +0900 | [diff] [blame] | 203 | #else /* CONFIG_SPARSE_IRQ */ |
Yinghai Lu | 0b8f1ef | 2008-12-05 18:58:31 -0800 | [diff] [blame] | 204 | extern struct irq_desc *move_irq_desc(struct irq_desc *old_desc, int cpu); |
Yinghai Lu | d7e51e6 | 2009-01-07 15:03:13 -0800 | [diff] [blame] | 205 | #endif /* CONFIG_SPARSE_IRQ */ |
Yinghai Lu | 0b8f1ef | 2008-12-05 18:58:31 -0800 | [diff] [blame] | 206 | |
KOSAKI Motohiro | f9af0e7 | 2008-12-26 12:24:24 +0900 | [diff] [blame] | 207 | extern struct irq_desc *irq_to_desc_alloc_cpu(unsigned int irq, int cpu); |
Thomas Gleixner | c6b7674 | 2008-10-15 14:31:29 +0200 | [diff] [blame] | 208 | |
Yinghai Lu | 48a1b10 | 2008-12-11 00:15:01 -0800 | [diff] [blame] | 209 | static inline struct irq_desc * |
| 210 | irq_remap_to_desc(unsigned int irq, struct irq_desc *desc) |
| 211 | { |
| 212 | #ifdef CONFIG_NUMA_MIGRATE_IRQ_DESC |
| 213 | return irq_to_desc(irq); |
| 214 | #else |
| 215 | return desc; |
| 216 | #endif |
Thomas Gleixner | c6b7674 | 2008-10-15 14:31:29 +0200 | [diff] [blame] | 217 | } |
| 218 | |
Ingo Molnar | 34ffdb7 | 2006-06-29 02:24:40 -0700 | [diff] [blame] | 219 | /* |
| 220 | * Migration helpers for obsolete names, they will go away: |
| 221 | */ |
Thomas Gleixner | 6a6de9e | 2006-06-29 02:24:51 -0700 | [diff] [blame] | 222 | #define hw_interrupt_type irq_chip |
Thomas Gleixner | 6a6de9e | 2006-06-29 02:24:51 -0700 | [diff] [blame] | 223 | #define no_irq_type no_irq_chip |
Ingo Molnar | 34ffdb7 | 2006-06-29 02:24:40 -0700 | [diff] [blame] | 224 | typedef struct irq_desc irq_desc_t; |
| 225 | |
| 226 | /* |
| 227 | * Pick up the arch-dependent methods: |
| 228 | */ |
| 229 | #include <asm/hw_irq.h> |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 230 | |
Ingo Molnar | 06fcb0c | 2006-06-29 02:24:40 -0700 | [diff] [blame] | 231 | extern int setup_irq(unsigned int irq, struct irqaction *new); |
Magnus Damm | cbf94f0 | 2009-03-12 21:05:51 +0900 | [diff] [blame] | 232 | extern void remove_irq(unsigned int irq, struct irqaction *act); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 233 | |
| 234 | #ifdef CONFIG_GENERIC_HARDIRQS |
Ingo Molnar | 06fcb0c | 2006-06-29 02:24:40 -0700 | [diff] [blame] | 235 | |
Ashok Raj | 54d5d42 | 2005-09-06 15:16:15 -0700 | [diff] [blame] | 236 | #ifdef CONFIG_SMP |
Ashok Raj | 54d5d42 | 2005-09-06 15:16:15 -0700 | [diff] [blame] | 237 | |
Yinghai Lu | 8b8e8c1 | 2008-08-19 20:50:23 -0700 | [diff] [blame] | 238 | #ifdef CONFIG_GENERIC_PENDING_IRQ |
Ashok Raj | 54d5d42 | 2005-09-06 15:16:15 -0700 | [diff] [blame] | 239 | |
Andrew Morton | c777ac5 | 2006-03-25 03:07:36 -0800 | [diff] [blame] | 240 | void move_native_irq(int irq); |
Eric W. Biederman | e7b946e | 2006-10-04 02:16:29 -0700 | [diff] [blame] | 241 | void move_masked_irq(int irq); |
Ashok Raj | 54d5d42 | 2005-09-06 15:16:15 -0700 | [diff] [blame] | 242 | |
Yinghai Lu | 8b8e8c1 | 2008-08-19 20:50:23 -0700 | [diff] [blame] | 243 | #else /* CONFIG_GENERIC_PENDING_IRQ */ |
Ingo Molnar | 06fcb0c | 2006-06-29 02:24:40 -0700 | [diff] [blame] | 244 | |
| 245 | static inline void move_irq(int irq) |
| 246 | { |
| 247 | } |
| 248 | |
| 249 | static inline void move_native_irq(int irq) |
| 250 | { |
| 251 | } |
| 252 | |
Eric W. Biederman | e7b946e | 2006-10-04 02:16:29 -0700 | [diff] [blame] | 253 | static inline void move_masked_irq(int irq) |
| 254 | { |
| 255 | } |
| 256 | |
Ingo Molnar | 06fcb0c | 2006-06-29 02:24:40 -0700 | [diff] [blame] | 257 | #endif /* CONFIG_GENERIC_PENDING_IRQ */ |
Ashok Raj | 54d5d42 | 2005-09-06 15:16:15 -0700 | [diff] [blame] | 258 | |
Ingo Molnar | 06fcb0c | 2006-06-29 02:24:40 -0700 | [diff] [blame] | 259 | #else /* CONFIG_SMP */ |
Ashok Raj | 54d5d42 | 2005-09-06 15:16:15 -0700 | [diff] [blame] | 260 | |
Ashok Raj | 54d5d42 | 2005-09-06 15:16:15 -0700 | [diff] [blame] | 261 | #define move_native_irq(x) |
Eric W. Biederman | e7b946e | 2006-10-04 02:16:29 -0700 | [diff] [blame] | 262 | #define move_masked_irq(x) |
Ashok Raj | 54d5d42 | 2005-09-06 15:16:15 -0700 | [diff] [blame] | 263 | |
Ingo Molnar | 06fcb0c | 2006-06-29 02:24:40 -0700 | [diff] [blame] | 264 | #endif /* CONFIG_SMP */ |
Ashok Raj | 54d5d42 | 2005-09-06 15:16:15 -0700 | [diff] [blame] | 265 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 266 | extern int no_irq_affinity; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 267 | |
Thomas Gleixner | 950f442 | 2007-02-16 01:27:24 -0800 | [diff] [blame] | 268 | static inline int irq_balancing_disabled(unsigned int irq) |
| 269 | { |
Yinghai Lu | 08678b0 | 2008-08-19 20:50:05 -0700 | [diff] [blame] | 270 | struct irq_desc *desc; |
| 271 | |
| 272 | desc = irq_to_desc(irq); |
| 273 | return desc->status & IRQ_NO_BALANCING_MASK; |
Thomas Gleixner | 950f442 | 2007-02-16 01:27:24 -0800 | [diff] [blame] | 274 | } |
| 275 | |
Thomas Gleixner | 6a6de9e | 2006-06-29 02:24:51 -0700 | [diff] [blame] | 276 | /* Handle irq action chains: */ |
Thomas Gleixner | bedd30d | 2008-09-30 23:14:27 +0200 | [diff] [blame] | 277 | extern irqreturn_t handle_IRQ_event(unsigned int irq, struct irqaction *action); |
Thomas Gleixner | 6a6de9e | 2006-06-29 02:24:51 -0700 | [diff] [blame] | 278 | |
Ingo Molnar | 2e60bbb | 2006-06-29 02:24:39 -0700 | [diff] [blame] | 279 | /* |
Thomas Gleixner | 6a6de9e | 2006-06-29 02:24:51 -0700 | [diff] [blame] | 280 | * Built-in IRQ handlers for various IRQ types, |
| 281 | * callable via desc->chip->handle_irq() |
| 282 | */ |
Harvey Harrison | ec70158 | 2008-02-08 04:19:55 -0800 | [diff] [blame] | 283 | extern void handle_level_irq(unsigned int irq, struct irq_desc *desc); |
| 284 | extern void handle_fasteoi_irq(unsigned int irq, struct irq_desc *desc); |
| 285 | extern void handle_edge_irq(unsigned int irq, struct irq_desc *desc); |
| 286 | extern void handle_simple_irq(unsigned int irq, struct irq_desc *desc); |
| 287 | extern void handle_percpu_irq(unsigned int irq, struct irq_desc *desc); |
| 288 | extern void handle_bad_irq(unsigned int irq, struct irq_desc *desc); |
Thomas Gleixner | 6a6de9e | 2006-06-29 02:24:51 -0700 | [diff] [blame] | 289 | |
| 290 | /* |
Thomas Gleixner | 6a6de9e | 2006-06-29 02:24:51 -0700 | [diff] [blame] | 291 | * Monolithic do_IRQ implementation. |
Ingo Molnar | 2e60bbb | 2006-06-29 02:24:39 -0700 | [diff] [blame] | 292 | */ |
David Howells | af8c65b | 2006-09-25 23:32:07 -0700 | [diff] [blame] | 293 | #ifndef CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ |
Harvey Harrison | ec70158 | 2008-02-08 04:19:55 -0800 | [diff] [blame] | 294 | extern unsigned int __do_IRQ(unsigned int irq); |
David Howells | af8c65b | 2006-09-25 23:32:07 -0700 | [diff] [blame] | 295 | #endif |
Ingo Molnar | 2e60bbb | 2006-06-29 02:24:39 -0700 | [diff] [blame] | 296 | |
Ingo Molnar | dae8620 | 2006-06-29 02:24:52 -0700 | [diff] [blame] | 297 | /* |
| 298 | * Architectures call this to let the generic IRQ layer |
| 299 | * handle an interrupt. If the descriptor is attached to an |
| 300 | * irqchip-style controller then we call the ->handle_irq() handler, |
| 301 | * and it calls __do_IRQ() if it's attached to an irqtype-style controller. |
| 302 | */ |
Yinghai Lu | 46926b6 | 2008-08-19 20:50:15 -0700 | [diff] [blame] | 303 | static inline void generic_handle_irq_desc(unsigned int irq, struct irq_desc *desc) |
Ingo Molnar | dae8620 | 2006-06-29 02:24:52 -0700 | [diff] [blame] | 304 | { |
David Howells | af8c65b | 2006-09-25 23:32:07 -0700 | [diff] [blame] | 305 | #ifdef CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ |
David Howells | 7d12e78 | 2006-10-05 14:55:46 +0100 | [diff] [blame] | 306 | desc->handle_irq(irq, desc); |
David Howells | af8c65b | 2006-09-25 23:32:07 -0700 | [diff] [blame] | 307 | #else |
Ingo Molnar | dae8620 | 2006-06-29 02:24:52 -0700 | [diff] [blame] | 308 | if (likely(desc->handle_irq)) |
David Howells | 7d12e78 | 2006-10-05 14:55:46 +0100 | [diff] [blame] | 309 | desc->handle_irq(irq, desc); |
Ingo Molnar | dae8620 | 2006-06-29 02:24:52 -0700 | [diff] [blame] | 310 | else |
David Howells | 7d12e78 | 2006-10-05 14:55:46 +0100 | [diff] [blame] | 311 | __do_IRQ(irq); |
David Howells | af8c65b | 2006-09-25 23:32:07 -0700 | [diff] [blame] | 312 | #endif |
Ingo Molnar | dae8620 | 2006-06-29 02:24:52 -0700 | [diff] [blame] | 313 | } |
| 314 | |
Yinghai Lu | 46926b6 | 2008-08-19 20:50:15 -0700 | [diff] [blame] | 315 | static inline void generic_handle_irq(unsigned int irq) |
| 316 | { |
| 317 | generic_handle_irq_desc(irq, irq_to_desc(irq)); |
| 318 | } |
| 319 | |
Thomas Gleixner | 6a6de9e | 2006-06-29 02:24:51 -0700 | [diff] [blame] | 320 | /* Handling of unhandled and spurious interrupts: */ |
Ingo Molnar | 34ffdb7 | 2006-06-29 02:24:40 -0700 | [diff] [blame] | 321 | extern void note_interrupt(unsigned int irq, struct irq_desc *desc, |
Thomas Gleixner | bedd30d | 2008-09-30 23:14:27 +0200 | [diff] [blame] | 322 | irqreturn_t action_ret); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 323 | |
Thomas Gleixner | a4633adc | 2006-06-29 02:24:48 -0700 | [diff] [blame] | 324 | /* Resending of interrupts :*/ |
| 325 | void check_irq_resend(struct irq_desc *desc, unsigned int irq); |
| 326 | |
Thomas Gleixner | 6a6de9e | 2006-06-29 02:24:51 -0700 | [diff] [blame] | 327 | /* Enable/disable irq debugging output: */ |
| 328 | extern int noirqdebug_setup(char *str); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 329 | |
Thomas Gleixner | 6a6de9e | 2006-06-29 02:24:51 -0700 | [diff] [blame] | 330 | /* Checks whether the interrupt can be requested by request_irq(): */ |
| 331 | extern int can_request_irq(unsigned int irq, unsigned long irqflags); |
| 332 | |
Thomas Gleixner | f8b5473 | 2006-07-01 22:30:08 +0100 | [diff] [blame] | 333 | /* Dummy irq-chip implementations: */ |
Thomas Gleixner | 6a6de9e | 2006-06-29 02:24:51 -0700 | [diff] [blame] | 334 | extern struct irq_chip no_irq_chip; |
Thomas Gleixner | f8b5473 | 2006-07-01 22:30:08 +0100 | [diff] [blame] | 335 | extern struct irq_chip dummy_irq_chip; |
Thomas Gleixner | 6a6de9e | 2006-06-29 02:24:51 -0700 | [diff] [blame] | 336 | |
| 337 | extern void |
Ingo Molnar | 145fc65 | 2006-10-19 23:28:28 -0700 | [diff] [blame] | 338 | set_irq_chip_and_handler(unsigned int irq, struct irq_chip *chip, |
| 339 | irq_flow_handler_t handle); |
| 340 | extern void |
Ingo Molnar | a460e74 | 2006-10-17 00:10:03 -0700 | [diff] [blame] | 341 | set_irq_chip_and_handler_name(unsigned int irq, struct irq_chip *chip, |
| 342 | irq_flow_handler_t handle, const char *name); |
| 343 | |
Thomas Gleixner | 6a6de9e | 2006-06-29 02:24:51 -0700 | [diff] [blame] | 344 | extern void |
Ingo Molnar | a460e74 | 2006-10-17 00:10:03 -0700 | [diff] [blame] | 345 | __set_irq_handler(unsigned int irq, irq_flow_handler_t handle, int is_chained, |
| 346 | const char *name); |
Thomas Gleixner | 6a6de9e | 2006-06-29 02:24:51 -0700 | [diff] [blame] | 347 | |
Kevin Hilman | b019e57 | 2007-12-18 18:05:58 +0100 | [diff] [blame] | 348 | /* caller has locked the irq_desc and both params are valid */ |
| 349 | static inline void __set_irq_handler_unlocked(int irq, |
| 350 | irq_flow_handler_t handler) |
| 351 | { |
Yinghai Lu | 08678b0 | 2008-08-19 20:50:05 -0700 | [diff] [blame] | 352 | struct irq_desc *desc; |
| 353 | |
| 354 | desc = irq_to_desc(irq); |
| 355 | desc->handle_irq = handler; |
Kevin Hilman | b019e57 | 2007-12-18 18:05:58 +0100 | [diff] [blame] | 356 | } |
| 357 | |
Thomas Gleixner | 6a6de9e | 2006-06-29 02:24:51 -0700 | [diff] [blame] | 358 | /* |
| 359 | * Set a highlevel flow handler for a given IRQ: |
| 360 | */ |
| 361 | static inline void |
David Howells | 57a58a9 | 2006-10-05 13:06:34 +0100 | [diff] [blame] | 362 | set_irq_handler(unsigned int irq, irq_flow_handler_t handle) |
Thomas Gleixner | 6a6de9e | 2006-06-29 02:24:51 -0700 | [diff] [blame] | 363 | { |
Ingo Molnar | a460e74 | 2006-10-17 00:10:03 -0700 | [diff] [blame] | 364 | __set_irq_handler(irq, handle, 0, NULL); |
Thomas Gleixner | 6a6de9e | 2006-06-29 02:24:51 -0700 | [diff] [blame] | 365 | } |
| 366 | |
| 367 | /* |
| 368 | * Set a highlevel chained flow handler for a given IRQ. |
| 369 | * (a chained handler is automatically enabled and set to |
| 370 | * IRQ_NOREQUEST and IRQ_NOPROBE) |
| 371 | */ |
| 372 | static inline void |
| 373 | set_irq_chained_handler(unsigned int irq, |
David Howells | 57a58a9 | 2006-10-05 13:06:34 +0100 | [diff] [blame] | 374 | irq_flow_handler_t handle) |
Thomas Gleixner | 6a6de9e | 2006-06-29 02:24:51 -0700 | [diff] [blame] | 375 | { |
Ingo Molnar | a460e74 | 2006-10-17 00:10:03 -0700 | [diff] [blame] | 376 | __set_irq_handler(irq, handle, 1, NULL); |
Thomas Gleixner | 6a6de9e | 2006-06-29 02:24:51 -0700 | [diff] [blame] | 377 | } |
| 378 | |
Ralf Baechle | 46f4f8f | 2008-02-08 04:22:01 -0800 | [diff] [blame] | 379 | extern void set_irq_noprobe(unsigned int irq); |
| 380 | extern void set_irq_probe(unsigned int irq); |
| 381 | |
Eric W. Biederman | 3a16d71 | 2006-10-04 02:16:37 -0700 | [diff] [blame] | 382 | /* Handle dynamic irq creation and destruction */ |
Yinghai Lu | 6d50bc2 | 2008-08-19 20:50:22 -0700 | [diff] [blame] | 383 | extern unsigned int create_irq_nr(unsigned int irq_want); |
Eric W. Biederman | 3a16d71 | 2006-10-04 02:16:37 -0700 | [diff] [blame] | 384 | extern int create_irq(void); |
| 385 | extern void destroy_irq(unsigned int irq); |
Thomas Gleixner | dd87eb3 | 2006-06-29 02:24:53 -0700 | [diff] [blame] | 386 | |
Eric W. Biederman | 1f80025 | 2006-10-04 02:16:56 -0700 | [diff] [blame] | 387 | /* Test to see if a driver has successfully requested an irq */ |
| 388 | static inline int irq_has_action(unsigned int irq) |
| 389 | { |
Yinghai Lu | 08678b0 | 2008-08-19 20:50:05 -0700 | [diff] [blame] | 390 | struct irq_desc *desc = irq_to_desc(irq); |
Eric W. Biederman | 1f80025 | 2006-10-04 02:16:56 -0700 | [diff] [blame] | 391 | return desc->action != NULL; |
| 392 | } |
| 393 | |
Eric W. Biederman | 3a16d71 | 2006-10-04 02:16:37 -0700 | [diff] [blame] | 394 | /* Dynamic irq helper functions */ |
| 395 | extern void dynamic_irq_init(unsigned int irq); |
| 396 | extern void dynamic_irq_cleanup(unsigned int irq); |
| 397 | |
| 398 | /* Set/get chip/data for an IRQ: */ |
Thomas Gleixner | dd87eb3 | 2006-06-29 02:24:53 -0700 | [diff] [blame] | 399 | extern int set_irq_chip(unsigned int irq, struct irq_chip *chip); |
| 400 | extern int set_irq_data(unsigned int irq, void *data); |
| 401 | extern int set_irq_chip_data(unsigned int irq, void *data); |
| 402 | extern int set_irq_type(unsigned int irq, unsigned int type); |
Eric W. Biederman | 5b912c1 | 2007-01-28 12:52:03 -0700 | [diff] [blame] | 403 | extern int set_irq_msi(unsigned int irq, struct msi_desc *entry); |
Thomas Gleixner | dd87eb3 | 2006-06-29 02:24:53 -0700 | [diff] [blame] | 404 | |
Yinghai Lu | 08678b0 | 2008-08-19 20:50:05 -0700 | [diff] [blame] | 405 | #define get_irq_chip(irq) (irq_to_desc(irq)->chip) |
| 406 | #define get_irq_chip_data(irq) (irq_to_desc(irq)->chip_data) |
| 407 | #define get_irq_data(irq) (irq_to_desc(irq)->handler_data) |
| 408 | #define get_irq_msi(irq) (irq_to_desc(irq)->msi_desc) |
Thomas Gleixner | dd87eb3 | 2006-06-29 02:24:53 -0700 | [diff] [blame] | 409 | |
Yinghai Lu | 0b8f1ef | 2008-12-05 18:58:31 -0800 | [diff] [blame] | 410 | #define get_irq_desc_chip(desc) ((desc)->chip) |
| 411 | #define get_irq_desc_chip_data(desc) ((desc)->chip_data) |
| 412 | #define get_irq_desc_data(desc) ((desc)->handler_data) |
| 413 | #define get_irq_desc_msi(desc) ((desc)->msi_desc) |
| 414 | |
Thomas Gleixner | 6a6de9e | 2006-06-29 02:24:51 -0700 | [diff] [blame] | 415 | #endif /* CONFIG_GENERIC_HARDIRQS */ |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 416 | |
Ingo Molnar | 06fcb0c | 2006-06-29 02:24:40 -0700 | [diff] [blame] | 417 | #endif /* !CONFIG_S390 */ |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 418 | |
Mike Travis | 7f7ace0 | 2009-01-10 21:58:08 -0800 | [diff] [blame] | 419 | #ifdef CONFIG_SMP |
| 420 | /** |
| 421 | * init_alloc_desc_masks - allocate cpumasks for irq_desc |
| 422 | * @desc: pointer to irq_desc struct |
Mike Travis | 802bf93 | 2009-01-10 21:58:09 -0800 | [diff] [blame] | 423 | * @cpu: cpu which will be handling the cpumasks |
Mike Travis | 7f7ace0 | 2009-01-10 21:58:08 -0800 | [diff] [blame] | 424 | * @boot: true if need bootmem |
| 425 | * |
| 426 | * Allocates affinity and pending_mask cpumask if required. |
| 427 | * Returns true if successful (or not required). |
| 428 | * Side effect: affinity has all bits set, pending_mask has all bits clear. |
| 429 | */ |
Mike Travis | 802bf93 | 2009-01-10 21:58:09 -0800 | [diff] [blame] | 430 | static inline bool init_alloc_desc_masks(struct irq_desc *desc, int cpu, |
Mike Travis | 7f7ace0 | 2009-01-10 21:58:08 -0800 | [diff] [blame] | 431 | bool boot) |
| 432 | { |
Mike Travis | 802bf93 | 2009-01-10 21:58:09 -0800 | [diff] [blame] | 433 | int node; |
| 434 | |
Mike Travis | 7f7ace0 | 2009-01-10 21:58:08 -0800 | [diff] [blame] | 435 | if (boot) { |
| 436 | alloc_bootmem_cpumask_var(&desc->affinity); |
| 437 | cpumask_setall(desc->affinity); |
| 438 | |
| 439 | #ifdef CONFIG_GENERIC_PENDING_IRQ |
| 440 | alloc_bootmem_cpumask_var(&desc->pending_mask); |
| 441 | cpumask_clear(desc->pending_mask); |
| 442 | #endif |
| 443 | return true; |
| 444 | } |
| 445 | |
Mike Travis | 802bf93 | 2009-01-10 21:58:09 -0800 | [diff] [blame] | 446 | node = cpu_to_node(cpu); |
| 447 | |
Mike Travis | 7f7ace0 | 2009-01-10 21:58:08 -0800 | [diff] [blame] | 448 | if (!alloc_cpumask_var_node(&desc->affinity, GFP_ATOMIC, node)) |
| 449 | return false; |
| 450 | cpumask_setall(desc->affinity); |
| 451 | |
| 452 | #ifdef CONFIG_GENERIC_PENDING_IRQ |
| 453 | if (!alloc_cpumask_var_node(&desc->pending_mask, GFP_ATOMIC, node)) { |
| 454 | free_cpumask_var(desc->affinity); |
| 455 | return false; |
| 456 | } |
| 457 | cpumask_clear(desc->pending_mask); |
| 458 | #endif |
| 459 | return true; |
| 460 | } |
| 461 | |
| 462 | /** |
| 463 | * init_copy_desc_masks - copy cpumasks for irq_desc |
| 464 | * @old_desc: pointer to old irq_desc struct |
| 465 | * @new_desc: pointer to new irq_desc struct |
| 466 | * |
| 467 | * Insures affinity and pending_masks are copied to new irq_desc. |
| 468 | * If !CONFIG_CPUMASKS_OFFSTACK the cpumasks are embedded in the |
| 469 | * irq_desc struct so the copy is redundant. |
| 470 | */ |
| 471 | |
| 472 | static inline void init_copy_desc_masks(struct irq_desc *old_desc, |
| 473 | struct irq_desc *new_desc) |
| 474 | { |
| 475 | #ifdef CONFIG_CPUMASKS_OFFSTACK |
| 476 | cpumask_copy(new_desc->affinity, old_desc->affinity); |
| 477 | |
| 478 | #ifdef CONFIG_GENERIC_PENDING_IRQ |
| 479 | cpumask_copy(new_desc->pending_mask, old_desc->pending_mask); |
| 480 | #endif |
| 481 | #endif |
| 482 | } |
| 483 | |
| 484 | #else /* !CONFIG_SMP */ |
| 485 | |
Mike Travis | 802bf93 | 2009-01-10 21:58:09 -0800 | [diff] [blame] | 486 | static inline bool init_alloc_desc_masks(struct irq_desc *desc, int cpu, |
Mike Travis | 7f7ace0 | 2009-01-10 21:58:08 -0800 | [diff] [blame] | 487 | bool boot) |
| 488 | { |
| 489 | return true; |
| 490 | } |
| 491 | |
| 492 | static inline void init_copy_desc_masks(struct irq_desc *old_desc, |
| 493 | struct irq_desc *new_desc) |
| 494 | { |
| 495 | } |
| 496 | |
| 497 | #endif /* CONFIG_SMP */ |
| 498 | |
Ingo Molnar | 06fcb0c | 2006-06-29 02:24:40 -0700 | [diff] [blame] | 499 | #endif /* _LINUX_IRQ_H */ |