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Len Brown103a8fe2010-10-22 23:53:03 -04001.TH TURBOSTAT 8
2.SH NAME
3turbostat \- Report processor frequency and idle statistics
4.SH SYNOPSIS
5.ft B
6.B turbostat
Len Brown8e180f32012-09-22 01:25:08 -04007.RB [ Options ]
Len Brown103a8fe2010-10-22 23:53:03 -04008.RB command
9.br
10.B turbostat
Len Brown8e180f32012-09-22 01:25:08 -040011.RB [ Options ]
Len Brownd8af6f52015-02-10 01:56:38 -050012.RB [ "\--interval seconds" ]
Len Brown103a8fe2010-10-22 23:53:03 -040013.SH DESCRIPTION
Len Brown889facb2012-11-08 00:48:57 -050014\fBturbostat \fP reports processor topology, frequency,
Len Browna7296172015-01-23 01:33:58 -050015idle power-state statistics, temperature and power on X86 processors.
16There are two ways to invoke turbostat.
17The first method is to supply a
18\fBcommand\fP, which is forked and statistics are printed
19upon its completion.
20The second method is to omit the command,
Len Brownd8af6f52015-02-10 01:56:38 -050021and turbostat displays statistics every 5 seconds.
22The 5-second interval can be changed using the --interval option.
Len Brown103a8fe2010-10-22 23:53:03 -040023
Len Brownd8af6f52015-02-10 01:56:38 -050024Some information is not available on older processors.
Len Brown103a8fe2010-10-22 23:53:03 -040025.SS Options
Len Brownd8af6f52015-02-10 01:56:38 -050026\fB--Counter MSR#\fP shows the delta of the specified 64-bit MSR counter.
Len Brownc98d5d92012-06-04 00:56:40 -040027.PP
Len Brownd8af6f52015-02-10 01:56:38 -050028\fB--counter MSR#\fP shows the delta of the specified 32-bit MSR counter.
Len Brownc98d5d92012-06-04 00:56:40 -040029.PP
Len Brownd8af6f52015-02-10 01:56:38 -050030\fB--Dump\fP displays the raw counter values.
Len Browne23da032012-02-06 18:37:16 -050031.PP
Len Brownd8af6f52015-02-10 01:56:38 -050032\fB--debug\fP displays additional system configuration information. Invoking this parameter
33more than once may also enable internal turbostat debug information.
Len Brown103a8fe2010-10-22 23:53:03 -040034.PP
Len Brownd8af6f52015-02-10 01:56:38 -050035\fB--interval seconds\fP overrides the default 5-second measurement interval.
Len Brownf9240812012-10-06 15:26:31 -040036.PP
Len Brownd8af6f52015-02-10 01:56:38 -050037\fB--help\fP displays usage for the most common parameters.
Len Brown8e180f32012-09-22 01:25:08 -040038.PP
Len Brownd8af6f52015-02-10 01:56:38 -050039\fB--Joules\fP displays energy in Joules, rather than dividing Joules by time to print power in Watts.
Len Brown8e180f32012-09-22 01:25:08 -040040.PP
Len Brownd8af6f52015-02-10 01:56:38 -050041\fB--MSR MSR#\fP shows the specified 64-bit MSR value.
Len Brown103a8fe2010-10-22 23:53:03 -040042.PP
Len Brownd8af6f52015-02-10 01:56:38 -050043\fB--msr MSR#\fP shows the specified 32-bit MSR value.
Len Brown103a8fe2010-10-22 23:53:03 -040044.PP
Len Brownd8af6f52015-02-10 01:56:38 -050045\fB--Package\fP limits output to the system summary plus the 1st thread in each Package.
46.PP
47\fB--processor\fP limits output to the system summary plus the 1st thread in each processor of each package. Ie. it skips hyper-threaded siblings.
48.PP
49\fB--Summary\fP limits output to a 1-line System Summary for each interval.
50.PP
51\fB--TCC temperature\fP sets the Thermal Control Circuit temperature for systems which do not export that value. This is used for making sense of the Digital Thermal Sensor outputs, as they return degrees Celsius below the TCC activation temperature.
52.PP
53\fB--version\fP displays the version.
54.PP
55The \fBcommand\fP parameter forks \fBcommand\fP, and upon its exit,
Len Brown103a8fe2010-10-22 23:53:03 -040056displays the statistics gathered since it was forked.
57.PP
58.SH FIELD DESCRIPTIONS
59.nf
Len Brownfc04cc62014-02-06 00:55:19 -050060\fBPackage\fP processor package number.
61\fBCore\fP processor core number.
Len Brown103a8fe2010-10-22 23:53:03 -040062\fBCPU\fP Linux CPU (logical processor) number.
Len Browne23da032012-02-06 18:37:16 -050063Note that multiple CPUs per core indicate support for Intel(R) Hyper-Threading Technology.
Len Brownfc04cc62014-02-06 00:55:19 -050064\fBAVG_MHz\fP number of cycles executed divided by time elapsed.
Len Brownd8af6f52015-02-10 01:56:38 -050065\fB%Busy\fP percent of the interval that the CPU retired instructions, aka. % of time in "C0" state.
Len Brownfc04cc62014-02-06 00:55:19 -050066\fBBzy_MHz\fP average clock rate while the CPU was busy (in "c0" state).
67\fBTSC_MHz\fP average MHz that the TSC ran during the entire interval.
68\fBCPU%c1, CPU%c3, CPU%c6, CPU%c7\fP show the percentage residency in hardware core idle states.
69\fBCoreTmp\fP Degrees Celsius reported by the per-core Digital Thermal Sensor.
70\fBPkgTtmp\fP Degrees Celsius reported by the per-package Package Thermal Monitor.
71\fBPkg%pc2, Pkg%pc3, Pkg%pc6, Pkg%pc7\fP percentage residency in hardware package idle states.
72\fBPkgWatt\fP Watts consumed by the whole package.
73\fBCorWatt\fP Watts consumed by the core part of the package.
74\fBGFXWatt\fP Watts consumed by the Graphics part of the package -- available only on client processors.
75\fBRAMWatt\fP Watts consumed by the DRAM DIMMS -- available only on server processors.
Len Brown889facb2012-11-08 00:48:57 -050076\fBPKG_%\fP percent of the interval that RAPL throttling was active on the Package.
77\fBRAM_%\fP percent of the interval that RAPL throttling was active on DRAM.
Len Brown103a8fe2010-10-22 23:53:03 -040078.fi
79.PP
80.SH EXAMPLE
Len Brownd8af6f52015-02-10 01:56:38 -050081Without any parameters, turbostat displays statistics ever 5 seconds.
Len Brown103a8fe2010-10-22 23:53:03 -040082(override interval with "-i sec" option, or specify a command
83for turbostat to fork).
84
Len Browne23da032012-02-06 18:37:16 -050085The first row of statistics is a summary for the entire system.
Len Brown889facb2012-11-08 00:48:57 -050086For residency % columns, the summary is a weighted average.
87For Temperature columns, the summary is the column maximum.
88For Watts columns, the summary is a system total.
Len Brown103a8fe2010-10-22 23:53:03 -040089Subsequent rows show per-CPU statistics.
90
91.nf
Len Brownfc04cc62014-02-06 00:55:19 -050092[root@ivy]# ./turbostat
93 Core CPU Avg_MHz %Busy Bzy_MHz TSC_MHz SMI CPU%c1 CPU%c3 CPU%c6 CPU%c7 CoreTmp PkgTmp Pkg%pc2 Pkg%pc3 Pkg%pc6 Pkg%pc7 PkgWatt CorWatt GFXWatt
94 - - 6 0.36 1596 3492 0 0.59 0.01 99.04 0.00 23 24 23.82 0.01 72.47 0.00 6.40 1.01 0.00
95 0 0 9 0.58 1596 3492 0 0.28 0.01 99.13 0.00 23 24 23.82 0.01 72.47 0.00 6.40 1.01 0.00
96 0 4 1 0.07 1596 3492 0 0.79
97 1 1 10 0.65 1596 3492 0 0.59 0.00 98.76 0.00 23
98 1 5 5 0.28 1596 3492 0 0.95
99 2 2 10 0.66 1596 3492 0 0.41 0.01 98.92 0.00 23
100 2 6 2 0.10 1597 3492 0 0.97
101 3 3 3 0.20 1596 3492 0 0.44 0.00 99.37 0.00 23
102 3 7 5 0.31 1596 3492 0 0.33
Len Brown103a8fe2010-10-22 23:53:03 -0400103.fi
Len Brownd8af6f52015-02-10 01:56:38 -0500104.SH DEBUG EXAMPLE
105The "--debug" option prints additional system information before measurements:
Len Brown103a8fe2010-10-22 23:53:03 -0400106
107.nf
Len Brownd8af6f52015-02-10 01:56:38 -0500108turbostat version 4.0 10-Feb, 2015 - Len Brown <lenb@kernel.org>
Len Brown889facb2012-11-08 00:48:57 -0500109CPUID(0): GenuineIntel 13 CPUID levels; family:model:stepping 0x6:3a:9 (6:58:9)
110CPUID(6): APERF, DTS, PTM, EPB
Len Brownd8af6f52015-02-10 01:56:38 -0500111RAPL: 851 sec. Joule Counter Range, at 77 Watts
Len Brown889facb2012-11-08 00:48:57 -0500112cpu0: MSR_NHM_PLATFORM_INFO: 0x81010f0012300
11316 * 100 = 1600 MHz max efficiency
11435 * 100 = 3500 MHz TSC frequency
Len Brownd8af6f52015-02-10 01:56:38 -0500115cpu0: MSR_IA32_POWER_CTL: 0x0014005d (C1E auto-promotion: DISabled)
116cpu0: MSR_NHM_SNB_PKG_CST_CFG_CTL: 0x1e008402 (UNdemote-C3, UNdemote-C1, demote-C3, demote-C1, locked: pkg-cstate-limit=2: pc6n)
Len Brown889facb2012-11-08 00:48:57 -0500117cpu0: MSR_NHM_TURBO_RATIO_LIMIT: 0x25262727
11837 * 100 = 3700 MHz max turbo 4 active cores
11938 * 100 = 3800 MHz max turbo 3 active cores
12039 * 100 = 3900 MHz max turbo 2 active cores
12139 * 100 = 3900 MHz max turbo 1 active cores
122cpu0: MSR_IA32_ENERGY_PERF_BIAS: 0x00000006 (balanced)
123cpu0: MSR_RAPL_POWER_UNIT: 0x000a1003 (0.125000 Watts, 0.000015 Joules, 0.000977 sec.)
124cpu0: MSR_PKG_POWER_INFO: 0x01e00268 (77 W TDP, RAPL 60 - 0 W, 0.000000 sec.)
Len Brownd8af6f52015-02-10 01:56:38 -0500125cpu0: MSR_PKG_POWER_LIMIT: 0x30000148268 (UNlocked)
Len Brown889facb2012-11-08 00:48:57 -0500126cpu0: PKG Limit #1: ENabled (77.000000 Watts, 1.000000 sec, clamp DISabled)
Len Brownd8af6f52015-02-10 01:56:38 -0500127cpu0: PKG Limit #2: DISabled (96.000000 Watts, 0.000977* sec, clamp DISabled)
Len Brown889facb2012-11-08 00:48:57 -0500128cpu0: MSR_PP0_POLICY: 0
129cpu0: MSR_PP0_POWER_LIMIT: 0x00000000 (UNlocked)
130cpu0: Cores Limit: DISabled (0.000000 Watts, 0.000977 sec, clamp DISabled)
131cpu0: MSR_PP1_POLICY: 0
132cpu0: MSR_PP1_POWER_LIMIT: 0x00000000 (UNlocked)
133cpu0: GFX Limit: DISabled (0.000000 Watts, 0.000977 sec, clamp DISabled)
134cpu0: MSR_IA32_TEMPERATURE_TARGET: 0x00691400 (105 C)
135cpu0: MSR_IA32_PACKAGE_THERM_STATUS: 0x884e0000 (27 C)
Len Brownd8af6f52015-02-10 01:56:38 -0500136cpu0: MSR_IA32_THERM_STATUS: 0x88580000 (17 C +/- 1)
137cpu1: MSR_IA32_THERM_STATUS: 0x885a0000 (15 C +/- 1)
138cpu2: MSR_IA32_THERM_STATUS: 0x88570000 (18 C +/- 1)
Len Brown889facb2012-11-08 00:48:57 -0500139cpu3: MSR_IA32_THERM_STATUS: 0x884e0000 (27 C +/- 1)
140 ...
Len Brown103a8fe2010-10-22 23:53:03 -0400141.fi
142The \fBmax efficiency\fP frequency, a.k.a. Low Frequency Mode, is the frequency
Len Browna7296172015-01-23 01:33:58 -0500143available at the minimum package voltage. The \fBTSC frequency\fP is the base
144frequency of the processor -- this should match the brand string
145in /proc/cpuinfo. This base frequency
Len Brown103a8fe2010-10-22 23:53:03 -0400146should be sustainable on all CPUs indefinitely, given nominal power and cooling.
147The remaining rows show what maximum turbo frequency is possible
Len Browna7296172015-01-23 01:33:58 -0500148depending on the number of idle cores. Note that not all information is
149available on all processors.
Len Brown103a8fe2010-10-22 23:53:03 -0400150.SH FORK EXAMPLE
151If turbostat is invoked with a command, it will fork that command
152and output the statistics gathered when the command exits.
153eg. Here a cycle soaker is run on 1 CPU (see %c0) for a few seconds
154until ^C while the other CPUs are mostly idle:
155
156.nf
Len Brownfc04cc62014-02-06 00:55:19 -0500157root@ivy: turbostat cat /dev/zero > /dev/null
Len Browne23da032012-02-06 18:37:16 -0500158^C
Len Brownfc04cc62014-02-06 00:55:19 -0500159 Core CPU Avg_MHz %Busy Bzy_MHz TSC_MHz SMI CPU%c1 CPU%c3 CPU%c6 CPU%c7 CoreTmp PkgTmp Pkg%pc2 Pkg%pc3 Pkg%pc6 Pkg%pc7 PkgWatt CorWatt GFXWatt
160 - - 496 12.75 3886 3492 0 13.16 0.04 74.04 0.00 36 36 0.00 0.00 0.00 0.00 23.15 17.65 0.00
161 0 0 22 0.57 3830 3492 0 0.83 0.02 98.59 0.00 27 36 0.00 0.00 0.00 0.00 23.15 17.65 0.00
162 0 4 9 0.24 3829 3492 0 1.15
163 1 1 4 0.09 3783 3492 0 99.91 0.00 0.00 0.00 36
164 1 5 3880 99.82 3888 3492 0 0.18
165 2 2 17 0.44 3813 3492 0 0.77 0.04 98.75 0.00 28
166 2 6 12 0.32 3823 3492 0 0.89
167 3 3 16 0.43 3844 3492 0 0.63 0.11 98.84 0.00 30
168 3 7 4 0.11 3827 3492 0 0.94
16930.372243 sec
170
Len Brown103a8fe2010-10-22 23:53:03 -0400171.fi
Len Brownfc04cc62014-02-06 00:55:19 -0500172Above the cycle soaker drives cpu5 up its 3.8 GHz turbo limit
Len Brown103a8fe2010-10-22 23:53:03 -0400173while the other processors are generally in various states of idle.
174
Len Brownfc04cc62014-02-06 00:55:19 -0500175Note that cpu1 and cpu5 are HT siblings within core1.
176As cpu5 is very busy, it prevents its sibling, cpu1,
Len Brownc98d5d92012-06-04 00:56:40 -0400177from entering a c-state deeper than c1.
Len Brown103a8fe2010-10-22 23:53:03 -0400178
Len Brownfc04cc62014-02-06 00:55:19 -0500179Note that the Avg_MHz column reflects the total number of cycles executed
180divided by the measurement interval. If the %Busy column is 100%,
181then the processor was running at that speed the entire interval.
182The Avg_MHz multiplied by the %Busy results in the Bzy_MHz --
183which is the average frequency while the processor was executing --
184not including any non-busy idle time.
185
Len Brown103a8fe2010-10-22 23:53:03 -0400186.SH NOTES
187
188.B "turbostat "
189must be run as root.
Len Browna7296172015-01-23 01:33:58 -0500190Alternatively, non-root users can be enabled to run turbostat this way:
191
192# setcap cap_sys_rawio=ep ./turbostat
193
194# chmod +r /dev/cpu/*/msr
Len Brown103a8fe2010-10-22 23:53:03 -0400195
196.B "turbostat "
197reads hardware counters, but doesn't write them.
198So it will not interfere with the OS or other programs, including
199multiple invocations of itself.
200
201\fBturbostat \fP
202may work poorly on Linux-2.6.20 through 2.6.29,
Len Browna7296172015-01-23 01:33:58 -0500203as \fBacpi-cpufreq \fPperiodically cleared the APERF and MPERF MSRs
Len Brown103a8fe2010-10-22 23:53:03 -0400204in those kernels.
205
Len Browna7296172015-01-23 01:33:58 -0500206AVG_MHz = APERF_delta/measurement_interval. This is the actual
207number of elapsed cycles divided by the entire sample interval --
Len Brownd8af6f52015-02-10 01:56:38 -0500208including idle time. Note that this calculation is resilient
Len Browna7296172015-01-23 01:33:58 -0500209to systems lacking a non-stop TSC.
210
211TSC_MHz = TSC_delta/measurement_interval.
212On a system with an invariant TSC, this value will be constant
213and will closely match the base frequency value shown
214in the brand string in /proc/cpuinfo. On a system where
215the TSC stops in idle, TSC_MHz will drop
216below the processor's base frequency.
217
218%Busy = MPERF_delta/TSC_delta
219
220Bzy_MHz = TSC_delta/APERF_delta/MPERF_delta/measurement_interval
221
222Note that these calculations depend on TSC_delta, so they
223are not reliable during intervals when TSC_MHz is not running at the base frequency.
224
225Turbostat data collection is not atomic.
226Extremely short measurement intervals (much less than 1 second),
227or system activity that prevents turbostat from being able
228to run on all CPUS to quickly collect data, will result in
229inconsistent results.
Len Brown2f32edf2012-09-21 23:45:46 -0400230
Len Brown103a8fe2010-10-22 23:53:03 -0400231The APERF, MPERF MSRs are defined to count non-halted cycles.
232Although it is not guaranteed by the architecture, turbostat assumes
233that they count at TSC rate, which is true on all processors tested to date.
234
235.SH REFERENCES
236"Intel® Turbo Boost Technology
237in Intel® Core™ Microarchitecture (Nehalem) Based Processors"
238http://download.intel.com/design/processor/applnots/320354.pdf
239
240"Intel® 64 and IA-32 Architectures Software Developer's Manual
241Volume 3B: System Programming Guide"
242http://www.intel.com/products/processor/manuals/
243
244.SH FILES
245.ta
246.nf
247/dev/cpu/*/msr
248.fi
249
250.SH "SEE ALSO"
251msr(4), vmstat(8)
252.PP
Len Browne23da032012-02-06 18:37:16 -0500253.SH AUTHOR
Len Brown103a8fe2010-10-22 23:53:03 -0400254.nf
255Written by Len Brown <len.brown@intel.com>