Len Brown | 103a8fe | 2010-10-22 23:53:03 -0400 | [diff] [blame] | 1 | .TH TURBOSTAT 8 |
| 2 | .SH NAME |
| 3 | turbostat \- Report processor frequency and idle statistics |
| 4 | .SH SYNOPSIS |
| 5 | .ft B |
| 6 | .B turbostat |
Len Brown | 8e180f3 | 2012-09-22 01:25:08 -0400 | [diff] [blame] | 7 | .RB [ Options ] |
Len Brown | 103a8fe | 2010-10-22 23:53:03 -0400 | [diff] [blame] | 8 | .RB command |
| 9 | .br |
| 10 | .B turbostat |
Len Brown | 8e180f3 | 2012-09-22 01:25:08 -0400 | [diff] [blame] | 11 | .RB [ Options ] |
Len Brown | d8af6f5 | 2015-02-10 01:56:38 -0500 | [diff] [blame] | 12 | .RB [ "\--interval seconds" ] |
Len Brown | 103a8fe | 2010-10-22 23:53:03 -0400 | [diff] [blame] | 13 | .SH DESCRIPTION |
Len Brown | 889facb | 2012-11-08 00:48:57 -0500 | [diff] [blame] | 14 | \fBturbostat \fP reports processor topology, frequency, |
Len Brown | a729617 | 2015-01-23 01:33:58 -0500 | [diff] [blame] | 15 | idle power-state statistics, temperature and power on X86 processors. |
| 16 | There are two ways to invoke turbostat. |
| 17 | The first method is to supply a |
| 18 | \fBcommand\fP, which is forked and statistics are printed |
| 19 | upon its completion. |
| 20 | The second method is to omit the command, |
Len Brown | d8af6f5 | 2015-02-10 01:56:38 -0500 | [diff] [blame] | 21 | and turbostat displays statistics every 5 seconds. |
| 22 | The 5-second interval can be changed using the --interval option. |
Len Brown | 103a8fe | 2010-10-22 23:53:03 -0400 | [diff] [blame] | 23 | |
Len Brown | d8af6f5 | 2015-02-10 01:56:38 -0500 | [diff] [blame] | 24 | Some information is not available on older processors. |
Len Brown | 103a8fe | 2010-10-22 23:53:03 -0400 | [diff] [blame] | 25 | .SS Options |
Len Brown | d8af6f5 | 2015-02-10 01:56:38 -0500 | [diff] [blame] | 26 | \fB--Counter MSR#\fP shows the delta of the specified 64-bit MSR counter. |
Len Brown | c98d5d9 | 2012-06-04 00:56:40 -0400 | [diff] [blame] | 27 | .PP |
Len Brown | d8af6f5 | 2015-02-10 01:56:38 -0500 | [diff] [blame] | 28 | \fB--counter MSR#\fP shows the delta of the specified 32-bit MSR counter. |
Len Brown | c98d5d9 | 2012-06-04 00:56:40 -0400 | [diff] [blame] | 29 | .PP |
Len Brown | d8af6f5 | 2015-02-10 01:56:38 -0500 | [diff] [blame] | 30 | \fB--Dump\fP displays the raw counter values. |
Len Brown | e23da03 | 2012-02-06 18:37:16 -0500 | [diff] [blame] | 31 | .PP |
Len Brown | d8af6f5 | 2015-02-10 01:56:38 -0500 | [diff] [blame] | 32 | \fB--debug\fP displays additional system configuration information. Invoking this parameter |
| 33 | more than once may also enable internal turbostat debug information. |
Len Brown | 103a8fe | 2010-10-22 23:53:03 -0400 | [diff] [blame] | 34 | .PP |
Len Brown | d8af6f5 | 2015-02-10 01:56:38 -0500 | [diff] [blame] | 35 | \fB--interval seconds\fP overrides the default 5-second measurement interval. |
Len Brown | f924081 | 2012-10-06 15:26:31 -0400 | [diff] [blame] | 36 | .PP |
Len Brown | d8af6f5 | 2015-02-10 01:56:38 -0500 | [diff] [blame] | 37 | \fB--help\fP displays usage for the most common parameters. |
Len Brown | 8e180f3 | 2012-09-22 01:25:08 -0400 | [diff] [blame] | 38 | .PP |
Len Brown | d8af6f5 | 2015-02-10 01:56:38 -0500 | [diff] [blame] | 39 | \fB--Joules\fP displays energy in Joules, rather than dividing Joules by time to print power in Watts. |
Len Brown | 8e180f3 | 2012-09-22 01:25:08 -0400 | [diff] [blame] | 40 | .PP |
Len Brown | d8af6f5 | 2015-02-10 01:56:38 -0500 | [diff] [blame] | 41 | \fB--MSR MSR#\fP shows the specified 64-bit MSR value. |
Len Brown | 103a8fe | 2010-10-22 23:53:03 -0400 | [diff] [blame] | 42 | .PP |
Len Brown | d8af6f5 | 2015-02-10 01:56:38 -0500 | [diff] [blame] | 43 | \fB--msr MSR#\fP shows the specified 32-bit MSR value. |
Len Brown | 103a8fe | 2010-10-22 23:53:03 -0400 | [diff] [blame] | 44 | .PP |
Len Brown | d8af6f5 | 2015-02-10 01:56:38 -0500 | [diff] [blame] | 45 | \fB--Package\fP limits output to the system summary plus the 1st thread in each Package. |
| 46 | .PP |
| 47 | \fB--processor\fP limits output to the system summary plus the 1st thread in each processor of each package. Ie. it skips hyper-threaded siblings. |
| 48 | .PP |
| 49 | \fB--Summary\fP limits output to a 1-line System Summary for each interval. |
| 50 | .PP |
| 51 | \fB--TCC temperature\fP sets the Thermal Control Circuit temperature for systems which do not export that value. This is used for making sense of the Digital Thermal Sensor outputs, as they return degrees Celsius below the TCC activation temperature. |
| 52 | .PP |
| 53 | \fB--version\fP displays the version. |
| 54 | .PP |
| 55 | The \fBcommand\fP parameter forks \fBcommand\fP, and upon its exit, |
Len Brown | 103a8fe | 2010-10-22 23:53:03 -0400 | [diff] [blame] | 56 | displays the statistics gathered since it was forked. |
| 57 | .PP |
| 58 | .SH FIELD DESCRIPTIONS |
| 59 | .nf |
Len Brown | fc04cc6 | 2014-02-06 00:55:19 -0500 | [diff] [blame] | 60 | \fBPackage\fP processor package number. |
| 61 | \fBCore\fP processor core number. |
Len Brown | 103a8fe | 2010-10-22 23:53:03 -0400 | [diff] [blame] | 62 | \fBCPU\fP Linux CPU (logical processor) number. |
Len Brown | e23da03 | 2012-02-06 18:37:16 -0500 | [diff] [blame] | 63 | Note that multiple CPUs per core indicate support for Intel(R) Hyper-Threading Technology. |
Len Brown | fc04cc6 | 2014-02-06 00:55:19 -0500 | [diff] [blame] | 64 | \fBAVG_MHz\fP number of cycles executed divided by time elapsed. |
Len Brown | d8af6f5 | 2015-02-10 01:56:38 -0500 | [diff] [blame] | 65 | \fB%Busy\fP percent of the interval that the CPU retired instructions, aka. % of time in "C0" state. |
Len Brown | fc04cc6 | 2014-02-06 00:55:19 -0500 | [diff] [blame] | 66 | \fBBzy_MHz\fP average clock rate while the CPU was busy (in "c0" state). |
| 67 | \fBTSC_MHz\fP average MHz that the TSC ran during the entire interval. |
| 68 | \fBCPU%c1, CPU%c3, CPU%c6, CPU%c7\fP show the percentage residency in hardware core idle states. |
| 69 | \fBCoreTmp\fP Degrees Celsius reported by the per-core Digital Thermal Sensor. |
| 70 | \fBPkgTtmp\fP Degrees Celsius reported by the per-package Package Thermal Monitor. |
| 71 | \fBPkg%pc2, Pkg%pc3, Pkg%pc6, Pkg%pc7\fP percentage residency in hardware package idle states. |
| 72 | \fBPkgWatt\fP Watts consumed by the whole package. |
| 73 | \fBCorWatt\fP Watts consumed by the core part of the package. |
| 74 | \fBGFXWatt\fP Watts consumed by the Graphics part of the package -- available only on client processors. |
| 75 | \fBRAMWatt\fP Watts consumed by the DRAM DIMMS -- available only on server processors. |
Len Brown | 889facb | 2012-11-08 00:48:57 -0500 | [diff] [blame] | 76 | \fBPKG_%\fP percent of the interval that RAPL throttling was active on the Package. |
| 77 | \fBRAM_%\fP percent of the interval that RAPL throttling was active on DRAM. |
Len Brown | 103a8fe | 2010-10-22 23:53:03 -0400 | [diff] [blame] | 78 | .fi |
| 79 | .PP |
| 80 | .SH EXAMPLE |
Len Brown | d8af6f5 | 2015-02-10 01:56:38 -0500 | [diff] [blame] | 81 | Without any parameters, turbostat displays statistics ever 5 seconds. |
Len Brown | 103a8fe | 2010-10-22 23:53:03 -0400 | [diff] [blame] | 82 | (override interval with "-i sec" option, or specify a command |
| 83 | for turbostat to fork). |
| 84 | |
Len Brown | e23da03 | 2012-02-06 18:37:16 -0500 | [diff] [blame] | 85 | The first row of statistics is a summary for the entire system. |
Len Brown | 889facb | 2012-11-08 00:48:57 -0500 | [diff] [blame] | 86 | For residency % columns, the summary is a weighted average. |
| 87 | For Temperature columns, the summary is the column maximum. |
| 88 | For Watts columns, the summary is a system total. |
Len Brown | 103a8fe | 2010-10-22 23:53:03 -0400 | [diff] [blame] | 89 | Subsequent rows show per-CPU statistics. |
| 90 | |
| 91 | .nf |
Len Brown | fc04cc6 | 2014-02-06 00:55:19 -0500 | [diff] [blame] | 92 | [root@ivy]# ./turbostat |
| 93 | Core CPU Avg_MHz %Busy Bzy_MHz TSC_MHz SMI CPU%c1 CPU%c3 CPU%c6 CPU%c7 CoreTmp PkgTmp Pkg%pc2 Pkg%pc3 Pkg%pc6 Pkg%pc7 PkgWatt CorWatt GFXWatt |
| 94 | - - 6 0.36 1596 3492 0 0.59 0.01 99.04 0.00 23 24 23.82 0.01 72.47 0.00 6.40 1.01 0.00 |
| 95 | 0 0 9 0.58 1596 3492 0 0.28 0.01 99.13 0.00 23 24 23.82 0.01 72.47 0.00 6.40 1.01 0.00 |
| 96 | 0 4 1 0.07 1596 3492 0 0.79 |
| 97 | 1 1 10 0.65 1596 3492 0 0.59 0.00 98.76 0.00 23 |
| 98 | 1 5 5 0.28 1596 3492 0 0.95 |
| 99 | 2 2 10 0.66 1596 3492 0 0.41 0.01 98.92 0.00 23 |
| 100 | 2 6 2 0.10 1597 3492 0 0.97 |
| 101 | 3 3 3 0.20 1596 3492 0 0.44 0.00 99.37 0.00 23 |
| 102 | 3 7 5 0.31 1596 3492 0 0.33 |
Len Brown | 103a8fe | 2010-10-22 23:53:03 -0400 | [diff] [blame] | 103 | .fi |
Len Brown | d8af6f5 | 2015-02-10 01:56:38 -0500 | [diff] [blame] | 104 | .SH DEBUG EXAMPLE |
| 105 | The "--debug" option prints additional system information before measurements: |
Len Brown | 103a8fe | 2010-10-22 23:53:03 -0400 | [diff] [blame] | 106 | |
| 107 | .nf |
Len Brown | d8af6f5 | 2015-02-10 01:56:38 -0500 | [diff] [blame] | 108 | turbostat version 4.0 10-Feb, 2015 - Len Brown <lenb@kernel.org> |
Len Brown | 889facb | 2012-11-08 00:48:57 -0500 | [diff] [blame] | 109 | CPUID(0): GenuineIntel 13 CPUID levels; family:model:stepping 0x6:3a:9 (6:58:9) |
| 110 | CPUID(6): APERF, DTS, PTM, EPB |
Len Brown | d8af6f5 | 2015-02-10 01:56:38 -0500 | [diff] [blame] | 111 | RAPL: 851 sec. Joule Counter Range, at 77 Watts |
Len Brown | 889facb | 2012-11-08 00:48:57 -0500 | [diff] [blame] | 112 | cpu0: MSR_NHM_PLATFORM_INFO: 0x81010f0012300 |
| 113 | 16 * 100 = 1600 MHz max efficiency |
| 114 | 35 * 100 = 3500 MHz TSC frequency |
Len Brown | d8af6f5 | 2015-02-10 01:56:38 -0500 | [diff] [blame] | 115 | cpu0: MSR_IA32_POWER_CTL: 0x0014005d (C1E auto-promotion: DISabled) |
| 116 | cpu0: MSR_NHM_SNB_PKG_CST_CFG_CTL: 0x1e008402 (UNdemote-C3, UNdemote-C1, demote-C3, demote-C1, locked: pkg-cstate-limit=2: pc6n) |
Len Brown | 889facb | 2012-11-08 00:48:57 -0500 | [diff] [blame] | 117 | cpu0: MSR_NHM_TURBO_RATIO_LIMIT: 0x25262727 |
| 118 | 37 * 100 = 3700 MHz max turbo 4 active cores |
| 119 | 38 * 100 = 3800 MHz max turbo 3 active cores |
| 120 | 39 * 100 = 3900 MHz max turbo 2 active cores |
| 121 | 39 * 100 = 3900 MHz max turbo 1 active cores |
| 122 | cpu0: MSR_IA32_ENERGY_PERF_BIAS: 0x00000006 (balanced) |
| 123 | cpu0: MSR_RAPL_POWER_UNIT: 0x000a1003 (0.125000 Watts, 0.000015 Joules, 0.000977 sec.) |
| 124 | cpu0: MSR_PKG_POWER_INFO: 0x01e00268 (77 W TDP, RAPL 60 - 0 W, 0.000000 sec.) |
Len Brown | d8af6f5 | 2015-02-10 01:56:38 -0500 | [diff] [blame] | 125 | cpu0: MSR_PKG_POWER_LIMIT: 0x30000148268 (UNlocked) |
Len Brown | 889facb | 2012-11-08 00:48:57 -0500 | [diff] [blame] | 126 | cpu0: PKG Limit #1: ENabled (77.000000 Watts, 1.000000 sec, clamp DISabled) |
Len Brown | d8af6f5 | 2015-02-10 01:56:38 -0500 | [diff] [blame] | 127 | cpu0: PKG Limit #2: DISabled (96.000000 Watts, 0.000977* sec, clamp DISabled) |
Len Brown | 889facb | 2012-11-08 00:48:57 -0500 | [diff] [blame] | 128 | cpu0: MSR_PP0_POLICY: 0 |
| 129 | cpu0: MSR_PP0_POWER_LIMIT: 0x00000000 (UNlocked) |
| 130 | cpu0: Cores Limit: DISabled (0.000000 Watts, 0.000977 sec, clamp DISabled) |
| 131 | cpu0: MSR_PP1_POLICY: 0 |
| 132 | cpu0: MSR_PP1_POWER_LIMIT: 0x00000000 (UNlocked) |
| 133 | cpu0: GFX Limit: DISabled (0.000000 Watts, 0.000977 sec, clamp DISabled) |
| 134 | cpu0: MSR_IA32_TEMPERATURE_TARGET: 0x00691400 (105 C) |
| 135 | cpu0: MSR_IA32_PACKAGE_THERM_STATUS: 0x884e0000 (27 C) |
Len Brown | d8af6f5 | 2015-02-10 01:56:38 -0500 | [diff] [blame] | 136 | cpu0: MSR_IA32_THERM_STATUS: 0x88580000 (17 C +/- 1) |
| 137 | cpu1: MSR_IA32_THERM_STATUS: 0x885a0000 (15 C +/- 1) |
| 138 | cpu2: MSR_IA32_THERM_STATUS: 0x88570000 (18 C +/- 1) |
Len Brown | 889facb | 2012-11-08 00:48:57 -0500 | [diff] [blame] | 139 | cpu3: MSR_IA32_THERM_STATUS: 0x884e0000 (27 C +/- 1) |
| 140 | ... |
Len Brown | 103a8fe | 2010-10-22 23:53:03 -0400 | [diff] [blame] | 141 | .fi |
| 142 | The \fBmax efficiency\fP frequency, a.k.a. Low Frequency Mode, is the frequency |
Len Brown | a729617 | 2015-01-23 01:33:58 -0500 | [diff] [blame] | 143 | available at the minimum package voltage. The \fBTSC frequency\fP is the base |
| 144 | frequency of the processor -- this should match the brand string |
| 145 | in /proc/cpuinfo. This base frequency |
Len Brown | 103a8fe | 2010-10-22 23:53:03 -0400 | [diff] [blame] | 146 | should be sustainable on all CPUs indefinitely, given nominal power and cooling. |
| 147 | The remaining rows show what maximum turbo frequency is possible |
Len Brown | a729617 | 2015-01-23 01:33:58 -0500 | [diff] [blame] | 148 | depending on the number of idle cores. Note that not all information is |
| 149 | available on all processors. |
Len Brown | 103a8fe | 2010-10-22 23:53:03 -0400 | [diff] [blame] | 150 | .SH FORK EXAMPLE |
| 151 | If turbostat is invoked with a command, it will fork that command |
| 152 | and output the statistics gathered when the command exits. |
| 153 | eg. Here a cycle soaker is run on 1 CPU (see %c0) for a few seconds |
| 154 | until ^C while the other CPUs are mostly idle: |
| 155 | |
| 156 | .nf |
Len Brown | fc04cc6 | 2014-02-06 00:55:19 -0500 | [diff] [blame] | 157 | root@ivy: turbostat cat /dev/zero > /dev/null |
Len Brown | e23da03 | 2012-02-06 18:37:16 -0500 | [diff] [blame] | 158 | ^C |
Len Brown | fc04cc6 | 2014-02-06 00:55:19 -0500 | [diff] [blame] | 159 | Core CPU Avg_MHz %Busy Bzy_MHz TSC_MHz SMI CPU%c1 CPU%c3 CPU%c6 CPU%c7 CoreTmp PkgTmp Pkg%pc2 Pkg%pc3 Pkg%pc6 Pkg%pc7 PkgWatt CorWatt GFXWatt |
| 160 | - - 496 12.75 3886 3492 0 13.16 0.04 74.04 0.00 36 36 0.00 0.00 0.00 0.00 23.15 17.65 0.00 |
| 161 | 0 0 22 0.57 3830 3492 0 0.83 0.02 98.59 0.00 27 36 0.00 0.00 0.00 0.00 23.15 17.65 0.00 |
| 162 | 0 4 9 0.24 3829 3492 0 1.15 |
| 163 | 1 1 4 0.09 3783 3492 0 99.91 0.00 0.00 0.00 36 |
| 164 | 1 5 3880 99.82 3888 3492 0 0.18 |
| 165 | 2 2 17 0.44 3813 3492 0 0.77 0.04 98.75 0.00 28 |
| 166 | 2 6 12 0.32 3823 3492 0 0.89 |
| 167 | 3 3 16 0.43 3844 3492 0 0.63 0.11 98.84 0.00 30 |
| 168 | 3 7 4 0.11 3827 3492 0 0.94 |
| 169 | 30.372243 sec |
| 170 | |
Len Brown | 103a8fe | 2010-10-22 23:53:03 -0400 | [diff] [blame] | 171 | .fi |
Len Brown | fc04cc6 | 2014-02-06 00:55:19 -0500 | [diff] [blame] | 172 | Above the cycle soaker drives cpu5 up its 3.8 GHz turbo limit |
Len Brown | 103a8fe | 2010-10-22 23:53:03 -0400 | [diff] [blame] | 173 | while the other processors are generally in various states of idle. |
| 174 | |
Len Brown | fc04cc6 | 2014-02-06 00:55:19 -0500 | [diff] [blame] | 175 | Note that cpu1 and cpu5 are HT siblings within core1. |
| 176 | As cpu5 is very busy, it prevents its sibling, cpu1, |
Len Brown | c98d5d9 | 2012-06-04 00:56:40 -0400 | [diff] [blame] | 177 | from entering a c-state deeper than c1. |
Len Brown | 103a8fe | 2010-10-22 23:53:03 -0400 | [diff] [blame] | 178 | |
Len Brown | fc04cc6 | 2014-02-06 00:55:19 -0500 | [diff] [blame] | 179 | Note that the Avg_MHz column reflects the total number of cycles executed |
| 180 | divided by the measurement interval. If the %Busy column is 100%, |
| 181 | then the processor was running at that speed the entire interval. |
| 182 | The Avg_MHz multiplied by the %Busy results in the Bzy_MHz -- |
| 183 | which is the average frequency while the processor was executing -- |
| 184 | not including any non-busy idle time. |
| 185 | |
Len Brown | 103a8fe | 2010-10-22 23:53:03 -0400 | [diff] [blame] | 186 | .SH NOTES |
| 187 | |
| 188 | .B "turbostat " |
| 189 | must be run as root. |
Len Brown | a729617 | 2015-01-23 01:33:58 -0500 | [diff] [blame] | 190 | Alternatively, non-root users can be enabled to run turbostat this way: |
| 191 | |
| 192 | # setcap cap_sys_rawio=ep ./turbostat |
| 193 | |
| 194 | # chmod +r /dev/cpu/*/msr |
Len Brown | 103a8fe | 2010-10-22 23:53:03 -0400 | [diff] [blame] | 195 | |
| 196 | .B "turbostat " |
| 197 | reads hardware counters, but doesn't write them. |
| 198 | So it will not interfere with the OS or other programs, including |
| 199 | multiple invocations of itself. |
| 200 | |
| 201 | \fBturbostat \fP |
| 202 | may work poorly on Linux-2.6.20 through 2.6.29, |
Len Brown | a729617 | 2015-01-23 01:33:58 -0500 | [diff] [blame] | 203 | as \fBacpi-cpufreq \fPperiodically cleared the APERF and MPERF MSRs |
Len Brown | 103a8fe | 2010-10-22 23:53:03 -0400 | [diff] [blame] | 204 | in those kernels. |
| 205 | |
Len Brown | a729617 | 2015-01-23 01:33:58 -0500 | [diff] [blame] | 206 | AVG_MHz = APERF_delta/measurement_interval. This is the actual |
| 207 | number of elapsed cycles divided by the entire sample interval -- |
Len Brown | d8af6f5 | 2015-02-10 01:56:38 -0500 | [diff] [blame] | 208 | including idle time. Note that this calculation is resilient |
Len Brown | a729617 | 2015-01-23 01:33:58 -0500 | [diff] [blame] | 209 | to systems lacking a non-stop TSC. |
| 210 | |
| 211 | TSC_MHz = TSC_delta/measurement_interval. |
| 212 | On a system with an invariant TSC, this value will be constant |
| 213 | and will closely match the base frequency value shown |
| 214 | in the brand string in /proc/cpuinfo. On a system where |
| 215 | the TSC stops in idle, TSC_MHz will drop |
| 216 | below the processor's base frequency. |
| 217 | |
| 218 | %Busy = MPERF_delta/TSC_delta |
| 219 | |
| 220 | Bzy_MHz = TSC_delta/APERF_delta/MPERF_delta/measurement_interval |
| 221 | |
| 222 | Note that these calculations depend on TSC_delta, so they |
| 223 | are not reliable during intervals when TSC_MHz is not running at the base frequency. |
| 224 | |
| 225 | Turbostat data collection is not atomic. |
| 226 | Extremely short measurement intervals (much less than 1 second), |
| 227 | or system activity that prevents turbostat from being able |
| 228 | to run on all CPUS to quickly collect data, will result in |
| 229 | inconsistent results. |
Len Brown | 2f32edf | 2012-09-21 23:45:46 -0400 | [diff] [blame] | 230 | |
Len Brown | 103a8fe | 2010-10-22 23:53:03 -0400 | [diff] [blame] | 231 | The APERF, MPERF MSRs are defined to count non-halted cycles. |
| 232 | Although it is not guaranteed by the architecture, turbostat assumes |
| 233 | that they count at TSC rate, which is true on all processors tested to date. |
| 234 | |
| 235 | .SH REFERENCES |
| 236 | "Intel® Turbo Boost Technology |
| 237 | in Intel® Core™ Microarchitecture (Nehalem) Based Processors" |
| 238 | http://download.intel.com/design/processor/applnots/320354.pdf |
| 239 | |
| 240 | "Intel® 64 and IA-32 Architectures Software Developer's Manual |
| 241 | Volume 3B: System Programming Guide" |
| 242 | http://www.intel.com/products/processor/manuals/ |
| 243 | |
| 244 | .SH FILES |
| 245 | .ta |
| 246 | .nf |
| 247 | /dev/cpu/*/msr |
| 248 | .fi |
| 249 | |
| 250 | .SH "SEE ALSO" |
| 251 | msr(4), vmstat(8) |
| 252 | .PP |
Len Brown | e23da03 | 2012-02-06 18:37:16 -0500 | [diff] [blame] | 253 | .SH AUTHOR |
Len Brown | 103a8fe | 2010-10-22 23:53:03 -0400 | [diff] [blame] | 254 | .nf |
| 255 | Written by Len Brown <len.brown@intel.com> |