Kukjin Kim | cc511b8 | 2011-12-27 08:18:36 +0100 | [diff] [blame] | 1 | /* |
| 2 | * Copyright (c) 2010-2011 Samsung Electronics Co., Ltd. |
| 3 | * http://www.samsung.com |
| 4 | * |
| 5 | * Common Codes for EXYNOS |
| 6 | * |
| 7 | * This program is free software; you can redistribute it and/or modify |
| 8 | * it under the terms of the GNU General Public License version 2 as |
| 9 | * published by the Free Software Foundation. |
| 10 | */ |
| 11 | |
| 12 | #include <linux/kernel.h> |
| 13 | #include <linux/interrupt.h> |
| 14 | #include <linux/irq.h> |
| 15 | #include <linux/io.h> |
Linus Torvalds | 7affca3 | 2012-01-07 12:03:30 -0800 | [diff] [blame] | 16 | #include <linux/device.h> |
Kukjin Kim | cc511b8 | 2011-12-27 08:18:36 +0100 | [diff] [blame] | 17 | #include <linux/gpio.h> |
| 18 | #include <linux/sched.h> |
| 19 | #include <linux/serial_core.h> |
Arnd Bergmann | 237c78b | 2012-01-07 12:30:20 +0000 | [diff] [blame] | 20 | #include <linux/of.h> |
Doug Anderson | 5b7897d | 2012-11-27 11:53:14 -0800 | [diff] [blame] | 21 | #include <linux/of_fdt.h> |
Arnd Bergmann | 237c78b | 2012-01-07 12:30:20 +0000 | [diff] [blame] | 22 | #include <linux/of_irq.h> |
Thomas Abraham | 1e60bc0 | 2012-05-15 16:18:35 +0900 | [diff] [blame] | 23 | #include <linux/export.h> |
| 24 | #include <linux/irqdomain.h> |
Rob Herring | 0529e315 | 2012-11-05 16:18:28 -0600 | [diff] [blame] | 25 | #include <linux/irqchip.h> |
Thomas Abraham | e873a47 | 2012-05-15 16:25:23 +0900 | [diff] [blame] | 26 | #include <linux/of_address.h> |
Rob Herring | 520f7bd | 2012-12-27 13:10:24 -0600 | [diff] [blame^] | 27 | #include <linux/irqchip/arm-gic.h> |
Kukjin Kim | cc511b8 | 2011-12-27 08:18:36 +0100 | [diff] [blame] | 28 | |
| 29 | #include <asm/proc-fns.h> |
Arnd Bergmann | 40ba95f | 2012-01-07 11:51:28 +0000 | [diff] [blame] | 30 | #include <asm/exception.h> |
Kukjin Kim | cc511b8 | 2011-12-27 08:18:36 +0100 | [diff] [blame] | 31 | #include <asm/hardware/cache-l2x0.h> |
Kukjin Kim | cc511b8 | 2011-12-27 08:18:36 +0100 | [diff] [blame] | 32 | #include <asm/mach/map.h> |
| 33 | #include <asm/mach/irq.h> |
Amit Daniel Kachhap | b756a50 | 2012-03-08 02:07:41 -0800 | [diff] [blame] | 34 | #include <asm/cacheflush.h> |
Kukjin Kim | cc511b8 | 2011-12-27 08:18:36 +0100 | [diff] [blame] | 35 | |
| 36 | #include <mach/regs-irq.h> |
| 37 | #include <mach/regs-pmu.h> |
| 38 | #include <mach/regs-gpio.h> |
Amit Daniel Kachhap | b756a50 | 2012-03-08 02:07:41 -0800 | [diff] [blame] | 39 | #include <mach/pmu.h> |
Kukjin Kim | cc511b8 | 2011-12-27 08:18:36 +0100 | [diff] [blame] | 40 | |
| 41 | #include <plat/cpu.h> |
| 42 | #include <plat/clock.h> |
| 43 | #include <plat/devs.h> |
| 44 | #include <plat/pm.h> |
Kukjin Kim | cc511b8 | 2011-12-27 08:18:36 +0100 | [diff] [blame] | 45 | #include <plat/sdhci.h> |
| 46 | #include <plat/gpio-cfg.h> |
| 47 | #include <plat/adc-core.h> |
| 48 | #include <plat/fb-core.h> |
| 49 | #include <plat/fimc-core.h> |
| 50 | #include <plat/iic-core.h> |
| 51 | #include <plat/tv-core.h> |
Heiko Stuebner | 308b3af | 2012-10-17 16:47:11 +0900 | [diff] [blame] | 52 | #include <plat/spi-core.h> |
Kukjin Kim | cc511b8 | 2011-12-27 08:18:36 +0100 | [diff] [blame] | 53 | #include <plat/regs-serial.h> |
| 54 | |
| 55 | #include "common.h" |
Amit Daniel Kachhap | 6cdeddc | 2012-03-08 02:09:12 -0800 | [diff] [blame] | 56 | #define L2_AUX_VAL 0x7C470001 |
| 57 | #define L2_AUX_MASK 0xC200ffff |
Kukjin Kim | cc511b8 | 2011-12-27 08:18:36 +0100 | [diff] [blame] | 58 | |
Kukjin Kim | cc511b8 | 2011-12-27 08:18:36 +0100 | [diff] [blame] | 59 | static const char name_exynos4210[] = "EXYNOS4210"; |
| 60 | static const char name_exynos4212[] = "EXYNOS4212"; |
| 61 | static const char name_exynos4412[] = "EXYNOS4412"; |
Kukjin Kim | 94c7ca7 | 2012-02-11 22:15:45 +0900 | [diff] [blame] | 62 | static const char name_exynos5250[] = "EXYNOS5250"; |
Kukjin Kim | 2edb36c | 2012-11-15 15:48:56 +0900 | [diff] [blame] | 63 | static const char name_exynos5440[] = "EXYNOS5440"; |
Kukjin Kim | cc511b8 | 2011-12-27 08:18:36 +0100 | [diff] [blame] | 64 | |
Kukjin Kim | 906c789 | 2012-02-11 21:27:08 +0900 | [diff] [blame] | 65 | static void exynos4_map_io(void); |
Kukjin Kim | 94c7ca7 | 2012-02-11 22:15:45 +0900 | [diff] [blame] | 66 | static void exynos5_map_io(void); |
Kukjin Kim | 2edb36c | 2012-11-15 15:48:56 +0900 | [diff] [blame] | 67 | static void exynos5440_map_io(void); |
Kukjin Kim | 906c789 | 2012-02-11 21:27:08 +0900 | [diff] [blame] | 68 | static void exynos4_init_clocks(int xtal); |
Kukjin Kim | 94c7ca7 | 2012-02-11 22:15:45 +0900 | [diff] [blame] | 69 | static void exynos5_init_clocks(int xtal); |
Thomas Abraham | 55b6ef7 | 2012-10-29 19:46:49 +0900 | [diff] [blame] | 70 | static void exynos4_init_uarts(struct s3c2410_uartcfg *cfg, int no); |
Kukjin Kim | 906c789 | 2012-02-11 21:27:08 +0900 | [diff] [blame] | 71 | static int exynos_init(void); |
Kukjin Kim | cc511b8 | 2011-12-27 08:18:36 +0100 | [diff] [blame] | 72 | |
| 73 | static struct cpu_table cpu_ids[] __initdata = { |
| 74 | { |
| 75 | .idcode = EXYNOS4210_CPU_ID, |
| 76 | .idmask = EXYNOS4_CPU_MASK, |
| 77 | .map_io = exynos4_map_io, |
| 78 | .init_clocks = exynos4_init_clocks, |
Thomas Abraham | 55b6ef7 | 2012-10-29 19:46:49 +0900 | [diff] [blame] | 79 | .init_uarts = exynos4_init_uarts, |
Kukjin Kim | cc511b8 | 2011-12-27 08:18:36 +0100 | [diff] [blame] | 80 | .init = exynos_init, |
| 81 | .name = name_exynos4210, |
| 82 | }, { |
| 83 | .idcode = EXYNOS4212_CPU_ID, |
| 84 | .idmask = EXYNOS4_CPU_MASK, |
| 85 | .map_io = exynos4_map_io, |
| 86 | .init_clocks = exynos4_init_clocks, |
Thomas Abraham | 55b6ef7 | 2012-10-29 19:46:49 +0900 | [diff] [blame] | 87 | .init_uarts = exynos4_init_uarts, |
Kukjin Kim | cc511b8 | 2011-12-27 08:18:36 +0100 | [diff] [blame] | 88 | .init = exynos_init, |
| 89 | .name = name_exynos4212, |
| 90 | }, { |
| 91 | .idcode = EXYNOS4412_CPU_ID, |
| 92 | .idmask = EXYNOS4_CPU_MASK, |
| 93 | .map_io = exynos4_map_io, |
| 94 | .init_clocks = exynos4_init_clocks, |
Thomas Abraham | 55b6ef7 | 2012-10-29 19:46:49 +0900 | [diff] [blame] | 95 | .init_uarts = exynos4_init_uarts, |
Kukjin Kim | cc511b8 | 2011-12-27 08:18:36 +0100 | [diff] [blame] | 96 | .init = exynos_init, |
| 97 | .name = name_exynos4412, |
Kukjin Kim | 94c7ca7 | 2012-02-11 22:15:45 +0900 | [diff] [blame] | 98 | }, { |
| 99 | .idcode = EXYNOS5250_SOC_ID, |
| 100 | .idmask = EXYNOS5_SOC_MASK, |
| 101 | .map_io = exynos5_map_io, |
| 102 | .init_clocks = exynos5_init_clocks, |
Kukjin Kim | 94c7ca7 | 2012-02-11 22:15:45 +0900 | [diff] [blame] | 103 | .init = exynos_init, |
| 104 | .name = name_exynos5250, |
Kukjin Kim | 2edb36c | 2012-11-15 15:48:56 +0900 | [diff] [blame] | 105 | }, { |
| 106 | .idcode = EXYNOS5440_SOC_ID, |
| 107 | .idmask = EXYNOS5_SOC_MASK, |
| 108 | .map_io = exynos5440_map_io, |
| 109 | .init = exynos_init, |
| 110 | .name = name_exynos5440, |
Kukjin Kim | cc511b8 | 2011-12-27 08:18:36 +0100 | [diff] [blame] | 111 | }, |
| 112 | }; |
| 113 | |
| 114 | /* Initial IO mappings */ |
| 115 | |
| 116 | static struct map_desc exynos_iodesc[] __initdata = { |
| 117 | { |
| 118 | .virtual = (unsigned long)S5P_VA_CHIPID, |
Kukjin Kim | 94c7ca7 | 2012-02-11 22:15:45 +0900 | [diff] [blame] | 119 | .pfn = __phys_to_pfn(EXYNOS_PA_CHIPID), |
Kukjin Kim | cc511b8 | 2011-12-27 08:18:36 +0100 | [diff] [blame] | 120 | .length = SZ_4K, |
| 121 | .type = MT_DEVICE, |
Kukjin Kim | 94c7ca7 | 2012-02-11 22:15:45 +0900 | [diff] [blame] | 122 | }, |
| 123 | }; |
| 124 | |
Doug Anderson | 5b7897d | 2012-11-27 11:53:14 -0800 | [diff] [blame] | 125 | #ifdef CONFIG_ARCH_EXYNOS5 |
Kukjin Kim | 2edb36c | 2012-11-15 15:48:56 +0900 | [diff] [blame] | 126 | static struct map_desc exynos5440_iodesc[] __initdata = { |
| 127 | { |
| 128 | .virtual = (unsigned long)S5P_VA_CHIPID, |
| 129 | .pfn = __phys_to_pfn(EXYNOS5440_PA_CHIPID), |
| 130 | .length = SZ_4K, |
| 131 | .type = MT_DEVICE, |
| 132 | }, |
| 133 | }; |
Doug Anderson | 5b7897d | 2012-11-27 11:53:14 -0800 | [diff] [blame] | 134 | #endif |
Kukjin Kim | 2edb36c | 2012-11-15 15:48:56 +0900 | [diff] [blame] | 135 | |
Kukjin Kim | 94c7ca7 | 2012-02-11 22:15:45 +0900 | [diff] [blame] | 136 | static struct map_desc exynos4_iodesc[] __initdata = { |
| 137 | { |
Kukjin Kim | cc511b8 | 2011-12-27 08:18:36 +0100 | [diff] [blame] | 138 | .virtual = (unsigned long)S3C_VA_SYS, |
| 139 | .pfn = __phys_to_pfn(EXYNOS4_PA_SYSCON), |
| 140 | .length = SZ_64K, |
| 141 | .type = MT_DEVICE, |
| 142 | }, { |
| 143 | .virtual = (unsigned long)S3C_VA_TIMER, |
| 144 | .pfn = __phys_to_pfn(EXYNOS4_PA_TIMER), |
| 145 | .length = SZ_16K, |
| 146 | .type = MT_DEVICE, |
| 147 | }, { |
| 148 | .virtual = (unsigned long)S3C_VA_WATCHDOG, |
| 149 | .pfn = __phys_to_pfn(EXYNOS4_PA_WATCHDOG), |
| 150 | .length = SZ_4K, |
| 151 | .type = MT_DEVICE, |
| 152 | }, { |
| 153 | .virtual = (unsigned long)S5P_VA_SROMC, |
| 154 | .pfn = __phys_to_pfn(EXYNOS4_PA_SROMC), |
| 155 | .length = SZ_4K, |
| 156 | .type = MT_DEVICE, |
| 157 | }, { |
| 158 | .virtual = (unsigned long)S5P_VA_SYSTIMER, |
| 159 | .pfn = __phys_to_pfn(EXYNOS4_PA_SYSTIMER), |
| 160 | .length = SZ_4K, |
| 161 | .type = MT_DEVICE, |
| 162 | }, { |
| 163 | .virtual = (unsigned long)S5P_VA_PMU, |
| 164 | .pfn = __phys_to_pfn(EXYNOS4_PA_PMU), |
| 165 | .length = SZ_64K, |
| 166 | .type = MT_DEVICE, |
| 167 | }, { |
| 168 | .virtual = (unsigned long)S5P_VA_COMBINER_BASE, |
| 169 | .pfn = __phys_to_pfn(EXYNOS4_PA_COMBINER), |
| 170 | .length = SZ_4K, |
| 171 | .type = MT_DEVICE, |
| 172 | }, { |
| 173 | .virtual = (unsigned long)S5P_VA_GIC_CPU, |
| 174 | .pfn = __phys_to_pfn(EXYNOS4_PA_GIC_CPU), |
| 175 | .length = SZ_64K, |
| 176 | .type = MT_DEVICE, |
| 177 | }, { |
| 178 | .virtual = (unsigned long)S5P_VA_GIC_DIST, |
| 179 | .pfn = __phys_to_pfn(EXYNOS4_PA_GIC_DIST), |
| 180 | .length = SZ_64K, |
| 181 | .type = MT_DEVICE, |
| 182 | }, { |
| 183 | .virtual = (unsigned long)S3C_VA_UART, |
| 184 | .pfn = __phys_to_pfn(EXYNOS4_PA_UART), |
| 185 | .length = SZ_512K, |
| 186 | .type = MT_DEVICE, |
Kukjin Kim | 94c7ca7 | 2012-02-11 22:15:45 +0900 | [diff] [blame] | 187 | }, { |
Kukjin Kim | cc511b8 | 2011-12-27 08:18:36 +0100 | [diff] [blame] | 188 | .virtual = (unsigned long)S5P_VA_CMU, |
| 189 | .pfn = __phys_to_pfn(EXYNOS4_PA_CMU), |
| 190 | .length = SZ_128K, |
| 191 | .type = MT_DEVICE, |
| 192 | }, { |
| 193 | .virtual = (unsigned long)S5P_VA_COREPERI_BASE, |
| 194 | .pfn = __phys_to_pfn(EXYNOS4_PA_COREPERI), |
| 195 | .length = SZ_8K, |
| 196 | .type = MT_DEVICE, |
| 197 | }, { |
| 198 | .virtual = (unsigned long)S5P_VA_L2CC, |
| 199 | .pfn = __phys_to_pfn(EXYNOS4_PA_L2CC), |
| 200 | .length = SZ_4K, |
| 201 | .type = MT_DEVICE, |
| 202 | }, { |
Kukjin Kim | cc511b8 | 2011-12-27 08:18:36 +0100 | [diff] [blame] | 203 | .virtual = (unsigned long)S5P_VA_DMC0, |
| 204 | .pfn = __phys_to_pfn(EXYNOS4_PA_DMC0), |
MyungJoo Ham | 2bde0b0 | 2011-12-01 15:12:30 +0900 | [diff] [blame] | 205 | .length = SZ_64K, |
| 206 | .type = MT_DEVICE, |
| 207 | }, { |
| 208 | .virtual = (unsigned long)S5P_VA_DMC1, |
| 209 | .pfn = __phys_to_pfn(EXYNOS4_PA_DMC1), |
| 210 | .length = SZ_64K, |
Kukjin Kim | cc511b8 | 2011-12-27 08:18:36 +0100 | [diff] [blame] | 211 | .type = MT_DEVICE, |
| 212 | }, { |
Kukjin Kim | cc511b8 | 2011-12-27 08:18:36 +0100 | [diff] [blame] | 213 | .virtual = (unsigned long)S3C_VA_USB_HSPHY, |
| 214 | .pfn = __phys_to_pfn(EXYNOS4_PA_HSPHY), |
| 215 | .length = SZ_4K, |
| 216 | .type = MT_DEVICE, |
| 217 | }, |
| 218 | }; |
| 219 | |
| 220 | static struct map_desc exynos4_iodesc0[] __initdata = { |
| 221 | { |
| 222 | .virtual = (unsigned long)S5P_VA_SYSRAM, |
| 223 | .pfn = __phys_to_pfn(EXYNOS4_PA_SYSRAM0), |
| 224 | .length = SZ_4K, |
| 225 | .type = MT_DEVICE, |
| 226 | }, |
| 227 | }; |
| 228 | |
| 229 | static struct map_desc exynos4_iodesc1[] __initdata = { |
| 230 | { |
| 231 | .virtual = (unsigned long)S5P_VA_SYSRAM, |
| 232 | .pfn = __phys_to_pfn(EXYNOS4_PA_SYSRAM1), |
| 233 | .length = SZ_4K, |
| 234 | .type = MT_DEVICE, |
| 235 | }, |
| 236 | }; |
| 237 | |
Kukjin Kim | 94c7ca7 | 2012-02-11 22:15:45 +0900 | [diff] [blame] | 238 | static struct map_desc exynos5_iodesc[] __initdata = { |
| 239 | { |
| 240 | .virtual = (unsigned long)S3C_VA_SYS, |
| 241 | .pfn = __phys_to_pfn(EXYNOS5_PA_SYSCON), |
| 242 | .length = SZ_64K, |
| 243 | .type = MT_DEVICE, |
| 244 | }, { |
| 245 | .virtual = (unsigned long)S3C_VA_TIMER, |
| 246 | .pfn = __phys_to_pfn(EXYNOS5_PA_TIMER), |
| 247 | .length = SZ_16K, |
| 248 | .type = MT_DEVICE, |
| 249 | }, { |
| 250 | .virtual = (unsigned long)S3C_VA_WATCHDOG, |
| 251 | .pfn = __phys_to_pfn(EXYNOS5_PA_WATCHDOG), |
| 252 | .length = SZ_4K, |
| 253 | .type = MT_DEVICE, |
| 254 | }, { |
| 255 | .virtual = (unsigned long)S5P_VA_SROMC, |
| 256 | .pfn = __phys_to_pfn(EXYNOS5_PA_SROMC), |
| 257 | .length = SZ_4K, |
| 258 | .type = MT_DEVICE, |
| 259 | }, { |
| 260 | .virtual = (unsigned long)S5P_VA_SYSTIMER, |
| 261 | .pfn = __phys_to_pfn(EXYNOS5_PA_SYSTIMER), |
| 262 | .length = SZ_4K, |
| 263 | .type = MT_DEVICE, |
| 264 | }, { |
| 265 | .virtual = (unsigned long)S5P_VA_SYSRAM, |
| 266 | .pfn = __phys_to_pfn(EXYNOS5_PA_SYSRAM), |
| 267 | .length = SZ_4K, |
| 268 | .type = MT_DEVICE, |
| 269 | }, { |
| 270 | .virtual = (unsigned long)S5P_VA_CMU, |
| 271 | .pfn = __phys_to_pfn(EXYNOS5_PA_CMU), |
| 272 | .length = 144 * SZ_1K, |
| 273 | .type = MT_DEVICE, |
| 274 | }, { |
| 275 | .virtual = (unsigned long)S5P_VA_PMU, |
| 276 | .pfn = __phys_to_pfn(EXYNOS5_PA_PMU), |
| 277 | .length = SZ_64K, |
| 278 | .type = MT_DEVICE, |
| 279 | }, { |
Kukjin Kim | 94c7ca7 | 2012-02-11 22:15:45 +0900 | [diff] [blame] | 280 | .virtual = (unsigned long)S3C_VA_UART, |
| 281 | .pfn = __phys_to_pfn(EXYNOS5_PA_UART), |
| 282 | .length = SZ_512K, |
| 283 | .type = MT_DEVICE, |
Kukjin Kim | 94c7ca7 | 2012-02-11 22:15:45 +0900 | [diff] [blame] | 284 | }, |
| 285 | }; |
| 286 | |
Kukjin Kim | 2edb36c | 2012-11-15 15:48:56 +0900 | [diff] [blame] | 287 | static struct map_desc exynos5440_iodesc0[] __initdata = { |
| 288 | { |
| 289 | .virtual = (unsigned long)S3C_VA_UART, |
| 290 | .pfn = __phys_to_pfn(EXYNOS5440_PA_UART0), |
| 291 | .length = SZ_512K, |
| 292 | .type = MT_DEVICE, |
| 293 | }, |
| 294 | }; |
| 295 | |
Russell King | 9eb4859 | 2012-01-03 11:56:53 +0100 | [diff] [blame] | 296 | void exynos4_restart(char mode, const char *cmd) |
Kukjin Kim | cc511b8 | 2011-12-27 08:18:36 +0100 | [diff] [blame] | 297 | { |
| 298 | __raw_writel(0x1, S5P_SWRESET); |
| 299 | } |
| 300 | |
Kukjin Kim | 94c7ca7 | 2012-02-11 22:15:45 +0900 | [diff] [blame] | 301 | void exynos5_restart(char mode, const char *cmd) |
| 302 | { |
Kukjin Kim | 2edb36c | 2012-11-15 15:48:56 +0900 | [diff] [blame] | 303 | u32 val; |
| 304 | void __iomem *addr; |
| 305 | |
| 306 | if (of_machine_is_compatible("samsung,exynos5250")) { |
| 307 | val = 0x1; |
| 308 | addr = EXYNOS_SWRESET; |
| 309 | } else if (of_machine_is_compatible("samsung,exynos5440")) { |
| 310 | val = (0x10 << 20) | (0x1 << 16); |
| 311 | addr = EXYNOS5440_SWRESET; |
| 312 | } else { |
| 313 | pr_err("%s: cannot support non-DT\n", __func__); |
| 314 | return; |
| 315 | } |
| 316 | |
| 317 | __raw_writel(val, addr); |
Kukjin Kim | 94c7ca7 | 2012-02-11 22:15:45 +0900 | [diff] [blame] | 318 | } |
| 319 | |
Shawn Guo | bb13fab | 2012-04-26 10:35:40 +0800 | [diff] [blame] | 320 | void __init exynos_init_late(void) |
| 321 | { |
Kukjin Kim | 2edb36c | 2012-11-15 15:48:56 +0900 | [diff] [blame] | 322 | if (of_machine_is_compatible("samsung,exynos5440")) |
| 323 | /* to be supported later */ |
| 324 | return; |
| 325 | |
Shawn Guo | bb13fab | 2012-04-26 10:35:40 +0800 | [diff] [blame] | 326 | exynos_pm_late_initcall(); |
| 327 | } |
| 328 | |
Kukjin Kim | cc511b8 | 2011-12-27 08:18:36 +0100 | [diff] [blame] | 329 | /* |
| 330 | * exynos_map_io |
| 331 | * |
| 332 | * register the standard cpu IO areas |
| 333 | */ |
| 334 | |
| 335 | void __init exynos_init_io(struct map_desc *mach_desc, int size) |
| 336 | { |
Doug Anderson | 5b7897d | 2012-11-27 11:53:14 -0800 | [diff] [blame] | 337 | struct map_desc *iodesc = exynos_iodesc; |
| 338 | int iodesc_sz = ARRAY_SIZE(exynos_iodesc); |
| 339 | #if defined(CONFIG_OF) && defined(CONFIG_ARCH_EXYNOS5) |
| 340 | unsigned long root = of_get_flat_dt_root(); |
| 341 | |
Kukjin Kim | cc511b8 | 2011-12-27 08:18:36 +0100 | [diff] [blame] | 342 | /* initialize the io descriptors we need for initialization */ |
Doug Anderson | 5b7897d | 2012-11-27 11:53:14 -0800 | [diff] [blame] | 343 | if (of_flat_dt_is_compatible(root, "samsung,exynos5440")) { |
| 344 | iodesc = exynos5440_iodesc; |
| 345 | iodesc_sz = ARRAY_SIZE(exynos5440_iodesc); |
| 346 | } |
| 347 | #endif |
| 348 | |
| 349 | iotable_init(iodesc, iodesc_sz); |
Kukjin Kim | 2edb36c | 2012-11-15 15:48:56 +0900 | [diff] [blame] | 350 | |
Kukjin Kim | cc511b8 | 2011-12-27 08:18:36 +0100 | [diff] [blame] | 351 | if (mach_desc) |
| 352 | iotable_init(mach_desc, size); |
| 353 | |
| 354 | /* detect cpu id and rev. */ |
| 355 | s5p_init_cpu(S5P_VA_CHIPID); |
| 356 | |
| 357 | s3c_init_cpu(samsung_cpu_id, cpu_ids, ARRAY_SIZE(cpu_ids)); |
| 358 | } |
| 359 | |
Kukjin Kim | 906c789 | 2012-02-11 21:27:08 +0900 | [diff] [blame] | 360 | static void __init exynos4_map_io(void) |
Kukjin Kim | cc511b8 | 2011-12-27 08:18:36 +0100 | [diff] [blame] | 361 | { |
| 362 | iotable_init(exynos4_iodesc, ARRAY_SIZE(exynos4_iodesc)); |
| 363 | |
| 364 | if (soc_is_exynos4210() && samsung_rev() == EXYNOS4210_REV_0) |
| 365 | iotable_init(exynos4_iodesc0, ARRAY_SIZE(exynos4_iodesc0)); |
| 366 | else |
| 367 | iotable_init(exynos4_iodesc1, ARRAY_SIZE(exynos4_iodesc1)); |
| 368 | |
| 369 | /* initialize device information early */ |
| 370 | exynos4_default_sdhci0(); |
| 371 | exynos4_default_sdhci1(); |
| 372 | exynos4_default_sdhci2(); |
| 373 | exynos4_default_sdhci3(); |
| 374 | |
| 375 | s3c_adc_setname("samsung-adc-v3"); |
| 376 | |
| 377 | s3c_fimc_setname(0, "exynos4-fimc"); |
| 378 | s3c_fimc_setname(1, "exynos4-fimc"); |
| 379 | s3c_fimc_setname(2, "exynos4-fimc"); |
| 380 | s3c_fimc_setname(3, "exynos4-fimc"); |
| 381 | |
Thomas Abraham | 8482c81 | 2012-04-14 08:04:46 -0700 | [diff] [blame] | 382 | s3c_sdhci_setname(0, "exynos4-sdhci"); |
| 383 | s3c_sdhci_setname(1, "exynos4-sdhci"); |
| 384 | s3c_sdhci_setname(2, "exynos4-sdhci"); |
| 385 | s3c_sdhci_setname(3, "exynos4-sdhci"); |
| 386 | |
Kukjin Kim | cc511b8 | 2011-12-27 08:18:36 +0100 | [diff] [blame] | 387 | /* The I2C bus controllers are directly compatible with s3c2440 */ |
| 388 | s3c_i2c0_setname("s3c2440-i2c"); |
| 389 | s3c_i2c1_setname("s3c2440-i2c"); |
| 390 | s3c_i2c2_setname("s3c2440-i2c"); |
| 391 | |
| 392 | s5p_fb_setname(0, "exynos4-fb"); |
| 393 | s5p_hdmi_setname("exynos4-hdmi"); |
Heiko Stuebner | 308b3af | 2012-10-17 16:47:11 +0900 | [diff] [blame] | 394 | |
| 395 | s3c64xx_spi_setname("exynos4210-spi"); |
Kukjin Kim | cc511b8 | 2011-12-27 08:18:36 +0100 | [diff] [blame] | 396 | } |
| 397 | |
Kukjin Kim | 94c7ca7 | 2012-02-11 22:15:45 +0900 | [diff] [blame] | 398 | static void __init exynos5_map_io(void) |
| 399 | { |
| 400 | iotable_init(exynos5_iodesc, ARRAY_SIZE(exynos5_iodesc)); |
Kukjin Kim | 94c7ca7 | 2012-02-11 22:15:45 +0900 | [diff] [blame] | 401 | } |
| 402 | |
Kukjin Kim | 906c789 | 2012-02-11 21:27:08 +0900 | [diff] [blame] | 403 | static void __init exynos4_init_clocks(int xtal) |
Kukjin Kim | cc511b8 | 2011-12-27 08:18:36 +0100 | [diff] [blame] | 404 | { |
| 405 | printk(KERN_DEBUG "%s: initializing clocks\n", __func__); |
| 406 | |
| 407 | s3c24xx_register_baseclocks(xtal); |
| 408 | s5p_register_clocks(xtal); |
| 409 | |
| 410 | if (soc_is_exynos4210()) |
| 411 | exynos4210_register_clocks(); |
| 412 | else if (soc_is_exynos4212() || soc_is_exynos4412()) |
| 413 | exynos4212_register_clocks(); |
| 414 | |
| 415 | exynos4_register_clocks(); |
| 416 | exynos4_setup_clocks(); |
| 417 | } |
| 418 | |
Kukjin Kim | 2edb36c | 2012-11-15 15:48:56 +0900 | [diff] [blame] | 419 | static void __init exynos5440_map_io(void) |
| 420 | { |
| 421 | iotable_init(exynos5440_iodesc0, ARRAY_SIZE(exynos5440_iodesc0)); |
| 422 | } |
| 423 | |
Kukjin Kim | 94c7ca7 | 2012-02-11 22:15:45 +0900 | [diff] [blame] | 424 | static void __init exynos5_init_clocks(int xtal) |
| 425 | { |
| 426 | printk(KERN_DEBUG "%s: initializing clocks\n", __func__); |
| 427 | |
Kukjin Kim | 61bcbc2 | 2013-01-05 08:32:55 -0800 | [diff] [blame] | 428 | /* EXYNOS5440 can support only common clock framework */ |
| 429 | |
| 430 | if (soc_is_exynos5440()) |
| 431 | return; |
| 432 | |
| 433 | #ifdef CONFIG_SOC_EXYNOS5250 |
Kukjin Kim | 94c7ca7 | 2012-02-11 22:15:45 +0900 | [diff] [blame] | 434 | s3c24xx_register_baseclocks(xtal); |
| 435 | s5p_register_clocks(xtal); |
| 436 | |
| 437 | exynos5_register_clocks(); |
| 438 | exynos5_setup_clocks(); |
Kukjin Kim | 61bcbc2 | 2013-01-05 08:32:55 -0800 | [diff] [blame] | 439 | #endif |
Kukjin Kim | 94c7ca7 | 2012-02-11 22:15:45 +0900 | [diff] [blame] | 440 | } |
| 441 | |
Kukjin Kim | cc511b8 | 2011-12-27 08:18:36 +0100 | [diff] [blame] | 442 | #define COMBINER_ENABLE_SET 0x0 |
| 443 | #define COMBINER_ENABLE_CLEAR 0x4 |
| 444 | #define COMBINER_INT_STATUS 0xC |
| 445 | |
| 446 | static DEFINE_SPINLOCK(irq_controller_lock); |
| 447 | |
| 448 | struct combiner_chip_data { |
| 449 | unsigned int irq_offset; |
| 450 | unsigned int irq_mask; |
| 451 | void __iomem *base; |
| 452 | }; |
| 453 | |
Thomas Abraham | 1e60bc0 | 2012-05-15 16:18:35 +0900 | [diff] [blame] | 454 | static struct irq_domain *combiner_irq_domain; |
Kukjin Kim | cc511b8 | 2011-12-27 08:18:36 +0100 | [diff] [blame] | 455 | static struct combiner_chip_data combiner_data[MAX_COMBINER_NR]; |
| 456 | |
| 457 | static inline void __iomem *combiner_base(struct irq_data *data) |
| 458 | { |
| 459 | struct combiner_chip_data *combiner_data = |
| 460 | irq_data_get_irq_chip_data(data); |
| 461 | |
| 462 | return combiner_data->base; |
| 463 | } |
| 464 | |
| 465 | static void combiner_mask_irq(struct irq_data *data) |
| 466 | { |
Thomas Abraham | 1e60bc0 | 2012-05-15 16:18:35 +0900 | [diff] [blame] | 467 | u32 mask = 1 << (data->hwirq % 32); |
Kukjin Kim | cc511b8 | 2011-12-27 08:18:36 +0100 | [diff] [blame] | 468 | |
| 469 | __raw_writel(mask, combiner_base(data) + COMBINER_ENABLE_CLEAR); |
| 470 | } |
| 471 | |
| 472 | static void combiner_unmask_irq(struct irq_data *data) |
| 473 | { |
Thomas Abraham | 1e60bc0 | 2012-05-15 16:18:35 +0900 | [diff] [blame] | 474 | u32 mask = 1 << (data->hwirq % 32); |
Kukjin Kim | cc511b8 | 2011-12-27 08:18:36 +0100 | [diff] [blame] | 475 | |
| 476 | __raw_writel(mask, combiner_base(data) + COMBINER_ENABLE_SET); |
| 477 | } |
| 478 | |
| 479 | static void combiner_handle_cascade_irq(unsigned int irq, struct irq_desc *desc) |
| 480 | { |
| 481 | struct combiner_chip_data *chip_data = irq_get_handler_data(irq); |
| 482 | struct irq_chip *chip = irq_get_chip(irq); |
| 483 | unsigned int cascade_irq, combiner_irq; |
| 484 | unsigned long status; |
| 485 | |
| 486 | chained_irq_enter(chip, desc); |
| 487 | |
| 488 | spin_lock(&irq_controller_lock); |
| 489 | status = __raw_readl(chip_data->base + COMBINER_INT_STATUS); |
| 490 | spin_unlock(&irq_controller_lock); |
| 491 | status &= chip_data->irq_mask; |
| 492 | |
| 493 | if (status == 0) |
| 494 | goto out; |
| 495 | |
| 496 | combiner_irq = __ffs(status); |
| 497 | |
| 498 | cascade_irq = combiner_irq + (chip_data->irq_offset & ~31); |
| 499 | if (unlikely(cascade_irq >= NR_IRQS)) |
| 500 | do_bad_IRQ(cascade_irq, desc); |
| 501 | else |
| 502 | generic_handle_irq(cascade_irq); |
| 503 | |
| 504 | out: |
| 505 | chained_irq_exit(chip, desc); |
| 506 | } |
| 507 | |
| 508 | static struct irq_chip combiner_chip = { |
| 509 | .name = "COMBINER", |
| 510 | .irq_mask = combiner_mask_irq, |
| 511 | .irq_unmask = combiner_unmask_irq, |
| 512 | }; |
| 513 | |
| 514 | static void __init combiner_cascade_irq(unsigned int combiner_nr, unsigned int irq) |
| 515 | { |
Kukjin Kim | bb19a75 | 2012-01-25 13:48:11 +0900 | [diff] [blame] | 516 | unsigned int max_nr; |
| 517 | |
| 518 | if (soc_is_exynos5250()) |
| 519 | max_nr = EXYNOS5_MAX_COMBINER_NR; |
| 520 | else |
| 521 | max_nr = EXYNOS4_MAX_COMBINER_NR; |
| 522 | |
| 523 | if (combiner_nr >= max_nr) |
Kukjin Kim | cc511b8 | 2011-12-27 08:18:36 +0100 | [diff] [blame] | 524 | BUG(); |
| 525 | if (irq_set_handler_data(irq, &combiner_data[combiner_nr]) != 0) |
| 526 | BUG(); |
| 527 | irq_set_chained_handler(irq, combiner_handle_cascade_irq); |
| 528 | } |
| 529 | |
Thomas Abraham | 1e60bc0 | 2012-05-15 16:18:35 +0900 | [diff] [blame] | 530 | static void __init combiner_init_one(unsigned int combiner_nr, |
| 531 | void __iomem *base) |
Kukjin Kim | cc511b8 | 2011-12-27 08:18:36 +0100 | [diff] [blame] | 532 | { |
Kukjin Kim | cc511b8 | 2011-12-27 08:18:36 +0100 | [diff] [blame] | 533 | combiner_data[combiner_nr].base = base; |
Thomas Abraham | 1e60bc0 | 2012-05-15 16:18:35 +0900 | [diff] [blame] | 534 | combiner_data[combiner_nr].irq_offset = irq_find_mapping( |
| 535 | combiner_irq_domain, combiner_nr * MAX_IRQ_IN_COMBINER); |
Kukjin Kim | cc511b8 | 2011-12-27 08:18:36 +0100 | [diff] [blame] | 536 | combiner_data[combiner_nr].irq_mask = 0xff << ((combiner_nr % 4) << 3); |
| 537 | |
| 538 | /* Disable all interrupts */ |
Kukjin Kim | cc511b8 | 2011-12-27 08:18:36 +0100 | [diff] [blame] | 539 | __raw_writel(combiner_data[combiner_nr].irq_mask, |
| 540 | base + COMBINER_ENABLE_CLEAR); |
Thomas Abraham | 1e60bc0 | 2012-05-15 16:18:35 +0900 | [diff] [blame] | 541 | } |
Kukjin Kim | cc511b8 | 2011-12-27 08:18:36 +0100 | [diff] [blame] | 542 | |
Thomas Abraham | e873a47 | 2012-05-15 16:25:23 +0900 | [diff] [blame] | 543 | #ifdef CONFIG_OF |
| 544 | static int combiner_irq_domain_xlate(struct irq_domain *d, |
| 545 | struct device_node *controller, |
| 546 | const u32 *intspec, unsigned int intsize, |
| 547 | unsigned long *out_hwirq, |
| 548 | unsigned int *out_type) |
| 549 | { |
| 550 | if (d->of_node != controller) |
| 551 | return -EINVAL; |
| 552 | |
| 553 | if (intsize < 2) |
| 554 | return -EINVAL; |
| 555 | |
| 556 | *out_hwirq = intspec[0] * MAX_IRQ_IN_COMBINER + intspec[1]; |
| 557 | *out_type = 0; |
| 558 | |
| 559 | return 0; |
| 560 | } |
| 561 | #else |
| 562 | static int combiner_irq_domain_xlate(struct irq_domain *d, |
| 563 | struct device_node *controller, |
| 564 | const u32 *intspec, unsigned int intsize, |
| 565 | unsigned long *out_hwirq, |
| 566 | unsigned int *out_type) |
| 567 | { |
| 568 | return -EINVAL; |
| 569 | } |
| 570 | #endif |
| 571 | |
Thomas Abraham | 1e60bc0 | 2012-05-15 16:18:35 +0900 | [diff] [blame] | 572 | static int combiner_irq_domain_map(struct irq_domain *d, unsigned int irq, |
| 573 | irq_hw_number_t hw) |
| 574 | { |
| 575 | irq_set_chip_and_handler(irq, &combiner_chip, handle_level_irq); |
| 576 | irq_set_chip_data(irq, &combiner_data[hw >> 3]); |
| 577 | set_irq_flags(irq, IRQF_VALID | IRQF_PROBE); |
Kukjin Kim | cc511b8 | 2011-12-27 08:18:36 +0100 | [diff] [blame] | 578 | |
Thomas Abraham | 1e60bc0 | 2012-05-15 16:18:35 +0900 | [diff] [blame] | 579 | return 0; |
| 580 | } |
| 581 | |
| 582 | static struct irq_domain_ops combiner_irq_domain_ops = { |
Thomas Abraham | e873a47 | 2012-05-15 16:25:23 +0900 | [diff] [blame] | 583 | .xlate = combiner_irq_domain_xlate, |
Thomas Abraham | 1e60bc0 | 2012-05-15 16:18:35 +0900 | [diff] [blame] | 584 | .map = combiner_irq_domain_map, |
| 585 | }; |
| 586 | |
Sachin Kamat | 2a2b0e2 | 2012-07-12 16:34:51 +0900 | [diff] [blame] | 587 | static void __init combiner_init(void __iomem *combiner_base, |
| 588 | struct device_node *np) |
Thomas Abraham | 1e60bc0 | 2012-05-15 16:18:35 +0900 | [diff] [blame] | 589 | { |
Thomas Abraham | e873a47 | 2012-05-15 16:25:23 +0900 | [diff] [blame] | 590 | int i, irq, irq_base; |
Thomas Abraham | 1e60bc0 | 2012-05-15 16:18:35 +0900 | [diff] [blame] | 591 | unsigned int max_nr, nr_irq; |
| 592 | |
Thomas Abraham | e873a47 | 2012-05-15 16:25:23 +0900 | [diff] [blame] | 593 | if (np) { |
| 594 | if (of_property_read_u32(np, "samsung,combiner-nr", &max_nr)) { |
| 595 | pr_warning("%s: number of combiners not specified, " |
| 596 | "setting default as %d.\n", |
| 597 | __func__, EXYNOS4_MAX_COMBINER_NR); |
| 598 | max_nr = EXYNOS4_MAX_COMBINER_NR; |
| 599 | } |
| 600 | } else { |
| 601 | max_nr = soc_is_exynos5250() ? EXYNOS5_MAX_COMBINER_NR : |
| 602 | EXYNOS4_MAX_COMBINER_NR; |
| 603 | } |
Thomas Abraham | 1e60bc0 | 2012-05-15 16:18:35 +0900 | [diff] [blame] | 604 | nr_irq = max_nr * MAX_IRQ_IN_COMBINER; |
| 605 | |
| 606 | irq_base = irq_alloc_descs(COMBINER_IRQ(0, 0), 1, nr_irq, 0); |
| 607 | if (IS_ERR_VALUE(irq_base)) { |
| 608 | irq_base = COMBINER_IRQ(0, 0); |
| 609 | pr_warning("%s: irq desc alloc failed. Continuing with %d as linux irq base\n", __func__, irq_base); |
| 610 | } |
| 611 | |
| 612 | combiner_irq_domain = irq_domain_add_legacy(np, nr_irq, irq_base, 0, |
| 613 | &combiner_irq_domain_ops, &combiner_data); |
| 614 | if (WARN_ON(!combiner_irq_domain)) { |
| 615 | pr_warning("%s: irq domain init failed\n", __func__); |
| 616 | return; |
| 617 | } |
| 618 | |
| 619 | for (i = 0; i < max_nr; i++) { |
| 620 | combiner_init_one(i, combiner_base + (i >> 2) * 0x10); |
Arnd Bergmann | 820f3dd | 2012-05-16 22:10:14 +0200 | [diff] [blame] | 621 | irq = IRQ_SPI(i); |
| 622 | #ifdef CONFIG_OF |
| 623 | if (np) |
| 624 | irq = irq_of_parse_and_map(np, i); |
| 625 | #endif |
Thomas Abraham | e873a47 | 2012-05-15 16:25:23 +0900 | [diff] [blame] | 626 | combiner_cascade_irq(i, irq); |
Kukjin Kim | cc511b8 | 2011-12-27 08:18:36 +0100 | [diff] [blame] | 627 | } |
| 628 | } |
| 629 | |
Arnd Bergmann | 237c78b | 2012-01-07 12:30:20 +0000 | [diff] [blame] | 630 | #ifdef CONFIG_OF |
Sachin Kamat | 96046ea | 2012-11-08 09:22:08 +0900 | [diff] [blame] | 631 | static int __init combiner_of_init(struct device_node *np, |
| 632 | struct device_node *parent) |
Thomas Abraham | e873a47 | 2012-05-15 16:25:23 +0900 | [diff] [blame] | 633 | { |
| 634 | void __iomem *combiner_base; |
| 635 | |
| 636 | combiner_base = of_iomap(np, 0); |
| 637 | if (!combiner_base) { |
| 638 | pr_err("%s: failed to map combiner registers\n", __func__); |
| 639 | return -ENXIO; |
| 640 | } |
| 641 | |
| 642 | combiner_init(combiner_base, np); |
| 643 | |
| 644 | return 0; |
| 645 | } |
| 646 | |
Kukjin Kim | 2edb36c | 2012-11-15 15:48:56 +0900 | [diff] [blame] | 647 | static const struct of_device_id exynos_dt_irq_match[] = { |
Thomas Abraham | e873a47 | 2012-05-15 16:25:23 +0900 | [diff] [blame] | 648 | { .compatible = "samsung,exynos4210-combiner", |
| 649 | .data = combiner_of_init, }, |
Arnd Bergmann | 237c78b | 2012-01-07 12:30:20 +0000 | [diff] [blame] | 650 | {}, |
| 651 | }; |
| 652 | #endif |
Kukjin Kim | cc511b8 | 2011-12-27 08:18:36 +0100 | [diff] [blame] | 653 | |
| 654 | void __init exynos4_init_irq(void) |
| 655 | { |
Arnd Bergmann | 40ba95f | 2012-01-07 11:51:28 +0000 | [diff] [blame] | 656 | unsigned int gic_bank_offset; |
Kukjin Kim | cc511b8 | 2011-12-27 08:18:36 +0100 | [diff] [blame] | 657 | |
| 658 | gic_bank_offset = soc_is_exynos4412() ? 0x4000 : 0x8000; |
| 659 | |
Arnd Bergmann | 237c78b | 2012-01-07 12:30:20 +0000 | [diff] [blame] | 660 | if (!of_have_populated_dt()) |
Grant Likely | 7529495 | 2012-02-14 14:06:57 -0700 | [diff] [blame] | 661 | gic_init_bases(0, IRQ_PPI(0), S5P_VA_GIC_DIST, S5P_VA_GIC_CPU, gic_bank_offset, NULL); |
Arnd Bergmann | 237c78b | 2012-01-07 12:30:20 +0000 | [diff] [blame] | 662 | #ifdef CONFIG_OF |
Rob Herring | 0529e315 | 2012-11-05 16:18:28 -0600 | [diff] [blame] | 663 | else { |
| 664 | irqchip_init(); |
Kukjin Kim | 2edb36c | 2012-11-15 15:48:56 +0900 | [diff] [blame] | 665 | of_irq_init(exynos_dt_irq_match); |
Rob Herring | 0529e315 | 2012-11-05 16:18:28 -0600 | [diff] [blame] | 666 | } |
Arnd Bergmann | 237c78b | 2012-01-07 12:30:20 +0000 | [diff] [blame] | 667 | #endif |
Kukjin Kim | cc511b8 | 2011-12-27 08:18:36 +0100 | [diff] [blame] | 668 | |
Thomas Abraham | e873a47 | 2012-05-15 16:25:23 +0900 | [diff] [blame] | 669 | if (!of_have_populated_dt()) |
| 670 | combiner_init(S5P_VA_COMBINER_BASE, NULL); |
Kukjin Kim | cc511b8 | 2011-12-27 08:18:36 +0100 | [diff] [blame] | 671 | |
| 672 | /* |
| 673 | * The parameters of s5p_init_irq() are for VIC init. |
| 674 | * Theses parameters should be NULL and 0 because EXYNOS4 |
| 675 | * uses GIC instead of VIC. |
| 676 | */ |
| 677 | s5p_init_irq(NULL, 0); |
| 678 | } |
| 679 | |
Kukjin Kim | 94c7ca7 | 2012-02-11 22:15:45 +0900 | [diff] [blame] | 680 | void __init exynos5_init_irq(void) |
| 681 | { |
Tushar Behera | 6fff5a1 | 2012-04-24 13:25:01 -0700 | [diff] [blame] | 682 | #ifdef CONFIG_OF |
Rob Herring | 0529e315 | 2012-11-05 16:18:28 -0600 | [diff] [blame] | 683 | irqchip_init(); |
Kukjin Kim | 2edb36c | 2012-11-15 15:48:56 +0900 | [diff] [blame] | 684 | of_irq_init(exynos_dt_irq_match); |
Tushar Behera | 6fff5a1 | 2012-04-24 13:25:01 -0700 | [diff] [blame] | 685 | #endif |
Kukjin Kim | 94c7ca7 | 2012-02-11 22:15:45 +0900 | [diff] [blame] | 686 | /* |
| 687 | * The parameters of s5p_init_irq() are for VIC init. |
| 688 | * Theses parameters should be NULL and 0 because EXYNOS4 |
| 689 | * uses GIC instead of VIC. |
| 690 | */ |
Kukjin Kim | 12fee19 | 2012-12-06 15:31:10 +0900 | [diff] [blame] | 691 | if (!of_machine_is_compatible("samsung,exynos5440")) |
| 692 | s5p_init_irq(NULL, 0); |
Inderpal Singh | 3445513 | 2012-11-22 14:46:21 +0900 | [diff] [blame] | 693 | |
| 694 | gic_arch_extn.irq_set_wake = s3c_irq_wake; |
Kukjin Kim | 94c7ca7 | 2012-02-11 22:15:45 +0900 | [diff] [blame] | 695 | } |
| 696 | |
Thomas Abraham | 9ee6af9 | 2012-05-15 15:47:40 +0900 | [diff] [blame] | 697 | struct bus_type exynos_subsys = { |
| 698 | .name = "exynos-core", |
| 699 | .dev_name = "exynos-core", |
Kukjin Kim | 94c7ca7 | 2012-02-11 22:15:45 +0900 | [diff] [blame] | 700 | }; |
| 701 | |
Linus Torvalds | 7affca3 | 2012-01-07 12:03:30 -0800 | [diff] [blame] | 702 | static struct device exynos4_dev = { |
Thomas Abraham | 9ee6af9 | 2012-05-15 15:47:40 +0900 | [diff] [blame] | 703 | .bus = &exynos_subsys, |
Kukjin Kim | 94c7ca7 | 2012-02-11 22:15:45 +0900 | [diff] [blame] | 704 | }; |
| 705 | |
| 706 | static int __init exynos_core_init(void) |
Kukjin Kim | cc511b8 | 2011-12-27 08:18:36 +0100 | [diff] [blame] | 707 | { |
Thomas Abraham | 9ee6af9 | 2012-05-15 15:47:40 +0900 | [diff] [blame] | 708 | return subsys_system_register(&exynos_subsys, NULL); |
Kukjin Kim | cc511b8 | 2011-12-27 08:18:36 +0100 | [diff] [blame] | 709 | } |
Kukjin Kim | 94c7ca7 | 2012-02-11 22:15:45 +0900 | [diff] [blame] | 710 | core_initcall(exynos_core_init); |
Kukjin Kim | cc511b8 | 2011-12-27 08:18:36 +0100 | [diff] [blame] | 711 | |
| 712 | #ifdef CONFIG_CACHE_L2X0 |
| 713 | static int __init exynos4_l2x0_cache_init(void) |
| 714 | { |
Il Han | e1b1994 | 2012-04-05 07:59:36 -0700 | [diff] [blame] | 715 | int ret; |
| 716 | |
Kukjin Kim | 2edb36c | 2012-11-15 15:48:56 +0900 | [diff] [blame] | 717 | if (soc_is_exynos5250() || soc_is_exynos5440()) |
Kukjin Kim | 94c7ca7 | 2012-02-11 22:15:45 +0900 | [diff] [blame] | 718 | return 0; |
| 719 | |
Amit Daniel Kachhap | 6cdeddc | 2012-03-08 02:09:12 -0800 | [diff] [blame] | 720 | ret = l2x0_of_init(L2_AUX_VAL, L2_AUX_MASK); |
| 721 | if (!ret) { |
| 722 | l2x0_regs_phys = virt_to_phys(&l2x0_saved_regs); |
| 723 | clean_dcache_area(&l2x0_regs_phys, sizeof(unsigned long)); |
| 724 | return 0; |
| 725 | } |
Kukjin Kim | cc511b8 | 2011-12-27 08:18:36 +0100 | [diff] [blame] | 726 | |
Amit Daniel Kachhap | b756a50 | 2012-03-08 02:07:41 -0800 | [diff] [blame] | 727 | if (!(__raw_readl(S5P_VA_L2CC + L2X0_CTRL) & 0x1)) { |
| 728 | l2x0_saved_regs.phy_base = EXYNOS4_PA_L2CC; |
| 729 | /* TAG, Data Latency Control: 2 cycles */ |
| 730 | l2x0_saved_regs.tag_latency = 0x110; |
Kukjin Kim | cc511b8 | 2011-12-27 08:18:36 +0100 | [diff] [blame] | 731 | |
Amit Daniel Kachhap | b756a50 | 2012-03-08 02:07:41 -0800 | [diff] [blame] | 732 | if (soc_is_exynos4212() || soc_is_exynos4412()) |
| 733 | l2x0_saved_regs.data_latency = 0x120; |
| 734 | else |
| 735 | l2x0_saved_regs.data_latency = 0x110; |
Kukjin Kim | cc511b8 | 2011-12-27 08:18:36 +0100 | [diff] [blame] | 736 | |
Amit Daniel Kachhap | b756a50 | 2012-03-08 02:07:41 -0800 | [diff] [blame] | 737 | l2x0_saved_regs.prefetch_ctrl = 0x30000007; |
| 738 | l2x0_saved_regs.pwr_ctrl = |
| 739 | (L2X0_DYNAMIC_CLK_GATING_EN | L2X0_STNDBY_MODE_EN); |
Kukjin Kim | cc511b8 | 2011-12-27 08:18:36 +0100 | [diff] [blame] | 740 | |
Amit Daniel Kachhap | b756a50 | 2012-03-08 02:07:41 -0800 | [diff] [blame] | 741 | l2x0_regs_phys = virt_to_phys(&l2x0_saved_regs); |
Kukjin Kim | cc511b8 | 2011-12-27 08:18:36 +0100 | [diff] [blame] | 742 | |
Amit Daniel Kachhap | b756a50 | 2012-03-08 02:07:41 -0800 | [diff] [blame] | 743 | __raw_writel(l2x0_saved_regs.tag_latency, |
| 744 | S5P_VA_L2CC + L2X0_TAG_LATENCY_CTRL); |
| 745 | __raw_writel(l2x0_saved_regs.data_latency, |
| 746 | S5P_VA_L2CC + L2X0_DATA_LATENCY_CTRL); |
| 747 | |
| 748 | /* L2X0 Prefetch Control */ |
| 749 | __raw_writel(l2x0_saved_regs.prefetch_ctrl, |
| 750 | S5P_VA_L2CC + L2X0_PREFETCH_CTRL); |
| 751 | |
| 752 | /* L2X0 Power Control */ |
| 753 | __raw_writel(l2x0_saved_regs.pwr_ctrl, |
| 754 | S5P_VA_L2CC + L2X0_POWER_CTRL); |
| 755 | |
| 756 | clean_dcache_area(&l2x0_regs_phys, sizeof(unsigned long)); |
| 757 | clean_dcache_area(&l2x0_saved_regs, sizeof(struct l2x0_regs)); |
| 758 | } |
Kukjin Kim | cc511b8 | 2011-12-27 08:18:36 +0100 | [diff] [blame] | 759 | |
Amit Daniel Kachhap | 6cdeddc | 2012-03-08 02:09:12 -0800 | [diff] [blame] | 760 | l2x0_init(S5P_VA_L2CC, L2_AUX_VAL, L2_AUX_MASK); |
Kukjin Kim | cc511b8 | 2011-12-27 08:18:36 +0100 | [diff] [blame] | 761 | return 0; |
| 762 | } |
Kukjin Kim | cc511b8 | 2011-12-27 08:18:36 +0100 | [diff] [blame] | 763 | early_initcall(exynos4_l2x0_cache_init); |
| 764 | #endif |
| 765 | |
Kukjin Kim | 906c789 | 2012-02-11 21:27:08 +0900 | [diff] [blame] | 766 | static int __init exynos_init(void) |
Kukjin Kim | cc511b8 | 2011-12-27 08:18:36 +0100 | [diff] [blame] | 767 | { |
| 768 | printk(KERN_INFO "EXYNOS: Initializing architecture\n"); |
Kukjin Kim | 94c7ca7 | 2012-02-11 22:15:45 +0900 | [diff] [blame] | 769 | |
Thomas Abraham | 9ee6af9 | 2012-05-15 15:47:40 +0900 | [diff] [blame] | 770 | return device_register(&exynos4_dev); |
Kukjin Kim | cc511b8 | 2011-12-27 08:18:36 +0100 | [diff] [blame] | 771 | } |
| 772 | |
Kukjin Kim | cc511b8 | 2011-12-27 08:18:36 +0100 | [diff] [blame] | 773 | /* uart registration process */ |
| 774 | |
Thomas Abraham | 55b6ef7 | 2012-10-29 19:46:49 +0900 | [diff] [blame] | 775 | static void __init exynos4_init_uarts(struct s3c2410_uartcfg *cfg, int no) |
Kukjin Kim | cc511b8 | 2011-12-27 08:18:36 +0100 | [diff] [blame] | 776 | { |
| 777 | struct s3c2410_uartcfg *tcfg = cfg; |
| 778 | u32 ucnt; |
| 779 | |
Arnd Bergmann | 237c78b | 2012-01-07 12:30:20 +0000 | [diff] [blame] | 780 | for (ucnt = 0; ucnt < no; ucnt++, tcfg++) |
| 781 | tcfg->has_fracval = 1; |
Kukjin Kim | cc511b8 | 2011-12-27 08:18:36 +0100 | [diff] [blame] | 782 | |
Thomas Abraham | 55b6ef7 | 2012-10-29 19:46:49 +0900 | [diff] [blame] | 783 | s3c24xx_init_uartdevs("exynos4210-uart", exynos4_uart_resources, cfg, no); |
Kukjin Kim | cc511b8 | 2011-12-27 08:18:36 +0100 | [diff] [blame] | 784 | } |
| 785 | |
Eunki Kim | 330c90a | 2012-03-14 01:43:31 -0700 | [diff] [blame] | 786 | static void __iomem *exynos_eint_base; |
| 787 | |
Kukjin Kim | cc511b8 | 2011-12-27 08:18:36 +0100 | [diff] [blame] | 788 | static DEFINE_SPINLOCK(eint_lock); |
| 789 | |
| 790 | static unsigned int eint0_15_data[16]; |
| 791 | |
Eunki Kim | 330c90a | 2012-03-14 01:43:31 -0700 | [diff] [blame] | 792 | static inline int exynos4_irq_to_gpio(unsigned int irq) |
Kukjin Kim | cc511b8 | 2011-12-27 08:18:36 +0100 | [diff] [blame] | 793 | { |
Eunki Kim | 330c90a | 2012-03-14 01:43:31 -0700 | [diff] [blame] | 794 | if (irq < IRQ_EINT(0)) |
| 795 | return -EINVAL; |
Kukjin Kim | cc511b8 | 2011-12-27 08:18:36 +0100 | [diff] [blame] | 796 | |
Eunki Kim | 330c90a | 2012-03-14 01:43:31 -0700 | [diff] [blame] | 797 | irq -= IRQ_EINT(0); |
| 798 | if (irq < 8) |
| 799 | return EXYNOS4_GPX0(irq); |
Kukjin Kim | cc511b8 | 2011-12-27 08:18:36 +0100 | [diff] [blame] | 800 | |
Eunki Kim | 330c90a | 2012-03-14 01:43:31 -0700 | [diff] [blame] | 801 | irq -= 8; |
| 802 | if (irq < 8) |
| 803 | return EXYNOS4_GPX1(irq); |
| 804 | |
| 805 | irq -= 8; |
| 806 | if (irq < 8) |
| 807 | return EXYNOS4_GPX2(irq); |
| 808 | |
| 809 | irq -= 8; |
| 810 | if (irq < 8) |
| 811 | return EXYNOS4_GPX3(irq); |
| 812 | |
| 813 | return -EINVAL; |
Kukjin Kim | cc511b8 | 2011-12-27 08:18:36 +0100 | [diff] [blame] | 814 | } |
| 815 | |
Eunki Kim | 330c90a | 2012-03-14 01:43:31 -0700 | [diff] [blame] | 816 | static inline int exynos5_irq_to_gpio(unsigned int irq) |
| 817 | { |
| 818 | if (irq < IRQ_EINT(0)) |
| 819 | return -EINVAL; |
| 820 | |
| 821 | irq -= IRQ_EINT(0); |
| 822 | if (irq < 8) |
| 823 | return EXYNOS5_GPX0(irq); |
| 824 | |
| 825 | irq -= 8; |
| 826 | if (irq < 8) |
| 827 | return EXYNOS5_GPX1(irq); |
| 828 | |
| 829 | irq -= 8; |
| 830 | if (irq < 8) |
| 831 | return EXYNOS5_GPX2(irq); |
| 832 | |
| 833 | irq -= 8; |
| 834 | if (irq < 8) |
| 835 | return EXYNOS5_GPX3(irq); |
| 836 | |
| 837 | return -EINVAL; |
| 838 | } |
| 839 | |
Kukjin Kim | bb19a75 | 2012-01-25 13:48:11 +0900 | [diff] [blame] | 840 | static unsigned int exynos4_eint0_15_src_int[16] = { |
| 841 | EXYNOS4_IRQ_EINT0, |
| 842 | EXYNOS4_IRQ_EINT1, |
| 843 | EXYNOS4_IRQ_EINT2, |
| 844 | EXYNOS4_IRQ_EINT3, |
| 845 | EXYNOS4_IRQ_EINT4, |
| 846 | EXYNOS4_IRQ_EINT5, |
| 847 | EXYNOS4_IRQ_EINT6, |
| 848 | EXYNOS4_IRQ_EINT7, |
| 849 | EXYNOS4_IRQ_EINT8, |
| 850 | EXYNOS4_IRQ_EINT9, |
| 851 | EXYNOS4_IRQ_EINT10, |
| 852 | EXYNOS4_IRQ_EINT11, |
| 853 | EXYNOS4_IRQ_EINT12, |
| 854 | EXYNOS4_IRQ_EINT13, |
| 855 | EXYNOS4_IRQ_EINT14, |
| 856 | EXYNOS4_IRQ_EINT15, |
| 857 | }; |
Kukjin Kim | cc511b8 | 2011-12-27 08:18:36 +0100 | [diff] [blame] | 858 | |
Kukjin Kim | bb19a75 | 2012-01-25 13:48:11 +0900 | [diff] [blame] | 859 | static unsigned int exynos5_eint0_15_src_int[16] = { |
| 860 | EXYNOS5_IRQ_EINT0, |
| 861 | EXYNOS5_IRQ_EINT1, |
| 862 | EXYNOS5_IRQ_EINT2, |
| 863 | EXYNOS5_IRQ_EINT3, |
| 864 | EXYNOS5_IRQ_EINT4, |
| 865 | EXYNOS5_IRQ_EINT5, |
| 866 | EXYNOS5_IRQ_EINT6, |
| 867 | EXYNOS5_IRQ_EINT7, |
| 868 | EXYNOS5_IRQ_EINT8, |
| 869 | EXYNOS5_IRQ_EINT9, |
| 870 | EXYNOS5_IRQ_EINT10, |
| 871 | EXYNOS5_IRQ_EINT11, |
| 872 | EXYNOS5_IRQ_EINT12, |
| 873 | EXYNOS5_IRQ_EINT13, |
| 874 | EXYNOS5_IRQ_EINT14, |
| 875 | EXYNOS5_IRQ_EINT15, |
| 876 | }; |
Eunki Kim | 330c90a | 2012-03-14 01:43:31 -0700 | [diff] [blame] | 877 | static inline void exynos_irq_eint_mask(struct irq_data *data) |
Kukjin Kim | cc511b8 | 2011-12-27 08:18:36 +0100 | [diff] [blame] | 878 | { |
| 879 | u32 mask; |
| 880 | |
| 881 | spin_lock(&eint_lock); |
Eunki Kim | 330c90a | 2012-03-14 01:43:31 -0700 | [diff] [blame] | 882 | mask = __raw_readl(EINT_MASK(exynos_eint_base, data->irq)); |
| 883 | mask |= EINT_OFFSET_BIT(data->irq); |
| 884 | __raw_writel(mask, EINT_MASK(exynos_eint_base, data->irq)); |
Kukjin Kim | cc511b8 | 2011-12-27 08:18:36 +0100 | [diff] [blame] | 885 | spin_unlock(&eint_lock); |
| 886 | } |
| 887 | |
Eunki Kim | 330c90a | 2012-03-14 01:43:31 -0700 | [diff] [blame] | 888 | static void exynos_irq_eint_unmask(struct irq_data *data) |
Kukjin Kim | cc511b8 | 2011-12-27 08:18:36 +0100 | [diff] [blame] | 889 | { |
| 890 | u32 mask; |
| 891 | |
| 892 | spin_lock(&eint_lock); |
Eunki Kim | 330c90a | 2012-03-14 01:43:31 -0700 | [diff] [blame] | 893 | mask = __raw_readl(EINT_MASK(exynos_eint_base, data->irq)); |
| 894 | mask &= ~(EINT_OFFSET_BIT(data->irq)); |
| 895 | __raw_writel(mask, EINT_MASK(exynos_eint_base, data->irq)); |
Kukjin Kim | cc511b8 | 2011-12-27 08:18:36 +0100 | [diff] [blame] | 896 | spin_unlock(&eint_lock); |
| 897 | } |
| 898 | |
Eunki Kim | 330c90a | 2012-03-14 01:43:31 -0700 | [diff] [blame] | 899 | static inline void exynos_irq_eint_ack(struct irq_data *data) |
Kukjin Kim | cc511b8 | 2011-12-27 08:18:36 +0100 | [diff] [blame] | 900 | { |
Eunki Kim | 330c90a | 2012-03-14 01:43:31 -0700 | [diff] [blame] | 901 | __raw_writel(EINT_OFFSET_BIT(data->irq), |
| 902 | EINT_PEND(exynos_eint_base, data->irq)); |
Kukjin Kim | cc511b8 | 2011-12-27 08:18:36 +0100 | [diff] [blame] | 903 | } |
| 904 | |
Eunki Kim | 330c90a | 2012-03-14 01:43:31 -0700 | [diff] [blame] | 905 | static void exynos_irq_eint_maskack(struct irq_data *data) |
Kukjin Kim | cc511b8 | 2011-12-27 08:18:36 +0100 | [diff] [blame] | 906 | { |
Eunki Kim | 330c90a | 2012-03-14 01:43:31 -0700 | [diff] [blame] | 907 | exynos_irq_eint_mask(data); |
| 908 | exynos_irq_eint_ack(data); |
Kukjin Kim | cc511b8 | 2011-12-27 08:18:36 +0100 | [diff] [blame] | 909 | } |
| 910 | |
Eunki Kim | 330c90a | 2012-03-14 01:43:31 -0700 | [diff] [blame] | 911 | static int exynos_irq_eint_set_type(struct irq_data *data, unsigned int type) |
Kukjin Kim | cc511b8 | 2011-12-27 08:18:36 +0100 | [diff] [blame] | 912 | { |
| 913 | int offs = EINT_OFFSET(data->irq); |
| 914 | int shift; |
| 915 | u32 ctrl, mask; |
| 916 | u32 newvalue = 0; |
| 917 | |
| 918 | switch (type) { |
| 919 | case IRQ_TYPE_EDGE_RISING: |
| 920 | newvalue = S5P_IRQ_TYPE_EDGE_RISING; |
| 921 | break; |
| 922 | |
| 923 | case IRQ_TYPE_EDGE_FALLING: |
| 924 | newvalue = S5P_IRQ_TYPE_EDGE_FALLING; |
| 925 | break; |
| 926 | |
| 927 | case IRQ_TYPE_EDGE_BOTH: |
| 928 | newvalue = S5P_IRQ_TYPE_EDGE_BOTH; |
| 929 | break; |
| 930 | |
| 931 | case IRQ_TYPE_LEVEL_LOW: |
| 932 | newvalue = S5P_IRQ_TYPE_LEVEL_LOW; |
| 933 | break; |
| 934 | |
| 935 | case IRQ_TYPE_LEVEL_HIGH: |
| 936 | newvalue = S5P_IRQ_TYPE_LEVEL_HIGH; |
| 937 | break; |
| 938 | |
| 939 | default: |
| 940 | printk(KERN_ERR "No such irq type %d", type); |
| 941 | return -EINVAL; |
| 942 | } |
| 943 | |
| 944 | shift = (offs & 0x7) * 4; |
| 945 | mask = 0x7 << shift; |
| 946 | |
| 947 | spin_lock(&eint_lock); |
Eunki Kim | 330c90a | 2012-03-14 01:43:31 -0700 | [diff] [blame] | 948 | ctrl = __raw_readl(EINT_CON(exynos_eint_base, data->irq)); |
Kukjin Kim | cc511b8 | 2011-12-27 08:18:36 +0100 | [diff] [blame] | 949 | ctrl &= ~mask; |
| 950 | ctrl |= newvalue << shift; |
Eunki Kim | 330c90a | 2012-03-14 01:43:31 -0700 | [diff] [blame] | 951 | __raw_writel(ctrl, EINT_CON(exynos_eint_base, data->irq)); |
Kukjin Kim | cc511b8 | 2011-12-27 08:18:36 +0100 | [diff] [blame] | 952 | spin_unlock(&eint_lock); |
| 953 | |
Eunki Kim | 330c90a | 2012-03-14 01:43:31 -0700 | [diff] [blame] | 954 | if (soc_is_exynos5250()) |
| 955 | s3c_gpio_cfgpin(exynos5_irq_to_gpio(data->irq), S3C_GPIO_SFN(0xf)); |
| 956 | else |
| 957 | s3c_gpio_cfgpin(exynos4_irq_to_gpio(data->irq), S3C_GPIO_SFN(0xf)); |
Kukjin Kim | cc511b8 | 2011-12-27 08:18:36 +0100 | [diff] [blame] | 958 | |
| 959 | return 0; |
| 960 | } |
| 961 | |
Eunki Kim | 330c90a | 2012-03-14 01:43:31 -0700 | [diff] [blame] | 962 | static struct irq_chip exynos_irq_eint = { |
| 963 | .name = "exynos-eint", |
| 964 | .irq_mask = exynos_irq_eint_mask, |
| 965 | .irq_unmask = exynos_irq_eint_unmask, |
| 966 | .irq_mask_ack = exynos_irq_eint_maskack, |
| 967 | .irq_ack = exynos_irq_eint_ack, |
| 968 | .irq_set_type = exynos_irq_eint_set_type, |
Kukjin Kim | cc511b8 | 2011-12-27 08:18:36 +0100 | [diff] [blame] | 969 | #ifdef CONFIG_PM |
| 970 | .irq_set_wake = s3c_irqext_wake, |
| 971 | #endif |
| 972 | }; |
| 973 | |
| 974 | /* |
| 975 | * exynos4_irq_demux_eint |
| 976 | * |
| 977 | * This function demuxes the IRQ from from EINTs 16 to 31. |
| 978 | * It is designed to be inlined into the specific handler |
| 979 | * s5p_irq_demux_eintX_Y. |
| 980 | * |
| 981 | * Each EINT pend/mask registers handle eight of them. |
| 982 | */ |
Eunki Kim | 330c90a | 2012-03-14 01:43:31 -0700 | [diff] [blame] | 983 | static inline void exynos_irq_demux_eint(unsigned int start) |
Kukjin Kim | cc511b8 | 2011-12-27 08:18:36 +0100 | [diff] [blame] | 984 | { |
| 985 | unsigned int irq; |
| 986 | |
Eunki Kim | 330c90a | 2012-03-14 01:43:31 -0700 | [diff] [blame] | 987 | u32 status = __raw_readl(EINT_PEND(exynos_eint_base, start)); |
| 988 | u32 mask = __raw_readl(EINT_MASK(exynos_eint_base, start)); |
Kukjin Kim | cc511b8 | 2011-12-27 08:18:36 +0100 | [diff] [blame] | 989 | |
| 990 | status &= ~mask; |
| 991 | status &= 0xff; |
| 992 | |
| 993 | while (status) { |
| 994 | irq = fls(status) - 1; |
| 995 | generic_handle_irq(irq + start); |
| 996 | status &= ~(1 << irq); |
| 997 | } |
| 998 | } |
| 999 | |
Eunki Kim | 330c90a | 2012-03-14 01:43:31 -0700 | [diff] [blame] | 1000 | static void exynos_irq_demux_eint16_31(unsigned int irq, struct irq_desc *desc) |
Kukjin Kim | cc511b8 | 2011-12-27 08:18:36 +0100 | [diff] [blame] | 1001 | { |
| 1002 | struct irq_chip *chip = irq_get_chip(irq); |
| 1003 | chained_irq_enter(chip, desc); |
Eunki Kim | 330c90a | 2012-03-14 01:43:31 -0700 | [diff] [blame] | 1004 | exynos_irq_demux_eint(IRQ_EINT(16)); |
| 1005 | exynos_irq_demux_eint(IRQ_EINT(24)); |
Kukjin Kim | cc511b8 | 2011-12-27 08:18:36 +0100 | [diff] [blame] | 1006 | chained_irq_exit(chip, desc); |
| 1007 | } |
| 1008 | |
Kukjin Kim | bb19a75 | 2012-01-25 13:48:11 +0900 | [diff] [blame] | 1009 | static void exynos_irq_eint0_15(unsigned int irq, struct irq_desc *desc) |
Kukjin Kim | cc511b8 | 2011-12-27 08:18:36 +0100 | [diff] [blame] | 1010 | { |
| 1011 | u32 *irq_data = irq_get_handler_data(irq); |
| 1012 | struct irq_chip *chip = irq_get_chip(irq); |
| 1013 | |
| 1014 | chained_irq_enter(chip, desc); |
Kukjin Kim | cc511b8 | 2011-12-27 08:18:36 +0100 | [diff] [blame] | 1015 | generic_handle_irq(*irq_data); |
Kukjin Kim | cc511b8 | 2011-12-27 08:18:36 +0100 | [diff] [blame] | 1016 | chained_irq_exit(chip, desc); |
| 1017 | } |
| 1018 | |
Eunki Kim | 330c90a | 2012-03-14 01:43:31 -0700 | [diff] [blame] | 1019 | static int __init exynos_init_irq_eint(void) |
Kukjin Kim | cc511b8 | 2011-12-27 08:18:36 +0100 | [diff] [blame] | 1020 | { |
| 1021 | int irq; |
| 1022 | |
Thomas Abraham | fef05c2 | 2012-09-07 06:07:40 +0900 | [diff] [blame] | 1023 | #ifdef CONFIG_PINCTRL_SAMSUNG |
| 1024 | /* |
| 1025 | * The Samsung pinctrl driver provides an integrated gpio/pinmux/pinconf |
| 1026 | * functionality along with support for external gpio and wakeup |
| 1027 | * interrupts. If the samsung pinctrl driver is enabled and includes |
| 1028 | * the wakeup interrupt support, then the setting up external wakeup |
| 1029 | * interrupts here can be skipped. This check here is temporary to |
| 1030 | * allow exynos4 platforms that do not use Samsung pinctrl driver to |
| 1031 | * co-exist with platforms that do. When all of the Samsung Exynos4 |
| 1032 | * platforms switch over to using the pinctrl driver, the wakeup |
| 1033 | * interrupt support code here can be completely removed. |
| 1034 | */ |
Tomasz Figa | ab7b51f | 2012-11-07 08:44:51 +0900 | [diff] [blame] | 1035 | static const struct of_device_id exynos_pinctrl_ids[] = { |
| 1036 | { .compatible = "samsung,pinctrl-exynos4210", }, |
| 1037 | { .compatible = "samsung,pinctrl-exynos4x12", }, |
| 1038 | }; |
Thomas Abraham | fef05c2 | 2012-09-07 06:07:40 +0900 | [diff] [blame] | 1039 | struct device_node *pctrl_np, *wkup_np; |
Thomas Abraham | fef05c2 | 2012-09-07 06:07:40 +0900 | [diff] [blame] | 1040 | const char *wkup_compat = "samsung,exynos4210-wakeup-eint"; |
| 1041 | |
Tomasz Figa | ab7b51f | 2012-11-07 08:44:51 +0900 | [diff] [blame] | 1042 | for_each_matching_node(pctrl_np, exynos_pinctrl_ids) { |
Thomas Abraham | fef05c2 | 2012-09-07 06:07:40 +0900 | [diff] [blame] | 1043 | if (of_device_is_available(pctrl_np)) { |
| 1044 | wkup_np = of_find_compatible_node(pctrl_np, NULL, |
| 1045 | wkup_compat); |
| 1046 | if (wkup_np) |
| 1047 | return -ENODEV; |
| 1048 | } |
| 1049 | } |
| 1050 | #endif |
Kukjin Kim | 2edb36c | 2012-11-15 15:48:56 +0900 | [diff] [blame] | 1051 | if (soc_is_exynos5440()) |
| 1052 | return 0; |
Thomas Abraham | fef05c2 | 2012-09-07 06:07:40 +0900 | [diff] [blame] | 1053 | |
Kukjin Kim | 94c7ca7 | 2012-02-11 22:15:45 +0900 | [diff] [blame] | 1054 | if (soc_is_exynos5250()) |
Eunki Kim | 330c90a | 2012-03-14 01:43:31 -0700 | [diff] [blame] | 1055 | exynos_eint_base = ioremap(EXYNOS5_PA_GPIO1, SZ_4K); |
| 1056 | else |
| 1057 | exynos_eint_base = ioremap(EXYNOS4_PA_GPIO2, SZ_4K); |
| 1058 | |
| 1059 | if (exynos_eint_base == NULL) { |
| 1060 | pr_err("unable to ioremap for EINT base address\n"); |
| 1061 | return -ENOMEM; |
| 1062 | } |
Kukjin Kim | 94c7ca7 | 2012-02-11 22:15:45 +0900 | [diff] [blame] | 1063 | |
Kukjin Kim | cc511b8 | 2011-12-27 08:18:36 +0100 | [diff] [blame] | 1064 | for (irq = 0 ; irq <= 31 ; irq++) { |
Eunki Kim | 330c90a | 2012-03-14 01:43:31 -0700 | [diff] [blame] | 1065 | irq_set_chip_and_handler(IRQ_EINT(irq), &exynos_irq_eint, |
Kukjin Kim | cc511b8 | 2011-12-27 08:18:36 +0100 | [diff] [blame] | 1066 | handle_level_irq); |
| 1067 | set_irq_flags(IRQ_EINT(irq), IRQF_VALID); |
| 1068 | } |
| 1069 | |
Eunki Kim | 330c90a | 2012-03-14 01:43:31 -0700 | [diff] [blame] | 1070 | irq_set_chained_handler(EXYNOS_IRQ_EINT16_31, exynos_irq_demux_eint16_31); |
Kukjin Kim | cc511b8 | 2011-12-27 08:18:36 +0100 | [diff] [blame] | 1071 | |
| 1072 | for (irq = 0 ; irq <= 15 ; irq++) { |
| 1073 | eint0_15_data[irq] = IRQ_EINT(irq); |
| 1074 | |
Kukjin Kim | bb19a75 | 2012-01-25 13:48:11 +0900 | [diff] [blame] | 1075 | if (soc_is_exynos5250()) { |
| 1076 | irq_set_handler_data(exynos5_eint0_15_src_int[irq], |
| 1077 | &eint0_15_data[irq]); |
| 1078 | irq_set_chained_handler(exynos5_eint0_15_src_int[irq], |
| 1079 | exynos_irq_eint0_15); |
| 1080 | } else { |
| 1081 | irq_set_handler_data(exynos4_eint0_15_src_int[irq], |
| 1082 | &eint0_15_data[irq]); |
| 1083 | irq_set_chained_handler(exynos4_eint0_15_src_int[irq], |
| 1084 | exynos_irq_eint0_15); |
| 1085 | } |
Kukjin Kim | cc511b8 | 2011-12-27 08:18:36 +0100 | [diff] [blame] | 1086 | } |
| 1087 | |
| 1088 | return 0; |
| 1089 | } |
Eunki Kim | 330c90a | 2012-03-14 01:43:31 -0700 | [diff] [blame] | 1090 | arch_initcall(exynos_init_irq_eint); |