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Eli Cohend29b7962014-10-02 12:19:43 +03001/*
Saeed Mahameede2816822015-05-28 22:28:40 +03002 * Copyright (c) 2013-2015, Mellanox Technologies, Ltd. All rights reserved.
Eli Cohend29b7962014-10-02 12:19:43 +03003 *
4 * This software is available to you under a choice of one of two
5 * licenses. You may choose to be licensed under the terms of the GNU
6 * General Public License (GPL) Version 2, available from the file
7 * COPYING in the main directory of this source tree, or the
8 * OpenIB.org BSD license below:
9 *
10 * Redistribution and use in source and binary forms, with or
11 * without modification, are permitted provided that the following
12 * conditions are met:
13 *
14 * - Redistributions of source code must retain the above
15 * copyright notice, this list of conditions and the following
16 * disclaimer.
17 *
18 * - Redistributions in binary form must reproduce the above
19 * copyright notice, this list of conditions and the following
20 * disclaimer in the documentation and/or other materials
21 * provided with the distribution.
22 *
23 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
24 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
25 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
26 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
27 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
28 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
29 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
30 * SOFTWARE.
Saeed Mahameede2816822015-05-28 22:28:40 +030031*/
Eli Cohend29b7962014-10-02 12:19:43 +030032#ifndef MLX5_IFC_H
33#define MLX5_IFC_H
34
Ilan Tayarie29341f2017-03-13 20:05:45 +020035#include "mlx5_ifc_fpga.h"
36
Eli Cohend29b7962014-10-02 12:19:43 +030037enum {
Saeed Mahameede2816822015-05-28 22:28:40 +030038 MLX5_EVENT_TYPE_CODING_COMPLETION_EVENTS = 0x0,
39 MLX5_EVENT_TYPE_CODING_PATH_MIGRATED_SUCCEEDED = 0x1,
40 MLX5_EVENT_TYPE_CODING_COMMUNICATION_ESTABLISHED = 0x2,
41 MLX5_EVENT_TYPE_CODING_SEND_QUEUE_DRAINED = 0x3,
42 MLX5_EVENT_TYPE_CODING_LAST_WQE_REACHED = 0x13,
43 MLX5_EVENT_TYPE_CODING_SRQ_LIMIT = 0x14,
44 MLX5_EVENT_TYPE_CODING_DCT_ALL_CONNECTIONS_CLOSED = 0x1c,
45 MLX5_EVENT_TYPE_CODING_DCT_ACCESS_KEY_VIOLATION = 0x1d,
46 MLX5_EVENT_TYPE_CODING_CQ_ERROR = 0x4,
47 MLX5_EVENT_TYPE_CODING_LOCAL_WQ_CATASTROPHIC_ERROR = 0x5,
48 MLX5_EVENT_TYPE_CODING_PATH_MIGRATION_FAILED = 0x7,
49 MLX5_EVENT_TYPE_CODING_PAGE_FAULT_EVENT = 0xc,
50 MLX5_EVENT_TYPE_CODING_INVALID_REQUEST_LOCAL_WQ_ERROR = 0x10,
51 MLX5_EVENT_TYPE_CODING_LOCAL_ACCESS_VIOLATION_WQ_ERROR = 0x11,
52 MLX5_EVENT_TYPE_CODING_LOCAL_SRQ_CATASTROPHIC_ERROR = 0x12,
53 MLX5_EVENT_TYPE_CODING_INTERNAL_ERROR = 0x8,
54 MLX5_EVENT_TYPE_CODING_PORT_STATE_CHANGE = 0x9,
55 MLX5_EVENT_TYPE_CODING_GPIO_EVENT = 0x15,
56 MLX5_EVENT_TYPE_CODING_REMOTE_CONFIGURATION_PROTOCOL_EVENT = 0x19,
57 MLX5_EVENT_TYPE_CODING_DOORBELL_BLUEFLAME_CONGESTION_EVENT = 0x1a,
58 MLX5_EVENT_TYPE_CODING_STALL_VL_EVENT = 0x1b,
59 MLX5_EVENT_TYPE_CODING_DROPPED_PACKET_LOGGED_EVENT = 0x1f,
60 MLX5_EVENT_TYPE_CODING_COMMAND_INTERFACE_COMPLETION = 0xa,
Ilan Tayarie29341f2017-03-13 20:05:45 +020061 MLX5_EVENT_TYPE_CODING_PAGE_REQUEST = 0xb,
62 MLX5_EVENT_TYPE_CODING_FPGA_ERROR = 0x20,
Saeed Mahameede2816822015-05-28 22:28:40 +030063};
64
65enum {
66 MLX5_MODIFY_TIR_BITMASK_LRO = 0x0,
67 MLX5_MODIFY_TIR_BITMASK_INDIRECT_TABLE = 0x1,
68 MLX5_MODIFY_TIR_BITMASK_HASH = 0x2,
69 MLX5_MODIFY_TIR_BITMASK_TUNNELED_OFFLOAD_EN = 0x3
70};
71
72enum {
Eran Ben Elishaf91e6d82015-12-14 16:34:09 +020073 MLX5_SET_HCA_CAP_OP_MOD_GENERAL_DEVICE = 0x0,
74 MLX5_SET_HCA_CAP_OP_MOD_ATOMIC = 0x3,
75};
76
77enum {
Eli Cohend29b7962014-10-02 12:19:43 +030078 MLX5_CMD_OP_QUERY_HCA_CAP = 0x100,
79 MLX5_CMD_OP_QUERY_ADAPTER = 0x101,
80 MLX5_CMD_OP_INIT_HCA = 0x102,
81 MLX5_CMD_OP_TEARDOWN_HCA = 0x103,
82 MLX5_CMD_OP_ENABLE_HCA = 0x104,
83 MLX5_CMD_OP_DISABLE_HCA = 0x105,
84 MLX5_CMD_OP_QUERY_PAGES = 0x107,
85 MLX5_CMD_OP_MANAGE_PAGES = 0x108,
86 MLX5_CMD_OP_SET_HCA_CAP = 0x109,
Saeed Mahameede2816822015-05-28 22:28:40 +030087 MLX5_CMD_OP_QUERY_ISSI = 0x10a,
88 MLX5_CMD_OP_SET_ISSI = 0x10b,
Saeed Mahameed0dbc6fe2016-11-17 13:45:59 +020089 MLX5_CMD_OP_SET_DRIVER_VERSION = 0x10d,
Eli Cohend29b7962014-10-02 12:19:43 +030090 MLX5_CMD_OP_CREATE_MKEY = 0x200,
91 MLX5_CMD_OP_QUERY_MKEY = 0x201,
92 MLX5_CMD_OP_DESTROY_MKEY = 0x202,
93 MLX5_CMD_OP_QUERY_SPECIAL_CONTEXTS = 0x203,
94 MLX5_CMD_OP_PAGE_FAULT_RESUME = 0x204,
95 MLX5_CMD_OP_CREATE_EQ = 0x301,
96 MLX5_CMD_OP_DESTROY_EQ = 0x302,
97 MLX5_CMD_OP_QUERY_EQ = 0x303,
98 MLX5_CMD_OP_GEN_EQE = 0x304,
99 MLX5_CMD_OP_CREATE_CQ = 0x400,
100 MLX5_CMD_OP_DESTROY_CQ = 0x401,
101 MLX5_CMD_OP_QUERY_CQ = 0x402,
102 MLX5_CMD_OP_MODIFY_CQ = 0x403,
103 MLX5_CMD_OP_CREATE_QP = 0x500,
104 MLX5_CMD_OP_DESTROY_QP = 0x501,
105 MLX5_CMD_OP_RST2INIT_QP = 0x502,
106 MLX5_CMD_OP_INIT2RTR_QP = 0x503,
107 MLX5_CMD_OP_RTR2RTS_QP = 0x504,
108 MLX5_CMD_OP_RTS2RTS_QP = 0x505,
109 MLX5_CMD_OP_SQERR2RTS_QP = 0x506,
110 MLX5_CMD_OP_2ERR_QP = 0x507,
111 MLX5_CMD_OP_2RST_QP = 0x50a,
112 MLX5_CMD_OP_QUERY_QP = 0x50b,
Saeed Mahameede2816822015-05-28 22:28:40 +0300113 MLX5_CMD_OP_SQD_RTS_QP = 0x50c,
Eli Cohend29b7962014-10-02 12:19:43 +0300114 MLX5_CMD_OP_INIT2INIT_QP = 0x50e,
115 MLX5_CMD_OP_CREATE_PSV = 0x600,
116 MLX5_CMD_OP_DESTROY_PSV = 0x601,
117 MLX5_CMD_OP_CREATE_SRQ = 0x700,
118 MLX5_CMD_OP_DESTROY_SRQ = 0x701,
119 MLX5_CMD_OP_QUERY_SRQ = 0x702,
120 MLX5_CMD_OP_ARM_RQ = 0x703,
Saeed Mahameede2816822015-05-28 22:28:40 +0300121 MLX5_CMD_OP_CREATE_XRC_SRQ = 0x705,
122 MLX5_CMD_OP_DESTROY_XRC_SRQ = 0x706,
123 MLX5_CMD_OP_QUERY_XRC_SRQ = 0x707,
124 MLX5_CMD_OP_ARM_XRC_SRQ = 0x708,
Eli Cohend29b7962014-10-02 12:19:43 +0300125 MLX5_CMD_OP_CREATE_DCT = 0x710,
126 MLX5_CMD_OP_DESTROY_DCT = 0x711,
127 MLX5_CMD_OP_DRAIN_DCT = 0x712,
128 MLX5_CMD_OP_QUERY_DCT = 0x713,
129 MLX5_CMD_OP_ARM_DCT_FOR_KEY_VIOLATION = 0x714,
Saeed Mahameed74862162016-06-09 15:11:34 +0300130 MLX5_CMD_OP_CREATE_XRQ = 0x717,
131 MLX5_CMD_OP_DESTROY_XRQ = 0x718,
132 MLX5_CMD_OP_QUERY_XRQ = 0x719,
133 MLX5_CMD_OP_ARM_XRQ = 0x71a,
Eli Cohend29b7962014-10-02 12:19:43 +0300134 MLX5_CMD_OP_QUERY_VPORT_STATE = 0x750,
135 MLX5_CMD_OP_MODIFY_VPORT_STATE = 0x751,
136 MLX5_CMD_OP_QUERY_ESW_VPORT_CONTEXT = 0x752,
137 MLX5_CMD_OP_MODIFY_ESW_VPORT_CONTEXT = 0x753,
138 MLX5_CMD_OP_QUERY_NIC_VPORT_CONTEXT = 0x754,
139 MLX5_CMD_OP_MODIFY_NIC_VPORT_CONTEXT = 0x755,
Saeed Mahameede2816822015-05-28 22:28:40 +0300140 MLX5_CMD_OP_QUERY_ROCE_ADDRESS = 0x760,
Eli Cohend29b7962014-10-02 12:19:43 +0300141 MLX5_CMD_OP_SET_ROCE_ADDRESS = 0x761,
Saeed Mahameede2816822015-05-28 22:28:40 +0300142 MLX5_CMD_OP_QUERY_HCA_VPORT_CONTEXT = 0x762,
143 MLX5_CMD_OP_MODIFY_HCA_VPORT_CONTEXT = 0x763,
144 MLX5_CMD_OP_QUERY_HCA_VPORT_GID = 0x764,
145 MLX5_CMD_OP_QUERY_HCA_VPORT_PKEY = 0x765,
Eli Cohend29b7962014-10-02 12:19:43 +0300146 MLX5_CMD_OP_QUERY_VPORT_COUNTER = 0x770,
147 MLX5_CMD_OP_ALLOC_Q_COUNTER = 0x771,
148 MLX5_CMD_OP_DEALLOC_Q_COUNTER = 0x772,
149 MLX5_CMD_OP_QUERY_Q_COUNTER = 0x773,
Saeed Mahameed74862162016-06-09 15:11:34 +0300150 MLX5_CMD_OP_SET_RATE_LIMIT = 0x780,
151 MLX5_CMD_OP_QUERY_RATE_LIMIT = 0x781,
Mohamad Haj Yahia813f8542016-08-11 11:21:39 +0300152 MLX5_CMD_OP_CREATE_SCHEDULING_ELEMENT = 0x782,
153 MLX5_CMD_OP_DESTROY_SCHEDULING_ELEMENT = 0x783,
154 MLX5_CMD_OP_QUERY_SCHEDULING_ELEMENT = 0x784,
155 MLX5_CMD_OP_MODIFY_SCHEDULING_ELEMENT = 0x785,
156 MLX5_CMD_OP_CREATE_QOS_PARA_VPORT = 0x786,
157 MLX5_CMD_OP_DESTROY_QOS_PARA_VPORT = 0x787,
Eli Cohend29b7962014-10-02 12:19:43 +0300158 MLX5_CMD_OP_ALLOC_PD = 0x800,
159 MLX5_CMD_OP_DEALLOC_PD = 0x801,
160 MLX5_CMD_OP_ALLOC_UAR = 0x802,
161 MLX5_CMD_OP_DEALLOC_UAR = 0x803,
162 MLX5_CMD_OP_CONFIG_INT_MODERATION = 0x804,
163 MLX5_CMD_OP_ACCESS_REG = 0x805,
164 MLX5_CMD_OP_ATTACH_TO_MCG = 0x806,
Saeed Mahameed20bb5662016-07-17 02:01:45 +0300165 MLX5_CMD_OP_DETACH_FROM_MCG = 0x807,
Eli Cohend29b7962014-10-02 12:19:43 +0300166 MLX5_CMD_OP_GET_DROPPED_PACKET_LOG = 0x80a,
167 MLX5_CMD_OP_MAD_IFC = 0x50d,
168 MLX5_CMD_OP_QUERY_MAD_DEMUX = 0x80b,
169 MLX5_CMD_OP_SET_MAD_DEMUX = 0x80c,
170 MLX5_CMD_OP_NOP = 0x80d,
171 MLX5_CMD_OP_ALLOC_XRCD = 0x80e,
172 MLX5_CMD_OP_DEALLOC_XRCD = 0x80f,
Saeed Mahameede2816822015-05-28 22:28:40 +0300173 MLX5_CMD_OP_ALLOC_TRANSPORT_DOMAIN = 0x816,
174 MLX5_CMD_OP_DEALLOC_TRANSPORT_DOMAIN = 0x817,
175 MLX5_CMD_OP_QUERY_CONG_STATUS = 0x822,
176 MLX5_CMD_OP_MODIFY_CONG_STATUS = 0x823,
177 MLX5_CMD_OP_QUERY_CONG_PARAMS = 0x824,
178 MLX5_CMD_OP_MODIFY_CONG_PARAMS = 0x825,
179 MLX5_CMD_OP_QUERY_CONG_STATISTICS = 0x826,
180 MLX5_CMD_OP_ADD_VXLAN_UDP_DPORT = 0x827,
181 MLX5_CMD_OP_DELETE_VXLAN_UDP_DPORT = 0x828,
182 MLX5_CMD_OP_SET_L2_TABLE_ENTRY = 0x829,
183 MLX5_CMD_OP_QUERY_L2_TABLE_ENTRY = 0x82a,
184 MLX5_CMD_OP_DELETE_L2_TABLE_ENTRY = 0x82b,
Tariq Toukan928cfe82016-02-22 18:17:29 +0200185 MLX5_CMD_OP_SET_WOL_ROL = 0x830,
186 MLX5_CMD_OP_QUERY_WOL_ROL = 0x831,
Aviv Heller84df61e2016-05-10 13:47:50 +0300187 MLX5_CMD_OP_CREATE_LAG = 0x840,
188 MLX5_CMD_OP_MODIFY_LAG = 0x841,
189 MLX5_CMD_OP_QUERY_LAG = 0x842,
190 MLX5_CMD_OP_DESTROY_LAG = 0x843,
191 MLX5_CMD_OP_CREATE_VPORT_LAG = 0x844,
192 MLX5_CMD_OP_DESTROY_VPORT_LAG = 0x845,
Eli Cohend29b7962014-10-02 12:19:43 +0300193 MLX5_CMD_OP_CREATE_TIR = 0x900,
194 MLX5_CMD_OP_MODIFY_TIR = 0x901,
195 MLX5_CMD_OP_DESTROY_TIR = 0x902,
196 MLX5_CMD_OP_QUERY_TIR = 0x903,
Eli Cohend29b7962014-10-02 12:19:43 +0300197 MLX5_CMD_OP_CREATE_SQ = 0x904,
198 MLX5_CMD_OP_MODIFY_SQ = 0x905,
199 MLX5_CMD_OP_DESTROY_SQ = 0x906,
200 MLX5_CMD_OP_QUERY_SQ = 0x907,
201 MLX5_CMD_OP_CREATE_RQ = 0x908,
202 MLX5_CMD_OP_MODIFY_RQ = 0x909,
203 MLX5_CMD_OP_DESTROY_RQ = 0x90a,
204 MLX5_CMD_OP_QUERY_RQ = 0x90b,
205 MLX5_CMD_OP_CREATE_RMP = 0x90c,
206 MLX5_CMD_OP_MODIFY_RMP = 0x90d,
207 MLX5_CMD_OP_DESTROY_RMP = 0x90e,
208 MLX5_CMD_OP_QUERY_RMP = 0x90f,
Saeed Mahameede2816822015-05-28 22:28:40 +0300209 MLX5_CMD_OP_CREATE_TIS = 0x912,
210 MLX5_CMD_OP_MODIFY_TIS = 0x913,
211 MLX5_CMD_OP_DESTROY_TIS = 0x914,
212 MLX5_CMD_OP_QUERY_TIS = 0x915,
213 MLX5_CMD_OP_CREATE_RQT = 0x916,
214 MLX5_CMD_OP_MODIFY_RQT = 0x917,
215 MLX5_CMD_OP_DESTROY_RQT = 0x918,
216 MLX5_CMD_OP_QUERY_RQT = 0x919,
Maor Gottlieb2cc43b42016-01-11 10:25:59 +0200217 MLX5_CMD_OP_SET_FLOW_TABLE_ROOT = 0x92f,
Saeed Mahameede2816822015-05-28 22:28:40 +0300218 MLX5_CMD_OP_CREATE_FLOW_TABLE = 0x930,
219 MLX5_CMD_OP_DESTROY_FLOW_TABLE = 0x931,
220 MLX5_CMD_OP_QUERY_FLOW_TABLE = 0x932,
221 MLX5_CMD_OP_CREATE_FLOW_GROUP = 0x933,
222 MLX5_CMD_OP_DESTROY_FLOW_GROUP = 0x934,
223 MLX5_CMD_OP_QUERY_FLOW_GROUP = 0x935,
224 MLX5_CMD_OP_SET_FLOW_TABLE_ENTRY = 0x936,
225 MLX5_CMD_OP_QUERY_FLOW_TABLE_ENTRY = 0x937,
Maor Gottlieb34a40e62016-01-11 10:26:00 +0200226 MLX5_CMD_OP_DELETE_FLOW_TABLE_ENTRY = 0x938,
Amir Vadai9dc0b282016-05-13 12:55:39 +0000227 MLX5_CMD_OP_ALLOC_FLOW_COUNTER = 0x939,
228 MLX5_CMD_OP_DEALLOC_FLOW_COUNTER = 0x93a,
229 MLX5_CMD_OP_QUERY_FLOW_COUNTER = 0x93b,
Shahar Klein86d56a12016-06-10 00:07:30 +0300230 MLX5_CMD_OP_MODIFY_FLOW_TABLE = 0x93c,
Hadar Hen Zion7adbde22016-08-03 15:08:33 +0300231 MLX5_CMD_OP_ALLOC_ENCAP_HEADER = 0x93d,
232 MLX5_CMD_OP_DEALLOC_ENCAP_HEADER = 0x93e,
Or Gerlitz2a69cb92017-01-19 19:31:25 +0200233 MLX5_CMD_OP_ALLOC_MODIFY_HEADER_CONTEXT = 0x940,
234 MLX5_CMD_OP_DEALLOC_MODIFY_HEADER_CONTEXT = 0x941,
Ilan Tayari60621182017-03-27 14:52:09 +0300235 MLX5_CMD_OP_FPGA_CREATE_QP = 0x960,
236 MLX5_CMD_OP_FPGA_MODIFY_QP = 0x961,
237 MLX5_CMD_OP_FPGA_QUERY_QP = 0x962,
238 MLX5_CMD_OP_FPGA_DESTROY_QP = 0x963,
239 MLX5_CMD_OP_FPGA_QUERY_QP_COUNTERS = 0x964,
Shahar Klein86d56a12016-06-10 00:07:30 +0300240 MLX5_CMD_OP_MAX
Saeed Mahameede2816822015-05-28 22:28:40 +0300241};
242
243struct mlx5_ifc_flow_table_fields_supported_bits {
244 u8 outer_dmac[0x1];
245 u8 outer_smac[0x1];
246 u8 outer_ether_type[0x1];
Ariel Levkovich19cc7522017-04-03 13:11:03 +0300247 u8 outer_ip_version[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +0300248 u8 outer_first_prio[0x1];
249 u8 outer_first_cfi[0x1];
250 u8 outer_first_vid[0x1];
Or Gerlitza8ade552017-06-07 17:49:56 +0300251 u8 outer_ipv4_ttl[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +0300252 u8 outer_second_prio[0x1];
253 u8 outer_second_cfi[0x1];
254 u8 outer_second_vid[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200255 u8 reserved_at_b[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +0300256 u8 outer_sip[0x1];
257 u8 outer_dip[0x1];
258 u8 outer_frag[0x1];
259 u8 outer_ip_protocol[0x1];
260 u8 outer_ip_ecn[0x1];
261 u8 outer_ip_dscp[0x1];
262 u8 outer_udp_sport[0x1];
263 u8 outer_udp_dport[0x1];
264 u8 outer_tcp_sport[0x1];
265 u8 outer_tcp_dport[0x1];
266 u8 outer_tcp_flags[0x1];
267 u8 outer_gre_protocol[0x1];
268 u8 outer_gre_key[0x1];
269 u8 outer_vxlan_vni[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200270 u8 reserved_at_1a[0x5];
Saeed Mahameede2816822015-05-28 22:28:40 +0300271 u8 source_eswitch_port[0x1];
272
273 u8 inner_dmac[0x1];
274 u8 inner_smac[0x1];
275 u8 inner_ether_type[0x1];
Ariel Levkovich19cc7522017-04-03 13:11:03 +0300276 u8 inner_ip_version[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +0300277 u8 inner_first_prio[0x1];
278 u8 inner_first_cfi[0x1];
279 u8 inner_first_vid[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200280 u8 reserved_at_27[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +0300281 u8 inner_second_prio[0x1];
282 u8 inner_second_cfi[0x1];
283 u8 inner_second_vid[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200284 u8 reserved_at_2b[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +0300285 u8 inner_sip[0x1];
286 u8 inner_dip[0x1];
287 u8 inner_frag[0x1];
288 u8 inner_ip_protocol[0x1];
289 u8 inner_ip_ecn[0x1];
290 u8 inner_ip_dscp[0x1];
291 u8 inner_udp_sport[0x1];
292 u8 inner_udp_dport[0x1];
293 u8 inner_tcp_sport[0x1];
294 u8 inner_tcp_dport[0x1];
295 u8 inner_tcp_flags[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200296 u8 reserved_at_37[0x9];
Saeed Mahameede2816822015-05-28 22:28:40 +0300297
Matan Barakb4ff3a32016-02-09 14:57:42 +0200298 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +0300299};
300
301struct mlx5_ifc_flow_table_prop_layout_bits {
302 u8 ft_support[0x1];
Amir Vadai9dc0b282016-05-13 12:55:39 +0000303 u8 reserved_at_1[0x1];
304 u8 flow_counter[0x1];
Maor Gottlieb26a81452015-12-10 17:12:39 +0200305 u8 flow_modify_en[0x1];
Maor Gottlieb2cc43b42016-01-11 10:25:59 +0200306 u8 modify_root[0x1];
Maor Gottlieb34a40e62016-01-11 10:26:00 +0200307 u8 identified_miss_table_mode[0x1];
308 u8 flow_table_modify[0x1];
Hadar Hen Zion7adbde22016-08-03 15:08:33 +0300309 u8 encap[0x1];
310 u8 decap[0x1];
311 u8 reserved_at_9[0x17];
Saeed Mahameede2816822015-05-28 22:28:40 +0300312
Matan Barakb4ff3a32016-02-09 14:57:42 +0200313 u8 reserved_at_20[0x2];
Saeed Mahameede2816822015-05-28 22:28:40 +0300314 u8 log_max_ft_size[0x6];
Or Gerlitz2a69cb92017-01-19 19:31:25 +0200315 u8 log_max_modify_header_context[0x8];
316 u8 max_modify_header_actions[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +0300317 u8 max_ft_level[0x8];
318
Matan Barakb4ff3a32016-02-09 14:57:42 +0200319 u8 reserved_at_40[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +0300320
Matan Barakb4ff3a32016-02-09 14:57:42 +0200321 u8 reserved_at_60[0x18];
Maor Gottlieb26a81452015-12-10 17:12:39 +0200322 u8 log_max_ft_num[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +0300323
Matan Barakb4ff3a32016-02-09 14:57:42 +0200324 u8 reserved_at_80[0x18];
Maor Gottlieb26a81452015-12-10 17:12:39 +0200325 u8 log_max_destination[0x8];
326
Matan Barakb4ff3a32016-02-09 14:57:42 +0200327 u8 reserved_at_a0[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +0300328 u8 log_max_flow[0x8];
329
Matan Barakb4ff3a32016-02-09 14:57:42 +0200330 u8 reserved_at_c0[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +0300331
332 struct mlx5_ifc_flow_table_fields_supported_bits ft_field_support;
333
334 struct mlx5_ifc_flow_table_fields_supported_bits ft_field_bitmask_support;
335};
336
337struct mlx5_ifc_odp_per_transport_service_cap_bits {
338 u8 send[0x1];
339 u8 receive[0x1];
340 u8 write[0x1];
341 u8 read[0x1];
Artemy Kovalyov17d2f882017-01-02 11:37:47 +0200342 u8 atomic[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +0300343 u8 srq_receive[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200344 u8 reserved_at_6[0x1a];
Saeed Mahameede2816822015-05-28 22:28:40 +0300345};
346
Maor Gottliebb4d1f032016-01-11 10:26:05 +0200347struct mlx5_ifc_ipv4_layout_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +0200348 u8 reserved_at_0[0x60];
Maor Gottliebb4d1f032016-01-11 10:26:05 +0200349
350 u8 ipv4[0x20];
351};
352
353struct mlx5_ifc_ipv6_layout_bits {
354 u8 ipv6[16][0x8];
355};
356
357union mlx5_ifc_ipv6_layout_ipv4_layout_auto_bits {
358 struct mlx5_ifc_ipv6_layout_bits ipv6_layout;
359 struct mlx5_ifc_ipv4_layout_bits ipv4_layout;
Matan Barakb4ff3a32016-02-09 14:57:42 +0200360 u8 reserved_at_0[0x80];
Maor Gottliebb4d1f032016-01-11 10:26:05 +0200361};
362
Saeed Mahameede2816822015-05-28 22:28:40 +0300363struct mlx5_ifc_fte_match_set_lyr_2_4_bits {
364 u8 smac_47_16[0x20];
365
366 u8 smac_15_0[0x10];
367 u8 ethertype[0x10];
368
369 u8 dmac_47_16[0x20];
370
371 u8 dmac_15_0[0x10];
372 u8 first_prio[0x3];
373 u8 first_cfi[0x1];
374 u8 first_vid[0xc];
375
376 u8 ip_protocol[0x8];
377 u8 ip_dscp[0x6];
378 u8 ip_ecn[0x2];
Mohamad Haj Yahia10543362016-10-09 16:25:43 +0300379 u8 cvlan_tag[0x1];
380 u8 svlan_tag[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +0300381 u8 frag[0x1];
Ariel Levkovich19cc7522017-04-03 13:11:03 +0300382 u8 ip_version[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +0300383 u8 tcp_flags[0x9];
384
385 u8 tcp_sport[0x10];
386 u8 tcp_dport[0x10];
387
Or Gerlitza8ade552017-06-07 17:49:56 +0300388 u8 reserved_at_c0[0x18];
389 u8 ttl_hoplimit[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +0300390
391 u8 udp_sport[0x10];
392 u8 udp_dport[0x10];
393
Maor Gottliebb4d1f032016-01-11 10:26:05 +0200394 union mlx5_ifc_ipv6_layout_ipv4_layout_auto_bits src_ipv4_src_ipv6;
Saeed Mahameede2816822015-05-28 22:28:40 +0300395
Maor Gottliebb4d1f032016-01-11 10:26:05 +0200396 union mlx5_ifc_ipv6_layout_ipv4_layout_auto_bits dst_ipv4_dst_ipv6;
Saeed Mahameede2816822015-05-28 22:28:40 +0300397};
398
399struct mlx5_ifc_fte_match_set_misc_bits {
Saeed Mahameed74862162016-06-09 15:11:34 +0300400 u8 reserved_at_0[0x8];
401 u8 source_sqn[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +0300402
Matan Barakb4ff3a32016-02-09 14:57:42 +0200403 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +0300404 u8 source_port[0x10];
405
406 u8 outer_second_prio[0x3];
407 u8 outer_second_cfi[0x1];
408 u8 outer_second_vid[0xc];
409 u8 inner_second_prio[0x3];
410 u8 inner_second_cfi[0x1];
411 u8 inner_second_vid[0xc];
412
Mohamad Haj Yahia10543362016-10-09 16:25:43 +0300413 u8 outer_second_cvlan_tag[0x1];
414 u8 inner_second_cvlan_tag[0x1];
415 u8 outer_second_svlan_tag[0x1];
416 u8 inner_second_svlan_tag[0x1];
417 u8 reserved_at_64[0xc];
Saeed Mahameede2816822015-05-28 22:28:40 +0300418 u8 gre_protocol[0x10];
419
420 u8 gre_key_h[0x18];
421 u8 gre_key_l[0x8];
422
423 u8 vxlan_vni[0x18];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200424 u8 reserved_at_b8[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +0300425
Matan Barakb4ff3a32016-02-09 14:57:42 +0200426 u8 reserved_at_c0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +0300427
Matan Barakb4ff3a32016-02-09 14:57:42 +0200428 u8 reserved_at_e0[0xc];
Saeed Mahameede2816822015-05-28 22:28:40 +0300429 u8 outer_ipv6_flow_label[0x14];
430
Matan Barakb4ff3a32016-02-09 14:57:42 +0200431 u8 reserved_at_100[0xc];
Saeed Mahameede2816822015-05-28 22:28:40 +0300432 u8 inner_ipv6_flow_label[0x14];
433
Matan Barakb4ff3a32016-02-09 14:57:42 +0200434 u8 reserved_at_120[0xe0];
Saeed Mahameede2816822015-05-28 22:28:40 +0300435};
436
437struct mlx5_ifc_cmd_pas_bits {
438 u8 pa_h[0x20];
439
440 u8 pa_l[0x14];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200441 u8 reserved_at_34[0xc];
Saeed Mahameede2816822015-05-28 22:28:40 +0300442};
443
444struct mlx5_ifc_uint64_bits {
445 u8 hi[0x20];
446
447 u8 lo[0x20];
448};
449
450enum {
451 MLX5_ADS_STAT_RATE_NO_LIMIT = 0x0,
452 MLX5_ADS_STAT_RATE_2_5GBPS = 0x7,
453 MLX5_ADS_STAT_RATE_10GBPS = 0x8,
454 MLX5_ADS_STAT_RATE_30GBPS = 0x9,
455 MLX5_ADS_STAT_RATE_5GBPS = 0xa,
456 MLX5_ADS_STAT_RATE_20GBPS = 0xb,
457 MLX5_ADS_STAT_RATE_40GBPS = 0xc,
458 MLX5_ADS_STAT_RATE_60GBPS = 0xd,
459 MLX5_ADS_STAT_RATE_80GBPS = 0xe,
460 MLX5_ADS_STAT_RATE_120GBPS = 0xf,
461};
462
463struct mlx5_ifc_ads_bits {
464 u8 fl[0x1];
465 u8 free_ar[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200466 u8 reserved_at_2[0xe];
Saeed Mahameede2816822015-05-28 22:28:40 +0300467 u8 pkey_index[0x10];
468
Matan Barakb4ff3a32016-02-09 14:57:42 +0200469 u8 reserved_at_20[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +0300470 u8 grh[0x1];
471 u8 mlid[0x7];
472 u8 rlid[0x10];
473
474 u8 ack_timeout[0x5];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200475 u8 reserved_at_45[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +0300476 u8 src_addr_index[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200477 u8 reserved_at_50[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +0300478 u8 stat_rate[0x4];
479 u8 hop_limit[0x8];
480
Matan Barakb4ff3a32016-02-09 14:57:42 +0200481 u8 reserved_at_60[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +0300482 u8 tclass[0x8];
483 u8 flow_label[0x14];
484
485 u8 rgid_rip[16][0x8];
486
Matan Barakb4ff3a32016-02-09 14:57:42 +0200487 u8 reserved_at_100[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +0300488 u8 f_dscp[0x1];
489 u8 f_ecn[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200490 u8 reserved_at_106[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +0300491 u8 f_eth_prio[0x1];
492 u8 ecn[0x2];
493 u8 dscp[0x6];
494 u8 udp_sport[0x10];
495
496 u8 dei_cfi[0x1];
497 u8 eth_prio[0x3];
498 u8 sl[0x4];
499 u8 port[0x8];
500 u8 rmac_47_32[0x10];
501
502 u8 rmac_31_0[0x20];
503};
504
505struct mlx5_ifc_flow_table_nic_cap_bits {
Maor Gottliebb3638e12016-03-07 18:51:46 +0200506 u8 nic_rx_multi_path_tirs[0x1];
Maor Gottliebcea824d2016-05-31 14:09:09 +0300507 u8 nic_rx_multi_path_tirs_fts[0x1];
508 u8 allow_sniffer_and_nic_rx_shared_tir[0x1];
509 u8 reserved_at_3[0x1fd];
Saeed Mahameede2816822015-05-28 22:28:40 +0300510
511 struct mlx5_ifc_flow_table_prop_layout_bits flow_table_properties_nic_receive;
512
Matan Barakb4ff3a32016-02-09 14:57:42 +0200513 u8 reserved_at_400[0x200];
Saeed Mahameede2816822015-05-28 22:28:40 +0300514
515 struct mlx5_ifc_flow_table_prop_layout_bits flow_table_properties_nic_receive_sniffer;
516
517 struct mlx5_ifc_flow_table_prop_layout_bits flow_table_properties_nic_transmit;
518
Matan Barakb4ff3a32016-02-09 14:57:42 +0200519 u8 reserved_at_a00[0x200];
Saeed Mahameede2816822015-05-28 22:28:40 +0300520
521 struct mlx5_ifc_flow_table_prop_layout_bits flow_table_properties_nic_transmit_sniffer;
522
Matan Barakb4ff3a32016-02-09 14:57:42 +0200523 u8 reserved_at_e00[0x7200];
Saeed Mahameede2816822015-05-28 22:28:40 +0300524};
525
Saeed Mahameed495716b2015-12-01 18:03:19 +0200526struct mlx5_ifc_flow_table_eswitch_cap_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +0200527 u8 reserved_at_0[0x200];
Saeed Mahameed495716b2015-12-01 18:03:19 +0200528
529 struct mlx5_ifc_flow_table_prop_layout_bits flow_table_properties_nic_esw_fdb;
530
531 struct mlx5_ifc_flow_table_prop_layout_bits flow_table_properties_esw_acl_ingress;
532
533 struct mlx5_ifc_flow_table_prop_layout_bits flow_table_properties_esw_acl_egress;
534
Matan Barakb4ff3a32016-02-09 14:57:42 +0200535 u8 reserved_at_800[0x7800];
Saeed Mahameed495716b2015-12-01 18:03:19 +0200536};
537
Saeed Mahameedd6666752015-12-01 18:03:22 +0200538struct mlx5_ifc_e_switch_cap_bits {
539 u8 vport_svlan_strip[0x1];
540 u8 vport_cvlan_strip[0x1];
541 u8 vport_svlan_insert[0x1];
542 u8 vport_cvlan_insert_if_not_exist[0x1];
543 u8 vport_cvlan_insert_overwrite[0x1];
Noa Osherovich23898c72016-06-10 00:07:37 +0300544 u8 reserved_at_5[0x19];
545 u8 nic_vport_node_guid_modify[0x1];
546 u8 nic_vport_port_guid_modify[0x1];
Saeed Mahameedd6666752015-12-01 18:03:22 +0200547
Hadar Hen Zion7adbde22016-08-03 15:08:33 +0300548 u8 vxlan_encap_decap[0x1];
549 u8 nvgre_encap_decap[0x1];
550 u8 reserved_at_22[0x9];
551 u8 log_max_encap_headers[0x5];
552 u8 reserved_2b[0x6];
553 u8 max_encap_header_size[0xa];
554
555 u8 reserved_40[0x7c0];
556
Saeed Mahameedd6666752015-12-01 18:03:22 +0200557};
558
Saeed Mahameed74862162016-06-09 15:11:34 +0300559struct mlx5_ifc_qos_cap_bits {
560 u8 packet_pacing[0x1];
Mohamad Haj Yahia813f8542016-08-11 11:21:39 +0300561 u8 esw_scheduling[0x1];
Mohamad Haj Yahiac9497c92016-12-15 14:02:53 +0200562 u8 esw_bw_share[0x1];
563 u8 esw_rate_limit[0x1];
564 u8 reserved_at_4[0x1c];
Mohamad Haj Yahia813f8542016-08-11 11:21:39 +0300565
566 u8 reserved_at_20[0x20];
567
Saeed Mahameed74862162016-06-09 15:11:34 +0300568 u8 packet_pacing_max_rate[0x20];
Mohamad Haj Yahia813f8542016-08-11 11:21:39 +0300569
Saeed Mahameed74862162016-06-09 15:11:34 +0300570 u8 packet_pacing_min_rate[0x20];
Mohamad Haj Yahia813f8542016-08-11 11:21:39 +0300571
572 u8 reserved_at_80[0x10];
Saeed Mahameed74862162016-06-09 15:11:34 +0300573 u8 packet_pacing_rate_table_size[0x10];
Mohamad Haj Yahia813f8542016-08-11 11:21:39 +0300574
575 u8 esw_element_type[0x10];
576 u8 esw_tsar_type[0x10];
577
578 u8 reserved_at_c0[0x10];
579 u8 max_qos_para_vport[0x10];
580
581 u8 max_tsar_bw_share[0x20];
582
583 u8 reserved_at_100[0x700];
Saeed Mahameed74862162016-06-09 15:11:34 +0300584};
585
Saeed Mahameede2816822015-05-28 22:28:40 +0300586struct mlx5_ifc_per_protocol_networking_offload_caps_bits {
587 u8 csum_cap[0x1];
588 u8 vlan_cap[0x1];
589 u8 lro_cap[0x1];
590 u8 lro_psh_flag[0x1];
591 u8 lro_time_stamp[0x1];
Saeed Mahameed2b31f7a2016-11-28 18:04:50 +0200592 u8 reserved_at_5[0x2];
593 u8 wqe_vlan_insert[0x1];
Tariq Toukan66189962015-11-12 19:35:26 +0200594 u8 self_lb_en_modifiable[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200595 u8 reserved_at_9[0x2];
Saeed Mahameede2816822015-05-28 22:28:40 +0300596 u8 max_lso_cap[0x5];
Leon Romanovskyc226dc22016-10-31 12:15:20 +0200597 u8 multi_pkt_send_wqe[0x2];
Hadar Hen Zioncff92d72016-07-24 16:12:40 +0300598 u8 wqe_inline_mode[0x2];
Saeed Mahameede2816822015-05-28 22:28:40 +0300599 u8 rss_ind_tbl_cap[0x4];
Saeed Mahameed7d5e1422016-04-11 23:10:22 +0300600 u8 reg_umr_sq[0x1];
601 u8 scatter_fcs[0x1];
602 u8 reserved_at_1a[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +0300603 u8 tunnel_lso_const_out_ip_id[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200604 u8 reserved_at_1c[0x2];
Saeed Mahameede2816822015-05-28 22:28:40 +0300605 u8 tunnel_statless_gre[0x1];
606 u8 tunnel_stateless_vxlan[0x1];
607
Ilan Tayari547eede2017-04-18 16:04:28 +0300608 u8 swp[0x1];
609 u8 swp_csum[0x1];
610 u8 swp_lso[0x1];
611 u8 reserved_at_23[0x1d];
Saeed Mahameede2816822015-05-28 22:28:40 +0300612
Matan Barakb4ff3a32016-02-09 14:57:42 +0200613 u8 reserved_at_40[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +0300614 u8 lro_min_mss_size[0x10];
615
Matan Barakb4ff3a32016-02-09 14:57:42 +0200616 u8 reserved_at_60[0x120];
Saeed Mahameede2816822015-05-28 22:28:40 +0300617
618 u8 lro_timer_supported_periods[4][0x20];
619
Matan Barakb4ff3a32016-02-09 14:57:42 +0200620 u8 reserved_at_200[0x600];
Saeed Mahameede2816822015-05-28 22:28:40 +0300621};
622
623struct mlx5_ifc_roce_cap_bits {
624 u8 roce_apm[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200625 u8 reserved_at_1[0x1f];
Saeed Mahameede2816822015-05-28 22:28:40 +0300626
Matan Barakb4ff3a32016-02-09 14:57:42 +0200627 u8 reserved_at_20[0x60];
Saeed Mahameede2816822015-05-28 22:28:40 +0300628
Matan Barakb4ff3a32016-02-09 14:57:42 +0200629 u8 reserved_at_80[0xc];
Saeed Mahameede2816822015-05-28 22:28:40 +0300630 u8 l3_type[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200631 u8 reserved_at_90[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +0300632 u8 roce_version[0x8];
633
Matan Barakb4ff3a32016-02-09 14:57:42 +0200634 u8 reserved_at_a0[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +0300635 u8 r_roce_dest_udp_port[0x10];
636
637 u8 r_roce_max_src_udp_port[0x10];
638 u8 r_roce_min_src_udp_port[0x10];
639
Matan Barakb4ff3a32016-02-09 14:57:42 +0200640 u8 reserved_at_e0[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +0300641 u8 roce_address_table_size[0x10];
642
Matan Barakb4ff3a32016-02-09 14:57:42 +0200643 u8 reserved_at_100[0x700];
Saeed Mahameede2816822015-05-28 22:28:40 +0300644};
645
646enum {
647 MLX5_ATOMIC_CAPS_ATOMIC_SIZE_QP_1_BYTE = 0x0,
648 MLX5_ATOMIC_CAPS_ATOMIC_SIZE_QP_2_BYTES = 0x2,
649 MLX5_ATOMIC_CAPS_ATOMIC_SIZE_QP_4_BYTES = 0x4,
650 MLX5_ATOMIC_CAPS_ATOMIC_SIZE_QP_8_BYTES = 0x8,
651 MLX5_ATOMIC_CAPS_ATOMIC_SIZE_QP_16_BYTES = 0x10,
652 MLX5_ATOMIC_CAPS_ATOMIC_SIZE_QP_32_BYTES = 0x20,
653 MLX5_ATOMIC_CAPS_ATOMIC_SIZE_QP_64_BYTES = 0x40,
654 MLX5_ATOMIC_CAPS_ATOMIC_SIZE_QP_128_BYTES = 0x80,
655 MLX5_ATOMIC_CAPS_ATOMIC_SIZE_QP_256_BYTES = 0x100,
656};
657
658enum {
659 MLX5_ATOMIC_CAPS_ATOMIC_SIZE_DC_1_BYTE = 0x1,
660 MLX5_ATOMIC_CAPS_ATOMIC_SIZE_DC_2_BYTES = 0x2,
661 MLX5_ATOMIC_CAPS_ATOMIC_SIZE_DC_4_BYTES = 0x4,
662 MLX5_ATOMIC_CAPS_ATOMIC_SIZE_DC_8_BYTES = 0x8,
663 MLX5_ATOMIC_CAPS_ATOMIC_SIZE_DC_16_BYTES = 0x10,
664 MLX5_ATOMIC_CAPS_ATOMIC_SIZE_DC_32_BYTES = 0x20,
665 MLX5_ATOMIC_CAPS_ATOMIC_SIZE_DC_64_BYTES = 0x40,
666 MLX5_ATOMIC_CAPS_ATOMIC_SIZE_DC_128_BYTES = 0x80,
667 MLX5_ATOMIC_CAPS_ATOMIC_SIZE_DC_256_BYTES = 0x100,
668};
669
670struct mlx5_ifc_atomic_caps_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +0200671 u8 reserved_at_0[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +0300672
Or Gerlitzbd108382017-05-28 15:24:17 +0300673 u8 atomic_req_8B_endianness_mode[0x2];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200674 u8 reserved_at_42[0x4];
Or Gerlitzbd108382017-05-28 15:24:17 +0300675 u8 supported_atomic_req_8B_endianness_mode_1[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +0300676
Matan Barakb4ff3a32016-02-09 14:57:42 +0200677 u8 reserved_at_47[0x19];
Saeed Mahameede2816822015-05-28 22:28:40 +0300678
Matan Barakb4ff3a32016-02-09 14:57:42 +0200679 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +0300680
Matan Barakb4ff3a32016-02-09 14:57:42 +0200681 u8 reserved_at_80[0x10];
Eran Ben Elishaf91e6d82015-12-14 16:34:09 +0200682 u8 atomic_operations[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +0300683
Matan Barakb4ff3a32016-02-09 14:57:42 +0200684 u8 reserved_at_a0[0x10];
Eran Ben Elishaf91e6d82015-12-14 16:34:09 +0200685 u8 atomic_size_qp[0x10];
686
Matan Barakb4ff3a32016-02-09 14:57:42 +0200687 u8 reserved_at_c0[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +0300688 u8 atomic_size_dc[0x10];
689
Matan Barakb4ff3a32016-02-09 14:57:42 +0200690 u8 reserved_at_e0[0x720];
Saeed Mahameede2816822015-05-28 22:28:40 +0300691};
692
693struct mlx5_ifc_odp_cap_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +0200694 u8 reserved_at_0[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +0300695
696 u8 sig[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200697 u8 reserved_at_41[0x1f];
Saeed Mahameede2816822015-05-28 22:28:40 +0300698
Matan Barakb4ff3a32016-02-09 14:57:42 +0200699 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +0300700
701 struct mlx5_ifc_odp_per_transport_service_cap_bits rc_odp_caps;
702
703 struct mlx5_ifc_odp_per_transport_service_cap_bits uc_odp_caps;
704
705 struct mlx5_ifc_odp_per_transport_service_cap_bits ud_odp_caps;
706
Matan Barakb4ff3a32016-02-09 14:57:42 +0200707 u8 reserved_at_e0[0x720];
Saeed Mahameede2816822015-05-28 22:28:40 +0300708};
709
Sagi Grimberg3f0393a2016-02-23 10:25:23 +0200710struct mlx5_ifc_calc_op {
711 u8 reserved_at_0[0x10];
712 u8 reserved_at_10[0x9];
713 u8 op_swap_endianness[0x1];
714 u8 op_min[0x1];
715 u8 op_xor[0x1];
716 u8 op_or[0x1];
717 u8 op_and[0x1];
718 u8 op_max[0x1];
719 u8 op_add[0x1];
720};
721
722struct mlx5_ifc_vector_calc_cap_bits {
723 u8 calc_matrix[0x1];
724 u8 reserved_at_1[0x1f];
725 u8 reserved_at_20[0x8];
726 u8 max_vec_count[0x8];
727 u8 reserved_at_30[0xd];
728 u8 max_chunk_size[0x3];
729 struct mlx5_ifc_calc_op calc0;
730 struct mlx5_ifc_calc_op calc1;
731 struct mlx5_ifc_calc_op calc2;
732 struct mlx5_ifc_calc_op calc3;
733
734 u8 reserved_at_e0[0x720];
735};
736
Saeed Mahameede2816822015-05-28 22:28:40 +0300737enum {
738 MLX5_WQ_TYPE_LINKED_LIST = 0x0,
739 MLX5_WQ_TYPE_CYCLIC = 0x1,
Saeed Mahameed7d5e1422016-04-11 23:10:22 +0300740 MLX5_WQ_TYPE_LINKED_LIST_STRIDING_RQ = 0x2,
Saeed Mahameede2816822015-05-28 22:28:40 +0300741};
742
743enum {
744 MLX5_WQ_END_PAD_MODE_NONE = 0x0,
745 MLX5_WQ_END_PAD_MODE_ALIGN = 0x1,
746};
747
748enum {
749 MLX5_CMD_HCA_CAP_GID_TABLE_SIZE_8_GID_ENTRIES = 0x0,
750 MLX5_CMD_HCA_CAP_GID_TABLE_SIZE_16_GID_ENTRIES = 0x1,
751 MLX5_CMD_HCA_CAP_GID_TABLE_SIZE_32_GID_ENTRIES = 0x2,
752 MLX5_CMD_HCA_CAP_GID_TABLE_SIZE_64_GID_ENTRIES = 0x3,
753 MLX5_CMD_HCA_CAP_GID_TABLE_SIZE_128_GID_ENTRIES = 0x4,
754};
755
756enum {
757 MLX5_CMD_HCA_CAP_PKEY_TABLE_SIZE_128_ENTRIES = 0x0,
758 MLX5_CMD_HCA_CAP_PKEY_TABLE_SIZE_256_ENTRIES = 0x1,
759 MLX5_CMD_HCA_CAP_PKEY_TABLE_SIZE_512_ENTRIES = 0x2,
760 MLX5_CMD_HCA_CAP_PKEY_TABLE_SIZE_1K_ENTRIES = 0x3,
761 MLX5_CMD_HCA_CAP_PKEY_TABLE_SIZE_2K_ENTRIES = 0x4,
762 MLX5_CMD_HCA_CAP_PKEY_TABLE_SIZE_4K_ENTRIES = 0x5,
763};
764
765enum {
766 MLX5_CMD_HCA_CAP_PORT_TYPE_IB = 0x0,
767 MLX5_CMD_HCA_CAP_PORT_TYPE_ETHERNET = 0x1,
768};
769
770enum {
771 MLX5_CMD_HCA_CAP_CMDIF_CHECKSUM_DISABLED = 0x0,
772 MLX5_CMD_HCA_CAP_CMDIF_CHECKSUM_INITIAL_STATE = 0x1,
773 MLX5_CMD_HCA_CAP_CMDIF_CHECKSUM_ENABLED = 0x3,
774};
775
776enum {
777 MLX5_CAP_PORT_TYPE_IB = 0x0,
778 MLX5_CAP_PORT_TYPE_ETH = 0x1,
Eli Cohend29b7962014-10-02 12:19:43 +0300779};
780
Max Gurtovoy1410a902017-05-28 10:53:10 +0300781enum {
782 MLX5_CAP_UMR_FENCE_STRONG = 0x0,
783 MLX5_CAP_UMR_FENCE_SMALL = 0x1,
784 MLX5_CAP_UMR_FENCE_NONE = 0x2,
785};
786
Eli Cohenb7755162014-10-02 12:19:44 +0300787struct mlx5_ifc_cmd_hca_cap_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +0200788 u8 reserved_at_0[0x80];
Eli Cohenb7755162014-10-02 12:19:44 +0300789
790 u8 log_max_srq_sz[0x8];
791 u8 log_max_qp_sz[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200792 u8 reserved_at_90[0xb];
Eli Cohenb7755162014-10-02 12:19:44 +0300793 u8 log_max_qp[0x5];
794
Matan Barakb4ff3a32016-02-09 14:57:42 +0200795 u8 reserved_at_a0[0xb];
Saeed Mahameede2816822015-05-28 22:28:40 +0300796 u8 log_max_srq[0x5];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200797 u8 reserved_at_b0[0x10];
Eli Cohenb7755162014-10-02 12:19:44 +0300798
Matan Barakb4ff3a32016-02-09 14:57:42 +0200799 u8 reserved_at_c0[0x8];
Eli Cohenb7755162014-10-02 12:19:44 +0300800 u8 log_max_cq_sz[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200801 u8 reserved_at_d0[0xb];
Eli Cohenb7755162014-10-02 12:19:44 +0300802 u8 log_max_cq[0x5];
803
804 u8 log_max_eq_sz[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200805 u8 reserved_at_e8[0x2];
Eli Cohenb7755162014-10-02 12:19:44 +0300806 u8 log_max_mkey[0x6];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200807 u8 reserved_at_f0[0xc];
Eli Cohenb7755162014-10-02 12:19:44 +0300808 u8 log_max_eq[0x4];
809
810 u8 max_indirection[0x8];
Artemy Kovalyovbcda1ac2017-01-02 11:37:41 +0200811 u8 fixed_buffer_size[0x1];
Eli Cohenb7755162014-10-02 12:19:44 +0300812 u8 log_max_mrw_sz[0x7];
Majd Dibbiny8812c242017-02-09 14:20:12 +0200813 u8 force_teardown[0x1];
814 u8 reserved_at_111[0x1];
Eli Cohenb7755162014-10-02 12:19:44 +0300815 u8 log_max_bsf_list_size[0x6];
Artemy Kovalyovbcda1ac2017-01-02 11:37:41 +0200816 u8 umr_extended_translation_offset[0x1];
817 u8 null_mkey[0x1];
Eli Cohenb7755162014-10-02 12:19:44 +0300818 u8 log_max_klm_list_size[0x6];
819
Matan Barakb4ff3a32016-02-09 14:57:42 +0200820 u8 reserved_at_120[0xa];
Eli Cohenb7755162014-10-02 12:19:44 +0300821 u8 log_max_ra_req_dc[0x6];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200822 u8 reserved_at_130[0xa];
Eli Cohenb7755162014-10-02 12:19:44 +0300823 u8 log_max_ra_res_dc[0x6];
824
Matan Barakb4ff3a32016-02-09 14:57:42 +0200825 u8 reserved_at_140[0xa];
Eli Cohenb7755162014-10-02 12:19:44 +0300826 u8 log_max_ra_req_qp[0x6];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200827 u8 reserved_at_150[0xa];
Eli Cohenb7755162014-10-02 12:19:44 +0300828 u8 log_max_ra_res_qp[0x6];
829
Daniel Jurgensf32f5bd2015-11-19 17:12:26 +0200830 u8 end_pad[0x1];
Eli Cohenb7755162014-10-02 12:19:44 +0300831 u8 cc_query_allowed[0x1];
832 u8 cc_modify_allowed[0x1];
Daniel Jurgensf32f5bd2015-11-19 17:12:26 +0200833 u8 start_pad[0x1];
834 u8 cache_line_128byte[0x1];
Or Gerlitz137ffd12017-06-13 18:12:13 +0300835 u8 reserved_at_165[0xb];
Saeed Mahameede2816822015-05-28 22:28:40 +0300836 u8 gid_table_size[0x10];
Eli Cohenb7755162014-10-02 12:19:44 +0300837
Saeed Mahameede2816822015-05-28 22:28:40 +0300838 u8 out_of_seq_cnt[0x1];
839 u8 vport_counters[0x1];
Saeed Mahameed74862162016-06-09 15:11:34 +0300840 u8 retransmission_q_counters[0x1];
Alex Vesker83b502a2016-08-04 17:32:02 +0300841 u8 reserved_at_183[0x1];
842 u8 modify_rq_counter_set_id[0x1];
843 u8 reserved_at_185[0x1];
Eli Cohenb7755162014-10-02 12:19:44 +0300844 u8 max_qp_cnt[0xa];
845 u8 pkey_table_size[0x10];
846
Saeed Mahameede2816822015-05-28 22:28:40 +0300847 u8 vport_group_manager[0x1];
848 u8 vhca_group_manager[0x1];
849 u8 ib_virt[0x1];
850 u8 eth_virt[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200851 u8 reserved_at_1a4[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +0300852 u8 ets[0x1];
853 u8 nic_flow_table[0x1];
Saeed Mahameed54f0a412015-12-01 18:03:10 +0200854 u8 eswitch_flow_table[0x1];
Tariq Toukane1c9c622016-04-11 23:10:21 +0300855 u8 early_vf_enable[0x1];
Gal Pressmancfdcbcea2016-12-08 15:52:00 +0200856 u8 mcam_reg[0x1];
857 u8 pcam_reg[0x1];
Eli Cohenb7755162014-10-02 12:19:44 +0300858 u8 local_ca_ack_delay[0x5];
Huy Nguyen4ce3bf22016-11-17 13:45:56 +0200859 u8 port_module_event[0x1];
Max Gurtovoy7b135582017-01-02 11:37:38 +0200860 u8 reserved_at_1b1[0x1];
Saeed Mahameed7d5e1422016-04-11 23:10:22 +0300861 u8 ports_check[0x1];
Max Gurtovoy7b135582017-01-02 11:37:38 +0200862 u8 reserved_at_1b3[0x1];
Saeed Mahameed7d5e1422016-04-11 23:10:22 +0300863 u8 disable_link_up[0x1];
864 u8 beacon_led[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +0300865 u8 port_type[0x2];
Eli Cohenb7755162014-10-02 12:19:44 +0300866 u8 num_ports[0x8];
867
Eugenia Emantayevf9a1ef72016-10-10 16:05:53 +0300868 u8 reserved_at_1c0[0x1];
869 u8 pps[0x1];
870 u8 pps_modify[0x1];
Eli Cohenb7755162014-10-02 12:19:44 +0300871 u8 log_max_msg[0x5];
Tariq Toukane1c9c622016-04-11 23:10:21 +0300872 u8 reserved_at_1c8[0x4];
Saeed Mahameed4f3961e2016-02-22 18:17:25 +0200873 u8 max_tc[0x4];
Saeed Mahameed74862162016-06-09 15:11:34 +0300874 u8 reserved_at_1d0[0x1];
875 u8 dcbx[0x1];
Ilan Tayarie29341f2017-03-13 20:05:45 +0200876 u8 reserved_at_1d2[0x3];
877 u8 fpga[0x1];
Tariq Toukan928cfe82016-02-22 18:17:29 +0200878 u8 rol_s[0x1];
879 u8 rol_g[0x1];
Tariq Toukane1c9c622016-04-11 23:10:21 +0300880 u8 reserved_at_1d8[0x1];
Tariq Toukan928cfe82016-02-22 18:17:29 +0200881 u8 wol_s[0x1];
882 u8 wol_g[0x1];
883 u8 wol_a[0x1];
884 u8 wol_b[0x1];
885 u8 wol_m[0x1];
886 u8 wol_u[0x1];
887 u8 wol_p[0x1];
Eli Cohenb7755162014-10-02 12:19:44 +0300888
889 u8 stat_rate_support[0x10];
Tariq Toukane1c9c622016-04-11 23:10:21 +0300890 u8 reserved_at_1f0[0xc];
Saeed Mahameede2816822015-05-28 22:28:40 +0300891 u8 cqe_version[0x4];
Eli Cohenb7755162014-10-02 12:19:44 +0300892
Saeed Mahameede2816822015-05-28 22:28:40 +0300893 u8 compact_address_vector[0x1];
Saeed Mahameed7d5e1422016-04-11 23:10:22 +0300894 u8 striding_rq[0x1];
Erez Shitrit500a3d02017-04-13 06:36:51 +0300895 u8 reserved_at_202[0x1];
896 u8 ipoib_enhanced_offloads[0x1];
Erez Shitrit1015c2e2016-02-21 16:27:16 +0200897 u8 ipoib_basic_offloads[0x1];
Max Gurtovoy1410a902017-05-28 10:53:10 +0300898 u8 reserved_at_205[0x5];
899 u8 umr_fence[0x2];
900 u8 reserved_at_20c[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +0300901 u8 drain_sigerr[0x1];
Eli Cohenb7755162014-10-02 12:19:44 +0300902 u8 cmdif_checksum[0x2];
903 u8 sigerr_cqe[0x1];
Tariq Toukane1c9c622016-04-11 23:10:21 +0300904 u8 reserved_at_213[0x1];
Eli Cohenb7755162014-10-02 12:19:44 +0300905 u8 wq_signature[0x1];
906 u8 sctr_data_cqe[0x1];
Tariq Toukane1c9c622016-04-11 23:10:21 +0300907 u8 reserved_at_216[0x1];
Eli Cohenb7755162014-10-02 12:19:44 +0300908 u8 sho[0x1];
909 u8 tph[0x1];
910 u8 rf[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +0300911 u8 dct[0x1];
Saeed Mahameed74862162016-06-09 15:11:34 +0300912 u8 qos[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +0300913 u8 eth_net_offloads[0x1];
Eli Cohenb7755162014-10-02 12:19:44 +0300914 u8 roce[0x1];
915 u8 atomic[0x1];
Tariq Toukane1c9c622016-04-11 23:10:21 +0300916 u8 reserved_at_21f[0x1];
Eli Cohenb7755162014-10-02 12:19:44 +0300917
918 u8 cq_oi[0x1];
919 u8 cq_resize[0x1];
920 u8 cq_moderation[0x1];
Tariq Toukane1c9c622016-04-11 23:10:21 +0300921 u8 reserved_at_223[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +0300922 u8 cq_eq_remap[0x1];
Eli Cohenb7755162014-10-02 12:19:44 +0300923 u8 pg[0x1];
924 u8 block_lb_mc[0x1];
Tariq Toukane1c9c622016-04-11 23:10:21 +0300925 u8 reserved_at_229[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +0300926 u8 scqe_break_moderation[0x1];
Saeed Mahameed7d5e1422016-04-11 23:10:22 +0300927 u8 cq_period_start_from_cqe[0x1];
Eli Cohenb7755162014-10-02 12:19:44 +0300928 u8 cd[0x1];
Tariq Toukane1c9c622016-04-11 23:10:21 +0300929 u8 reserved_at_22d[0x1];
Eli Cohenb7755162014-10-02 12:19:44 +0300930 u8 apm[0x1];
Sagi Grimberg3f0393a2016-02-23 10:25:23 +0200931 u8 vector_calc[0x1];
Saeed Mahameed7d5e1422016-04-11 23:10:22 +0300932 u8 umr_ptr_rlky[0x1];
Matan Barakd2370e02016-02-29 18:05:30 +0200933 u8 imaicl[0x1];
Tariq Toukane1c9c622016-04-11 23:10:21 +0300934 u8 reserved_at_232[0x4];
Eli Cohenb7755162014-10-02 12:19:44 +0300935 u8 qkv[0x1];
936 u8 pkv[0x1];
Haggai Eranb11a4f92016-02-29 15:45:03 +0200937 u8 set_deth_sqpn[0x1];
938 u8 reserved_at_239[0x3];
Eli Cohenb7755162014-10-02 12:19:44 +0300939 u8 xrc[0x1];
940 u8 ud[0x1];
941 u8 uc[0x1];
942 u8 rc[0x1];
943
Eli Cohena6d51b62017-01-03 23:55:23 +0200944 u8 uar_4k[0x1];
945 u8 reserved_at_241[0x9];
Eli Cohenb7755162014-10-02 12:19:44 +0300946 u8 uar_sz[0x6];
Tariq Toukane1c9c622016-04-11 23:10:21 +0300947 u8 reserved_at_250[0x8];
Eli Cohenb7755162014-10-02 12:19:44 +0300948 u8 log_pg_sz[0x8];
949
950 u8 bf[0x1];
Saeed Mahameed0dbc6fe2016-11-17 13:45:59 +0200951 u8 driver_version[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +0300952 u8 pad_tx_eth_packet[0x1];
Tariq Toukane1c9c622016-04-11 23:10:21 +0300953 u8 reserved_at_263[0x8];
Eli Cohenb7755162014-10-02 12:19:44 +0300954 u8 log_bf_reg_size[0x5];
Aviv Heller84df61e2016-05-10 13:47:50 +0300955
956 u8 reserved_at_270[0xb];
957 u8 lag_master[0x1];
958 u8 num_lag_ports[0x4];
Eli Cohenb7755162014-10-02 12:19:44 +0300959
Tariq Toukane1c9c622016-04-11 23:10:21 +0300960 u8 reserved_at_280[0x10];
Eli Cohenb7755162014-10-02 12:19:44 +0300961 u8 max_wqe_sz_sq[0x10];
962
Tariq Toukane1c9c622016-04-11 23:10:21 +0300963 u8 reserved_at_2a0[0x10];
Eli Cohenb7755162014-10-02 12:19:44 +0300964 u8 max_wqe_sz_rq[0x10];
965
Tariq Toukane1c9c622016-04-11 23:10:21 +0300966 u8 reserved_at_2c0[0x10];
Eli Cohenb7755162014-10-02 12:19:44 +0300967 u8 max_wqe_sz_sq_dc[0x10];
968
Tariq Toukane1c9c622016-04-11 23:10:21 +0300969 u8 reserved_at_2e0[0x7];
Eli Cohenb7755162014-10-02 12:19:44 +0300970 u8 max_qp_mcg[0x19];
971
Tariq Toukane1c9c622016-04-11 23:10:21 +0300972 u8 reserved_at_300[0x18];
Eli Cohenb7755162014-10-02 12:19:44 +0300973 u8 log_max_mcg[0x8];
974
Tariq Toukane1c9c622016-04-11 23:10:21 +0300975 u8 reserved_at_320[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +0300976 u8 log_max_transport_domain[0x5];
Tariq Toukane1c9c622016-04-11 23:10:21 +0300977 u8 reserved_at_328[0x3];
Eli Cohenb7755162014-10-02 12:19:44 +0300978 u8 log_max_pd[0x5];
Tariq Toukane1c9c622016-04-11 23:10:21 +0300979 u8 reserved_at_330[0xb];
Eli Cohenb7755162014-10-02 12:19:44 +0300980 u8 log_max_xrcd[0x5];
981
Amir Vadaia351a1b02016-07-14 10:32:38 +0300982 u8 reserved_at_340[0x8];
983 u8 log_max_flow_counter_bulk[0x8];
984 u8 max_flow_counter[0x10];
985
Eli Cohenb7755162014-10-02 12:19:44 +0300986
Tariq Toukane1c9c622016-04-11 23:10:21 +0300987 u8 reserved_at_360[0x3];
Eli Cohenb7755162014-10-02 12:19:44 +0300988 u8 log_max_rq[0x5];
Tariq Toukane1c9c622016-04-11 23:10:21 +0300989 u8 reserved_at_368[0x3];
Eli Cohenb7755162014-10-02 12:19:44 +0300990 u8 log_max_sq[0x5];
Tariq Toukane1c9c622016-04-11 23:10:21 +0300991 u8 reserved_at_370[0x3];
Eli Cohenb7755162014-10-02 12:19:44 +0300992 u8 log_max_tir[0x5];
Tariq Toukane1c9c622016-04-11 23:10:21 +0300993 u8 reserved_at_378[0x3];
Eli Cohenb7755162014-10-02 12:19:44 +0300994 u8 log_max_tis[0x5];
995
Saeed Mahameede2816822015-05-28 22:28:40 +0300996 u8 basic_cyclic_rcv_wqe[0x1];
Tariq Toukane1c9c622016-04-11 23:10:21 +0300997 u8 reserved_at_381[0x2];
Saeed Mahameede2816822015-05-28 22:28:40 +0300998 u8 log_max_rmp[0x5];
Tariq Toukane1c9c622016-04-11 23:10:21 +0300999 u8 reserved_at_388[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03001000 u8 log_max_rqt[0x5];
Tariq Toukane1c9c622016-04-11 23:10:21 +03001001 u8 reserved_at_390[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03001002 u8 log_max_rqt_size[0x5];
Tariq Toukane1c9c622016-04-11 23:10:21 +03001003 u8 reserved_at_398[0x3];
Eli Cohenb7755162014-10-02 12:19:44 +03001004 u8 log_max_tis_per_sq[0x5];
1005
Tariq Toukane1c9c622016-04-11 23:10:21 +03001006 u8 reserved_at_3a0[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03001007 u8 log_max_stride_sz_rq[0x5];
Tariq Toukane1c9c622016-04-11 23:10:21 +03001008 u8 reserved_at_3a8[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03001009 u8 log_min_stride_sz_rq[0x5];
Tariq Toukane1c9c622016-04-11 23:10:21 +03001010 u8 reserved_at_3b0[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03001011 u8 log_max_stride_sz_sq[0x5];
Tariq Toukane1c9c622016-04-11 23:10:21 +03001012 u8 reserved_at_3b8[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03001013 u8 log_min_stride_sz_sq[0x5];
Eli Cohenb7755162014-10-02 12:19:44 +03001014
Tariq Toukane1c9c622016-04-11 23:10:21 +03001015 u8 reserved_at_3c0[0x1b];
Saeed Mahameede2816822015-05-28 22:28:40 +03001016 u8 log_max_wq_sz[0x5];
1017
Saeed Mahameed54f0a412015-12-01 18:03:10 +02001018 u8 nic_vport_change_event[0x1];
Tariq Toukane1c9c622016-04-11 23:10:21 +03001019 u8 reserved_at_3e1[0xa];
Saeed Mahameed54f0a412015-12-01 18:03:10 +02001020 u8 log_max_vlan_list[0x5];
Tariq Toukane1c9c622016-04-11 23:10:21 +03001021 u8 reserved_at_3f0[0x3];
Saeed Mahameed54f0a412015-12-01 18:03:10 +02001022 u8 log_max_current_mc_list[0x5];
Tariq Toukane1c9c622016-04-11 23:10:21 +03001023 u8 reserved_at_3f8[0x3];
Saeed Mahameed54f0a412015-12-01 18:03:10 +02001024 u8 log_max_current_uc_list[0x5];
1025
Tariq Toukane1c9c622016-04-11 23:10:21 +03001026 u8 reserved_at_400[0x80];
Saeed Mahameed54f0a412015-12-01 18:03:10 +02001027
Tariq Toukane1c9c622016-04-11 23:10:21 +03001028 u8 reserved_at_480[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03001029 u8 log_max_l2_table[0x5];
Tariq Toukane1c9c622016-04-11 23:10:21 +03001030 u8 reserved_at_488[0x8];
Eli Cohenb7755162014-10-02 12:19:44 +03001031 u8 log_uar_page_sz[0x10];
1032
Tariq Toukane1c9c622016-04-11 23:10:21 +03001033 u8 reserved_at_4a0[0x20];
Linus Torvalds048ccca2016-01-23 18:45:06 -08001034 u8 device_frequency_mhz[0x20];
Eran Ben Elishab0844442015-12-29 14:58:30 +02001035 u8 device_frequency_khz[0x20];
Tariq Toukane1c9c622016-04-11 23:10:21 +03001036
Eli Cohena6d51b62017-01-03 23:55:23 +02001037 u8 reserved_at_500[0x20];
1038 u8 num_of_uars_per_page[0x20];
1039 u8 reserved_at_540[0x40];
Tariq Toukane1c9c622016-04-11 23:10:21 +03001040
1041 u8 reserved_at_580[0x3f];
Saeed Mahameed7d5e1422016-04-11 23:10:22 +03001042 u8 cqe_compression[0x1];
Eli Cohenb7755162014-10-02 12:19:44 +03001043
Saeed Mahameed7d5e1422016-04-11 23:10:22 +03001044 u8 cqe_compression_timeout[0x10];
1045 u8 cqe_compression_max_num[0x10];
Eli Cohenb7755162014-10-02 12:19:44 +03001046
Saeed Mahameed74862162016-06-09 15:11:34 +03001047 u8 reserved_at_5e0[0x10];
1048 u8 tag_matching[0x1];
1049 u8 rndv_offload_rc[0x1];
1050 u8 rndv_offload_dc[0x1];
1051 u8 log_tag_matching_list_sz[0x5];
Max Gurtovoy7b135582017-01-02 11:37:38 +02001052 u8 reserved_at_5f8[0x3];
Saeed Mahameed74862162016-06-09 15:11:34 +03001053 u8 log_max_xrq[0x5];
1054
Max Gurtovoy7b135582017-01-02 11:37:38 +02001055 u8 reserved_at_600[0x200];
Saeed Mahameede2816822015-05-28 22:28:40 +03001056};
1057
Saeed Mahameed81848732015-12-01 18:03:20 +02001058enum mlx5_flow_destination_type {
1059 MLX5_FLOW_DESTINATION_TYPE_VPORT = 0x0,
1060 MLX5_FLOW_DESTINATION_TYPE_FLOW_TABLE = 0x1,
1061 MLX5_FLOW_DESTINATION_TYPE_TIR = 0x2,
Amir Vadaibd5251db2016-05-13 12:55:40 +00001062
1063 MLX5_FLOW_DESTINATION_TYPE_COUNTER = 0x100,
Saeed Mahameede2816822015-05-28 22:28:40 +03001064};
1065
1066struct mlx5_ifc_dest_format_struct_bits {
1067 u8 destination_type[0x8];
1068 u8 destination_id[0x18];
1069
Matan Barakb4ff3a32016-02-09 14:57:42 +02001070 u8 reserved_at_20[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03001071};
1072
Amir Vadai9dc0b282016-05-13 12:55:39 +00001073struct mlx5_ifc_flow_counter_list_bits {
Amir Vadaia351a1b02016-07-14 10:32:38 +03001074 u8 clear[0x1];
1075 u8 num_of_counters[0xf];
Amir Vadai9dc0b282016-05-13 12:55:39 +00001076 u8 flow_counter_id[0x10];
1077
1078 u8 reserved_at_20[0x20];
1079};
1080
1081union mlx5_ifc_dest_format_struct_flow_counter_list_auto_bits {
1082 struct mlx5_ifc_dest_format_struct_bits dest_format_struct;
1083 struct mlx5_ifc_flow_counter_list_bits flow_counter_list;
1084 u8 reserved_at_0[0x40];
1085};
1086
Saeed Mahameede2816822015-05-28 22:28:40 +03001087struct mlx5_ifc_fte_match_param_bits {
1088 struct mlx5_ifc_fte_match_set_lyr_2_4_bits outer_headers;
1089
1090 struct mlx5_ifc_fte_match_set_misc_bits misc_parameters;
1091
1092 struct mlx5_ifc_fte_match_set_lyr_2_4_bits inner_headers;
1093
Matan Barakb4ff3a32016-02-09 14:57:42 +02001094 u8 reserved_at_600[0xa00];
Saeed Mahameede2816822015-05-28 22:28:40 +03001095};
1096
1097enum {
1098 MLX5_RX_HASH_FIELD_SELECT_SELECTED_FIELDS_SRC_IP = 0x0,
1099 MLX5_RX_HASH_FIELD_SELECT_SELECTED_FIELDS_DST_IP = 0x1,
1100 MLX5_RX_HASH_FIELD_SELECT_SELECTED_FIELDS_L4_SPORT = 0x2,
1101 MLX5_RX_HASH_FIELD_SELECT_SELECTED_FIELDS_L4_DPORT = 0x3,
1102 MLX5_RX_HASH_FIELD_SELECT_SELECTED_FIELDS_IPSEC_SPI = 0x4,
1103};
1104
1105struct mlx5_ifc_rx_hash_field_select_bits {
1106 u8 l3_prot_type[0x1];
1107 u8 l4_prot_type[0x1];
1108 u8 selected_fields[0x1e];
1109};
1110
1111enum {
1112 MLX5_WQ_WQ_TYPE_WQ_LINKED_LIST = 0x0,
1113 MLX5_WQ_WQ_TYPE_WQ_CYCLIC = 0x1,
1114};
1115
1116enum {
1117 MLX5_WQ_END_PADDING_MODE_END_PAD_NONE = 0x0,
1118 MLX5_WQ_END_PADDING_MODE_END_PAD_ALIGN = 0x1,
1119};
1120
1121struct mlx5_ifc_wq_bits {
1122 u8 wq_type[0x4];
1123 u8 wq_signature[0x1];
1124 u8 end_padding_mode[0x2];
1125 u8 cd_slave[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02001126 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03001127
1128 u8 hds_skip_first_sge[0x1];
1129 u8 log2_hds_buf_size[0x3];
Matan Barakb4ff3a32016-02-09 14:57:42 +02001130 u8 reserved_at_24[0x7];
Saeed Mahameede2816822015-05-28 22:28:40 +03001131 u8 page_offset[0x5];
1132 u8 lwm[0x10];
1133
Matan Barakb4ff3a32016-02-09 14:57:42 +02001134 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03001135 u8 pd[0x18];
1136
Matan Barakb4ff3a32016-02-09 14:57:42 +02001137 u8 reserved_at_60[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03001138 u8 uar_page[0x18];
1139
1140 u8 dbr_addr[0x40];
1141
1142 u8 hw_counter[0x20];
1143
1144 u8 sw_counter[0x20];
1145
Matan Barakb4ff3a32016-02-09 14:57:42 +02001146 u8 reserved_at_100[0xc];
Saeed Mahameede2816822015-05-28 22:28:40 +03001147 u8 log_wq_stride[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02001148 u8 reserved_at_110[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03001149 u8 log_wq_pg_sz[0x5];
Matan Barakb4ff3a32016-02-09 14:57:42 +02001150 u8 reserved_at_118[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03001151 u8 log_wq_sz[0x5];
1152
Saeed Mahameed7d5e1422016-04-11 23:10:22 +03001153 u8 reserved_at_120[0x15];
1154 u8 log_wqe_num_of_strides[0x3];
1155 u8 two_byte_shift_en[0x1];
1156 u8 reserved_at_139[0x4];
1157 u8 log_wqe_stride_size[0x3];
1158
1159 u8 reserved_at_140[0x4c0];
Saeed Mahameede2816822015-05-28 22:28:40 +03001160
1161 struct mlx5_ifc_cmd_pas_bits pas[0];
1162};
1163
1164struct mlx5_ifc_rq_num_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02001165 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03001166 u8 rq_num[0x18];
1167};
1168
1169struct mlx5_ifc_mac_address_layout_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02001170 u8 reserved_at_0[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03001171 u8 mac_addr_47_32[0x10];
1172
1173 u8 mac_addr_31_0[0x20];
1174};
1175
Saeed Mahameedc0046cf2015-12-01 18:03:15 +02001176struct mlx5_ifc_vlan_layout_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02001177 u8 reserved_at_0[0x14];
Saeed Mahameedc0046cf2015-12-01 18:03:15 +02001178 u8 vlan[0x0c];
1179
Matan Barakb4ff3a32016-02-09 14:57:42 +02001180 u8 reserved_at_20[0x20];
Saeed Mahameedc0046cf2015-12-01 18:03:15 +02001181};
1182
Saeed Mahameede2816822015-05-28 22:28:40 +03001183struct mlx5_ifc_cong_control_r_roce_ecn_np_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02001184 u8 reserved_at_0[0xa0];
Saeed Mahameede2816822015-05-28 22:28:40 +03001185
1186 u8 min_time_between_cnps[0x20];
1187
Matan Barakb4ff3a32016-02-09 14:57:42 +02001188 u8 reserved_at_c0[0x12];
Saeed Mahameede2816822015-05-28 22:28:40 +03001189 u8 cnp_dscp[0x6];
Matan Barakb4ff3a32016-02-09 14:57:42 +02001190 u8 reserved_at_d8[0x5];
Saeed Mahameede2816822015-05-28 22:28:40 +03001191 u8 cnp_802p_prio[0x3];
1192
Matan Barakb4ff3a32016-02-09 14:57:42 +02001193 u8 reserved_at_e0[0x720];
Saeed Mahameede2816822015-05-28 22:28:40 +03001194};
1195
1196struct mlx5_ifc_cong_control_r_roce_ecn_rp_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02001197 u8 reserved_at_0[0x60];
Saeed Mahameede2816822015-05-28 22:28:40 +03001198
Matan Barakb4ff3a32016-02-09 14:57:42 +02001199 u8 reserved_at_60[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03001200 u8 clamp_tgt_rate[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02001201 u8 reserved_at_65[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03001202 u8 clamp_tgt_rate_after_time_inc[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02001203 u8 reserved_at_69[0x17];
Saeed Mahameede2816822015-05-28 22:28:40 +03001204
Matan Barakb4ff3a32016-02-09 14:57:42 +02001205 u8 reserved_at_80[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03001206
1207 u8 rpg_time_reset[0x20];
1208
1209 u8 rpg_byte_reset[0x20];
1210
1211 u8 rpg_threshold[0x20];
1212
1213 u8 rpg_max_rate[0x20];
1214
1215 u8 rpg_ai_rate[0x20];
1216
1217 u8 rpg_hai_rate[0x20];
1218
1219 u8 rpg_gd[0x20];
1220
1221 u8 rpg_min_dec_fac[0x20];
1222
1223 u8 rpg_min_rate[0x20];
1224
Matan Barakb4ff3a32016-02-09 14:57:42 +02001225 u8 reserved_at_1c0[0xe0];
Saeed Mahameede2816822015-05-28 22:28:40 +03001226
1227 u8 rate_to_set_on_first_cnp[0x20];
1228
1229 u8 dce_tcp_g[0x20];
1230
1231 u8 dce_tcp_rtt[0x20];
1232
1233 u8 rate_reduce_monitor_period[0x20];
1234
Matan Barakb4ff3a32016-02-09 14:57:42 +02001235 u8 reserved_at_320[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03001236
1237 u8 initial_alpha_value[0x20];
1238
Matan Barakb4ff3a32016-02-09 14:57:42 +02001239 u8 reserved_at_360[0x4a0];
Saeed Mahameede2816822015-05-28 22:28:40 +03001240};
1241
1242struct mlx5_ifc_cong_control_802_1qau_rp_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02001243 u8 reserved_at_0[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03001244
1245 u8 rppp_max_rps[0x20];
1246
1247 u8 rpg_time_reset[0x20];
1248
1249 u8 rpg_byte_reset[0x20];
1250
1251 u8 rpg_threshold[0x20];
1252
1253 u8 rpg_max_rate[0x20];
1254
1255 u8 rpg_ai_rate[0x20];
1256
1257 u8 rpg_hai_rate[0x20];
1258
1259 u8 rpg_gd[0x20];
1260
1261 u8 rpg_min_dec_fac[0x20];
1262
1263 u8 rpg_min_rate[0x20];
1264
Matan Barakb4ff3a32016-02-09 14:57:42 +02001265 u8 reserved_at_1c0[0x640];
Saeed Mahameede2816822015-05-28 22:28:40 +03001266};
1267
1268enum {
1269 MLX5_RESIZE_FIELD_SELECT_RESIZE_FIELD_SELECT_LOG_CQ_SIZE = 0x1,
1270 MLX5_RESIZE_FIELD_SELECT_RESIZE_FIELD_SELECT_PAGE_OFFSET = 0x2,
1271 MLX5_RESIZE_FIELD_SELECT_RESIZE_FIELD_SELECT_LOG_PAGE_SIZE = 0x4,
1272};
1273
1274struct mlx5_ifc_resize_field_select_bits {
1275 u8 resize_field_select[0x20];
1276};
1277
1278enum {
1279 MLX5_MODIFY_FIELD_SELECT_MODIFY_FIELD_SELECT_CQ_PERIOD = 0x1,
1280 MLX5_MODIFY_FIELD_SELECT_MODIFY_FIELD_SELECT_CQ_MAX_COUNT = 0x2,
1281 MLX5_MODIFY_FIELD_SELECT_MODIFY_FIELD_SELECT_OI = 0x4,
1282 MLX5_MODIFY_FIELD_SELECT_MODIFY_FIELD_SELECT_C_EQN = 0x8,
1283};
1284
1285struct mlx5_ifc_modify_field_select_bits {
1286 u8 modify_field_select[0x20];
1287};
1288
1289struct mlx5_ifc_field_select_r_roce_np_bits {
1290 u8 field_select_r_roce_np[0x20];
1291};
1292
1293struct mlx5_ifc_field_select_r_roce_rp_bits {
1294 u8 field_select_r_roce_rp[0x20];
1295};
1296
1297enum {
1298 MLX5_FIELD_SELECT_802_1QAU_RP_FIELD_SELECT_8021QAURP_RPPP_MAX_RPS = 0x4,
1299 MLX5_FIELD_SELECT_802_1QAU_RP_FIELD_SELECT_8021QAURP_RPG_TIME_RESET = 0x8,
1300 MLX5_FIELD_SELECT_802_1QAU_RP_FIELD_SELECT_8021QAURP_RPG_BYTE_RESET = 0x10,
1301 MLX5_FIELD_SELECT_802_1QAU_RP_FIELD_SELECT_8021QAURP_RPG_THRESHOLD = 0x20,
1302 MLX5_FIELD_SELECT_802_1QAU_RP_FIELD_SELECT_8021QAURP_RPG_MAX_RATE = 0x40,
1303 MLX5_FIELD_SELECT_802_1QAU_RP_FIELD_SELECT_8021QAURP_RPG_AI_RATE = 0x80,
1304 MLX5_FIELD_SELECT_802_1QAU_RP_FIELD_SELECT_8021QAURP_RPG_HAI_RATE = 0x100,
1305 MLX5_FIELD_SELECT_802_1QAU_RP_FIELD_SELECT_8021QAURP_RPG_GD = 0x200,
1306 MLX5_FIELD_SELECT_802_1QAU_RP_FIELD_SELECT_8021QAURP_RPG_MIN_DEC_FAC = 0x400,
1307 MLX5_FIELD_SELECT_802_1QAU_RP_FIELD_SELECT_8021QAURP_RPG_MIN_RATE = 0x800,
1308};
1309
1310struct mlx5_ifc_field_select_802_1qau_rp_bits {
1311 u8 field_select_8021qaurp[0x20];
1312};
1313
1314struct mlx5_ifc_phys_layer_cntrs_bits {
1315 u8 time_since_last_clear_high[0x20];
1316
1317 u8 time_since_last_clear_low[0x20];
1318
1319 u8 symbol_errors_high[0x20];
1320
1321 u8 symbol_errors_low[0x20];
1322
1323 u8 sync_headers_errors_high[0x20];
1324
1325 u8 sync_headers_errors_low[0x20];
1326
1327 u8 edpl_bip_errors_lane0_high[0x20];
1328
1329 u8 edpl_bip_errors_lane0_low[0x20];
1330
1331 u8 edpl_bip_errors_lane1_high[0x20];
1332
1333 u8 edpl_bip_errors_lane1_low[0x20];
1334
1335 u8 edpl_bip_errors_lane2_high[0x20];
1336
1337 u8 edpl_bip_errors_lane2_low[0x20];
1338
1339 u8 edpl_bip_errors_lane3_high[0x20];
1340
1341 u8 edpl_bip_errors_lane3_low[0x20];
1342
1343 u8 fc_fec_corrected_blocks_lane0_high[0x20];
1344
1345 u8 fc_fec_corrected_blocks_lane0_low[0x20];
1346
1347 u8 fc_fec_corrected_blocks_lane1_high[0x20];
1348
1349 u8 fc_fec_corrected_blocks_lane1_low[0x20];
1350
1351 u8 fc_fec_corrected_blocks_lane2_high[0x20];
1352
1353 u8 fc_fec_corrected_blocks_lane2_low[0x20];
1354
1355 u8 fc_fec_corrected_blocks_lane3_high[0x20];
1356
1357 u8 fc_fec_corrected_blocks_lane3_low[0x20];
1358
1359 u8 fc_fec_uncorrectable_blocks_lane0_high[0x20];
1360
1361 u8 fc_fec_uncorrectable_blocks_lane0_low[0x20];
1362
1363 u8 fc_fec_uncorrectable_blocks_lane1_high[0x20];
1364
1365 u8 fc_fec_uncorrectable_blocks_lane1_low[0x20];
1366
1367 u8 fc_fec_uncorrectable_blocks_lane2_high[0x20];
1368
1369 u8 fc_fec_uncorrectable_blocks_lane2_low[0x20];
1370
1371 u8 fc_fec_uncorrectable_blocks_lane3_high[0x20];
1372
1373 u8 fc_fec_uncorrectable_blocks_lane3_low[0x20];
1374
1375 u8 rs_fec_corrected_blocks_high[0x20];
1376
1377 u8 rs_fec_corrected_blocks_low[0x20];
1378
1379 u8 rs_fec_uncorrectable_blocks_high[0x20];
1380
1381 u8 rs_fec_uncorrectable_blocks_low[0x20];
1382
1383 u8 rs_fec_no_errors_blocks_high[0x20];
1384
1385 u8 rs_fec_no_errors_blocks_low[0x20];
1386
1387 u8 rs_fec_single_error_blocks_high[0x20];
1388
1389 u8 rs_fec_single_error_blocks_low[0x20];
1390
1391 u8 rs_fec_corrected_symbols_total_high[0x20];
1392
1393 u8 rs_fec_corrected_symbols_total_low[0x20];
1394
1395 u8 rs_fec_corrected_symbols_lane0_high[0x20];
1396
1397 u8 rs_fec_corrected_symbols_lane0_low[0x20];
1398
1399 u8 rs_fec_corrected_symbols_lane1_high[0x20];
1400
1401 u8 rs_fec_corrected_symbols_lane1_low[0x20];
1402
1403 u8 rs_fec_corrected_symbols_lane2_high[0x20];
1404
1405 u8 rs_fec_corrected_symbols_lane2_low[0x20];
1406
1407 u8 rs_fec_corrected_symbols_lane3_high[0x20];
1408
1409 u8 rs_fec_corrected_symbols_lane3_low[0x20];
1410
1411 u8 link_down_events[0x20];
1412
1413 u8 successful_recovery_events[0x20];
1414
Matan Barakb4ff3a32016-02-09 14:57:42 +02001415 u8 reserved_at_640[0x180];
Saeed Mahameede2816822015-05-28 22:28:40 +03001416};
1417
Gal Pressmand8dc0502016-09-27 17:04:51 +03001418struct mlx5_ifc_phys_layer_statistical_cntrs_bits {
1419 u8 time_since_last_clear_high[0x20];
1420
1421 u8 time_since_last_clear_low[0x20];
1422
1423 u8 phy_received_bits_high[0x20];
1424
1425 u8 phy_received_bits_low[0x20];
1426
1427 u8 phy_symbol_errors_high[0x20];
1428
1429 u8 phy_symbol_errors_low[0x20];
1430
1431 u8 phy_corrected_bits_high[0x20];
1432
1433 u8 phy_corrected_bits_low[0x20];
1434
1435 u8 phy_corrected_bits_lane0_high[0x20];
1436
1437 u8 phy_corrected_bits_lane0_low[0x20];
1438
1439 u8 phy_corrected_bits_lane1_high[0x20];
1440
1441 u8 phy_corrected_bits_lane1_low[0x20];
1442
1443 u8 phy_corrected_bits_lane2_high[0x20];
1444
1445 u8 phy_corrected_bits_lane2_low[0x20];
1446
1447 u8 phy_corrected_bits_lane3_high[0x20];
1448
1449 u8 phy_corrected_bits_lane3_low[0x20];
1450
1451 u8 reserved_at_200[0x5c0];
1452};
1453
Meny Yossefi1c64bf62016-02-18 18:15:00 +02001454struct mlx5_ifc_ib_port_cntrs_grp_data_layout_bits {
1455 u8 symbol_error_counter[0x10];
1456
1457 u8 link_error_recovery_counter[0x8];
1458
1459 u8 link_downed_counter[0x8];
1460
1461 u8 port_rcv_errors[0x10];
1462
1463 u8 port_rcv_remote_physical_errors[0x10];
1464
1465 u8 port_rcv_switch_relay_errors[0x10];
1466
1467 u8 port_xmit_discards[0x10];
1468
1469 u8 port_xmit_constraint_errors[0x8];
1470
1471 u8 port_rcv_constraint_errors[0x8];
1472
1473 u8 reserved_at_70[0x8];
1474
1475 u8 link_overrun_errors[0x8];
1476
1477 u8 reserved_at_80[0x10];
1478
1479 u8 vl_15_dropped[0x10];
1480
Tim Wright133bea02017-05-01 17:30:08 +01001481 u8 reserved_at_a0[0x80];
1482
1483 u8 port_xmit_wait[0x20];
Meny Yossefi1c64bf62016-02-18 18:15:00 +02001484};
1485
Saeed Mahameede2816822015-05-28 22:28:40 +03001486struct mlx5_ifc_eth_per_traffic_grp_data_layout_bits {
1487 u8 transmit_queue_high[0x20];
1488
1489 u8 transmit_queue_low[0x20];
1490
Matan Barakb4ff3a32016-02-09 14:57:42 +02001491 u8 reserved_at_40[0x780];
Saeed Mahameede2816822015-05-28 22:28:40 +03001492};
1493
1494struct mlx5_ifc_eth_per_prio_grp_data_layout_bits {
1495 u8 rx_octets_high[0x20];
1496
1497 u8 rx_octets_low[0x20];
1498
Matan Barakb4ff3a32016-02-09 14:57:42 +02001499 u8 reserved_at_40[0xc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03001500
1501 u8 rx_frames_high[0x20];
1502
1503 u8 rx_frames_low[0x20];
1504
1505 u8 tx_octets_high[0x20];
1506
1507 u8 tx_octets_low[0x20];
1508
Matan Barakb4ff3a32016-02-09 14:57:42 +02001509 u8 reserved_at_180[0xc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03001510
1511 u8 tx_frames_high[0x20];
1512
1513 u8 tx_frames_low[0x20];
1514
1515 u8 rx_pause_high[0x20];
1516
1517 u8 rx_pause_low[0x20];
1518
1519 u8 rx_pause_duration_high[0x20];
1520
1521 u8 rx_pause_duration_low[0x20];
1522
1523 u8 tx_pause_high[0x20];
1524
1525 u8 tx_pause_low[0x20];
1526
1527 u8 tx_pause_duration_high[0x20];
1528
1529 u8 tx_pause_duration_low[0x20];
1530
1531 u8 rx_pause_transition_high[0x20];
1532
1533 u8 rx_pause_transition_low[0x20];
1534
Matan Barakb4ff3a32016-02-09 14:57:42 +02001535 u8 reserved_at_3c0[0x400];
Saeed Mahameede2816822015-05-28 22:28:40 +03001536};
1537
1538struct mlx5_ifc_eth_extended_cntrs_grp_data_layout_bits {
1539 u8 port_transmit_wait_high[0x20];
1540
1541 u8 port_transmit_wait_low[0x20];
1542
Matan Barakb4ff3a32016-02-09 14:57:42 +02001543 u8 reserved_at_40[0x780];
Saeed Mahameede2816822015-05-28 22:28:40 +03001544};
1545
1546struct mlx5_ifc_eth_3635_cntrs_grp_data_layout_bits {
1547 u8 dot3stats_alignment_errors_high[0x20];
1548
1549 u8 dot3stats_alignment_errors_low[0x20];
1550
1551 u8 dot3stats_fcs_errors_high[0x20];
1552
1553 u8 dot3stats_fcs_errors_low[0x20];
1554
1555 u8 dot3stats_single_collision_frames_high[0x20];
1556
1557 u8 dot3stats_single_collision_frames_low[0x20];
1558
1559 u8 dot3stats_multiple_collision_frames_high[0x20];
1560
1561 u8 dot3stats_multiple_collision_frames_low[0x20];
1562
1563 u8 dot3stats_sqe_test_errors_high[0x20];
1564
1565 u8 dot3stats_sqe_test_errors_low[0x20];
1566
1567 u8 dot3stats_deferred_transmissions_high[0x20];
1568
1569 u8 dot3stats_deferred_transmissions_low[0x20];
1570
1571 u8 dot3stats_late_collisions_high[0x20];
1572
1573 u8 dot3stats_late_collisions_low[0x20];
1574
1575 u8 dot3stats_excessive_collisions_high[0x20];
1576
1577 u8 dot3stats_excessive_collisions_low[0x20];
1578
1579 u8 dot3stats_internal_mac_transmit_errors_high[0x20];
1580
1581 u8 dot3stats_internal_mac_transmit_errors_low[0x20];
1582
1583 u8 dot3stats_carrier_sense_errors_high[0x20];
1584
1585 u8 dot3stats_carrier_sense_errors_low[0x20];
1586
1587 u8 dot3stats_frame_too_longs_high[0x20];
1588
1589 u8 dot3stats_frame_too_longs_low[0x20];
1590
1591 u8 dot3stats_internal_mac_receive_errors_high[0x20];
1592
1593 u8 dot3stats_internal_mac_receive_errors_low[0x20];
1594
1595 u8 dot3stats_symbol_errors_high[0x20];
1596
1597 u8 dot3stats_symbol_errors_low[0x20];
1598
1599 u8 dot3control_in_unknown_opcodes_high[0x20];
1600
1601 u8 dot3control_in_unknown_opcodes_low[0x20];
1602
1603 u8 dot3in_pause_frames_high[0x20];
1604
1605 u8 dot3in_pause_frames_low[0x20];
1606
1607 u8 dot3out_pause_frames_high[0x20];
1608
1609 u8 dot3out_pause_frames_low[0x20];
1610
Matan Barakb4ff3a32016-02-09 14:57:42 +02001611 u8 reserved_at_400[0x3c0];
Saeed Mahameede2816822015-05-28 22:28:40 +03001612};
1613
1614struct mlx5_ifc_eth_2819_cntrs_grp_data_layout_bits {
1615 u8 ether_stats_drop_events_high[0x20];
1616
1617 u8 ether_stats_drop_events_low[0x20];
1618
1619 u8 ether_stats_octets_high[0x20];
1620
1621 u8 ether_stats_octets_low[0x20];
1622
1623 u8 ether_stats_pkts_high[0x20];
1624
1625 u8 ether_stats_pkts_low[0x20];
1626
1627 u8 ether_stats_broadcast_pkts_high[0x20];
1628
1629 u8 ether_stats_broadcast_pkts_low[0x20];
1630
1631 u8 ether_stats_multicast_pkts_high[0x20];
1632
1633 u8 ether_stats_multicast_pkts_low[0x20];
1634
1635 u8 ether_stats_crc_align_errors_high[0x20];
1636
1637 u8 ether_stats_crc_align_errors_low[0x20];
1638
1639 u8 ether_stats_undersize_pkts_high[0x20];
1640
1641 u8 ether_stats_undersize_pkts_low[0x20];
1642
1643 u8 ether_stats_oversize_pkts_high[0x20];
1644
1645 u8 ether_stats_oversize_pkts_low[0x20];
1646
1647 u8 ether_stats_fragments_high[0x20];
1648
1649 u8 ether_stats_fragments_low[0x20];
1650
1651 u8 ether_stats_jabbers_high[0x20];
1652
1653 u8 ether_stats_jabbers_low[0x20];
1654
1655 u8 ether_stats_collisions_high[0x20];
1656
1657 u8 ether_stats_collisions_low[0x20];
1658
1659 u8 ether_stats_pkts64octets_high[0x20];
1660
1661 u8 ether_stats_pkts64octets_low[0x20];
1662
1663 u8 ether_stats_pkts65to127octets_high[0x20];
1664
1665 u8 ether_stats_pkts65to127octets_low[0x20];
1666
1667 u8 ether_stats_pkts128to255octets_high[0x20];
1668
1669 u8 ether_stats_pkts128to255octets_low[0x20];
1670
1671 u8 ether_stats_pkts256to511octets_high[0x20];
1672
1673 u8 ether_stats_pkts256to511octets_low[0x20];
1674
1675 u8 ether_stats_pkts512to1023octets_high[0x20];
1676
1677 u8 ether_stats_pkts512to1023octets_low[0x20];
1678
1679 u8 ether_stats_pkts1024to1518octets_high[0x20];
1680
1681 u8 ether_stats_pkts1024to1518octets_low[0x20];
1682
1683 u8 ether_stats_pkts1519to2047octets_high[0x20];
1684
1685 u8 ether_stats_pkts1519to2047octets_low[0x20];
1686
1687 u8 ether_stats_pkts2048to4095octets_high[0x20];
1688
1689 u8 ether_stats_pkts2048to4095octets_low[0x20];
1690
1691 u8 ether_stats_pkts4096to8191octets_high[0x20];
1692
1693 u8 ether_stats_pkts4096to8191octets_low[0x20];
1694
1695 u8 ether_stats_pkts8192to10239octets_high[0x20];
1696
1697 u8 ether_stats_pkts8192to10239octets_low[0x20];
1698
Matan Barakb4ff3a32016-02-09 14:57:42 +02001699 u8 reserved_at_540[0x280];
Saeed Mahameede2816822015-05-28 22:28:40 +03001700};
1701
1702struct mlx5_ifc_eth_2863_cntrs_grp_data_layout_bits {
1703 u8 if_in_octets_high[0x20];
1704
1705 u8 if_in_octets_low[0x20];
1706
1707 u8 if_in_ucast_pkts_high[0x20];
1708
1709 u8 if_in_ucast_pkts_low[0x20];
1710
1711 u8 if_in_discards_high[0x20];
1712
1713 u8 if_in_discards_low[0x20];
1714
1715 u8 if_in_errors_high[0x20];
1716
1717 u8 if_in_errors_low[0x20];
1718
1719 u8 if_in_unknown_protos_high[0x20];
1720
1721 u8 if_in_unknown_protos_low[0x20];
1722
1723 u8 if_out_octets_high[0x20];
1724
1725 u8 if_out_octets_low[0x20];
1726
1727 u8 if_out_ucast_pkts_high[0x20];
1728
1729 u8 if_out_ucast_pkts_low[0x20];
1730
1731 u8 if_out_discards_high[0x20];
1732
1733 u8 if_out_discards_low[0x20];
1734
1735 u8 if_out_errors_high[0x20];
1736
1737 u8 if_out_errors_low[0x20];
1738
1739 u8 if_in_multicast_pkts_high[0x20];
1740
1741 u8 if_in_multicast_pkts_low[0x20];
1742
1743 u8 if_in_broadcast_pkts_high[0x20];
1744
1745 u8 if_in_broadcast_pkts_low[0x20];
1746
1747 u8 if_out_multicast_pkts_high[0x20];
1748
1749 u8 if_out_multicast_pkts_low[0x20];
1750
1751 u8 if_out_broadcast_pkts_high[0x20];
1752
1753 u8 if_out_broadcast_pkts_low[0x20];
1754
Matan Barakb4ff3a32016-02-09 14:57:42 +02001755 u8 reserved_at_340[0x480];
Saeed Mahameede2816822015-05-28 22:28:40 +03001756};
1757
1758struct mlx5_ifc_eth_802_3_cntrs_grp_data_layout_bits {
1759 u8 a_frames_transmitted_ok_high[0x20];
1760
1761 u8 a_frames_transmitted_ok_low[0x20];
1762
1763 u8 a_frames_received_ok_high[0x20];
1764
1765 u8 a_frames_received_ok_low[0x20];
1766
1767 u8 a_frame_check_sequence_errors_high[0x20];
1768
1769 u8 a_frame_check_sequence_errors_low[0x20];
1770
1771 u8 a_alignment_errors_high[0x20];
1772
1773 u8 a_alignment_errors_low[0x20];
1774
1775 u8 a_octets_transmitted_ok_high[0x20];
1776
1777 u8 a_octets_transmitted_ok_low[0x20];
1778
1779 u8 a_octets_received_ok_high[0x20];
1780
1781 u8 a_octets_received_ok_low[0x20];
1782
1783 u8 a_multicast_frames_xmitted_ok_high[0x20];
1784
1785 u8 a_multicast_frames_xmitted_ok_low[0x20];
1786
1787 u8 a_broadcast_frames_xmitted_ok_high[0x20];
1788
1789 u8 a_broadcast_frames_xmitted_ok_low[0x20];
1790
1791 u8 a_multicast_frames_received_ok_high[0x20];
1792
1793 u8 a_multicast_frames_received_ok_low[0x20];
1794
1795 u8 a_broadcast_frames_received_ok_high[0x20];
1796
1797 u8 a_broadcast_frames_received_ok_low[0x20];
1798
1799 u8 a_in_range_length_errors_high[0x20];
1800
1801 u8 a_in_range_length_errors_low[0x20];
1802
1803 u8 a_out_of_range_length_field_high[0x20];
1804
1805 u8 a_out_of_range_length_field_low[0x20];
1806
1807 u8 a_frame_too_long_errors_high[0x20];
1808
1809 u8 a_frame_too_long_errors_low[0x20];
1810
1811 u8 a_symbol_error_during_carrier_high[0x20];
1812
1813 u8 a_symbol_error_during_carrier_low[0x20];
1814
1815 u8 a_mac_control_frames_transmitted_high[0x20];
1816
1817 u8 a_mac_control_frames_transmitted_low[0x20];
1818
1819 u8 a_mac_control_frames_received_high[0x20];
1820
1821 u8 a_mac_control_frames_received_low[0x20];
1822
1823 u8 a_unsupported_opcodes_received_high[0x20];
1824
1825 u8 a_unsupported_opcodes_received_low[0x20];
1826
1827 u8 a_pause_mac_ctrl_frames_received_high[0x20];
1828
1829 u8 a_pause_mac_ctrl_frames_received_low[0x20];
1830
1831 u8 a_pause_mac_ctrl_frames_transmitted_high[0x20];
1832
1833 u8 a_pause_mac_ctrl_frames_transmitted_low[0x20];
1834
Matan Barakb4ff3a32016-02-09 14:57:42 +02001835 u8 reserved_at_4c0[0x300];
Saeed Mahameede2816822015-05-28 22:28:40 +03001836};
1837
Gal Pressman8ed1a632016-11-17 13:46:01 +02001838struct mlx5_ifc_pcie_perf_cntrs_grp_data_layout_bits {
1839 u8 life_time_counter_high[0x20];
1840
1841 u8 life_time_counter_low[0x20];
1842
1843 u8 rx_errors[0x20];
1844
1845 u8 tx_errors[0x20];
1846
1847 u8 l0_to_recovery_eieos[0x20];
1848
1849 u8 l0_to_recovery_ts[0x20];
1850
1851 u8 l0_to_recovery_framing[0x20];
1852
1853 u8 l0_to_recovery_retrain[0x20];
1854
1855 u8 crc_error_dllp[0x20];
1856
1857 u8 crc_error_tlp[0x20];
1858
1859 u8 reserved_at_140[0x680];
1860};
1861
Saeed Mahameede2816822015-05-28 22:28:40 +03001862struct mlx5_ifc_cmd_inter_comp_event_bits {
1863 u8 command_completion_vector[0x20];
1864
Matan Barakb4ff3a32016-02-09 14:57:42 +02001865 u8 reserved_at_20[0xc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03001866};
1867
1868struct mlx5_ifc_stall_vl_event_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02001869 u8 reserved_at_0[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03001870 u8 port_num[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02001871 u8 reserved_at_19[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03001872 u8 vl[0x4];
1873
Matan Barakb4ff3a32016-02-09 14:57:42 +02001874 u8 reserved_at_20[0xa0];
Saeed Mahameede2816822015-05-28 22:28:40 +03001875};
1876
1877struct mlx5_ifc_db_bf_congestion_event_bits {
1878 u8 event_subtype[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02001879 u8 reserved_at_8[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03001880 u8 congestion_level[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02001881 u8 reserved_at_18[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03001882
Matan Barakb4ff3a32016-02-09 14:57:42 +02001883 u8 reserved_at_20[0xa0];
Saeed Mahameede2816822015-05-28 22:28:40 +03001884};
1885
1886struct mlx5_ifc_gpio_event_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02001887 u8 reserved_at_0[0x60];
Saeed Mahameede2816822015-05-28 22:28:40 +03001888
1889 u8 gpio_event_hi[0x20];
1890
1891 u8 gpio_event_lo[0x20];
1892
Matan Barakb4ff3a32016-02-09 14:57:42 +02001893 u8 reserved_at_a0[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03001894};
1895
1896struct mlx5_ifc_port_state_change_event_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02001897 u8 reserved_at_0[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03001898
1899 u8 port_num[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02001900 u8 reserved_at_44[0x1c];
Saeed Mahameede2816822015-05-28 22:28:40 +03001901
Matan Barakb4ff3a32016-02-09 14:57:42 +02001902 u8 reserved_at_60[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03001903};
1904
1905struct mlx5_ifc_dropped_packet_logged_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02001906 u8 reserved_at_0[0xe0];
Saeed Mahameede2816822015-05-28 22:28:40 +03001907};
1908
1909enum {
1910 MLX5_CQ_ERROR_SYNDROME_CQ_OVERRUN = 0x1,
1911 MLX5_CQ_ERROR_SYNDROME_CQ_ACCESS_VIOLATION_ERROR = 0x2,
1912};
1913
1914struct mlx5_ifc_cq_error_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02001915 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03001916 u8 cqn[0x18];
1917
Matan Barakb4ff3a32016-02-09 14:57:42 +02001918 u8 reserved_at_20[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03001919
Matan Barakb4ff3a32016-02-09 14:57:42 +02001920 u8 reserved_at_40[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03001921 u8 syndrome[0x8];
1922
Matan Barakb4ff3a32016-02-09 14:57:42 +02001923 u8 reserved_at_60[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03001924};
1925
1926struct mlx5_ifc_rdma_page_fault_event_bits {
1927 u8 bytes_committed[0x20];
1928
1929 u8 r_key[0x20];
1930
Matan Barakb4ff3a32016-02-09 14:57:42 +02001931 u8 reserved_at_40[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03001932 u8 packet_len[0x10];
1933
1934 u8 rdma_op_len[0x20];
1935
1936 u8 rdma_va[0x40];
1937
Matan Barakb4ff3a32016-02-09 14:57:42 +02001938 u8 reserved_at_c0[0x5];
Saeed Mahameede2816822015-05-28 22:28:40 +03001939 u8 rdma[0x1];
1940 u8 write[0x1];
1941 u8 requestor[0x1];
1942 u8 qp_number[0x18];
1943};
1944
1945struct mlx5_ifc_wqe_associated_page_fault_event_bits {
1946 u8 bytes_committed[0x20];
1947
Matan Barakb4ff3a32016-02-09 14:57:42 +02001948 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03001949 u8 wqe_index[0x10];
1950
Matan Barakb4ff3a32016-02-09 14:57:42 +02001951 u8 reserved_at_40[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03001952 u8 len[0x10];
1953
Matan Barakb4ff3a32016-02-09 14:57:42 +02001954 u8 reserved_at_60[0x60];
Saeed Mahameede2816822015-05-28 22:28:40 +03001955
Matan Barakb4ff3a32016-02-09 14:57:42 +02001956 u8 reserved_at_c0[0x5];
Saeed Mahameede2816822015-05-28 22:28:40 +03001957 u8 rdma[0x1];
1958 u8 write_read[0x1];
1959 u8 requestor[0x1];
1960 u8 qpn[0x18];
1961};
1962
1963struct mlx5_ifc_qp_events_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02001964 u8 reserved_at_0[0xa0];
Saeed Mahameede2816822015-05-28 22:28:40 +03001965
1966 u8 type[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02001967 u8 reserved_at_a8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03001968
Matan Barakb4ff3a32016-02-09 14:57:42 +02001969 u8 reserved_at_c0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03001970 u8 qpn_rqn_sqn[0x18];
1971};
1972
1973struct mlx5_ifc_dct_events_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02001974 u8 reserved_at_0[0xc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03001975
Matan Barakb4ff3a32016-02-09 14:57:42 +02001976 u8 reserved_at_c0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03001977 u8 dct_number[0x18];
1978};
1979
1980struct mlx5_ifc_comp_event_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02001981 u8 reserved_at_0[0xc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03001982
Matan Barakb4ff3a32016-02-09 14:57:42 +02001983 u8 reserved_at_c0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03001984 u8 cq_number[0x18];
1985};
1986
1987enum {
1988 MLX5_QPC_STATE_RST = 0x0,
1989 MLX5_QPC_STATE_INIT = 0x1,
1990 MLX5_QPC_STATE_RTR = 0x2,
1991 MLX5_QPC_STATE_RTS = 0x3,
1992 MLX5_QPC_STATE_SQER = 0x4,
1993 MLX5_QPC_STATE_ERR = 0x6,
1994 MLX5_QPC_STATE_SQD = 0x7,
1995 MLX5_QPC_STATE_SUSPENDED = 0x9,
1996};
1997
1998enum {
1999 MLX5_QPC_ST_RC = 0x0,
2000 MLX5_QPC_ST_UC = 0x1,
2001 MLX5_QPC_ST_UD = 0x2,
2002 MLX5_QPC_ST_XRC = 0x3,
2003 MLX5_QPC_ST_DCI = 0x5,
2004 MLX5_QPC_ST_QP0 = 0x7,
2005 MLX5_QPC_ST_QP1 = 0x8,
2006 MLX5_QPC_ST_RAW_DATAGRAM = 0x9,
2007 MLX5_QPC_ST_REG_UMR = 0xc,
2008};
2009
2010enum {
2011 MLX5_QPC_PM_STATE_ARMED = 0x0,
2012 MLX5_QPC_PM_STATE_REARM = 0x1,
2013 MLX5_QPC_PM_STATE_RESERVED = 0x2,
2014 MLX5_QPC_PM_STATE_MIGRATED = 0x3,
2015};
2016
2017enum {
2018 MLX5_QPC_END_PADDING_MODE_SCATTER_AS_IS = 0x0,
2019 MLX5_QPC_END_PADDING_MODE_PAD_TO_CACHE_LINE_ALIGNMENT = 0x1,
2020};
2021
2022enum {
2023 MLX5_QPC_MTU_256_BYTES = 0x1,
2024 MLX5_QPC_MTU_512_BYTES = 0x2,
2025 MLX5_QPC_MTU_1K_BYTES = 0x3,
2026 MLX5_QPC_MTU_2K_BYTES = 0x4,
2027 MLX5_QPC_MTU_4K_BYTES = 0x5,
2028 MLX5_QPC_MTU_RAW_ETHERNET_QP = 0x7,
2029};
2030
2031enum {
2032 MLX5_QPC_ATOMIC_MODE_IB_SPEC = 0x1,
2033 MLX5_QPC_ATOMIC_MODE_ONLY_8B = 0x2,
2034 MLX5_QPC_ATOMIC_MODE_UP_TO_8B = 0x3,
2035 MLX5_QPC_ATOMIC_MODE_UP_TO_16B = 0x4,
2036 MLX5_QPC_ATOMIC_MODE_UP_TO_32B = 0x5,
2037 MLX5_QPC_ATOMIC_MODE_UP_TO_64B = 0x6,
2038 MLX5_QPC_ATOMIC_MODE_UP_TO_128B = 0x7,
2039 MLX5_QPC_ATOMIC_MODE_UP_TO_256B = 0x8,
2040};
2041
2042enum {
2043 MLX5_QPC_CS_REQ_DISABLE = 0x0,
2044 MLX5_QPC_CS_REQ_UP_TO_32B = 0x11,
2045 MLX5_QPC_CS_REQ_UP_TO_64B = 0x22,
2046};
2047
2048enum {
2049 MLX5_QPC_CS_RES_DISABLE = 0x0,
2050 MLX5_QPC_CS_RES_UP_TO_32B = 0x1,
2051 MLX5_QPC_CS_RES_UP_TO_64B = 0x2,
2052};
2053
2054struct mlx5_ifc_qpc_bits {
2055 u8 state[0x4];
Aviv Heller84df61e2016-05-10 13:47:50 +03002056 u8 lag_tx_port_affinity[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03002057 u8 st[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002058 u8 reserved_at_10[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03002059 u8 pm_state[0x2];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002060 u8 reserved_at_15[0x7];
Saeed Mahameede2816822015-05-28 22:28:40 +03002061 u8 end_padding_mode[0x2];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002062 u8 reserved_at_1e[0x2];
Saeed Mahameede2816822015-05-28 22:28:40 +03002063
2064 u8 wq_signature[0x1];
2065 u8 block_lb_mc[0x1];
2066 u8 atomic_like_write_en[0x1];
2067 u8 latency_sensitive[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002068 u8 reserved_at_24[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03002069 u8 drain_sigerr[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002070 u8 reserved_at_26[0x2];
Saeed Mahameede2816822015-05-28 22:28:40 +03002071 u8 pd[0x18];
2072
2073 u8 mtu[0x3];
2074 u8 log_msg_max[0x5];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002075 u8 reserved_at_48[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03002076 u8 log_rq_size[0x4];
2077 u8 log_rq_stride[0x3];
2078 u8 no_sq[0x1];
2079 u8 log_sq_size[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002080 u8 reserved_at_55[0x6];
Saeed Mahameede2816822015-05-28 22:28:40 +03002081 u8 rlky[0x1];
Erez Shitrit1015c2e2016-02-21 16:27:16 +02002082 u8 ulp_stateless_offload_mode[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03002083
2084 u8 counter_set_id[0x8];
2085 u8 uar_page[0x18];
2086
Matan Barakb4ff3a32016-02-09 14:57:42 +02002087 u8 reserved_at_80[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002088 u8 user_index[0x18];
2089
Matan Barakb4ff3a32016-02-09 14:57:42 +02002090 u8 reserved_at_a0[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03002091 u8 log_page_size[0x5];
2092 u8 remote_qpn[0x18];
2093
2094 struct mlx5_ifc_ads_bits primary_address_path;
2095
2096 struct mlx5_ifc_ads_bits secondary_address_path;
2097
2098 u8 log_ack_req_freq[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002099 u8 reserved_at_384[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03002100 u8 log_sra_max[0x3];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002101 u8 reserved_at_38b[0x2];
Saeed Mahameede2816822015-05-28 22:28:40 +03002102 u8 retry_count[0x3];
2103 u8 rnr_retry[0x3];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002104 u8 reserved_at_393[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03002105 u8 fre[0x1];
2106 u8 cur_rnr_retry[0x3];
2107 u8 cur_retry_count[0x3];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002108 u8 reserved_at_39b[0x5];
Saeed Mahameede2816822015-05-28 22:28:40 +03002109
Matan Barakb4ff3a32016-02-09 14:57:42 +02002110 u8 reserved_at_3a0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03002111
Matan Barakb4ff3a32016-02-09 14:57:42 +02002112 u8 reserved_at_3c0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002113 u8 next_send_psn[0x18];
2114
Matan Barakb4ff3a32016-02-09 14:57:42 +02002115 u8 reserved_at_3e0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002116 u8 cqn_snd[0x18];
2117
Saeed Mahameed09a7d9e2016-07-19 01:17:59 +03002118 u8 reserved_at_400[0x8];
2119 u8 deth_sqpn[0x18];
2120
2121 u8 reserved_at_420[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03002122
Matan Barakb4ff3a32016-02-09 14:57:42 +02002123 u8 reserved_at_440[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002124 u8 last_acked_psn[0x18];
2125
Matan Barakb4ff3a32016-02-09 14:57:42 +02002126 u8 reserved_at_460[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002127 u8 ssn[0x18];
2128
Matan Barakb4ff3a32016-02-09 14:57:42 +02002129 u8 reserved_at_480[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002130 u8 log_rra_max[0x3];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002131 u8 reserved_at_48b[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03002132 u8 atomic_mode[0x4];
2133 u8 rre[0x1];
2134 u8 rwe[0x1];
2135 u8 rae[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002136 u8 reserved_at_493[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03002137 u8 page_offset[0x6];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002138 u8 reserved_at_49a[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03002139 u8 cd_slave_receive[0x1];
2140 u8 cd_slave_send[0x1];
2141 u8 cd_master[0x1];
2142
Matan Barakb4ff3a32016-02-09 14:57:42 +02002143 u8 reserved_at_4a0[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03002144 u8 min_rnr_nak[0x5];
2145 u8 next_rcv_psn[0x18];
2146
Matan Barakb4ff3a32016-02-09 14:57:42 +02002147 u8 reserved_at_4c0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002148 u8 xrcd[0x18];
2149
Matan Barakb4ff3a32016-02-09 14:57:42 +02002150 u8 reserved_at_4e0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002151 u8 cqn_rcv[0x18];
2152
2153 u8 dbr_addr[0x40];
2154
2155 u8 q_key[0x20];
2156
Matan Barakb4ff3a32016-02-09 14:57:42 +02002157 u8 reserved_at_560[0x5];
Saeed Mahameede2816822015-05-28 22:28:40 +03002158 u8 rq_type[0x3];
Saeed Mahameed74862162016-06-09 15:11:34 +03002159 u8 srqn_rmpn_xrqn[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03002160
Matan Barakb4ff3a32016-02-09 14:57:42 +02002161 u8 reserved_at_580[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002162 u8 rmsn[0x18];
2163
2164 u8 hw_sq_wqebb_counter[0x10];
2165 u8 sw_sq_wqebb_counter[0x10];
2166
2167 u8 hw_rq_counter[0x20];
2168
2169 u8 sw_rq_counter[0x20];
2170
Matan Barakb4ff3a32016-02-09 14:57:42 +02002171 u8 reserved_at_600[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03002172
Matan Barakb4ff3a32016-02-09 14:57:42 +02002173 u8 reserved_at_620[0xf];
Saeed Mahameede2816822015-05-28 22:28:40 +03002174 u8 cgs[0x1];
2175 u8 cs_req[0x8];
2176 u8 cs_res[0x8];
2177
2178 u8 dc_access_key[0x40];
2179
Matan Barakb4ff3a32016-02-09 14:57:42 +02002180 u8 reserved_at_680[0xc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03002181};
2182
2183struct mlx5_ifc_roce_addr_layout_bits {
2184 u8 source_l3_address[16][0x8];
2185
Matan Barakb4ff3a32016-02-09 14:57:42 +02002186 u8 reserved_at_80[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03002187 u8 vlan_valid[0x1];
2188 u8 vlan_id[0xc];
2189 u8 source_mac_47_32[0x10];
2190
2191 u8 source_mac_31_0[0x20];
2192
Matan Barakb4ff3a32016-02-09 14:57:42 +02002193 u8 reserved_at_c0[0x14];
Saeed Mahameede2816822015-05-28 22:28:40 +03002194 u8 roce_l3_type[0x4];
2195 u8 roce_version[0x8];
2196
Matan Barakb4ff3a32016-02-09 14:57:42 +02002197 u8 reserved_at_e0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03002198};
2199
2200union mlx5_ifc_hca_cap_union_bits {
2201 struct mlx5_ifc_cmd_hca_cap_bits cmd_hca_cap;
2202 struct mlx5_ifc_odp_cap_bits odp_cap;
2203 struct mlx5_ifc_atomic_caps_bits atomic_caps;
2204 struct mlx5_ifc_roce_cap_bits roce_cap;
2205 struct mlx5_ifc_per_protocol_networking_offload_caps_bits per_protocol_networking_offload_caps;
2206 struct mlx5_ifc_flow_table_nic_cap_bits flow_table_nic_cap;
Saeed Mahameed495716b2015-12-01 18:03:19 +02002207 struct mlx5_ifc_flow_table_eswitch_cap_bits flow_table_eswitch_cap;
Saeed Mahameedd6666752015-12-01 18:03:22 +02002208 struct mlx5_ifc_e_switch_cap_bits e_switch_cap;
Sagi Grimberg3f0393a2016-02-23 10:25:23 +02002209 struct mlx5_ifc_vector_calc_cap_bits vector_calc_cap;
Saeed Mahameed74862162016-06-09 15:11:34 +03002210 struct mlx5_ifc_qos_cap_bits qos_cap;
Ilan Tayarie29341f2017-03-13 20:05:45 +02002211 struct mlx5_ifc_fpga_cap_bits fpga_cap;
Matan Barakb4ff3a32016-02-09 14:57:42 +02002212 u8 reserved_at_0[0x8000];
Saeed Mahameede2816822015-05-28 22:28:40 +03002213};
2214
2215enum {
2216 MLX5_FLOW_CONTEXT_ACTION_ALLOW = 0x1,
2217 MLX5_FLOW_CONTEXT_ACTION_DROP = 0x2,
2218 MLX5_FLOW_CONTEXT_ACTION_FWD_DEST = 0x4,
Amir Vadai9dc0b282016-05-13 12:55:39 +00002219 MLX5_FLOW_CONTEXT_ACTION_COUNT = 0x8,
Hadar Hen Zion7adbde22016-08-03 15:08:33 +03002220 MLX5_FLOW_CONTEXT_ACTION_ENCAP = 0x10,
2221 MLX5_FLOW_CONTEXT_ACTION_DECAP = 0x20,
Or Gerlitz2a69cb92017-01-19 19:31:25 +02002222 MLX5_FLOW_CONTEXT_ACTION_MOD_HDR = 0x40,
Saeed Mahameede2816822015-05-28 22:28:40 +03002223};
2224
2225struct mlx5_ifc_flow_context_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02002226 u8 reserved_at_0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03002227
2228 u8 group_id[0x20];
2229
Matan Barakb4ff3a32016-02-09 14:57:42 +02002230 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002231 u8 flow_tag[0x18];
2232
Matan Barakb4ff3a32016-02-09 14:57:42 +02002233 u8 reserved_at_60[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03002234 u8 action[0x10];
2235
Matan Barakb4ff3a32016-02-09 14:57:42 +02002236 u8 reserved_at_80[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002237 u8 destination_list_size[0x18];
2238
Amir Vadai9dc0b282016-05-13 12:55:39 +00002239 u8 reserved_at_a0[0x8];
2240 u8 flow_counter_list_size[0x18];
2241
Hadar Hen Zion7adbde22016-08-03 15:08:33 +03002242 u8 encap_id[0x20];
2243
Or Gerlitz2a69cb92017-01-19 19:31:25 +02002244 u8 modify_header_id[0x20];
2245
2246 u8 reserved_at_100[0x100];
Saeed Mahameede2816822015-05-28 22:28:40 +03002247
2248 struct mlx5_ifc_fte_match_param_bits match_value;
2249
Matan Barakb4ff3a32016-02-09 14:57:42 +02002250 u8 reserved_at_1200[0x600];
Saeed Mahameede2816822015-05-28 22:28:40 +03002251
Amir Vadai9dc0b282016-05-13 12:55:39 +00002252 union mlx5_ifc_dest_format_struct_flow_counter_list_auto_bits destination[0];
Saeed Mahameede2816822015-05-28 22:28:40 +03002253};
2254
2255enum {
2256 MLX5_XRC_SRQC_STATE_GOOD = 0x0,
2257 MLX5_XRC_SRQC_STATE_ERROR = 0x1,
2258};
2259
2260struct mlx5_ifc_xrc_srqc_bits {
2261 u8 state[0x4];
2262 u8 log_xrc_srq_size[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002263 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03002264
2265 u8 wq_signature[0x1];
2266 u8 cont_srq[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002267 u8 reserved_at_22[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03002268 u8 rlky[0x1];
2269 u8 basic_cyclic_rcv_wqe[0x1];
2270 u8 log_rq_stride[0x3];
2271 u8 xrcd[0x18];
2272
2273 u8 page_offset[0x6];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002274 u8 reserved_at_46[0x2];
Saeed Mahameede2816822015-05-28 22:28:40 +03002275 u8 cqn[0x18];
2276
Matan Barakb4ff3a32016-02-09 14:57:42 +02002277 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03002278
2279 u8 user_index_equal_xrc_srqn[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002280 u8 reserved_at_81[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03002281 u8 log_page_size[0x6];
2282 u8 user_index[0x18];
2283
Matan Barakb4ff3a32016-02-09 14:57:42 +02002284 u8 reserved_at_a0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03002285
Matan Barakb4ff3a32016-02-09 14:57:42 +02002286 u8 reserved_at_c0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002287 u8 pd[0x18];
2288
2289 u8 lwm[0x10];
2290 u8 wqe_cnt[0x10];
2291
Matan Barakb4ff3a32016-02-09 14:57:42 +02002292 u8 reserved_at_100[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03002293
2294 u8 db_record_addr_h[0x20];
2295
2296 u8 db_record_addr_l[0x1e];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002297 u8 reserved_at_17e[0x2];
Saeed Mahameede2816822015-05-28 22:28:40 +03002298
Matan Barakb4ff3a32016-02-09 14:57:42 +02002299 u8 reserved_at_180[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03002300};
2301
2302struct mlx5_ifc_traffic_counter_bits {
2303 u8 packets[0x40];
2304
2305 u8 octets[0x40];
2306};
2307
2308struct mlx5_ifc_tisc_bits {
Aviv Heller84df61e2016-05-10 13:47:50 +03002309 u8 strict_lag_tx_port_affinity[0x1];
2310 u8 reserved_at_1[0x3];
2311 u8 lag_tx_port_affinity[0x04];
2312
2313 u8 reserved_at_8[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03002314 u8 prio[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002315 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03002316
Matan Barakb4ff3a32016-02-09 14:57:42 +02002317 u8 reserved_at_20[0x100];
Saeed Mahameede2816822015-05-28 22:28:40 +03002318
Matan Barakb4ff3a32016-02-09 14:57:42 +02002319 u8 reserved_at_120[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002320 u8 transport_domain[0x18];
2321
Erez Shitrit500a3d02017-04-13 06:36:51 +03002322 u8 reserved_at_140[0x8];
2323 u8 underlay_qpn[0x18];
2324 u8 reserved_at_160[0x3a0];
Saeed Mahameede2816822015-05-28 22:28:40 +03002325};
2326
2327enum {
2328 MLX5_TIRC_DISP_TYPE_DIRECT = 0x0,
2329 MLX5_TIRC_DISP_TYPE_INDIRECT = 0x1,
2330};
2331
2332enum {
2333 MLX5_TIRC_LRO_ENABLE_MASK_IPV4_LRO = 0x1,
2334 MLX5_TIRC_LRO_ENABLE_MASK_IPV6_LRO = 0x2,
2335};
2336
2337enum {
Saeed Mahameed2be69672015-07-23 23:35:56 +03002338 MLX5_RX_HASH_FN_NONE = 0x0,
2339 MLX5_RX_HASH_FN_INVERTED_XOR8 = 0x1,
2340 MLX5_RX_HASH_FN_TOEPLITZ = 0x2,
Saeed Mahameede2816822015-05-28 22:28:40 +03002341};
2342
2343enum {
2344 MLX5_TIRC_SELF_LB_BLOCK_BLOCK_UNICAST_ = 0x1,
2345 MLX5_TIRC_SELF_LB_BLOCK_BLOCK_MULTICAST_ = 0x2,
2346};
2347
2348struct mlx5_ifc_tirc_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02002349 u8 reserved_at_0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03002350
2351 u8 disp_type[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002352 u8 reserved_at_24[0x1c];
Saeed Mahameede2816822015-05-28 22:28:40 +03002353
Matan Barakb4ff3a32016-02-09 14:57:42 +02002354 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03002355
Matan Barakb4ff3a32016-02-09 14:57:42 +02002356 u8 reserved_at_80[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03002357 u8 lro_timeout_period_usecs[0x10];
2358 u8 lro_enable_mask[0x4];
2359 u8 lro_max_ip_payload_size[0x8];
2360
Matan Barakb4ff3a32016-02-09 14:57:42 +02002361 u8 reserved_at_a0[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03002362
Matan Barakb4ff3a32016-02-09 14:57:42 +02002363 u8 reserved_at_e0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002364 u8 inline_rqn[0x18];
2365
2366 u8 rx_hash_symmetric[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002367 u8 reserved_at_101[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03002368 u8 tunneled_offload_en[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002369 u8 reserved_at_103[0x5];
Saeed Mahameede2816822015-05-28 22:28:40 +03002370 u8 indirect_table[0x18];
2371
2372 u8 rx_hash_fn[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002373 u8 reserved_at_124[0x2];
Saeed Mahameede2816822015-05-28 22:28:40 +03002374 u8 self_lb_block[0x2];
2375 u8 transport_domain[0x18];
2376
2377 u8 rx_hash_toeplitz_key[10][0x20];
2378
2379 struct mlx5_ifc_rx_hash_field_select_bits rx_hash_field_selector_outer;
2380
2381 struct mlx5_ifc_rx_hash_field_select_bits rx_hash_field_selector_inner;
2382
Matan Barakb4ff3a32016-02-09 14:57:42 +02002383 u8 reserved_at_2c0[0x4c0];
Saeed Mahameede2816822015-05-28 22:28:40 +03002384};
2385
2386enum {
2387 MLX5_SRQC_STATE_GOOD = 0x0,
2388 MLX5_SRQC_STATE_ERROR = 0x1,
2389};
2390
2391struct mlx5_ifc_srqc_bits {
2392 u8 state[0x4];
2393 u8 log_srq_size[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002394 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03002395
2396 u8 wq_signature[0x1];
2397 u8 cont_srq[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002398 u8 reserved_at_22[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03002399 u8 rlky[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002400 u8 reserved_at_24[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03002401 u8 log_rq_stride[0x3];
2402 u8 xrcd[0x18];
2403
2404 u8 page_offset[0x6];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002405 u8 reserved_at_46[0x2];
Saeed Mahameede2816822015-05-28 22:28:40 +03002406 u8 cqn[0x18];
2407
Matan Barakb4ff3a32016-02-09 14:57:42 +02002408 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03002409
Matan Barakb4ff3a32016-02-09 14:57:42 +02002410 u8 reserved_at_80[0x2];
Saeed Mahameede2816822015-05-28 22:28:40 +03002411 u8 log_page_size[0x6];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002412 u8 reserved_at_88[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03002413
Matan Barakb4ff3a32016-02-09 14:57:42 +02002414 u8 reserved_at_a0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03002415
Matan Barakb4ff3a32016-02-09 14:57:42 +02002416 u8 reserved_at_c0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002417 u8 pd[0x18];
2418
2419 u8 lwm[0x10];
2420 u8 wqe_cnt[0x10];
2421
Matan Barakb4ff3a32016-02-09 14:57:42 +02002422 u8 reserved_at_100[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03002423
Haggai Abramonvsky01949d02015-06-04 19:30:38 +03002424 u8 dbr_addr[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03002425
Matan Barakb4ff3a32016-02-09 14:57:42 +02002426 u8 reserved_at_180[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03002427};
2428
2429enum {
2430 MLX5_SQC_STATE_RST = 0x0,
2431 MLX5_SQC_STATE_RDY = 0x1,
2432 MLX5_SQC_STATE_ERR = 0x3,
2433};
2434
2435struct mlx5_ifc_sqc_bits {
2436 u8 rlky[0x1];
2437 u8 cd_master[0x1];
2438 u8 fre[0x1];
2439 u8 flush_in_error_en[0x1];
Hadar Hen Zioncff92d72016-07-24 16:12:40 +03002440 u8 reserved_at_4[0x1];
2441 u8 min_wqe_inline_mode[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03002442 u8 state[0x4];
Saeed Mahameed7d5e1422016-04-11 23:10:22 +03002443 u8 reg_umr[0x1];
Ilan Tayari547eede2017-04-18 16:04:28 +03002444 u8 allow_swp[0x1];
2445 u8 reserved_at_e[0x12];
Saeed Mahameede2816822015-05-28 22:28:40 +03002446
Matan Barakb4ff3a32016-02-09 14:57:42 +02002447 u8 reserved_at_20[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002448 u8 user_index[0x18];
2449
Matan Barakb4ff3a32016-02-09 14:57:42 +02002450 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002451 u8 cqn[0x18];
2452
Saeed Mahameed74862162016-06-09 15:11:34 +03002453 u8 reserved_at_60[0x90];
Saeed Mahameede2816822015-05-28 22:28:40 +03002454
Saeed Mahameed74862162016-06-09 15:11:34 +03002455 u8 packet_pacing_rate_limit_index[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03002456 u8 tis_lst_sz[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002457 u8 reserved_at_110[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03002458
Matan Barakb4ff3a32016-02-09 14:57:42 +02002459 u8 reserved_at_120[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03002460
Matan Barakb4ff3a32016-02-09 14:57:42 +02002461 u8 reserved_at_160[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002462 u8 tis_num_0[0x18];
2463
2464 struct mlx5_ifc_wq_bits wq;
2465};
2466
Mohamad Haj Yahia813f8542016-08-11 11:21:39 +03002467enum {
2468 SCHEDULING_CONTEXT_ELEMENT_TYPE_TSAR = 0x0,
2469 SCHEDULING_CONTEXT_ELEMENT_TYPE_VPORT = 0x1,
2470 SCHEDULING_CONTEXT_ELEMENT_TYPE_VPORT_TC = 0x2,
2471 SCHEDULING_CONTEXT_ELEMENT_TYPE_PARA_VPORT_TC = 0x3,
2472};
2473
2474struct mlx5_ifc_scheduling_context_bits {
2475 u8 element_type[0x8];
2476 u8 reserved_at_8[0x18];
2477
2478 u8 element_attributes[0x20];
2479
2480 u8 parent_element_id[0x20];
2481
2482 u8 reserved_at_60[0x40];
2483
2484 u8 bw_share[0x20];
2485
2486 u8 max_average_bw[0x20];
2487
2488 u8 reserved_at_e0[0x120];
2489};
2490
Saeed Mahameede2816822015-05-28 22:28:40 +03002491struct mlx5_ifc_rqtc_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02002492 u8 reserved_at_0[0xa0];
Saeed Mahameede2816822015-05-28 22:28:40 +03002493
Matan Barakb4ff3a32016-02-09 14:57:42 +02002494 u8 reserved_at_a0[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03002495 u8 rqt_max_size[0x10];
2496
Matan Barakb4ff3a32016-02-09 14:57:42 +02002497 u8 reserved_at_c0[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03002498 u8 rqt_actual_size[0x10];
2499
Matan Barakb4ff3a32016-02-09 14:57:42 +02002500 u8 reserved_at_e0[0x6a0];
Saeed Mahameede2816822015-05-28 22:28:40 +03002501
2502 struct mlx5_ifc_rq_num_bits rq_num[0];
2503};
2504
2505enum {
2506 MLX5_RQC_MEM_RQ_TYPE_MEMORY_RQ_INLINE = 0x0,
2507 MLX5_RQC_MEM_RQ_TYPE_MEMORY_RQ_RMP = 0x1,
2508};
2509
2510enum {
2511 MLX5_RQC_STATE_RST = 0x0,
2512 MLX5_RQC_STATE_RDY = 0x1,
2513 MLX5_RQC_STATE_ERR = 0x3,
2514};
2515
2516struct mlx5_ifc_rqc_bits {
2517 u8 rlky[0x1];
Saeed Mahameed7d5e1422016-04-11 23:10:22 +03002518 u8 reserved_at_1[0x1];
2519 u8 scatter_fcs[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03002520 u8 vsd[0x1];
2521 u8 mem_rq_type[0x4];
2522 u8 state[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002523 u8 reserved_at_c[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03002524 u8 flush_in_error_en[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002525 u8 reserved_at_e[0x12];
Saeed Mahameede2816822015-05-28 22:28:40 +03002526
Matan Barakb4ff3a32016-02-09 14:57:42 +02002527 u8 reserved_at_20[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002528 u8 user_index[0x18];
2529
Matan Barakb4ff3a32016-02-09 14:57:42 +02002530 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002531 u8 cqn[0x18];
2532
2533 u8 counter_set_id[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002534 u8 reserved_at_68[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03002535
Matan Barakb4ff3a32016-02-09 14:57:42 +02002536 u8 reserved_at_80[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002537 u8 rmpn[0x18];
2538
Matan Barakb4ff3a32016-02-09 14:57:42 +02002539 u8 reserved_at_a0[0xe0];
Saeed Mahameede2816822015-05-28 22:28:40 +03002540
2541 struct mlx5_ifc_wq_bits wq;
2542};
2543
2544enum {
2545 MLX5_RMPC_STATE_RDY = 0x1,
2546 MLX5_RMPC_STATE_ERR = 0x3,
2547};
2548
2549struct mlx5_ifc_rmpc_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02002550 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002551 u8 state[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002552 u8 reserved_at_c[0x14];
Saeed Mahameede2816822015-05-28 22:28:40 +03002553
2554 u8 basic_cyclic_rcv_wqe[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002555 u8 reserved_at_21[0x1f];
Saeed Mahameede2816822015-05-28 22:28:40 +03002556
Matan Barakb4ff3a32016-02-09 14:57:42 +02002557 u8 reserved_at_40[0x140];
Saeed Mahameede2816822015-05-28 22:28:40 +03002558
2559 struct mlx5_ifc_wq_bits wq;
2560};
2561
Saeed Mahameede2816822015-05-28 22:28:40 +03002562struct mlx5_ifc_nic_vport_context_bits {
Hadar Hen Zioncff92d72016-07-24 16:12:40 +03002563 u8 reserved_at_0[0x5];
2564 u8 min_wqe_inline_mode[0x3];
2565 u8 reserved_at_8[0x17];
Saeed Mahameede2816822015-05-28 22:28:40 +03002566 u8 roce_en[0x1];
2567
Saeed Mahameedd82b7312015-12-01 18:03:14 +02002568 u8 arm_change_event[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002569 u8 reserved_at_21[0x1a];
Saeed Mahameedd82b7312015-12-01 18:03:14 +02002570 u8 event_on_mtu[0x1];
2571 u8 event_on_promisc_change[0x1];
2572 u8 event_on_vlan_change[0x1];
2573 u8 event_on_mc_address_change[0x1];
2574 u8 event_on_uc_address_change[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03002575
Matan Barakb4ff3a32016-02-09 14:57:42 +02002576 u8 reserved_at_40[0xf0];
Saeed Mahameedd82b7312015-12-01 18:03:14 +02002577
2578 u8 mtu[0x10];
2579
Achiad Shochat9efa7522015-12-23 18:47:20 +02002580 u8 system_image_guid[0x40];
2581 u8 port_guid[0x40];
2582 u8 node_guid[0x40];
2583
Matan Barakb4ff3a32016-02-09 14:57:42 +02002584 u8 reserved_at_200[0x140];
Achiad Shochat9efa7522015-12-23 18:47:20 +02002585 u8 qkey_violation_counter[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002586 u8 reserved_at_350[0x430];
Saeed Mahameedd82b7312015-12-01 18:03:14 +02002587
2588 u8 promisc_uc[0x1];
2589 u8 promisc_mc[0x1];
2590 u8 promisc_all[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002591 u8 reserved_at_783[0x2];
Saeed Mahameede2816822015-05-28 22:28:40 +03002592 u8 allowed_list_type[0x3];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002593 u8 reserved_at_788[0xc];
Saeed Mahameede2816822015-05-28 22:28:40 +03002594 u8 allowed_list_size[0xc];
2595
2596 struct mlx5_ifc_mac_address_layout_bits permanent_address;
2597
Matan Barakb4ff3a32016-02-09 14:57:42 +02002598 u8 reserved_at_7e0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03002599
2600 u8 current_uc_mac_address[0][0x40];
2601};
2602
2603enum {
2604 MLX5_MKC_ACCESS_MODE_PA = 0x0,
2605 MLX5_MKC_ACCESS_MODE_MTT = 0x1,
2606 MLX5_MKC_ACCESS_MODE_KLMS = 0x2,
Artemy Kovalyovbcda1ac2017-01-02 11:37:41 +02002607 MLX5_MKC_ACCESS_MODE_KSM = 0x3,
Saeed Mahameede2816822015-05-28 22:28:40 +03002608};
2609
2610struct mlx5_ifc_mkc_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02002611 u8 reserved_at_0[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03002612 u8 free[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002613 u8 reserved_at_2[0xd];
Saeed Mahameede2816822015-05-28 22:28:40 +03002614 u8 small_fence_on_rdma_read_response[0x1];
2615 u8 umr_en[0x1];
2616 u8 a[0x1];
2617 u8 rw[0x1];
2618 u8 rr[0x1];
2619 u8 lw[0x1];
2620 u8 lr[0x1];
2621 u8 access_mode[0x2];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002622 u8 reserved_at_18[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002623
2624 u8 qpn[0x18];
2625 u8 mkey_7_0[0x8];
2626
Matan Barakb4ff3a32016-02-09 14:57:42 +02002627 u8 reserved_at_40[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03002628
2629 u8 length64[0x1];
2630 u8 bsf_en[0x1];
2631 u8 sync_umr[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002632 u8 reserved_at_63[0x2];
Saeed Mahameede2816822015-05-28 22:28:40 +03002633 u8 expected_sigerr_count[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002634 u8 reserved_at_66[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03002635 u8 en_rinval[0x1];
2636 u8 pd[0x18];
2637
2638 u8 start_addr[0x40];
2639
2640 u8 len[0x40];
2641
2642 u8 bsf_octword_size[0x20];
2643
Matan Barakb4ff3a32016-02-09 14:57:42 +02002644 u8 reserved_at_120[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03002645
2646 u8 translations_octword_size[0x20];
2647
Matan Barakb4ff3a32016-02-09 14:57:42 +02002648 u8 reserved_at_1c0[0x1b];
Saeed Mahameede2816822015-05-28 22:28:40 +03002649 u8 log_page_size[0x5];
2650
Matan Barakb4ff3a32016-02-09 14:57:42 +02002651 u8 reserved_at_1e0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03002652};
2653
2654struct mlx5_ifc_pkey_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02002655 u8 reserved_at_0[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03002656 u8 pkey[0x10];
2657};
2658
2659struct mlx5_ifc_array128_auto_bits {
2660 u8 array128_auto[16][0x8];
2661};
2662
2663struct mlx5_ifc_hca_vport_context_bits {
2664 u8 field_select[0x20];
2665
Matan Barakb4ff3a32016-02-09 14:57:42 +02002666 u8 reserved_at_20[0xe0];
Saeed Mahameede2816822015-05-28 22:28:40 +03002667
2668 u8 sm_virt_aware[0x1];
2669 u8 has_smi[0x1];
2670 u8 has_raw[0x1];
2671 u8 grh_required[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002672 u8 reserved_at_104[0xc];
Majd Dibbiny707c4602015-06-04 19:30:41 +03002673 u8 port_physical_state[0x4];
2674 u8 vport_state_policy[0x4];
2675 u8 port_state[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03002676 u8 vport_state[0x4];
2677
Matan Barakb4ff3a32016-02-09 14:57:42 +02002678 u8 reserved_at_120[0x20];
Majd Dibbiny707c4602015-06-04 19:30:41 +03002679
2680 u8 system_image_guid[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03002681
2682 u8 port_guid[0x40];
2683
2684 u8 node_guid[0x40];
2685
2686 u8 cap_mask1[0x20];
2687
2688 u8 cap_mask1_field_select[0x20];
2689
2690 u8 cap_mask2[0x20];
2691
2692 u8 cap_mask2_field_select[0x20];
2693
Matan Barakb4ff3a32016-02-09 14:57:42 +02002694 u8 reserved_at_280[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03002695
2696 u8 lid[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002697 u8 reserved_at_310[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03002698 u8 init_type_reply[0x4];
2699 u8 lmc[0x3];
2700 u8 subnet_timeout[0x5];
2701
2702 u8 sm_lid[0x10];
2703 u8 sm_sl[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002704 u8 reserved_at_334[0xc];
Saeed Mahameede2816822015-05-28 22:28:40 +03002705
2706 u8 qkey_violation_counter[0x10];
2707 u8 pkey_violation_counter[0x10];
2708
Matan Barakb4ff3a32016-02-09 14:57:42 +02002709 u8 reserved_at_360[0xca0];
Saeed Mahameede2816822015-05-28 22:28:40 +03002710};
2711
Saeed Mahameedd6666752015-12-01 18:03:22 +02002712struct mlx5_ifc_esw_vport_context_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02002713 u8 reserved_at_0[0x3];
Saeed Mahameedd6666752015-12-01 18:03:22 +02002714 u8 vport_svlan_strip[0x1];
2715 u8 vport_cvlan_strip[0x1];
2716 u8 vport_svlan_insert[0x1];
2717 u8 vport_cvlan_insert[0x2];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002718 u8 reserved_at_8[0x18];
Saeed Mahameedd6666752015-12-01 18:03:22 +02002719
Matan Barakb4ff3a32016-02-09 14:57:42 +02002720 u8 reserved_at_20[0x20];
Saeed Mahameedd6666752015-12-01 18:03:22 +02002721
2722 u8 svlan_cfi[0x1];
2723 u8 svlan_pcp[0x3];
2724 u8 svlan_id[0xc];
2725 u8 cvlan_cfi[0x1];
2726 u8 cvlan_pcp[0x3];
2727 u8 cvlan_id[0xc];
2728
Matan Barakb4ff3a32016-02-09 14:57:42 +02002729 u8 reserved_at_60[0x7a0];
Saeed Mahameedd6666752015-12-01 18:03:22 +02002730};
2731
Saeed Mahameede2816822015-05-28 22:28:40 +03002732enum {
2733 MLX5_EQC_STATUS_OK = 0x0,
2734 MLX5_EQC_STATUS_EQ_WRITE_FAILURE = 0xa,
2735};
2736
2737enum {
2738 MLX5_EQC_ST_ARMED = 0x9,
2739 MLX5_EQC_ST_FIRED = 0xa,
2740};
2741
2742struct mlx5_ifc_eqc_bits {
2743 u8 status[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002744 u8 reserved_at_4[0x9];
Saeed Mahameede2816822015-05-28 22:28:40 +03002745 u8 ec[0x1];
2746 u8 oi[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002747 u8 reserved_at_f[0x5];
Saeed Mahameede2816822015-05-28 22:28:40 +03002748 u8 st[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002749 u8 reserved_at_18[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002750
Matan Barakb4ff3a32016-02-09 14:57:42 +02002751 u8 reserved_at_20[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03002752
Matan Barakb4ff3a32016-02-09 14:57:42 +02002753 u8 reserved_at_40[0x14];
Saeed Mahameede2816822015-05-28 22:28:40 +03002754 u8 page_offset[0x6];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002755 u8 reserved_at_5a[0x6];
Saeed Mahameede2816822015-05-28 22:28:40 +03002756
Matan Barakb4ff3a32016-02-09 14:57:42 +02002757 u8 reserved_at_60[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03002758 u8 log_eq_size[0x5];
2759 u8 uar_page[0x18];
2760
Matan Barakb4ff3a32016-02-09 14:57:42 +02002761 u8 reserved_at_80[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03002762
Matan Barakb4ff3a32016-02-09 14:57:42 +02002763 u8 reserved_at_a0[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03002764 u8 intr[0x8];
2765
Matan Barakb4ff3a32016-02-09 14:57:42 +02002766 u8 reserved_at_c0[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03002767 u8 log_page_size[0x5];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002768 u8 reserved_at_c8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03002769
Matan Barakb4ff3a32016-02-09 14:57:42 +02002770 u8 reserved_at_e0[0x60];
Saeed Mahameede2816822015-05-28 22:28:40 +03002771
Matan Barakb4ff3a32016-02-09 14:57:42 +02002772 u8 reserved_at_140[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002773 u8 consumer_counter[0x18];
2774
Matan Barakb4ff3a32016-02-09 14:57:42 +02002775 u8 reserved_at_160[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002776 u8 producer_counter[0x18];
2777
Matan Barakb4ff3a32016-02-09 14:57:42 +02002778 u8 reserved_at_180[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03002779};
2780
2781enum {
2782 MLX5_DCTC_STATE_ACTIVE = 0x0,
2783 MLX5_DCTC_STATE_DRAINING = 0x1,
2784 MLX5_DCTC_STATE_DRAINED = 0x2,
2785};
2786
2787enum {
2788 MLX5_DCTC_CS_RES_DISABLE = 0x0,
2789 MLX5_DCTC_CS_RES_NA = 0x1,
2790 MLX5_DCTC_CS_RES_UP_TO_64B = 0x2,
2791};
2792
2793enum {
2794 MLX5_DCTC_MTU_256_BYTES = 0x1,
2795 MLX5_DCTC_MTU_512_BYTES = 0x2,
2796 MLX5_DCTC_MTU_1K_BYTES = 0x3,
2797 MLX5_DCTC_MTU_2K_BYTES = 0x4,
2798 MLX5_DCTC_MTU_4K_BYTES = 0x5,
2799};
2800
2801struct mlx5_ifc_dctc_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02002802 u8 reserved_at_0[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03002803 u8 state[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002804 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03002805
Matan Barakb4ff3a32016-02-09 14:57:42 +02002806 u8 reserved_at_20[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002807 u8 user_index[0x18];
2808
Matan Barakb4ff3a32016-02-09 14:57:42 +02002809 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002810 u8 cqn[0x18];
2811
2812 u8 counter_set_id[0x8];
2813 u8 atomic_mode[0x4];
2814 u8 rre[0x1];
2815 u8 rwe[0x1];
2816 u8 rae[0x1];
2817 u8 atomic_like_write_en[0x1];
2818 u8 latency_sensitive[0x1];
2819 u8 rlky[0x1];
2820 u8 free_ar[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002821 u8 reserved_at_73[0xd];
Saeed Mahameede2816822015-05-28 22:28:40 +03002822
Matan Barakb4ff3a32016-02-09 14:57:42 +02002823 u8 reserved_at_80[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002824 u8 cs_res[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002825 u8 reserved_at_90[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03002826 u8 min_rnr_nak[0x5];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002827 u8 reserved_at_98[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002828
Matan Barakb4ff3a32016-02-09 14:57:42 +02002829 u8 reserved_at_a0[0x8];
Saeed Mahameed74862162016-06-09 15:11:34 +03002830 u8 srqn_xrqn[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03002831
Matan Barakb4ff3a32016-02-09 14:57:42 +02002832 u8 reserved_at_c0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002833 u8 pd[0x18];
2834
2835 u8 tclass[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002836 u8 reserved_at_e8[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03002837 u8 flow_label[0x14];
2838
2839 u8 dc_access_key[0x40];
2840
Matan Barakb4ff3a32016-02-09 14:57:42 +02002841 u8 reserved_at_140[0x5];
Saeed Mahameede2816822015-05-28 22:28:40 +03002842 u8 mtu[0x3];
2843 u8 port[0x8];
2844 u8 pkey_index[0x10];
2845
Matan Barakb4ff3a32016-02-09 14:57:42 +02002846 u8 reserved_at_160[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002847 u8 my_addr_index[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002848 u8 reserved_at_170[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002849 u8 hop_limit[0x8];
2850
2851 u8 dc_access_key_violation_count[0x20];
2852
Matan Barakb4ff3a32016-02-09 14:57:42 +02002853 u8 reserved_at_1a0[0x14];
Saeed Mahameede2816822015-05-28 22:28:40 +03002854 u8 dei_cfi[0x1];
2855 u8 eth_prio[0x3];
2856 u8 ecn[0x2];
2857 u8 dscp[0x6];
2858
Matan Barakb4ff3a32016-02-09 14:57:42 +02002859 u8 reserved_at_1c0[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03002860};
2861
2862enum {
2863 MLX5_CQC_STATUS_OK = 0x0,
2864 MLX5_CQC_STATUS_CQ_OVERFLOW = 0x9,
2865 MLX5_CQC_STATUS_CQ_WRITE_FAIL = 0xa,
2866};
2867
2868enum {
2869 MLX5_CQC_CQE_SZ_64_BYTES = 0x0,
2870 MLX5_CQC_CQE_SZ_128_BYTES = 0x1,
2871};
2872
2873enum {
2874 MLX5_CQC_ST_SOLICITED_NOTIFICATION_REQUEST_ARMED = 0x6,
2875 MLX5_CQC_ST_NOTIFICATION_REQUEST_ARMED = 0x9,
2876 MLX5_CQC_ST_FIRED = 0xa,
2877};
2878
Saeed Mahameed7d5e1422016-04-11 23:10:22 +03002879enum {
2880 MLX5_CQ_PERIOD_MODE_START_FROM_EQE = 0x0,
2881 MLX5_CQ_PERIOD_MODE_START_FROM_CQE = 0x1,
Saeed Mahameed74862162016-06-09 15:11:34 +03002882 MLX5_CQ_PERIOD_NUM_MODES
Saeed Mahameed7d5e1422016-04-11 23:10:22 +03002883};
2884
Saeed Mahameede2816822015-05-28 22:28:40 +03002885struct mlx5_ifc_cqc_bits {
2886 u8 status[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002887 u8 reserved_at_4[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03002888 u8 cqe_sz[0x3];
2889 u8 cc[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002890 u8 reserved_at_c[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03002891 u8 scqe_break_moderation_en[0x1];
2892 u8 oi[0x1];
Saeed Mahameed7d5e1422016-04-11 23:10:22 +03002893 u8 cq_period_mode[0x2];
2894 u8 cqe_comp_en[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03002895 u8 mini_cqe_res_format[0x2];
2896 u8 st[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002897 u8 reserved_at_18[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002898
Matan Barakb4ff3a32016-02-09 14:57:42 +02002899 u8 reserved_at_20[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03002900
Matan Barakb4ff3a32016-02-09 14:57:42 +02002901 u8 reserved_at_40[0x14];
Saeed Mahameede2816822015-05-28 22:28:40 +03002902 u8 page_offset[0x6];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002903 u8 reserved_at_5a[0x6];
Saeed Mahameede2816822015-05-28 22:28:40 +03002904
Matan Barakb4ff3a32016-02-09 14:57:42 +02002905 u8 reserved_at_60[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03002906 u8 log_cq_size[0x5];
2907 u8 uar_page[0x18];
2908
Matan Barakb4ff3a32016-02-09 14:57:42 +02002909 u8 reserved_at_80[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03002910 u8 cq_period[0xc];
2911 u8 cq_max_count[0x10];
2912
Matan Barakb4ff3a32016-02-09 14:57:42 +02002913 u8 reserved_at_a0[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03002914 u8 c_eqn[0x8];
2915
Matan Barakb4ff3a32016-02-09 14:57:42 +02002916 u8 reserved_at_c0[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03002917 u8 log_page_size[0x5];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002918 u8 reserved_at_c8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03002919
Matan Barakb4ff3a32016-02-09 14:57:42 +02002920 u8 reserved_at_e0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03002921
Matan Barakb4ff3a32016-02-09 14:57:42 +02002922 u8 reserved_at_100[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002923 u8 last_notified_index[0x18];
2924
Matan Barakb4ff3a32016-02-09 14:57:42 +02002925 u8 reserved_at_120[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002926 u8 last_solicit_index[0x18];
2927
Matan Barakb4ff3a32016-02-09 14:57:42 +02002928 u8 reserved_at_140[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002929 u8 consumer_counter[0x18];
2930
Matan Barakb4ff3a32016-02-09 14:57:42 +02002931 u8 reserved_at_160[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002932 u8 producer_counter[0x18];
2933
Matan Barakb4ff3a32016-02-09 14:57:42 +02002934 u8 reserved_at_180[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03002935
2936 u8 dbr_addr[0x40];
2937};
2938
2939union mlx5_ifc_cong_control_roce_ecn_auto_bits {
2940 struct mlx5_ifc_cong_control_802_1qau_rp_bits cong_control_802_1qau_rp;
2941 struct mlx5_ifc_cong_control_r_roce_ecn_rp_bits cong_control_r_roce_ecn_rp;
2942 struct mlx5_ifc_cong_control_r_roce_ecn_np_bits cong_control_r_roce_ecn_np;
Matan Barakb4ff3a32016-02-09 14:57:42 +02002943 u8 reserved_at_0[0x800];
Saeed Mahameede2816822015-05-28 22:28:40 +03002944};
2945
2946struct mlx5_ifc_query_adapter_param_block_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02002947 u8 reserved_at_0[0xc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03002948
Matan Barakb4ff3a32016-02-09 14:57:42 +02002949 u8 reserved_at_c0[0x8];
Majd Dibbiny211e6c82015-06-04 19:30:42 +03002950 u8 ieee_vendor_id[0x18];
2951
Matan Barakb4ff3a32016-02-09 14:57:42 +02002952 u8 reserved_at_e0[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03002953 u8 vsd_vendor_id[0x10];
2954
2955 u8 vsd[208][0x8];
2956
2957 u8 vsd_contd_psid[16][0x8];
2958};
2959
Saeed Mahameed74862162016-06-09 15:11:34 +03002960enum {
2961 MLX5_XRQC_STATE_GOOD = 0x0,
2962 MLX5_XRQC_STATE_ERROR = 0x1,
2963};
2964
2965enum {
2966 MLX5_XRQC_TOPOLOGY_NO_SPECIAL_TOPOLOGY = 0x0,
2967 MLX5_XRQC_TOPOLOGY_TAG_MATCHING = 0x1,
2968};
2969
2970enum {
2971 MLX5_XRQC_OFFLOAD_RNDV = 0x1,
2972};
2973
2974struct mlx5_ifc_tag_matching_topology_context_bits {
2975 u8 log_matching_list_sz[0x4];
2976 u8 reserved_at_4[0xc];
2977 u8 append_next_index[0x10];
2978
2979 u8 sw_phase_cnt[0x10];
2980 u8 hw_phase_cnt[0x10];
2981
2982 u8 reserved_at_40[0x40];
2983};
2984
2985struct mlx5_ifc_xrqc_bits {
2986 u8 state[0x4];
2987 u8 rlkey[0x1];
2988 u8 reserved_at_5[0xf];
2989 u8 topology[0x4];
2990 u8 reserved_at_18[0x4];
2991 u8 offload[0x4];
2992
2993 u8 reserved_at_20[0x8];
2994 u8 user_index[0x18];
2995
2996 u8 reserved_at_40[0x8];
2997 u8 cqn[0x18];
2998
2999 u8 reserved_at_60[0xa0];
3000
3001 struct mlx5_ifc_tag_matching_topology_context_bits tag_matching_topology_context;
3002
Artemy Kovalyov5579e152016-08-31 05:17:54 +00003003 u8 reserved_at_180[0x880];
Saeed Mahameed74862162016-06-09 15:11:34 +03003004
3005 struct mlx5_ifc_wq_bits wq;
3006};
3007
Saeed Mahameede2816822015-05-28 22:28:40 +03003008union mlx5_ifc_modify_field_select_resize_field_select_auto_bits {
3009 struct mlx5_ifc_modify_field_select_bits modify_field_select;
3010 struct mlx5_ifc_resize_field_select_bits resize_field_select;
Matan Barakb4ff3a32016-02-09 14:57:42 +02003011 u8 reserved_at_0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003012};
3013
3014union mlx5_ifc_field_select_802_1_r_roce_auto_bits {
3015 struct mlx5_ifc_field_select_802_1qau_rp_bits field_select_802_1qau_rp;
3016 struct mlx5_ifc_field_select_r_roce_rp_bits field_select_r_roce_rp;
3017 struct mlx5_ifc_field_select_r_roce_np_bits field_select_r_roce_np;
Matan Barakb4ff3a32016-02-09 14:57:42 +02003018 u8 reserved_at_0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003019};
3020
3021union mlx5_ifc_eth_cntrs_grp_data_layout_auto_bits {
3022 struct mlx5_ifc_eth_802_3_cntrs_grp_data_layout_bits eth_802_3_cntrs_grp_data_layout;
3023 struct mlx5_ifc_eth_2863_cntrs_grp_data_layout_bits eth_2863_cntrs_grp_data_layout;
3024 struct mlx5_ifc_eth_2819_cntrs_grp_data_layout_bits eth_2819_cntrs_grp_data_layout;
3025 struct mlx5_ifc_eth_3635_cntrs_grp_data_layout_bits eth_3635_cntrs_grp_data_layout;
3026 struct mlx5_ifc_eth_extended_cntrs_grp_data_layout_bits eth_extended_cntrs_grp_data_layout;
3027 struct mlx5_ifc_eth_per_prio_grp_data_layout_bits eth_per_prio_grp_data_layout;
3028 struct mlx5_ifc_eth_per_traffic_grp_data_layout_bits eth_per_traffic_grp_data_layout;
Meny Yossefi1c64bf62016-02-18 18:15:00 +02003029 struct mlx5_ifc_ib_port_cntrs_grp_data_layout_bits ib_port_cntrs_grp_data_layout;
Saeed Mahameede2816822015-05-28 22:28:40 +03003030 struct mlx5_ifc_phys_layer_cntrs_bits phys_layer_cntrs;
Gal Pressmand8dc0502016-09-27 17:04:51 +03003031 struct mlx5_ifc_phys_layer_statistical_cntrs_bits phys_layer_statistical_cntrs;
Matan Barakb4ff3a32016-02-09 14:57:42 +02003032 u8 reserved_at_0[0x7c0];
Saeed Mahameede2816822015-05-28 22:28:40 +03003033};
3034
Gal Pressman8ed1a632016-11-17 13:46:01 +02003035union mlx5_ifc_pcie_cntrs_grp_data_layout_auto_bits {
3036 struct mlx5_ifc_pcie_perf_cntrs_grp_data_layout_bits pcie_perf_cntrs_grp_data_layout;
3037 u8 reserved_at_0[0x7c0];
3038};
3039
Saeed Mahameede2816822015-05-28 22:28:40 +03003040union mlx5_ifc_event_auto_bits {
3041 struct mlx5_ifc_comp_event_bits comp_event;
3042 struct mlx5_ifc_dct_events_bits dct_events;
3043 struct mlx5_ifc_qp_events_bits qp_events;
3044 struct mlx5_ifc_wqe_associated_page_fault_event_bits wqe_associated_page_fault_event;
3045 struct mlx5_ifc_rdma_page_fault_event_bits rdma_page_fault_event;
3046 struct mlx5_ifc_cq_error_bits cq_error;
3047 struct mlx5_ifc_dropped_packet_logged_bits dropped_packet_logged;
3048 struct mlx5_ifc_port_state_change_event_bits port_state_change_event;
3049 struct mlx5_ifc_gpio_event_bits gpio_event;
3050 struct mlx5_ifc_db_bf_congestion_event_bits db_bf_congestion_event;
3051 struct mlx5_ifc_stall_vl_event_bits stall_vl_event;
3052 struct mlx5_ifc_cmd_inter_comp_event_bits cmd_inter_comp_event;
Matan Barakb4ff3a32016-02-09 14:57:42 +02003053 u8 reserved_at_0[0xe0];
Saeed Mahameede2816822015-05-28 22:28:40 +03003054};
3055
3056struct mlx5_ifc_health_buffer_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02003057 u8 reserved_at_0[0x100];
Saeed Mahameede2816822015-05-28 22:28:40 +03003058
3059 u8 assert_existptr[0x20];
3060
3061 u8 assert_callra[0x20];
3062
Matan Barakb4ff3a32016-02-09 14:57:42 +02003063 u8 reserved_at_140[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03003064
3065 u8 fw_version[0x20];
3066
3067 u8 hw_id[0x20];
3068
Matan Barakb4ff3a32016-02-09 14:57:42 +02003069 u8 reserved_at_1c0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003070
3071 u8 irisc_index[0x8];
3072 u8 synd[0x8];
3073 u8 ext_synd[0x10];
3074};
3075
3076struct mlx5_ifc_register_loopback_control_bits {
3077 u8 no_lb[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003078 u8 reserved_at_1[0x7];
Saeed Mahameede2816822015-05-28 22:28:40 +03003079 u8 port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003080 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003081
Matan Barakb4ff3a32016-02-09 14:57:42 +02003082 u8 reserved_at_20[0x60];
Saeed Mahameede2816822015-05-28 22:28:40 +03003083};
3084
Mohamad Haj Yahia813f8542016-08-11 11:21:39 +03003085struct mlx5_ifc_vport_tc_element_bits {
3086 u8 traffic_class[0x4];
3087 u8 reserved_at_4[0xc];
3088 u8 vport_number[0x10];
3089};
3090
3091struct mlx5_ifc_vport_element_bits {
3092 u8 reserved_at_0[0x10];
3093 u8 vport_number[0x10];
3094};
3095
3096enum {
3097 TSAR_ELEMENT_TSAR_TYPE_DWRR = 0x0,
3098 TSAR_ELEMENT_TSAR_TYPE_ROUND_ROBIN = 0x1,
3099 TSAR_ELEMENT_TSAR_TYPE_ETS = 0x2,
3100};
3101
3102struct mlx5_ifc_tsar_element_bits {
3103 u8 reserved_at_0[0x8];
3104 u8 tsar_type[0x8];
3105 u8 reserved_at_10[0x10];
3106};
3107
Majd Dibbiny8812c242017-02-09 14:20:12 +02003108enum {
3109 MLX5_TEARDOWN_HCA_OUT_FORCE_STATE_SUCCESS = 0x0,
3110 MLX5_TEARDOWN_HCA_OUT_FORCE_STATE_FAIL = 0x1,
3111};
3112
Saeed Mahameede2816822015-05-28 22:28:40 +03003113struct mlx5_ifc_teardown_hca_out_bits {
3114 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003115 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003116
3117 u8 syndrome[0x20];
3118
Majd Dibbiny8812c242017-02-09 14:20:12 +02003119 u8 reserved_at_40[0x3f];
3120
3121 u8 force_state[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03003122};
3123
3124enum {
3125 MLX5_TEARDOWN_HCA_IN_PROFILE_GRACEFUL_CLOSE = 0x0,
Majd Dibbiny8812c242017-02-09 14:20:12 +02003126 MLX5_TEARDOWN_HCA_IN_PROFILE_FORCE_CLOSE = 0x1,
Saeed Mahameede2816822015-05-28 22:28:40 +03003127};
3128
3129struct mlx5_ifc_teardown_hca_in_bits {
3130 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003131 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003132
Matan Barakb4ff3a32016-02-09 14:57:42 +02003133 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003134 u8 op_mod[0x10];
3135
Matan Barakb4ff3a32016-02-09 14:57:42 +02003136 u8 reserved_at_40[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003137 u8 profile[0x10];
3138
Matan Barakb4ff3a32016-02-09 14:57:42 +02003139 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003140};
3141
3142struct mlx5_ifc_sqerr2rts_qp_out_bits {
3143 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003144 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003145
3146 u8 syndrome[0x20];
3147
Matan Barakb4ff3a32016-02-09 14:57:42 +02003148 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03003149};
3150
3151struct mlx5_ifc_sqerr2rts_qp_in_bits {
3152 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003153 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003154
Matan Barakb4ff3a32016-02-09 14:57:42 +02003155 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003156 u8 op_mod[0x10];
3157
Matan Barakb4ff3a32016-02-09 14:57:42 +02003158 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03003159 u8 qpn[0x18];
3160
Matan Barakb4ff3a32016-02-09 14:57:42 +02003161 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003162
3163 u8 opt_param_mask[0x20];
3164
Matan Barakb4ff3a32016-02-09 14:57:42 +02003165 u8 reserved_at_a0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003166
3167 struct mlx5_ifc_qpc_bits qpc;
3168
Matan Barakb4ff3a32016-02-09 14:57:42 +02003169 u8 reserved_at_800[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03003170};
3171
3172struct mlx5_ifc_sqd2rts_qp_out_bits {
3173 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003174 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003175
3176 u8 syndrome[0x20];
3177
Matan Barakb4ff3a32016-02-09 14:57:42 +02003178 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03003179};
3180
3181struct mlx5_ifc_sqd2rts_qp_in_bits {
3182 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003183 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003184
Matan Barakb4ff3a32016-02-09 14:57:42 +02003185 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003186 u8 op_mod[0x10];
3187
Matan Barakb4ff3a32016-02-09 14:57:42 +02003188 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03003189 u8 qpn[0x18];
3190
Matan Barakb4ff3a32016-02-09 14:57:42 +02003191 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003192
3193 u8 opt_param_mask[0x20];
3194
Matan Barakb4ff3a32016-02-09 14:57:42 +02003195 u8 reserved_at_a0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003196
3197 struct mlx5_ifc_qpc_bits qpc;
3198
Matan Barakb4ff3a32016-02-09 14:57:42 +02003199 u8 reserved_at_800[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03003200};
3201
3202struct mlx5_ifc_set_roce_address_out_bits {
3203 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003204 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003205
3206 u8 syndrome[0x20];
3207
Matan Barakb4ff3a32016-02-09 14:57:42 +02003208 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03003209};
3210
3211struct mlx5_ifc_set_roce_address_in_bits {
3212 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003213 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003214
Matan Barakb4ff3a32016-02-09 14:57:42 +02003215 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003216 u8 op_mod[0x10];
3217
3218 u8 roce_address_index[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003219 u8 reserved_at_50[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003220
Matan Barakb4ff3a32016-02-09 14:57:42 +02003221 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003222
3223 struct mlx5_ifc_roce_addr_layout_bits roce_address;
3224};
3225
3226struct mlx5_ifc_set_mad_demux_out_bits {
3227 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003228 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003229
3230 u8 syndrome[0x20];
3231
Matan Barakb4ff3a32016-02-09 14:57:42 +02003232 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03003233};
3234
3235enum {
3236 MLX5_SET_MAD_DEMUX_IN_DEMUX_MODE_PASS_ALL = 0x0,
3237 MLX5_SET_MAD_DEMUX_IN_DEMUX_MODE_SELECTIVE = 0x2,
3238};
3239
3240struct mlx5_ifc_set_mad_demux_in_bits {
3241 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003242 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003243
Matan Barakb4ff3a32016-02-09 14:57:42 +02003244 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003245 u8 op_mod[0x10];
3246
Matan Barakb4ff3a32016-02-09 14:57:42 +02003247 u8 reserved_at_40[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003248
Matan Barakb4ff3a32016-02-09 14:57:42 +02003249 u8 reserved_at_60[0x6];
Saeed Mahameede2816822015-05-28 22:28:40 +03003250 u8 demux_mode[0x2];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003251 u8 reserved_at_68[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003252};
3253
3254struct mlx5_ifc_set_l2_table_entry_out_bits {
3255 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003256 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003257
3258 u8 syndrome[0x20];
3259
Matan Barakb4ff3a32016-02-09 14:57:42 +02003260 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03003261};
3262
3263struct mlx5_ifc_set_l2_table_entry_in_bits {
3264 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003265 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003266
Matan Barakb4ff3a32016-02-09 14:57:42 +02003267 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003268 u8 op_mod[0x10];
3269
Matan Barakb4ff3a32016-02-09 14:57:42 +02003270 u8 reserved_at_40[0x60];
Saeed Mahameede2816822015-05-28 22:28:40 +03003271
Matan Barakb4ff3a32016-02-09 14:57:42 +02003272 u8 reserved_at_a0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03003273 u8 table_index[0x18];
3274
Matan Barakb4ff3a32016-02-09 14:57:42 +02003275 u8 reserved_at_c0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003276
Matan Barakb4ff3a32016-02-09 14:57:42 +02003277 u8 reserved_at_e0[0x13];
Saeed Mahameede2816822015-05-28 22:28:40 +03003278 u8 vlan_valid[0x1];
3279 u8 vlan[0xc];
3280
3281 struct mlx5_ifc_mac_address_layout_bits mac_address;
3282
Matan Barakb4ff3a32016-02-09 14:57:42 +02003283 u8 reserved_at_140[0xc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03003284};
3285
3286struct mlx5_ifc_set_issi_out_bits {
3287 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003288 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003289
3290 u8 syndrome[0x20];
3291
Matan Barakb4ff3a32016-02-09 14:57:42 +02003292 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03003293};
3294
3295struct mlx5_ifc_set_issi_in_bits {
3296 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003297 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003298
Matan Barakb4ff3a32016-02-09 14:57:42 +02003299 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003300 u8 op_mod[0x10];
3301
Matan Barakb4ff3a32016-02-09 14:57:42 +02003302 u8 reserved_at_40[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003303 u8 current_issi[0x10];
3304
Matan Barakb4ff3a32016-02-09 14:57:42 +02003305 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003306};
3307
3308struct mlx5_ifc_set_hca_cap_out_bits {
3309 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003310 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003311
3312 u8 syndrome[0x20];
3313
Matan Barakb4ff3a32016-02-09 14:57:42 +02003314 u8 reserved_at_40[0x40];
Eli Cohenb7755162014-10-02 12:19:44 +03003315};
3316
3317struct mlx5_ifc_set_hca_cap_in_bits {
3318 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003319 u8 reserved_at_10[0x10];
Eli Cohenb7755162014-10-02 12:19:44 +03003320
Matan Barakb4ff3a32016-02-09 14:57:42 +02003321 u8 reserved_at_20[0x10];
Eli Cohenb7755162014-10-02 12:19:44 +03003322 u8 op_mod[0x10];
3323
Matan Barakb4ff3a32016-02-09 14:57:42 +02003324 u8 reserved_at_40[0x40];
Eli Cohenb7755162014-10-02 12:19:44 +03003325
Saeed Mahameede2816822015-05-28 22:28:40 +03003326 union mlx5_ifc_hca_cap_union_bits capability;
3327};
3328
Maor Gottlieb26a81452015-12-10 17:12:39 +02003329enum {
3330 MLX5_SET_FTE_MODIFY_ENABLE_MASK_ACTION = 0x0,
3331 MLX5_SET_FTE_MODIFY_ENABLE_MASK_FLOW_TAG = 0x1,
3332 MLX5_SET_FTE_MODIFY_ENABLE_MASK_DESTINATION_LIST = 0x2,
3333 MLX5_SET_FTE_MODIFY_ENABLE_MASK_FLOW_COUNTERS = 0x3
3334};
3335
Saeed Mahameede2816822015-05-28 22:28:40 +03003336struct mlx5_ifc_set_fte_out_bits {
3337 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003338 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003339
3340 u8 syndrome[0x20];
3341
Matan Barakb4ff3a32016-02-09 14:57:42 +02003342 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03003343};
3344
3345struct mlx5_ifc_set_fte_in_bits {
3346 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003347 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003348
Matan Barakb4ff3a32016-02-09 14:57:42 +02003349 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003350 u8 op_mod[0x10];
3351
Saeed Mahameed7d5e1422016-04-11 23:10:22 +03003352 u8 other_vport[0x1];
3353 u8 reserved_at_41[0xf];
3354 u8 vport_number[0x10];
3355
3356 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003357
3358 u8 table_type[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003359 u8 reserved_at_88[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003360
Matan Barakb4ff3a32016-02-09 14:57:42 +02003361 u8 reserved_at_a0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03003362 u8 table_id[0x18];
3363
Matan Barakb4ff3a32016-02-09 14:57:42 +02003364 u8 reserved_at_c0[0x18];
Maor Gottlieb26a81452015-12-10 17:12:39 +02003365 u8 modify_enable_mask[0x8];
3366
Matan Barakb4ff3a32016-02-09 14:57:42 +02003367 u8 reserved_at_e0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003368
3369 u8 flow_index[0x20];
3370
Matan Barakb4ff3a32016-02-09 14:57:42 +02003371 u8 reserved_at_120[0xe0];
Saeed Mahameede2816822015-05-28 22:28:40 +03003372
3373 struct mlx5_ifc_flow_context_bits flow_context;
3374};
3375
3376struct mlx5_ifc_rts2rts_qp_out_bits {
3377 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003378 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003379
3380 u8 syndrome[0x20];
3381
Matan Barakb4ff3a32016-02-09 14:57:42 +02003382 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03003383};
3384
3385struct mlx5_ifc_rts2rts_qp_in_bits {
3386 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003387 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003388
Matan Barakb4ff3a32016-02-09 14:57:42 +02003389 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003390 u8 op_mod[0x10];
3391
Matan Barakb4ff3a32016-02-09 14:57:42 +02003392 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03003393 u8 qpn[0x18];
3394
Matan Barakb4ff3a32016-02-09 14:57:42 +02003395 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003396
3397 u8 opt_param_mask[0x20];
3398
Matan Barakb4ff3a32016-02-09 14:57:42 +02003399 u8 reserved_at_a0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003400
3401 struct mlx5_ifc_qpc_bits qpc;
3402
Matan Barakb4ff3a32016-02-09 14:57:42 +02003403 u8 reserved_at_800[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03003404};
3405
3406struct mlx5_ifc_rtr2rts_qp_out_bits {
3407 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003408 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003409
3410 u8 syndrome[0x20];
3411
Matan Barakb4ff3a32016-02-09 14:57:42 +02003412 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03003413};
3414
3415struct mlx5_ifc_rtr2rts_qp_in_bits {
3416 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003417 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003418
Matan Barakb4ff3a32016-02-09 14:57:42 +02003419 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003420 u8 op_mod[0x10];
3421
Matan Barakb4ff3a32016-02-09 14:57:42 +02003422 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03003423 u8 qpn[0x18];
3424
Matan Barakb4ff3a32016-02-09 14:57:42 +02003425 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003426
3427 u8 opt_param_mask[0x20];
3428
Matan Barakb4ff3a32016-02-09 14:57:42 +02003429 u8 reserved_at_a0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003430
3431 struct mlx5_ifc_qpc_bits qpc;
3432
Matan Barakb4ff3a32016-02-09 14:57:42 +02003433 u8 reserved_at_800[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03003434};
3435
3436struct mlx5_ifc_rst2init_qp_out_bits {
3437 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003438 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003439
3440 u8 syndrome[0x20];
3441
Matan Barakb4ff3a32016-02-09 14:57:42 +02003442 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03003443};
3444
3445struct mlx5_ifc_rst2init_qp_in_bits {
3446 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003447 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003448
Matan Barakb4ff3a32016-02-09 14:57:42 +02003449 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003450 u8 op_mod[0x10];
3451
Matan Barakb4ff3a32016-02-09 14:57:42 +02003452 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03003453 u8 qpn[0x18];
3454
Matan Barakb4ff3a32016-02-09 14:57:42 +02003455 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003456
3457 u8 opt_param_mask[0x20];
3458
Matan Barakb4ff3a32016-02-09 14:57:42 +02003459 u8 reserved_at_a0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003460
3461 struct mlx5_ifc_qpc_bits qpc;
3462
Matan Barakb4ff3a32016-02-09 14:57:42 +02003463 u8 reserved_at_800[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03003464};
3465
Saeed Mahameed74862162016-06-09 15:11:34 +03003466struct mlx5_ifc_query_xrq_out_bits {
3467 u8 status[0x8];
3468 u8 reserved_at_8[0x18];
3469
3470 u8 syndrome[0x20];
3471
3472 u8 reserved_at_40[0x40];
3473
3474 struct mlx5_ifc_xrqc_bits xrq_context;
3475};
3476
3477struct mlx5_ifc_query_xrq_in_bits {
3478 u8 opcode[0x10];
3479 u8 reserved_at_10[0x10];
3480
3481 u8 reserved_at_20[0x10];
3482 u8 op_mod[0x10];
3483
3484 u8 reserved_at_40[0x8];
3485 u8 xrqn[0x18];
3486
3487 u8 reserved_at_60[0x20];
3488};
3489
Saeed Mahameede2816822015-05-28 22:28:40 +03003490struct mlx5_ifc_query_xrc_srq_out_bits {
3491 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003492 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003493
3494 u8 syndrome[0x20];
3495
Matan Barakb4ff3a32016-02-09 14:57:42 +02003496 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03003497
3498 struct mlx5_ifc_xrc_srqc_bits xrc_srq_context_entry;
3499
Matan Barakb4ff3a32016-02-09 14:57:42 +02003500 u8 reserved_at_280[0x600];
Saeed Mahameede2816822015-05-28 22:28:40 +03003501
3502 u8 pas[0][0x40];
3503};
3504
3505struct mlx5_ifc_query_xrc_srq_in_bits {
3506 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003507 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003508
Matan Barakb4ff3a32016-02-09 14:57:42 +02003509 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003510 u8 op_mod[0x10];
3511
Matan Barakb4ff3a32016-02-09 14:57:42 +02003512 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03003513 u8 xrc_srqn[0x18];
3514
Matan Barakb4ff3a32016-02-09 14:57:42 +02003515 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003516};
3517
3518enum {
3519 MLX5_QUERY_VPORT_STATE_OUT_STATE_DOWN = 0x0,
3520 MLX5_QUERY_VPORT_STATE_OUT_STATE_UP = 0x1,
3521};
3522
3523struct mlx5_ifc_query_vport_state_out_bits {
3524 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003525 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003526
3527 u8 syndrome[0x20];
3528
Matan Barakb4ff3a32016-02-09 14:57:42 +02003529 u8 reserved_at_40[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003530
Matan Barakb4ff3a32016-02-09 14:57:42 +02003531 u8 reserved_at_60[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003532 u8 admin_state[0x4];
3533 u8 state[0x4];
3534};
3535
3536enum {
3537 MLX5_QUERY_VPORT_STATE_IN_OP_MOD_VNIC_VPORT = 0x0,
Saeed Mahameede7546512015-12-01 18:03:13 +02003538 MLX5_QUERY_VPORT_STATE_IN_OP_MOD_ESW_VPORT = 0x1,
Saeed Mahameede2816822015-05-28 22:28:40 +03003539};
3540
3541struct mlx5_ifc_query_vport_state_in_bits {
3542 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003543 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003544
Matan Barakb4ff3a32016-02-09 14:57:42 +02003545 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003546 u8 op_mod[0x10];
3547
3548 u8 other_vport[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003549 u8 reserved_at_41[0xf];
Saeed Mahameede2816822015-05-28 22:28:40 +03003550 u8 vport_number[0x10];
3551
Matan Barakb4ff3a32016-02-09 14:57:42 +02003552 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003553};
3554
3555struct mlx5_ifc_query_vport_counter_out_bits {
3556 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003557 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003558
3559 u8 syndrome[0x20];
3560
Matan Barakb4ff3a32016-02-09 14:57:42 +02003561 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03003562
3563 struct mlx5_ifc_traffic_counter_bits received_errors;
3564
3565 struct mlx5_ifc_traffic_counter_bits transmit_errors;
3566
3567 struct mlx5_ifc_traffic_counter_bits received_ib_unicast;
3568
3569 struct mlx5_ifc_traffic_counter_bits transmitted_ib_unicast;
3570
3571 struct mlx5_ifc_traffic_counter_bits received_ib_multicast;
3572
3573 struct mlx5_ifc_traffic_counter_bits transmitted_ib_multicast;
3574
3575 struct mlx5_ifc_traffic_counter_bits received_eth_broadcast;
3576
3577 struct mlx5_ifc_traffic_counter_bits transmitted_eth_broadcast;
3578
3579 struct mlx5_ifc_traffic_counter_bits received_eth_unicast;
3580
3581 struct mlx5_ifc_traffic_counter_bits transmitted_eth_unicast;
3582
3583 struct mlx5_ifc_traffic_counter_bits received_eth_multicast;
3584
3585 struct mlx5_ifc_traffic_counter_bits transmitted_eth_multicast;
3586
Matan Barakb4ff3a32016-02-09 14:57:42 +02003587 u8 reserved_at_680[0xa00];
Saeed Mahameede2816822015-05-28 22:28:40 +03003588};
3589
3590enum {
3591 MLX5_QUERY_VPORT_COUNTER_IN_OP_MOD_VPORT_COUNTERS = 0x0,
3592};
3593
3594struct mlx5_ifc_query_vport_counter_in_bits {
3595 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003596 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003597
Matan Barakb4ff3a32016-02-09 14:57:42 +02003598 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003599 u8 op_mod[0x10];
3600
3601 u8 other_vport[0x1];
Meny Yossefib54ba272016-02-18 18:14:59 +02003602 u8 reserved_at_41[0xb];
3603 u8 port_num[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03003604 u8 vport_number[0x10];
3605
Matan Barakb4ff3a32016-02-09 14:57:42 +02003606 u8 reserved_at_60[0x60];
Saeed Mahameede2816822015-05-28 22:28:40 +03003607
3608 u8 clear[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003609 u8 reserved_at_c1[0x1f];
Saeed Mahameede2816822015-05-28 22:28:40 +03003610
Matan Barakb4ff3a32016-02-09 14:57:42 +02003611 u8 reserved_at_e0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003612};
3613
3614struct mlx5_ifc_query_tis_out_bits {
3615 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003616 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003617
3618 u8 syndrome[0x20];
3619
Matan Barakb4ff3a32016-02-09 14:57:42 +02003620 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03003621
3622 struct mlx5_ifc_tisc_bits tis_context;
3623};
3624
3625struct mlx5_ifc_query_tis_in_bits {
3626 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003627 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003628
Matan Barakb4ff3a32016-02-09 14:57:42 +02003629 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003630 u8 op_mod[0x10];
3631
Matan Barakb4ff3a32016-02-09 14:57:42 +02003632 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03003633 u8 tisn[0x18];
3634
Matan Barakb4ff3a32016-02-09 14:57:42 +02003635 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003636};
3637
3638struct mlx5_ifc_query_tir_out_bits {
3639 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003640 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003641
3642 u8 syndrome[0x20];
3643
Matan Barakb4ff3a32016-02-09 14:57:42 +02003644 u8 reserved_at_40[0xc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03003645
3646 struct mlx5_ifc_tirc_bits tir_context;
3647};
3648
3649struct mlx5_ifc_query_tir_in_bits {
3650 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003651 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003652
Matan Barakb4ff3a32016-02-09 14:57:42 +02003653 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003654 u8 op_mod[0x10];
3655
Matan Barakb4ff3a32016-02-09 14:57:42 +02003656 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03003657 u8 tirn[0x18];
3658
Matan Barakb4ff3a32016-02-09 14:57:42 +02003659 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003660};
3661
3662struct mlx5_ifc_query_srq_out_bits {
3663 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003664 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003665
3666 u8 syndrome[0x20];
3667
Matan Barakb4ff3a32016-02-09 14:57:42 +02003668 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03003669
3670 struct mlx5_ifc_srqc_bits srq_context_entry;
3671
Matan Barakb4ff3a32016-02-09 14:57:42 +02003672 u8 reserved_at_280[0x600];
Saeed Mahameede2816822015-05-28 22:28:40 +03003673
3674 u8 pas[0][0x40];
3675};
3676
3677struct mlx5_ifc_query_srq_in_bits {
3678 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003679 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003680
Matan Barakb4ff3a32016-02-09 14:57:42 +02003681 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003682 u8 op_mod[0x10];
3683
Matan Barakb4ff3a32016-02-09 14:57:42 +02003684 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03003685 u8 srqn[0x18];
3686
Matan Barakb4ff3a32016-02-09 14:57:42 +02003687 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003688};
3689
3690struct mlx5_ifc_query_sq_out_bits {
3691 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003692 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003693
3694 u8 syndrome[0x20];
3695
Matan Barakb4ff3a32016-02-09 14:57:42 +02003696 u8 reserved_at_40[0xc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03003697
3698 struct mlx5_ifc_sqc_bits sq_context;
3699};
3700
3701struct mlx5_ifc_query_sq_in_bits {
3702 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003703 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003704
Matan Barakb4ff3a32016-02-09 14:57:42 +02003705 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003706 u8 op_mod[0x10];
3707
Matan Barakb4ff3a32016-02-09 14:57:42 +02003708 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03003709 u8 sqn[0x18];
3710
Matan Barakb4ff3a32016-02-09 14:57:42 +02003711 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003712};
3713
3714struct mlx5_ifc_query_special_contexts_out_bits {
3715 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003716 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003717
3718 u8 syndrome[0x20];
3719
Saeed Mahameedec22eb52016-07-16 06:28:36 +03003720 u8 dump_fill_mkey[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003721
3722 u8 resd_lkey[0x20];
Artemy Kovalyovbcda1ac2017-01-02 11:37:41 +02003723
3724 u8 null_mkey[0x20];
3725
3726 u8 reserved_at_a0[0x60];
Saeed Mahameede2816822015-05-28 22:28:40 +03003727};
3728
3729struct mlx5_ifc_query_special_contexts_in_bits {
3730 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003731 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003732
Matan Barakb4ff3a32016-02-09 14:57:42 +02003733 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003734 u8 op_mod[0x10];
3735
Matan Barakb4ff3a32016-02-09 14:57:42 +02003736 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03003737};
3738
Mohamad Haj Yahia813f8542016-08-11 11:21:39 +03003739struct mlx5_ifc_query_scheduling_element_out_bits {
3740 u8 opcode[0x10];
3741 u8 reserved_at_10[0x10];
3742
3743 u8 reserved_at_20[0x10];
3744 u8 op_mod[0x10];
3745
3746 u8 reserved_at_40[0xc0];
3747
3748 struct mlx5_ifc_scheduling_context_bits scheduling_context;
3749
3750 u8 reserved_at_300[0x100];
3751};
3752
3753enum {
3754 SCHEDULING_HIERARCHY_E_SWITCH = 0x2,
3755};
3756
3757struct mlx5_ifc_query_scheduling_element_in_bits {
3758 u8 opcode[0x10];
3759 u8 reserved_at_10[0x10];
3760
3761 u8 reserved_at_20[0x10];
3762 u8 op_mod[0x10];
3763
3764 u8 scheduling_hierarchy[0x8];
3765 u8 reserved_at_48[0x18];
3766
3767 u8 scheduling_element_id[0x20];
3768
3769 u8 reserved_at_80[0x180];
3770};
3771
Saeed Mahameede2816822015-05-28 22:28:40 +03003772struct mlx5_ifc_query_rqt_out_bits {
3773 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003774 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003775
3776 u8 syndrome[0x20];
3777
Matan Barakb4ff3a32016-02-09 14:57:42 +02003778 u8 reserved_at_40[0xc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03003779
3780 struct mlx5_ifc_rqtc_bits rqt_context;
3781};
3782
3783struct mlx5_ifc_query_rqt_in_bits {
3784 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003785 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003786
Matan Barakb4ff3a32016-02-09 14:57:42 +02003787 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003788 u8 op_mod[0x10];
3789
Matan Barakb4ff3a32016-02-09 14:57:42 +02003790 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03003791 u8 rqtn[0x18];
3792
Matan Barakb4ff3a32016-02-09 14:57:42 +02003793 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003794};
3795
3796struct mlx5_ifc_query_rq_out_bits {
3797 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003798 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003799
3800 u8 syndrome[0x20];
3801
Matan Barakb4ff3a32016-02-09 14:57:42 +02003802 u8 reserved_at_40[0xc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03003803
3804 struct mlx5_ifc_rqc_bits rq_context;
3805};
3806
3807struct mlx5_ifc_query_rq_in_bits {
3808 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003809 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003810
Matan Barakb4ff3a32016-02-09 14:57:42 +02003811 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003812 u8 op_mod[0x10];
3813
Matan Barakb4ff3a32016-02-09 14:57:42 +02003814 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03003815 u8 rqn[0x18];
3816
Matan Barakb4ff3a32016-02-09 14:57:42 +02003817 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003818};
3819
3820struct mlx5_ifc_query_roce_address_out_bits {
3821 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003822 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003823
3824 u8 syndrome[0x20];
3825
Matan Barakb4ff3a32016-02-09 14:57:42 +02003826 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03003827
3828 struct mlx5_ifc_roce_addr_layout_bits roce_address;
3829};
3830
3831struct mlx5_ifc_query_roce_address_in_bits {
3832 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003833 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003834
Matan Barakb4ff3a32016-02-09 14:57:42 +02003835 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003836 u8 op_mod[0x10];
3837
3838 u8 roce_address_index[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003839 u8 reserved_at_50[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003840
Matan Barakb4ff3a32016-02-09 14:57:42 +02003841 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003842};
3843
3844struct mlx5_ifc_query_rmp_out_bits {
3845 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003846 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003847
3848 u8 syndrome[0x20];
3849
Matan Barakb4ff3a32016-02-09 14:57:42 +02003850 u8 reserved_at_40[0xc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03003851
3852 struct mlx5_ifc_rmpc_bits rmp_context;
3853};
3854
3855struct mlx5_ifc_query_rmp_in_bits {
3856 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003857 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003858
Matan Barakb4ff3a32016-02-09 14:57:42 +02003859 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003860 u8 op_mod[0x10];
3861
Matan Barakb4ff3a32016-02-09 14:57:42 +02003862 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03003863 u8 rmpn[0x18];
3864
Matan Barakb4ff3a32016-02-09 14:57:42 +02003865 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003866};
3867
3868struct mlx5_ifc_query_qp_out_bits {
3869 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003870 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003871
3872 u8 syndrome[0x20];
3873
Matan Barakb4ff3a32016-02-09 14:57:42 +02003874 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03003875
3876 u8 opt_param_mask[0x20];
3877
Matan Barakb4ff3a32016-02-09 14:57:42 +02003878 u8 reserved_at_a0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003879
3880 struct mlx5_ifc_qpc_bits qpc;
3881
Matan Barakb4ff3a32016-02-09 14:57:42 +02003882 u8 reserved_at_800[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03003883
3884 u8 pas[0][0x40];
3885};
3886
3887struct mlx5_ifc_query_qp_in_bits {
3888 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003889 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003890
Matan Barakb4ff3a32016-02-09 14:57:42 +02003891 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003892 u8 op_mod[0x10];
3893
Matan Barakb4ff3a32016-02-09 14:57:42 +02003894 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03003895 u8 qpn[0x18];
3896
Matan Barakb4ff3a32016-02-09 14:57:42 +02003897 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003898};
3899
3900struct mlx5_ifc_query_q_counter_out_bits {
3901 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003902 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003903
3904 u8 syndrome[0x20];
3905
Matan Barakb4ff3a32016-02-09 14:57:42 +02003906 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03003907
3908 u8 rx_write_requests[0x20];
3909
Matan Barakb4ff3a32016-02-09 14:57:42 +02003910 u8 reserved_at_a0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003911
3912 u8 rx_read_requests[0x20];
3913
Matan Barakb4ff3a32016-02-09 14:57:42 +02003914 u8 reserved_at_e0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003915
3916 u8 rx_atomic_requests[0x20];
3917
Matan Barakb4ff3a32016-02-09 14:57:42 +02003918 u8 reserved_at_120[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003919
3920 u8 rx_dct_connect[0x20];
3921
Matan Barakb4ff3a32016-02-09 14:57:42 +02003922 u8 reserved_at_160[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003923
3924 u8 out_of_buffer[0x20];
3925
Matan Barakb4ff3a32016-02-09 14:57:42 +02003926 u8 reserved_at_1a0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003927
3928 u8 out_of_sequence[0x20];
3929
Saeed Mahameed74862162016-06-09 15:11:34 +03003930 u8 reserved_at_1e0[0x20];
3931
3932 u8 duplicate_request[0x20];
3933
3934 u8 reserved_at_220[0x20];
3935
3936 u8 rnr_nak_retry_err[0x20];
3937
3938 u8 reserved_at_260[0x20];
3939
3940 u8 packet_seq_err[0x20];
3941
3942 u8 reserved_at_2a0[0x20];
3943
3944 u8 implied_nak_seq_err[0x20];
3945
3946 u8 reserved_at_2e0[0x20];
3947
3948 u8 local_ack_timeout_err[0x20];
3949
3950 u8 reserved_at_320[0x4e0];
Saeed Mahameede2816822015-05-28 22:28:40 +03003951};
3952
3953struct mlx5_ifc_query_q_counter_in_bits {
3954 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003955 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003956
Matan Barakb4ff3a32016-02-09 14:57:42 +02003957 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003958 u8 op_mod[0x10];
3959
Matan Barakb4ff3a32016-02-09 14:57:42 +02003960 u8 reserved_at_40[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03003961
3962 u8 clear[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003963 u8 reserved_at_c1[0x1f];
Saeed Mahameede2816822015-05-28 22:28:40 +03003964
Matan Barakb4ff3a32016-02-09 14:57:42 +02003965 u8 reserved_at_e0[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003966 u8 counter_set_id[0x8];
3967};
3968
3969struct mlx5_ifc_query_pages_out_bits {
3970 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003971 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003972
3973 u8 syndrome[0x20];
3974
Matan Barakb4ff3a32016-02-09 14:57:42 +02003975 u8 reserved_at_40[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003976 u8 function_id[0x10];
3977
3978 u8 num_pages[0x20];
3979};
3980
3981enum {
3982 MLX5_QUERY_PAGES_IN_OP_MOD_BOOT_PAGES = 0x1,
3983 MLX5_QUERY_PAGES_IN_OP_MOD_INIT_PAGES = 0x2,
3984 MLX5_QUERY_PAGES_IN_OP_MOD_REGULAR_PAGES = 0x3,
3985};
3986
3987struct mlx5_ifc_query_pages_in_bits {
3988 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003989 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003990
Matan Barakb4ff3a32016-02-09 14:57:42 +02003991 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003992 u8 op_mod[0x10];
3993
Matan Barakb4ff3a32016-02-09 14:57:42 +02003994 u8 reserved_at_40[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003995 u8 function_id[0x10];
3996
Matan Barakb4ff3a32016-02-09 14:57:42 +02003997 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003998};
3999
4000struct mlx5_ifc_query_nic_vport_context_out_bits {
4001 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004002 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004003
4004 u8 syndrome[0x20];
4005
Matan Barakb4ff3a32016-02-09 14:57:42 +02004006 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004007
4008 struct mlx5_ifc_nic_vport_context_bits nic_vport_context;
4009};
4010
4011struct mlx5_ifc_query_nic_vport_context_in_bits {
4012 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004013 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004014
Matan Barakb4ff3a32016-02-09 14:57:42 +02004015 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004016 u8 op_mod[0x10];
4017
4018 u8 other_vport[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004019 u8 reserved_at_41[0xf];
Saeed Mahameede2816822015-05-28 22:28:40 +03004020 u8 vport_number[0x10];
4021
Matan Barakb4ff3a32016-02-09 14:57:42 +02004022 u8 reserved_at_60[0x5];
Saeed Mahameede2816822015-05-28 22:28:40 +03004023 u8 allowed_list_type[0x3];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004024 u8 reserved_at_68[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004025};
4026
4027struct mlx5_ifc_query_mkey_out_bits {
4028 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004029 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004030
4031 u8 syndrome[0x20];
4032
Matan Barakb4ff3a32016-02-09 14:57:42 +02004033 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004034
4035 struct mlx5_ifc_mkc_bits memory_key_mkey_entry;
4036
Matan Barakb4ff3a32016-02-09 14:57:42 +02004037 u8 reserved_at_280[0x600];
Saeed Mahameede2816822015-05-28 22:28:40 +03004038
4039 u8 bsf0_klm0_pas_mtt0_1[16][0x8];
4040
4041 u8 bsf1_klm1_pas_mtt2_3[16][0x8];
4042};
4043
4044struct mlx5_ifc_query_mkey_in_bits {
4045 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004046 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004047
Matan Barakb4ff3a32016-02-09 14:57:42 +02004048 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004049 u8 op_mod[0x10];
4050
Matan Barakb4ff3a32016-02-09 14:57:42 +02004051 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03004052 u8 mkey_index[0x18];
4053
4054 u8 pg_access[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004055 u8 reserved_at_61[0x1f];
Saeed Mahameede2816822015-05-28 22:28:40 +03004056};
4057
4058struct mlx5_ifc_query_mad_demux_out_bits {
4059 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004060 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004061
4062 u8 syndrome[0x20];
4063
Matan Barakb4ff3a32016-02-09 14:57:42 +02004064 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004065
4066 u8 mad_dumux_parameters_block[0x20];
4067};
4068
4069struct mlx5_ifc_query_mad_demux_in_bits {
4070 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004071 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004072
Matan Barakb4ff3a32016-02-09 14:57:42 +02004073 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004074 u8 op_mod[0x10];
4075
Matan Barakb4ff3a32016-02-09 14:57:42 +02004076 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004077};
4078
4079struct mlx5_ifc_query_l2_table_entry_out_bits {
4080 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004081 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004082
4083 u8 syndrome[0x20];
4084
Matan Barakb4ff3a32016-02-09 14:57:42 +02004085 u8 reserved_at_40[0xa0];
Saeed Mahameede2816822015-05-28 22:28:40 +03004086
Matan Barakb4ff3a32016-02-09 14:57:42 +02004087 u8 reserved_at_e0[0x13];
Saeed Mahameede2816822015-05-28 22:28:40 +03004088 u8 vlan_valid[0x1];
4089 u8 vlan[0xc];
4090
4091 struct mlx5_ifc_mac_address_layout_bits mac_address;
4092
Matan Barakb4ff3a32016-02-09 14:57:42 +02004093 u8 reserved_at_140[0xc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03004094};
4095
4096struct mlx5_ifc_query_l2_table_entry_in_bits {
4097 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004098 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004099
Matan Barakb4ff3a32016-02-09 14:57:42 +02004100 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004101 u8 op_mod[0x10];
4102
Matan Barakb4ff3a32016-02-09 14:57:42 +02004103 u8 reserved_at_40[0x60];
Saeed Mahameede2816822015-05-28 22:28:40 +03004104
Matan Barakb4ff3a32016-02-09 14:57:42 +02004105 u8 reserved_at_a0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03004106 u8 table_index[0x18];
4107
Matan Barakb4ff3a32016-02-09 14:57:42 +02004108 u8 reserved_at_c0[0x140];
Saeed Mahameede2816822015-05-28 22:28:40 +03004109};
4110
4111struct mlx5_ifc_query_issi_out_bits {
4112 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004113 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004114
4115 u8 syndrome[0x20];
4116
Matan Barakb4ff3a32016-02-09 14:57:42 +02004117 u8 reserved_at_40[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004118 u8 current_issi[0x10];
4119
Matan Barakb4ff3a32016-02-09 14:57:42 +02004120 u8 reserved_at_60[0xa0];
Saeed Mahameede2816822015-05-28 22:28:40 +03004121
Matan Barakb4ff3a32016-02-09 14:57:42 +02004122 u8 reserved_at_100[76][0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03004123 u8 supported_issi_dw0[0x20];
4124};
4125
4126struct mlx5_ifc_query_issi_in_bits {
4127 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004128 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004129
Matan Barakb4ff3a32016-02-09 14:57:42 +02004130 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004131 u8 op_mod[0x10];
4132
Matan Barakb4ff3a32016-02-09 14:57:42 +02004133 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004134};
4135
Saeed Mahameed0dbc6fe2016-11-17 13:45:59 +02004136struct mlx5_ifc_set_driver_version_out_bits {
4137 u8 status[0x8];
4138 u8 reserved_0[0x18];
4139
4140 u8 syndrome[0x20];
4141 u8 reserved_1[0x40];
4142};
4143
4144struct mlx5_ifc_set_driver_version_in_bits {
4145 u8 opcode[0x10];
4146 u8 reserved_0[0x10];
4147
4148 u8 reserved_1[0x10];
4149 u8 op_mod[0x10];
4150
4151 u8 reserved_2[0x40];
4152 u8 driver_version[64][0x8];
4153};
4154
Saeed Mahameede2816822015-05-28 22:28:40 +03004155struct mlx5_ifc_query_hca_vport_pkey_out_bits {
4156 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004157 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004158
4159 u8 syndrome[0x20];
4160
Matan Barakb4ff3a32016-02-09 14:57:42 +02004161 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004162
4163 struct mlx5_ifc_pkey_bits pkey[0];
4164};
4165
4166struct mlx5_ifc_query_hca_vport_pkey_in_bits {
4167 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004168 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004169
Matan Barakb4ff3a32016-02-09 14:57:42 +02004170 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004171 u8 op_mod[0x10];
4172
4173 u8 other_vport[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004174 u8 reserved_at_41[0xb];
Majd Dibbiny707c4602015-06-04 19:30:41 +03004175 u8 port_num[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03004176 u8 vport_number[0x10];
4177
Matan Barakb4ff3a32016-02-09 14:57:42 +02004178 u8 reserved_at_60[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004179 u8 pkey_index[0x10];
4180};
4181
Eli Coheneff901d2016-03-11 22:58:42 +02004182enum {
4183 MLX5_HCA_VPORT_SEL_PORT_GUID = 1 << 0,
4184 MLX5_HCA_VPORT_SEL_NODE_GUID = 1 << 1,
4185 MLX5_HCA_VPORT_SEL_STATE_POLICY = 1 << 2,
4186};
4187
Saeed Mahameede2816822015-05-28 22:28:40 +03004188struct mlx5_ifc_query_hca_vport_gid_out_bits {
4189 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004190 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004191
4192 u8 syndrome[0x20];
4193
Matan Barakb4ff3a32016-02-09 14:57:42 +02004194 u8 reserved_at_40[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004195
4196 u8 gids_num[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004197 u8 reserved_at_70[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004198
4199 struct mlx5_ifc_array128_auto_bits gid[0];
4200};
4201
4202struct mlx5_ifc_query_hca_vport_gid_in_bits {
4203 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004204 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004205
Matan Barakb4ff3a32016-02-09 14:57:42 +02004206 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004207 u8 op_mod[0x10];
4208
4209 u8 other_vport[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004210 u8 reserved_at_41[0xb];
Majd Dibbiny707c4602015-06-04 19:30:41 +03004211 u8 port_num[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03004212 u8 vport_number[0x10];
4213
Matan Barakb4ff3a32016-02-09 14:57:42 +02004214 u8 reserved_at_60[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004215 u8 gid_index[0x10];
4216};
4217
4218struct mlx5_ifc_query_hca_vport_context_out_bits {
4219 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004220 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004221
4222 u8 syndrome[0x20];
4223
Matan Barakb4ff3a32016-02-09 14:57:42 +02004224 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004225
4226 struct mlx5_ifc_hca_vport_context_bits hca_vport_context;
4227};
4228
4229struct mlx5_ifc_query_hca_vport_context_in_bits {
4230 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004231 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004232
Matan Barakb4ff3a32016-02-09 14:57:42 +02004233 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004234 u8 op_mod[0x10];
4235
4236 u8 other_vport[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004237 u8 reserved_at_41[0xb];
Majd Dibbiny707c4602015-06-04 19:30:41 +03004238 u8 port_num[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03004239 u8 vport_number[0x10];
4240
Matan Barakb4ff3a32016-02-09 14:57:42 +02004241 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004242};
4243
4244struct mlx5_ifc_query_hca_cap_out_bits {
4245 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004246 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004247
4248 u8 syndrome[0x20];
4249
Matan Barakb4ff3a32016-02-09 14:57:42 +02004250 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004251
4252 union mlx5_ifc_hca_cap_union_bits capability;
Eli Cohenb7755162014-10-02 12:19:44 +03004253};
4254
4255struct mlx5_ifc_query_hca_cap_in_bits {
4256 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004257 u8 reserved_at_10[0x10];
Eli Cohenb7755162014-10-02 12:19:44 +03004258
Matan Barakb4ff3a32016-02-09 14:57:42 +02004259 u8 reserved_at_20[0x10];
Eli Cohenb7755162014-10-02 12:19:44 +03004260 u8 op_mod[0x10];
4261
Matan Barakb4ff3a32016-02-09 14:57:42 +02004262 u8 reserved_at_40[0x40];
Eli Cohenb7755162014-10-02 12:19:44 +03004263};
4264
Saeed Mahameede2816822015-05-28 22:28:40 +03004265struct mlx5_ifc_query_flow_table_out_bits {
Eli Cohenb7755162014-10-02 12:19:44 +03004266 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004267 u8 reserved_at_8[0x18];
Eli Cohenb7755162014-10-02 12:19:44 +03004268
4269 u8 syndrome[0x20];
4270
Matan Barakb4ff3a32016-02-09 14:57:42 +02004271 u8 reserved_at_40[0x80];
Eli Cohenb7755162014-10-02 12:19:44 +03004272
Matan Barakb4ff3a32016-02-09 14:57:42 +02004273 u8 reserved_at_c0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03004274 u8 level[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004275 u8 reserved_at_d0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03004276 u8 log_size[0x8];
4277
Matan Barakb4ff3a32016-02-09 14:57:42 +02004278 u8 reserved_at_e0[0x120];
Eli Cohenb7755162014-10-02 12:19:44 +03004279};
4280
Saeed Mahameede2816822015-05-28 22:28:40 +03004281struct mlx5_ifc_query_flow_table_in_bits {
4282 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004283 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004284
Matan Barakb4ff3a32016-02-09 14:57:42 +02004285 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004286 u8 op_mod[0x10];
4287
Matan Barakb4ff3a32016-02-09 14:57:42 +02004288 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004289
4290 u8 table_type[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004291 u8 reserved_at_88[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004292
Matan Barakb4ff3a32016-02-09 14:57:42 +02004293 u8 reserved_at_a0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03004294 u8 table_id[0x18];
4295
Matan Barakb4ff3a32016-02-09 14:57:42 +02004296 u8 reserved_at_c0[0x140];
Saeed Mahameede2816822015-05-28 22:28:40 +03004297};
4298
4299struct mlx5_ifc_query_fte_out_bits {
4300 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004301 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004302
4303 u8 syndrome[0x20];
4304
Matan Barakb4ff3a32016-02-09 14:57:42 +02004305 u8 reserved_at_40[0x1c0];
Saeed Mahameede2816822015-05-28 22:28:40 +03004306
4307 struct mlx5_ifc_flow_context_bits flow_context;
4308};
4309
4310struct mlx5_ifc_query_fte_in_bits {
4311 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004312 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004313
Matan Barakb4ff3a32016-02-09 14:57:42 +02004314 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004315 u8 op_mod[0x10];
4316
Matan Barakb4ff3a32016-02-09 14:57:42 +02004317 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004318
4319 u8 table_type[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004320 u8 reserved_at_88[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004321
Matan Barakb4ff3a32016-02-09 14:57:42 +02004322 u8 reserved_at_a0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03004323 u8 table_id[0x18];
4324
Matan Barakb4ff3a32016-02-09 14:57:42 +02004325 u8 reserved_at_c0[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004326
4327 u8 flow_index[0x20];
4328
Matan Barakb4ff3a32016-02-09 14:57:42 +02004329 u8 reserved_at_120[0xe0];
Saeed Mahameede2816822015-05-28 22:28:40 +03004330};
4331
4332enum {
4333 MLX5_QUERY_FLOW_GROUP_OUT_MATCH_CRITERIA_ENABLE_OUTER_HEADERS = 0x0,
4334 MLX5_QUERY_FLOW_GROUP_OUT_MATCH_CRITERIA_ENABLE_MISC_PARAMETERS = 0x1,
4335 MLX5_QUERY_FLOW_GROUP_OUT_MATCH_CRITERIA_ENABLE_INNER_HEADERS = 0x2,
4336};
4337
4338struct mlx5_ifc_query_flow_group_out_bits {
4339 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004340 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004341
4342 u8 syndrome[0x20];
4343
Matan Barakb4ff3a32016-02-09 14:57:42 +02004344 u8 reserved_at_40[0xa0];
Saeed Mahameede2816822015-05-28 22:28:40 +03004345
4346 u8 start_flow_index[0x20];
4347
Matan Barakb4ff3a32016-02-09 14:57:42 +02004348 u8 reserved_at_100[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004349
4350 u8 end_flow_index[0x20];
4351
Matan Barakb4ff3a32016-02-09 14:57:42 +02004352 u8 reserved_at_140[0xa0];
Saeed Mahameede2816822015-05-28 22:28:40 +03004353
Matan Barakb4ff3a32016-02-09 14:57:42 +02004354 u8 reserved_at_1e0[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004355 u8 match_criteria_enable[0x8];
4356
4357 struct mlx5_ifc_fte_match_param_bits match_criteria;
4358
Matan Barakb4ff3a32016-02-09 14:57:42 +02004359 u8 reserved_at_1200[0xe00];
Saeed Mahameede2816822015-05-28 22:28:40 +03004360};
4361
4362struct mlx5_ifc_query_flow_group_in_bits {
4363 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004364 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004365
Matan Barakb4ff3a32016-02-09 14:57:42 +02004366 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004367 u8 op_mod[0x10];
4368
Matan Barakb4ff3a32016-02-09 14:57:42 +02004369 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004370
4371 u8 table_type[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004372 u8 reserved_at_88[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004373
Matan Barakb4ff3a32016-02-09 14:57:42 +02004374 u8 reserved_at_a0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03004375 u8 table_id[0x18];
4376
4377 u8 group_id[0x20];
4378
Matan Barakb4ff3a32016-02-09 14:57:42 +02004379 u8 reserved_at_e0[0x120];
Saeed Mahameede2816822015-05-28 22:28:40 +03004380};
4381
Amir Vadai9dc0b282016-05-13 12:55:39 +00004382struct mlx5_ifc_query_flow_counter_out_bits {
4383 u8 status[0x8];
4384 u8 reserved_at_8[0x18];
4385
4386 u8 syndrome[0x20];
4387
4388 u8 reserved_at_40[0x40];
4389
4390 struct mlx5_ifc_traffic_counter_bits flow_statistics[0];
4391};
4392
4393struct mlx5_ifc_query_flow_counter_in_bits {
4394 u8 opcode[0x10];
4395 u8 reserved_at_10[0x10];
4396
4397 u8 reserved_at_20[0x10];
4398 u8 op_mod[0x10];
4399
4400 u8 reserved_at_40[0x80];
4401
4402 u8 clear[0x1];
4403 u8 reserved_at_c1[0xf];
4404 u8 num_of_counters[0x10];
4405
4406 u8 reserved_at_e0[0x10];
4407 u8 flow_counter_id[0x10];
4408};
4409
Saeed Mahameedd6666752015-12-01 18:03:22 +02004410struct mlx5_ifc_query_esw_vport_context_out_bits {
4411 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004412 u8 reserved_at_8[0x18];
Saeed Mahameedd6666752015-12-01 18:03:22 +02004413
4414 u8 syndrome[0x20];
4415
Matan Barakb4ff3a32016-02-09 14:57:42 +02004416 u8 reserved_at_40[0x40];
Saeed Mahameedd6666752015-12-01 18:03:22 +02004417
4418 struct mlx5_ifc_esw_vport_context_bits esw_vport_context;
4419};
4420
4421struct mlx5_ifc_query_esw_vport_context_in_bits {
4422 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004423 u8 reserved_at_10[0x10];
Saeed Mahameedd6666752015-12-01 18:03:22 +02004424
Matan Barakb4ff3a32016-02-09 14:57:42 +02004425 u8 reserved_at_20[0x10];
Saeed Mahameedd6666752015-12-01 18:03:22 +02004426 u8 op_mod[0x10];
4427
4428 u8 other_vport[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004429 u8 reserved_at_41[0xf];
Saeed Mahameedd6666752015-12-01 18:03:22 +02004430 u8 vport_number[0x10];
4431
Matan Barakb4ff3a32016-02-09 14:57:42 +02004432 u8 reserved_at_60[0x20];
Saeed Mahameedd6666752015-12-01 18:03:22 +02004433};
4434
4435struct mlx5_ifc_modify_esw_vport_context_out_bits {
4436 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004437 u8 reserved_at_8[0x18];
Saeed Mahameedd6666752015-12-01 18:03:22 +02004438
4439 u8 syndrome[0x20];
4440
Matan Barakb4ff3a32016-02-09 14:57:42 +02004441 u8 reserved_at_40[0x40];
Saeed Mahameedd6666752015-12-01 18:03:22 +02004442};
4443
4444struct mlx5_ifc_esw_vport_context_fields_select_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02004445 u8 reserved_at_0[0x1c];
Saeed Mahameedd6666752015-12-01 18:03:22 +02004446 u8 vport_cvlan_insert[0x1];
4447 u8 vport_svlan_insert[0x1];
4448 u8 vport_cvlan_strip[0x1];
4449 u8 vport_svlan_strip[0x1];
4450};
4451
4452struct mlx5_ifc_modify_esw_vport_context_in_bits {
4453 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004454 u8 reserved_at_10[0x10];
Saeed Mahameedd6666752015-12-01 18:03:22 +02004455
Matan Barakb4ff3a32016-02-09 14:57:42 +02004456 u8 reserved_at_20[0x10];
Saeed Mahameedd6666752015-12-01 18:03:22 +02004457 u8 op_mod[0x10];
4458
4459 u8 other_vport[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004460 u8 reserved_at_41[0xf];
Saeed Mahameedd6666752015-12-01 18:03:22 +02004461 u8 vport_number[0x10];
4462
4463 struct mlx5_ifc_esw_vport_context_fields_select_bits field_select;
4464
4465 struct mlx5_ifc_esw_vport_context_bits esw_vport_context;
4466};
4467
Saeed Mahameede2816822015-05-28 22:28:40 +03004468struct mlx5_ifc_query_eq_out_bits {
Eli Cohenb7755162014-10-02 12:19:44 +03004469 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004470 u8 reserved_at_8[0x18];
Eli Cohenb7755162014-10-02 12:19:44 +03004471
4472 u8 syndrome[0x20];
4473
Matan Barakb4ff3a32016-02-09 14:57:42 +02004474 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004475
4476 struct mlx5_ifc_eqc_bits eq_context_entry;
4477
Matan Barakb4ff3a32016-02-09 14:57:42 +02004478 u8 reserved_at_280[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004479
4480 u8 event_bitmask[0x40];
4481
Matan Barakb4ff3a32016-02-09 14:57:42 +02004482 u8 reserved_at_300[0x580];
Saeed Mahameede2816822015-05-28 22:28:40 +03004483
4484 u8 pas[0][0x40];
4485};
4486
4487struct mlx5_ifc_query_eq_in_bits {
4488 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004489 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004490
Matan Barakb4ff3a32016-02-09 14:57:42 +02004491 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004492 u8 op_mod[0x10];
4493
Matan Barakb4ff3a32016-02-09 14:57:42 +02004494 u8 reserved_at_40[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004495 u8 eq_number[0x8];
4496
Matan Barakb4ff3a32016-02-09 14:57:42 +02004497 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004498};
4499
Hadar Hen Zion7adbde22016-08-03 15:08:33 +03004500struct mlx5_ifc_encap_header_in_bits {
4501 u8 reserved_at_0[0x5];
4502 u8 header_type[0x3];
4503 u8 reserved_at_8[0xe];
4504 u8 encap_header_size[0xa];
4505
4506 u8 reserved_at_20[0x10];
4507 u8 encap_header[2][0x8];
4508
4509 u8 more_encap_header[0][0x8];
4510};
4511
4512struct mlx5_ifc_query_encap_header_out_bits {
4513 u8 status[0x8];
4514 u8 reserved_at_8[0x18];
4515
4516 u8 syndrome[0x20];
4517
4518 u8 reserved_at_40[0xa0];
4519
4520 struct mlx5_ifc_encap_header_in_bits encap_header[0];
4521};
4522
4523struct mlx5_ifc_query_encap_header_in_bits {
4524 u8 opcode[0x10];
4525 u8 reserved_at_10[0x10];
4526
4527 u8 reserved_at_20[0x10];
4528 u8 op_mod[0x10];
4529
4530 u8 encap_id[0x20];
4531
4532 u8 reserved_at_60[0xa0];
4533};
4534
4535struct mlx5_ifc_alloc_encap_header_out_bits {
4536 u8 status[0x8];
4537 u8 reserved_at_8[0x18];
4538
4539 u8 syndrome[0x20];
4540
4541 u8 encap_id[0x20];
4542
4543 u8 reserved_at_60[0x20];
4544};
4545
4546struct mlx5_ifc_alloc_encap_header_in_bits {
4547 u8 opcode[0x10];
4548 u8 reserved_at_10[0x10];
4549
4550 u8 reserved_at_20[0x10];
4551 u8 op_mod[0x10];
4552
4553 u8 reserved_at_40[0xa0];
4554
4555 struct mlx5_ifc_encap_header_in_bits encap_header;
4556};
4557
4558struct mlx5_ifc_dealloc_encap_header_out_bits {
4559 u8 status[0x8];
4560 u8 reserved_at_8[0x18];
4561
4562 u8 syndrome[0x20];
4563
4564 u8 reserved_at_40[0x40];
4565};
4566
4567struct mlx5_ifc_dealloc_encap_header_in_bits {
4568 u8 opcode[0x10];
4569 u8 reserved_at_10[0x10];
4570
4571 u8 reserved_20[0x10];
4572 u8 op_mod[0x10];
4573
4574 u8 encap_id[0x20];
4575
4576 u8 reserved_60[0x20];
4577};
4578
Or Gerlitz2a69cb92017-01-19 19:31:25 +02004579struct mlx5_ifc_set_action_in_bits {
4580 u8 action_type[0x4];
4581 u8 field[0xc];
4582 u8 reserved_at_10[0x3];
4583 u8 offset[0x5];
4584 u8 reserved_at_18[0x3];
4585 u8 length[0x5];
4586
4587 u8 data[0x20];
4588};
4589
4590struct mlx5_ifc_add_action_in_bits {
4591 u8 action_type[0x4];
4592 u8 field[0xc];
4593 u8 reserved_at_10[0x10];
4594
4595 u8 data[0x20];
4596};
4597
4598union mlx5_ifc_set_action_in_add_action_in_auto_bits {
4599 struct mlx5_ifc_set_action_in_bits set_action_in;
4600 struct mlx5_ifc_add_action_in_bits add_action_in;
4601 u8 reserved_at_0[0x40];
4602};
4603
4604enum {
4605 MLX5_ACTION_TYPE_SET = 0x1,
4606 MLX5_ACTION_TYPE_ADD = 0x2,
4607};
4608
4609enum {
4610 MLX5_ACTION_IN_FIELD_OUT_SMAC_47_16 = 0x1,
4611 MLX5_ACTION_IN_FIELD_OUT_SMAC_15_0 = 0x2,
4612 MLX5_ACTION_IN_FIELD_OUT_ETHERTYPE = 0x3,
4613 MLX5_ACTION_IN_FIELD_OUT_DMAC_47_16 = 0x4,
4614 MLX5_ACTION_IN_FIELD_OUT_DMAC_15_0 = 0x5,
4615 MLX5_ACTION_IN_FIELD_OUT_IP_DSCP = 0x6,
4616 MLX5_ACTION_IN_FIELD_OUT_TCP_FLAGS = 0x7,
4617 MLX5_ACTION_IN_FIELD_OUT_TCP_SPORT = 0x8,
4618 MLX5_ACTION_IN_FIELD_OUT_TCP_DPORT = 0x9,
4619 MLX5_ACTION_IN_FIELD_OUT_IP_TTL = 0xa,
4620 MLX5_ACTION_IN_FIELD_OUT_UDP_SPORT = 0xb,
4621 MLX5_ACTION_IN_FIELD_OUT_UDP_DPORT = 0xc,
4622 MLX5_ACTION_IN_FIELD_OUT_SIPV6_127_96 = 0xd,
4623 MLX5_ACTION_IN_FIELD_OUT_SIPV6_95_64 = 0xe,
4624 MLX5_ACTION_IN_FIELD_OUT_SIPV6_63_32 = 0xf,
4625 MLX5_ACTION_IN_FIELD_OUT_SIPV6_31_0 = 0x10,
4626 MLX5_ACTION_IN_FIELD_OUT_DIPV6_127_96 = 0x11,
4627 MLX5_ACTION_IN_FIELD_OUT_DIPV6_95_64 = 0x12,
4628 MLX5_ACTION_IN_FIELD_OUT_DIPV6_63_32 = 0x13,
4629 MLX5_ACTION_IN_FIELD_OUT_DIPV6_31_0 = 0x14,
4630 MLX5_ACTION_IN_FIELD_OUT_SIPV4 = 0x15,
4631 MLX5_ACTION_IN_FIELD_OUT_DIPV4 = 0x16,
Or Gerlitz0c0316f2017-06-13 11:09:57 +03004632 MLX5_ACTION_IN_FIELD_OUT_IPV6_HOPLIMIT = 0x47,
Or Gerlitz2a69cb92017-01-19 19:31:25 +02004633};
4634
4635struct mlx5_ifc_alloc_modify_header_context_out_bits {
4636 u8 status[0x8];
4637 u8 reserved_at_8[0x18];
4638
4639 u8 syndrome[0x20];
4640
4641 u8 modify_header_id[0x20];
4642
4643 u8 reserved_at_60[0x20];
4644};
4645
4646struct mlx5_ifc_alloc_modify_header_context_in_bits {
4647 u8 opcode[0x10];
4648 u8 reserved_at_10[0x10];
4649
4650 u8 reserved_at_20[0x10];
4651 u8 op_mod[0x10];
4652
4653 u8 reserved_at_40[0x20];
4654
4655 u8 table_type[0x8];
4656 u8 reserved_at_68[0x10];
4657 u8 num_of_actions[0x8];
4658
4659 union mlx5_ifc_set_action_in_add_action_in_auto_bits actions[0];
4660};
4661
4662struct mlx5_ifc_dealloc_modify_header_context_out_bits {
4663 u8 status[0x8];
4664 u8 reserved_at_8[0x18];
4665
4666 u8 syndrome[0x20];
4667
4668 u8 reserved_at_40[0x40];
4669};
4670
4671struct mlx5_ifc_dealloc_modify_header_context_in_bits {
4672 u8 opcode[0x10];
4673 u8 reserved_at_10[0x10];
4674
4675 u8 reserved_at_20[0x10];
4676 u8 op_mod[0x10];
4677
4678 u8 modify_header_id[0x20];
4679
4680 u8 reserved_at_60[0x20];
4681};
4682
Saeed Mahameede2816822015-05-28 22:28:40 +03004683struct mlx5_ifc_query_dct_out_bits {
4684 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004685 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004686
4687 u8 syndrome[0x20];
4688
Matan Barakb4ff3a32016-02-09 14:57:42 +02004689 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004690
4691 struct mlx5_ifc_dctc_bits dct_context_entry;
4692
Matan Barakb4ff3a32016-02-09 14:57:42 +02004693 u8 reserved_at_280[0x180];
Saeed Mahameede2816822015-05-28 22:28:40 +03004694};
4695
4696struct mlx5_ifc_query_dct_in_bits {
4697 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004698 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004699
Matan Barakb4ff3a32016-02-09 14:57:42 +02004700 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004701 u8 op_mod[0x10];
4702
Matan Barakb4ff3a32016-02-09 14:57:42 +02004703 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03004704 u8 dctn[0x18];
4705
Matan Barakb4ff3a32016-02-09 14:57:42 +02004706 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004707};
4708
4709struct mlx5_ifc_query_cq_out_bits {
4710 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004711 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004712
4713 u8 syndrome[0x20];
4714
Matan Barakb4ff3a32016-02-09 14:57:42 +02004715 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004716
4717 struct mlx5_ifc_cqc_bits cq_context;
4718
Matan Barakb4ff3a32016-02-09 14:57:42 +02004719 u8 reserved_at_280[0x600];
Saeed Mahameede2816822015-05-28 22:28:40 +03004720
4721 u8 pas[0][0x40];
4722};
4723
4724struct mlx5_ifc_query_cq_in_bits {
4725 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004726 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004727
Matan Barakb4ff3a32016-02-09 14:57:42 +02004728 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004729 u8 op_mod[0x10];
4730
Matan Barakb4ff3a32016-02-09 14:57:42 +02004731 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03004732 u8 cqn[0x18];
4733
Matan Barakb4ff3a32016-02-09 14:57:42 +02004734 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004735};
4736
4737struct mlx5_ifc_query_cong_status_out_bits {
4738 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004739 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004740
4741 u8 syndrome[0x20];
4742
Matan Barakb4ff3a32016-02-09 14:57:42 +02004743 u8 reserved_at_40[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004744
4745 u8 enable[0x1];
4746 u8 tag_enable[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004747 u8 reserved_at_62[0x1e];
Saeed Mahameede2816822015-05-28 22:28:40 +03004748};
4749
4750struct mlx5_ifc_query_cong_status_in_bits {
4751 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004752 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004753
Matan Barakb4ff3a32016-02-09 14:57:42 +02004754 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004755 u8 op_mod[0x10];
4756
Matan Barakb4ff3a32016-02-09 14:57:42 +02004757 u8 reserved_at_40[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004758 u8 priority[0x4];
4759 u8 cong_protocol[0x4];
4760
Matan Barakb4ff3a32016-02-09 14:57:42 +02004761 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004762};
4763
4764struct mlx5_ifc_query_cong_statistics_out_bits {
4765 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004766 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004767
4768 u8 syndrome[0x20];
4769
Matan Barakb4ff3a32016-02-09 14:57:42 +02004770 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004771
Parav Pandite1f24a72017-04-16 07:29:29 +03004772 u8 rp_cur_flows[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004773
4774 u8 sum_flows[0x20];
4775
Parav Pandite1f24a72017-04-16 07:29:29 +03004776 u8 rp_cnp_ignored_high[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004777
Parav Pandite1f24a72017-04-16 07:29:29 +03004778 u8 rp_cnp_ignored_low[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004779
Parav Pandite1f24a72017-04-16 07:29:29 +03004780 u8 rp_cnp_handled_high[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004781
Parav Pandite1f24a72017-04-16 07:29:29 +03004782 u8 rp_cnp_handled_low[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004783
Matan Barakb4ff3a32016-02-09 14:57:42 +02004784 u8 reserved_at_140[0x100];
Saeed Mahameede2816822015-05-28 22:28:40 +03004785
4786 u8 time_stamp_high[0x20];
4787
4788 u8 time_stamp_low[0x20];
4789
4790 u8 accumulators_period[0x20];
4791
Parav Pandite1f24a72017-04-16 07:29:29 +03004792 u8 np_ecn_marked_roce_packets_high[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004793
Parav Pandite1f24a72017-04-16 07:29:29 +03004794 u8 np_ecn_marked_roce_packets_low[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004795
Parav Pandite1f24a72017-04-16 07:29:29 +03004796 u8 np_cnp_sent_high[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004797
Parav Pandite1f24a72017-04-16 07:29:29 +03004798 u8 np_cnp_sent_low[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004799
Matan Barakb4ff3a32016-02-09 14:57:42 +02004800 u8 reserved_at_320[0x560];
Saeed Mahameede2816822015-05-28 22:28:40 +03004801};
4802
4803struct mlx5_ifc_query_cong_statistics_in_bits {
4804 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004805 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004806
Matan Barakb4ff3a32016-02-09 14:57:42 +02004807 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004808 u8 op_mod[0x10];
4809
4810 u8 clear[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004811 u8 reserved_at_41[0x1f];
Saeed Mahameede2816822015-05-28 22:28:40 +03004812
Matan Barakb4ff3a32016-02-09 14:57:42 +02004813 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004814};
4815
4816struct mlx5_ifc_query_cong_params_out_bits {
4817 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004818 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004819
4820 u8 syndrome[0x20];
4821
Matan Barakb4ff3a32016-02-09 14:57:42 +02004822 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004823
4824 union mlx5_ifc_cong_control_roce_ecn_auto_bits congestion_parameters;
4825};
4826
4827struct mlx5_ifc_query_cong_params_in_bits {
4828 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004829 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004830
Matan Barakb4ff3a32016-02-09 14:57:42 +02004831 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004832 u8 op_mod[0x10];
4833
Matan Barakb4ff3a32016-02-09 14:57:42 +02004834 u8 reserved_at_40[0x1c];
Saeed Mahameede2816822015-05-28 22:28:40 +03004835 u8 cong_protocol[0x4];
4836
Matan Barakb4ff3a32016-02-09 14:57:42 +02004837 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004838};
4839
4840struct mlx5_ifc_query_adapter_out_bits {
4841 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004842 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004843
4844 u8 syndrome[0x20];
4845
Matan Barakb4ff3a32016-02-09 14:57:42 +02004846 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004847
4848 struct mlx5_ifc_query_adapter_param_block_bits query_adapter_struct;
4849};
4850
4851struct mlx5_ifc_query_adapter_in_bits {
4852 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004853 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004854
Matan Barakb4ff3a32016-02-09 14:57:42 +02004855 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004856 u8 op_mod[0x10];
4857
Matan Barakb4ff3a32016-02-09 14:57:42 +02004858 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004859};
4860
4861struct mlx5_ifc_qp_2rst_out_bits {
4862 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004863 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004864
4865 u8 syndrome[0x20];
4866
Matan Barakb4ff3a32016-02-09 14:57:42 +02004867 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004868};
4869
4870struct mlx5_ifc_qp_2rst_in_bits {
4871 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004872 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004873
Matan Barakb4ff3a32016-02-09 14:57:42 +02004874 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004875 u8 op_mod[0x10];
4876
Matan Barakb4ff3a32016-02-09 14:57:42 +02004877 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03004878 u8 qpn[0x18];
4879
Matan Barakb4ff3a32016-02-09 14:57:42 +02004880 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004881};
4882
4883struct mlx5_ifc_qp_2err_out_bits {
4884 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004885 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004886
4887 u8 syndrome[0x20];
4888
Matan Barakb4ff3a32016-02-09 14:57:42 +02004889 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004890};
4891
4892struct mlx5_ifc_qp_2err_in_bits {
4893 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004894 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004895
Matan Barakb4ff3a32016-02-09 14:57:42 +02004896 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004897 u8 op_mod[0x10];
4898
Matan Barakb4ff3a32016-02-09 14:57:42 +02004899 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03004900 u8 qpn[0x18];
4901
Matan Barakb4ff3a32016-02-09 14:57:42 +02004902 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004903};
4904
4905struct mlx5_ifc_page_fault_resume_out_bits {
4906 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004907 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004908
4909 u8 syndrome[0x20];
4910
Matan Barakb4ff3a32016-02-09 14:57:42 +02004911 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004912};
4913
4914struct mlx5_ifc_page_fault_resume_in_bits {
4915 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004916 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004917
Matan Barakb4ff3a32016-02-09 14:57:42 +02004918 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004919 u8 op_mod[0x10];
4920
4921 u8 error[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004922 u8 reserved_at_41[0x4];
Artemy Kovalyov223cdc72017-01-02 11:37:45 +02004923 u8 page_fault_type[0x3];
4924 u8 wq_number[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004925
Artemy Kovalyov223cdc72017-01-02 11:37:45 +02004926 u8 reserved_at_60[0x8];
4927 u8 token[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004928};
4929
4930struct mlx5_ifc_nop_out_bits {
4931 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004932 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004933
4934 u8 syndrome[0x20];
4935
Matan Barakb4ff3a32016-02-09 14:57:42 +02004936 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004937};
4938
4939struct mlx5_ifc_nop_in_bits {
4940 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004941 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004942
Matan Barakb4ff3a32016-02-09 14:57:42 +02004943 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004944 u8 op_mod[0x10];
4945
Matan Barakb4ff3a32016-02-09 14:57:42 +02004946 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004947};
4948
4949struct mlx5_ifc_modify_vport_state_out_bits {
4950 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004951 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004952
4953 u8 syndrome[0x20];
4954
Matan Barakb4ff3a32016-02-09 14:57:42 +02004955 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004956};
4957
4958struct mlx5_ifc_modify_vport_state_in_bits {
4959 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004960 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004961
Matan Barakb4ff3a32016-02-09 14:57:42 +02004962 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004963 u8 op_mod[0x10];
4964
4965 u8 other_vport[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004966 u8 reserved_at_41[0xf];
Saeed Mahameede2816822015-05-28 22:28:40 +03004967 u8 vport_number[0x10];
4968
Matan Barakb4ff3a32016-02-09 14:57:42 +02004969 u8 reserved_at_60[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004970 u8 admin_state[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004971 u8 reserved_at_7c[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03004972};
4973
4974struct mlx5_ifc_modify_tis_out_bits {
4975 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004976 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004977
4978 u8 syndrome[0x20];
4979
Matan Barakb4ff3a32016-02-09 14:57:42 +02004980 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004981};
4982
majd@mellanox.com75850d02016-01-14 19:13:06 +02004983struct mlx5_ifc_modify_tis_bitmask_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02004984 u8 reserved_at_0[0x20];
majd@mellanox.com75850d02016-01-14 19:13:06 +02004985
Aviv Heller84df61e2016-05-10 13:47:50 +03004986 u8 reserved_at_20[0x1d];
4987 u8 lag_tx_port_affinity[0x1];
4988 u8 strict_lag_tx_port_affinity[0x1];
majd@mellanox.com75850d02016-01-14 19:13:06 +02004989 u8 prio[0x1];
4990};
4991
Saeed Mahameede2816822015-05-28 22:28:40 +03004992struct mlx5_ifc_modify_tis_in_bits {
4993 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004994 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004995
Matan Barakb4ff3a32016-02-09 14:57:42 +02004996 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004997 u8 op_mod[0x10];
4998
Matan Barakb4ff3a32016-02-09 14:57:42 +02004999 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03005000 u8 tisn[0x18];
5001
Matan Barakb4ff3a32016-02-09 14:57:42 +02005002 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005003
majd@mellanox.com75850d02016-01-14 19:13:06 +02005004 struct mlx5_ifc_modify_tis_bitmask_bits bitmask;
Saeed Mahameede2816822015-05-28 22:28:40 +03005005
Matan Barakb4ff3a32016-02-09 14:57:42 +02005006 u8 reserved_at_c0[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005007
5008 struct mlx5_ifc_tisc_bits ctx;
5009};
5010
Achiad Shochatd9eea402015-08-04 14:05:42 +03005011struct mlx5_ifc_modify_tir_bitmask_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02005012 u8 reserved_at_0[0x20];
Achiad Shochatd9eea402015-08-04 14:05:42 +03005013
Matan Barakb4ff3a32016-02-09 14:57:42 +02005014 u8 reserved_at_20[0x1b];
Tariq Toukan66189962015-11-12 19:35:26 +02005015 u8 self_lb_en[0x1];
Tariq Toukanbdfc0282016-02-29 21:17:12 +02005016 u8 reserved_at_3c[0x1];
5017 u8 hash[0x1];
5018 u8 reserved_at_3e[0x1];
Achiad Shochatd9eea402015-08-04 14:05:42 +03005019 u8 lro[0x1];
5020};
5021
Saeed Mahameede2816822015-05-28 22:28:40 +03005022struct mlx5_ifc_modify_tir_out_bits {
5023 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005024 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005025
5026 u8 syndrome[0x20];
5027
Matan Barakb4ff3a32016-02-09 14:57:42 +02005028 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005029};
5030
5031struct mlx5_ifc_modify_tir_in_bits {
5032 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005033 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005034
Matan Barakb4ff3a32016-02-09 14:57:42 +02005035 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005036 u8 op_mod[0x10];
5037
Matan Barakb4ff3a32016-02-09 14:57:42 +02005038 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03005039 u8 tirn[0x18];
5040
Matan Barakb4ff3a32016-02-09 14:57:42 +02005041 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005042
Achiad Shochatd9eea402015-08-04 14:05:42 +03005043 struct mlx5_ifc_modify_tir_bitmask_bits bitmask;
Saeed Mahameede2816822015-05-28 22:28:40 +03005044
Matan Barakb4ff3a32016-02-09 14:57:42 +02005045 u8 reserved_at_c0[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005046
5047 struct mlx5_ifc_tirc_bits ctx;
5048};
5049
5050struct mlx5_ifc_modify_sq_out_bits {
5051 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005052 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005053
5054 u8 syndrome[0x20];
5055
Matan Barakb4ff3a32016-02-09 14:57:42 +02005056 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005057};
5058
5059struct mlx5_ifc_modify_sq_in_bits {
5060 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005061 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005062
Matan Barakb4ff3a32016-02-09 14:57:42 +02005063 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005064 u8 op_mod[0x10];
5065
5066 u8 sq_state[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005067 u8 reserved_at_44[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03005068 u8 sqn[0x18];
5069
Matan Barakb4ff3a32016-02-09 14:57:42 +02005070 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005071
5072 u8 modify_bitmask[0x40];
5073
Matan Barakb4ff3a32016-02-09 14:57:42 +02005074 u8 reserved_at_c0[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005075
5076 struct mlx5_ifc_sqc_bits ctx;
5077};
5078
Mohamad Haj Yahia813f8542016-08-11 11:21:39 +03005079struct mlx5_ifc_modify_scheduling_element_out_bits {
5080 u8 status[0x8];
5081 u8 reserved_at_8[0x18];
5082
5083 u8 syndrome[0x20];
5084
5085 u8 reserved_at_40[0x1c0];
5086};
5087
5088enum {
5089 MODIFY_SCHEDULING_ELEMENT_IN_MODIFY_BITMASK_BW_SHARE = 0x1,
5090 MODIFY_SCHEDULING_ELEMENT_IN_MODIFY_BITMASK_MAX_AVERAGE_BW = 0x2,
5091};
5092
5093struct mlx5_ifc_modify_scheduling_element_in_bits {
5094 u8 opcode[0x10];
5095 u8 reserved_at_10[0x10];
5096
5097 u8 reserved_at_20[0x10];
5098 u8 op_mod[0x10];
5099
5100 u8 scheduling_hierarchy[0x8];
5101 u8 reserved_at_48[0x18];
5102
5103 u8 scheduling_element_id[0x20];
5104
5105 u8 reserved_at_80[0x20];
5106
5107 u8 modify_bitmask[0x20];
5108
5109 u8 reserved_at_c0[0x40];
5110
5111 struct mlx5_ifc_scheduling_context_bits scheduling_context;
5112
5113 u8 reserved_at_300[0x100];
5114};
5115
Saeed Mahameede2816822015-05-28 22:28:40 +03005116struct mlx5_ifc_modify_rqt_out_bits {
5117 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005118 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005119
5120 u8 syndrome[0x20];
5121
Matan Barakb4ff3a32016-02-09 14:57:42 +02005122 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005123};
5124
Achiad Shochat5c503682015-08-04 14:05:43 +03005125struct mlx5_ifc_rqt_bitmask_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02005126 u8 reserved_at_0[0x20];
Achiad Shochat5c503682015-08-04 14:05:43 +03005127
Matan Barakb4ff3a32016-02-09 14:57:42 +02005128 u8 reserved_at_20[0x1f];
Achiad Shochat5c503682015-08-04 14:05:43 +03005129 u8 rqn_list[0x1];
5130};
5131
Saeed Mahameede2816822015-05-28 22:28:40 +03005132struct mlx5_ifc_modify_rqt_in_bits {
5133 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005134 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005135
Matan Barakb4ff3a32016-02-09 14:57:42 +02005136 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005137 u8 op_mod[0x10];
5138
Matan Barakb4ff3a32016-02-09 14:57:42 +02005139 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03005140 u8 rqtn[0x18];
5141
Matan Barakb4ff3a32016-02-09 14:57:42 +02005142 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005143
Achiad Shochat5c503682015-08-04 14:05:43 +03005144 struct mlx5_ifc_rqt_bitmask_bits bitmask;
Saeed Mahameede2816822015-05-28 22:28:40 +03005145
Matan Barakb4ff3a32016-02-09 14:57:42 +02005146 u8 reserved_at_c0[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005147
5148 struct mlx5_ifc_rqtc_bits ctx;
5149};
5150
5151struct mlx5_ifc_modify_rq_out_bits {
5152 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005153 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005154
5155 u8 syndrome[0x20];
5156
Matan Barakb4ff3a32016-02-09 14:57:42 +02005157 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005158};
5159
Alex Vesker83b502a2016-08-04 17:32:02 +03005160enum {
5161 MLX5_MODIFY_RQ_IN_MODIFY_BITMASK_VSD = 1ULL << 1,
Guy Ergas102722f2017-02-20 16:18:17 +02005162 MLX5_MODIFY_RQ_IN_MODIFY_BITMASK_SCATTER_FCS = 1ULL << 2,
Majd Dibbiny23a69642017-01-18 15:25:10 +02005163 MLX5_MODIFY_RQ_IN_MODIFY_BITMASK_RQ_COUNTER_SET_ID = 1ULL << 3,
Alex Vesker83b502a2016-08-04 17:32:02 +03005164};
5165
Saeed Mahameede2816822015-05-28 22:28:40 +03005166struct mlx5_ifc_modify_rq_in_bits {
5167 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005168 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005169
Matan Barakb4ff3a32016-02-09 14:57:42 +02005170 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005171 u8 op_mod[0x10];
5172
5173 u8 rq_state[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005174 u8 reserved_at_44[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03005175 u8 rqn[0x18];
5176
Matan Barakb4ff3a32016-02-09 14:57:42 +02005177 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005178
5179 u8 modify_bitmask[0x40];
5180
Matan Barakb4ff3a32016-02-09 14:57:42 +02005181 u8 reserved_at_c0[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005182
5183 struct mlx5_ifc_rqc_bits ctx;
5184};
5185
5186struct mlx5_ifc_modify_rmp_out_bits {
5187 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005188 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005189
5190 u8 syndrome[0x20];
5191
Matan Barakb4ff3a32016-02-09 14:57:42 +02005192 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005193};
5194
Haggai Abramonvsky01949d02015-06-04 19:30:38 +03005195struct mlx5_ifc_rmp_bitmask_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02005196 u8 reserved_at_0[0x20];
Haggai Abramonvsky01949d02015-06-04 19:30:38 +03005197
Matan Barakb4ff3a32016-02-09 14:57:42 +02005198 u8 reserved_at_20[0x1f];
Haggai Abramonvsky01949d02015-06-04 19:30:38 +03005199 u8 lwm[0x1];
5200};
5201
Saeed Mahameede2816822015-05-28 22:28:40 +03005202struct mlx5_ifc_modify_rmp_in_bits {
5203 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005204 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005205
Matan Barakb4ff3a32016-02-09 14:57:42 +02005206 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005207 u8 op_mod[0x10];
5208
5209 u8 rmp_state[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005210 u8 reserved_at_44[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03005211 u8 rmpn[0x18];
5212
Matan Barakb4ff3a32016-02-09 14:57:42 +02005213 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005214
Haggai Abramonvsky01949d02015-06-04 19:30:38 +03005215 struct mlx5_ifc_rmp_bitmask_bits bitmask;
Saeed Mahameede2816822015-05-28 22:28:40 +03005216
Matan Barakb4ff3a32016-02-09 14:57:42 +02005217 u8 reserved_at_c0[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005218
5219 struct mlx5_ifc_rmpc_bits ctx;
5220};
5221
5222struct mlx5_ifc_modify_nic_vport_context_out_bits {
5223 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005224 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005225
5226 u8 syndrome[0x20];
5227
Matan Barakb4ff3a32016-02-09 14:57:42 +02005228 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005229};
5230
5231struct mlx5_ifc_modify_nic_vport_field_select_bits {
Noa Osherovich23898c72016-06-10 00:07:37 +03005232 u8 reserved_at_0[0x16];
5233 u8 node_guid[0x1];
5234 u8 port_guid[0x1];
Hadar Hen Zion9def7122016-08-03 17:27:30 +03005235 u8 min_inline[0x1];
Saeed Mahameedd82b7312015-12-01 18:03:14 +02005236 u8 mtu[0x1];
5237 u8 change_event[0x1];
5238 u8 promisc[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03005239 u8 permanent_address[0x1];
5240 u8 addresses_list[0x1];
5241 u8 roce_en[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005242 u8 reserved_at_1f[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03005243};
5244
5245struct mlx5_ifc_modify_nic_vport_context_in_bits {
5246 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005247 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005248
Matan Barakb4ff3a32016-02-09 14:57:42 +02005249 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005250 u8 op_mod[0x10];
5251
5252 u8 other_vport[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005253 u8 reserved_at_41[0xf];
Saeed Mahameede2816822015-05-28 22:28:40 +03005254 u8 vport_number[0x10];
5255
5256 struct mlx5_ifc_modify_nic_vport_field_select_bits field_select;
5257
Matan Barakb4ff3a32016-02-09 14:57:42 +02005258 u8 reserved_at_80[0x780];
Saeed Mahameede2816822015-05-28 22:28:40 +03005259
5260 struct mlx5_ifc_nic_vport_context_bits nic_vport_context;
5261};
5262
5263struct mlx5_ifc_modify_hca_vport_context_out_bits {
5264 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005265 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005266
5267 u8 syndrome[0x20];
5268
Matan Barakb4ff3a32016-02-09 14:57:42 +02005269 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005270};
5271
5272struct mlx5_ifc_modify_hca_vport_context_in_bits {
5273 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005274 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005275
Matan Barakb4ff3a32016-02-09 14:57:42 +02005276 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005277 u8 op_mod[0x10];
5278
5279 u8 other_vport[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005280 u8 reserved_at_41[0xb];
Majd Dibbiny707c4602015-06-04 19:30:41 +03005281 u8 port_num[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03005282 u8 vport_number[0x10];
5283
Matan Barakb4ff3a32016-02-09 14:57:42 +02005284 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005285
5286 struct mlx5_ifc_hca_vport_context_bits hca_vport_context;
5287};
5288
5289struct mlx5_ifc_modify_cq_out_bits {
5290 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005291 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005292
5293 u8 syndrome[0x20];
5294
Matan Barakb4ff3a32016-02-09 14:57:42 +02005295 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005296};
5297
5298enum {
5299 MLX5_MODIFY_CQ_IN_OP_MOD_MODIFY_CQ = 0x0,
5300 MLX5_MODIFY_CQ_IN_OP_MOD_RESIZE_CQ = 0x1,
5301};
5302
5303struct mlx5_ifc_modify_cq_in_bits {
5304 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005305 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005306
Matan Barakb4ff3a32016-02-09 14:57:42 +02005307 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005308 u8 op_mod[0x10];
5309
Matan Barakb4ff3a32016-02-09 14:57:42 +02005310 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03005311 u8 cqn[0x18];
5312
5313 union mlx5_ifc_modify_field_select_resize_field_select_auto_bits modify_field_select_resize_field_select;
5314
5315 struct mlx5_ifc_cqc_bits cq_context;
5316
Matan Barakb4ff3a32016-02-09 14:57:42 +02005317 u8 reserved_at_280[0x600];
Saeed Mahameede2816822015-05-28 22:28:40 +03005318
5319 u8 pas[0][0x40];
5320};
5321
5322struct mlx5_ifc_modify_cong_status_out_bits {
5323 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005324 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005325
5326 u8 syndrome[0x20];
5327
Matan Barakb4ff3a32016-02-09 14:57:42 +02005328 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005329};
5330
5331struct mlx5_ifc_modify_cong_status_in_bits {
5332 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005333 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005334
Matan Barakb4ff3a32016-02-09 14:57:42 +02005335 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005336 u8 op_mod[0x10];
5337
Matan Barakb4ff3a32016-02-09 14:57:42 +02005338 u8 reserved_at_40[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005339 u8 priority[0x4];
5340 u8 cong_protocol[0x4];
5341
5342 u8 enable[0x1];
5343 u8 tag_enable[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005344 u8 reserved_at_62[0x1e];
Saeed Mahameede2816822015-05-28 22:28:40 +03005345};
5346
5347struct mlx5_ifc_modify_cong_params_out_bits {
5348 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005349 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005350
5351 u8 syndrome[0x20];
5352
Matan Barakb4ff3a32016-02-09 14:57:42 +02005353 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005354};
5355
5356struct mlx5_ifc_modify_cong_params_in_bits {
5357 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005358 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005359
Matan Barakb4ff3a32016-02-09 14:57:42 +02005360 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005361 u8 op_mod[0x10];
5362
Matan Barakb4ff3a32016-02-09 14:57:42 +02005363 u8 reserved_at_40[0x1c];
Saeed Mahameede2816822015-05-28 22:28:40 +03005364 u8 cong_protocol[0x4];
5365
5366 union mlx5_ifc_field_select_802_1_r_roce_auto_bits field_select;
5367
Matan Barakb4ff3a32016-02-09 14:57:42 +02005368 u8 reserved_at_80[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03005369
5370 union mlx5_ifc_cong_control_roce_ecn_auto_bits congestion_parameters;
5371};
5372
5373struct mlx5_ifc_manage_pages_out_bits {
5374 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005375 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005376
5377 u8 syndrome[0x20];
5378
5379 u8 output_num_entries[0x20];
5380
Matan Barakb4ff3a32016-02-09 14:57:42 +02005381 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005382
5383 u8 pas[0][0x40];
5384};
5385
5386enum {
5387 MLX5_MANAGE_PAGES_IN_OP_MOD_ALLOCATION_FAIL = 0x0,
5388 MLX5_MANAGE_PAGES_IN_OP_MOD_ALLOCATION_SUCCESS = 0x1,
5389 MLX5_MANAGE_PAGES_IN_OP_MOD_HCA_RETURN_PAGES = 0x2,
5390};
5391
5392struct mlx5_ifc_manage_pages_in_bits {
5393 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005394 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005395
Matan Barakb4ff3a32016-02-09 14:57:42 +02005396 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005397 u8 op_mod[0x10];
5398
Matan Barakb4ff3a32016-02-09 14:57:42 +02005399 u8 reserved_at_40[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005400 u8 function_id[0x10];
5401
5402 u8 input_num_entries[0x20];
5403
5404 u8 pas[0][0x40];
5405};
5406
5407struct mlx5_ifc_mad_ifc_out_bits {
5408 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005409 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005410
5411 u8 syndrome[0x20];
5412
Matan Barakb4ff3a32016-02-09 14:57:42 +02005413 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005414
5415 u8 response_mad_packet[256][0x8];
5416};
5417
5418struct mlx5_ifc_mad_ifc_in_bits {
5419 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005420 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005421
Matan Barakb4ff3a32016-02-09 14:57:42 +02005422 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005423 u8 op_mod[0x10];
5424
5425 u8 remote_lid[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005426 u8 reserved_at_50[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03005427 u8 port[0x8];
5428
Matan Barakb4ff3a32016-02-09 14:57:42 +02005429 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005430
5431 u8 mad[256][0x8];
5432};
5433
5434struct mlx5_ifc_init_hca_out_bits {
5435 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005436 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005437
5438 u8 syndrome[0x20];
5439
Matan Barakb4ff3a32016-02-09 14:57:42 +02005440 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005441};
5442
5443struct mlx5_ifc_init_hca_in_bits {
5444 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005445 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005446
Matan Barakb4ff3a32016-02-09 14:57:42 +02005447 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005448 u8 op_mod[0x10];
5449
Matan Barakb4ff3a32016-02-09 14:57:42 +02005450 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005451};
5452
5453struct mlx5_ifc_init2rtr_qp_out_bits {
5454 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005455 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005456
5457 u8 syndrome[0x20];
5458
Matan Barakb4ff3a32016-02-09 14:57:42 +02005459 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005460};
5461
5462struct mlx5_ifc_init2rtr_qp_in_bits {
5463 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005464 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005465
Matan Barakb4ff3a32016-02-09 14:57:42 +02005466 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005467 u8 op_mod[0x10];
5468
Matan Barakb4ff3a32016-02-09 14:57:42 +02005469 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03005470 u8 qpn[0x18];
5471
Matan Barakb4ff3a32016-02-09 14:57:42 +02005472 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005473
5474 u8 opt_param_mask[0x20];
5475
Matan Barakb4ff3a32016-02-09 14:57:42 +02005476 u8 reserved_at_a0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005477
5478 struct mlx5_ifc_qpc_bits qpc;
5479
Matan Barakb4ff3a32016-02-09 14:57:42 +02005480 u8 reserved_at_800[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03005481};
5482
5483struct mlx5_ifc_init2init_qp_out_bits {
5484 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005485 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005486
5487 u8 syndrome[0x20];
5488
Matan Barakb4ff3a32016-02-09 14:57:42 +02005489 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005490};
5491
5492struct mlx5_ifc_init2init_qp_in_bits {
5493 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005494 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005495
Matan Barakb4ff3a32016-02-09 14:57:42 +02005496 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005497 u8 op_mod[0x10];
5498
Matan Barakb4ff3a32016-02-09 14:57:42 +02005499 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03005500 u8 qpn[0x18];
5501
Matan Barakb4ff3a32016-02-09 14:57:42 +02005502 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005503
5504 u8 opt_param_mask[0x20];
5505
Matan Barakb4ff3a32016-02-09 14:57:42 +02005506 u8 reserved_at_a0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005507
5508 struct mlx5_ifc_qpc_bits qpc;
5509
Matan Barakb4ff3a32016-02-09 14:57:42 +02005510 u8 reserved_at_800[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03005511};
5512
5513struct mlx5_ifc_get_dropped_packet_log_out_bits {
5514 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005515 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005516
5517 u8 syndrome[0x20];
5518
Matan Barakb4ff3a32016-02-09 14:57:42 +02005519 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005520
5521 u8 packet_headers_log[128][0x8];
5522
5523 u8 packet_syndrome[64][0x8];
5524};
5525
5526struct mlx5_ifc_get_dropped_packet_log_in_bits {
5527 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005528 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005529
Matan Barakb4ff3a32016-02-09 14:57:42 +02005530 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005531 u8 op_mod[0x10];
5532
Matan Barakb4ff3a32016-02-09 14:57:42 +02005533 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005534};
5535
5536struct mlx5_ifc_gen_eqe_in_bits {
5537 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005538 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005539
Matan Barakb4ff3a32016-02-09 14:57:42 +02005540 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005541 u8 op_mod[0x10];
5542
Matan Barakb4ff3a32016-02-09 14:57:42 +02005543 u8 reserved_at_40[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005544 u8 eq_number[0x8];
5545
Matan Barakb4ff3a32016-02-09 14:57:42 +02005546 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005547
5548 u8 eqe[64][0x8];
5549};
5550
5551struct mlx5_ifc_gen_eq_out_bits {
5552 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005553 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005554
5555 u8 syndrome[0x20];
5556
Matan Barakb4ff3a32016-02-09 14:57:42 +02005557 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005558};
5559
5560struct mlx5_ifc_enable_hca_out_bits {
5561 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005562 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005563
5564 u8 syndrome[0x20];
5565
Matan Barakb4ff3a32016-02-09 14:57:42 +02005566 u8 reserved_at_40[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005567};
5568
5569struct mlx5_ifc_enable_hca_in_bits {
5570 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005571 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005572
Matan Barakb4ff3a32016-02-09 14:57:42 +02005573 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005574 u8 op_mod[0x10];
5575
Matan Barakb4ff3a32016-02-09 14:57:42 +02005576 u8 reserved_at_40[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005577 u8 function_id[0x10];
5578
Matan Barakb4ff3a32016-02-09 14:57:42 +02005579 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005580};
5581
5582struct mlx5_ifc_drain_dct_out_bits {
5583 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005584 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005585
5586 u8 syndrome[0x20];
5587
Matan Barakb4ff3a32016-02-09 14:57:42 +02005588 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005589};
5590
5591struct mlx5_ifc_drain_dct_in_bits {
5592 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005593 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005594
Matan Barakb4ff3a32016-02-09 14:57:42 +02005595 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005596 u8 op_mod[0x10];
5597
Matan Barakb4ff3a32016-02-09 14:57:42 +02005598 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03005599 u8 dctn[0x18];
5600
Matan Barakb4ff3a32016-02-09 14:57:42 +02005601 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005602};
5603
5604struct mlx5_ifc_disable_hca_out_bits {
5605 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005606 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005607
5608 u8 syndrome[0x20];
5609
Matan Barakb4ff3a32016-02-09 14:57:42 +02005610 u8 reserved_at_40[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005611};
5612
5613struct mlx5_ifc_disable_hca_in_bits {
5614 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005615 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005616
Matan Barakb4ff3a32016-02-09 14:57:42 +02005617 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005618 u8 op_mod[0x10];
5619
Matan Barakb4ff3a32016-02-09 14:57:42 +02005620 u8 reserved_at_40[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005621 u8 function_id[0x10];
5622
Matan Barakb4ff3a32016-02-09 14:57:42 +02005623 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005624};
5625
5626struct mlx5_ifc_detach_from_mcg_out_bits {
5627 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005628 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005629
5630 u8 syndrome[0x20];
5631
Matan Barakb4ff3a32016-02-09 14:57:42 +02005632 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005633};
5634
5635struct mlx5_ifc_detach_from_mcg_in_bits {
5636 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005637 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005638
Matan Barakb4ff3a32016-02-09 14:57:42 +02005639 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005640 u8 op_mod[0x10];
5641
Matan Barakb4ff3a32016-02-09 14:57:42 +02005642 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03005643 u8 qpn[0x18];
5644
Matan Barakb4ff3a32016-02-09 14:57:42 +02005645 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005646
5647 u8 multicast_gid[16][0x8];
5648};
5649
Saeed Mahameed74862162016-06-09 15:11:34 +03005650struct mlx5_ifc_destroy_xrq_out_bits {
5651 u8 status[0x8];
5652 u8 reserved_at_8[0x18];
5653
5654 u8 syndrome[0x20];
5655
5656 u8 reserved_at_40[0x40];
5657};
5658
5659struct mlx5_ifc_destroy_xrq_in_bits {
5660 u8 opcode[0x10];
5661 u8 reserved_at_10[0x10];
5662
5663 u8 reserved_at_20[0x10];
5664 u8 op_mod[0x10];
5665
5666 u8 reserved_at_40[0x8];
5667 u8 xrqn[0x18];
5668
5669 u8 reserved_at_60[0x20];
5670};
5671
Saeed Mahameede2816822015-05-28 22:28:40 +03005672struct mlx5_ifc_destroy_xrc_srq_out_bits {
5673 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005674 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005675
5676 u8 syndrome[0x20];
5677
Matan Barakb4ff3a32016-02-09 14:57:42 +02005678 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005679};
5680
5681struct mlx5_ifc_destroy_xrc_srq_in_bits {
5682 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005683 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005684
Matan Barakb4ff3a32016-02-09 14:57:42 +02005685 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005686 u8 op_mod[0x10];
5687
Matan Barakb4ff3a32016-02-09 14:57:42 +02005688 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03005689 u8 xrc_srqn[0x18];
5690
Matan Barakb4ff3a32016-02-09 14:57:42 +02005691 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005692};
5693
5694struct mlx5_ifc_destroy_tis_out_bits {
5695 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005696 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005697
5698 u8 syndrome[0x20];
5699
Matan Barakb4ff3a32016-02-09 14:57:42 +02005700 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005701};
5702
5703struct mlx5_ifc_destroy_tis_in_bits {
5704 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005705 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005706
Matan Barakb4ff3a32016-02-09 14:57:42 +02005707 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005708 u8 op_mod[0x10];
5709
Matan Barakb4ff3a32016-02-09 14:57:42 +02005710 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03005711 u8 tisn[0x18];
5712
Matan Barakb4ff3a32016-02-09 14:57:42 +02005713 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005714};
5715
5716struct mlx5_ifc_destroy_tir_out_bits {
5717 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005718 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005719
5720 u8 syndrome[0x20];
5721
Matan Barakb4ff3a32016-02-09 14:57:42 +02005722 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005723};
5724
5725struct mlx5_ifc_destroy_tir_in_bits {
5726 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005727 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005728
Matan Barakb4ff3a32016-02-09 14:57:42 +02005729 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005730 u8 op_mod[0x10];
5731
Matan Barakb4ff3a32016-02-09 14:57:42 +02005732 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03005733 u8 tirn[0x18];
5734
Matan Barakb4ff3a32016-02-09 14:57:42 +02005735 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005736};
5737
5738struct mlx5_ifc_destroy_srq_out_bits {
5739 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005740 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005741
5742 u8 syndrome[0x20];
5743
Matan Barakb4ff3a32016-02-09 14:57:42 +02005744 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005745};
5746
5747struct mlx5_ifc_destroy_srq_in_bits {
5748 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005749 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005750
Matan Barakb4ff3a32016-02-09 14:57:42 +02005751 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005752 u8 op_mod[0x10];
5753
Matan Barakb4ff3a32016-02-09 14:57:42 +02005754 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03005755 u8 srqn[0x18];
5756
Matan Barakb4ff3a32016-02-09 14:57:42 +02005757 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005758};
5759
5760struct mlx5_ifc_destroy_sq_out_bits {
5761 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005762 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005763
5764 u8 syndrome[0x20];
5765
Matan Barakb4ff3a32016-02-09 14:57:42 +02005766 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005767};
5768
5769struct mlx5_ifc_destroy_sq_in_bits {
5770 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005771 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005772
Matan Barakb4ff3a32016-02-09 14:57:42 +02005773 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005774 u8 op_mod[0x10];
5775
Matan Barakb4ff3a32016-02-09 14:57:42 +02005776 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03005777 u8 sqn[0x18];
5778
Matan Barakb4ff3a32016-02-09 14:57:42 +02005779 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005780};
5781
Mohamad Haj Yahia813f8542016-08-11 11:21:39 +03005782struct mlx5_ifc_destroy_scheduling_element_out_bits {
5783 u8 status[0x8];
5784 u8 reserved_at_8[0x18];
5785
5786 u8 syndrome[0x20];
5787
5788 u8 reserved_at_40[0x1c0];
5789};
5790
5791struct mlx5_ifc_destroy_scheduling_element_in_bits {
5792 u8 opcode[0x10];
5793 u8 reserved_at_10[0x10];
5794
5795 u8 reserved_at_20[0x10];
5796 u8 op_mod[0x10];
5797
5798 u8 scheduling_hierarchy[0x8];
5799 u8 reserved_at_48[0x18];
5800
5801 u8 scheduling_element_id[0x20];
5802
5803 u8 reserved_at_80[0x180];
5804};
5805
Saeed Mahameede2816822015-05-28 22:28:40 +03005806struct mlx5_ifc_destroy_rqt_out_bits {
5807 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005808 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005809
5810 u8 syndrome[0x20];
5811
Matan Barakb4ff3a32016-02-09 14:57:42 +02005812 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005813};
5814
5815struct mlx5_ifc_destroy_rqt_in_bits {
5816 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005817 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005818
Matan Barakb4ff3a32016-02-09 14:57:42 +02005819 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005820 u8 op_mod[0x10];
5821
Matan Barakb4ff3a32016-02-09 14:57:42 +02005822 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03005823 u8 rqtn[0x18];
5824
Matan Barakb4ff3a32016-02-09 14:57:42 +02005825 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005826};
5827
5828struct mlx5_ifc_destroy_rq_out_bits {
5829 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005830 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005831
5832 u8 syndrome[0x20];
5833
Matan Barakb4ff3a32016-02-09 14:57:42 +02005834 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005835};
5836
5837struct mlx5_ifc_destroy_rq_in_bits {
5838 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005839 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005840
Matan Barakb4ff3a32016-02-09 14:57:42 +02005841 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005842 u8 op_mod[0x10];
5843
Matan Barakb4ff3a32016-02-09 14:57:42 +02005844 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03005845 u8 rqn[0x18];
5846
Matan Barakb4ff3a32016-02-09 14:57:42 +02005847 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005848};
5849
5850struct mlx5_ifc_destroy_rmp_out_bits {
5851 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005852 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005853
5854 u8 syndrome[0x20];
5855
Matan Barakb4ff3a32016-02-09 14:57:42 +02005856 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005857};
5858
5859struct mlx5_ifc_destroy_rmp_in_bits {
5860 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005861 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005862
Matan Barakb4ff3a32016-02-09 14:57:42 +02005863 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005864 u8 op_mod[0x10];
5865
Matan Barakb4ff3a32016-02-09 14:57:42 +02005866 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03005867 u8 rmpn[0x18];
5868
Matan Barakb4ff3a32016-02-09 14:57:42 +02005869 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005870};
5871
5872struct mlx5_ifc_destroy_qp_out_bits {
5873 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005874 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005875
5876 u8 syndrome[0x20];
5877
Matan Barakb4ff3a32016-02-09 14:57:42 +02005878 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005879};
5880
5881struct mlx5_ifc_destroy_qp_in_bits {
5882 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005883 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005884
Matan Barakb4ff3a32016-02-09 14:57:42 +02005885 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005886 u8 op_mod[0x10];
5887
Matan Barakb4ff3a32016-02-09 14:57:42 +02005888 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03005889 u8 qpn[0x18];
5890
Matan Barakb4ff3a32016-02-09 14:57:42 +02005891 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005892};
5893
5894struct mlx5_ifc_destroy_psv_out_bits {
5895 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005896 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005897
5898 u8 syndrome[0x20];
5899
Matan Barakb4ff3a32016-02-09 14:57:42 +02005900 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005901};
5902
5903struct mlx5_ifc_destroy_psv_in_bits {
5904 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005905 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005906
Matan Barakb4ff3a32016-02-09 14:57:42 +02005907 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005908 u8 op_mod[0x10];
5909
Matan Barakb4ff3a32016-02-09 14:57:42 +02005910 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03005911 u8 psvn[0x18];
5912
Matan Barakb4ff3a32016-02-09 14:57:42 +02005913 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005914};
5915
5916struct mlx5_ifc_destroy_mkey_out_bits {
5917 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005918 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005919
5920 u8 syndrome[0x20];
5921
Matan Barakb4ff3a32016-02-09 14:57:42 +02005922 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005923};
5924
5925struct mlx5_ifc_destroy_mkey_in_bits {
5926 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005927 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005928
Matan Barakb4ff3a32016-02-09 14:57:42 +02005929 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005930 u8 op_mod[0x10];
5931
Matan Barakb4ff3a32016-02-09 14:57:42 +02005932 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03005933 u8 mkey_index[0x18];
5934
Matan Barakb4ff3a32016-02-09 14:57:42 +02005935 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005936};
5937
5938struct mlx5_ifc_destroy_flow_table_out_bits {
5939 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005940 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005941
5942 u8 syndrome[0x20];
5943
Matan Barakb4ff3a32016-02-09 14:57:42 +02005944 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005945};
5946
5947struct mlx5_ifc_destroy_flow_table_in_bits {
5948 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005949 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005950
Matan Barakb4ff3a32016-02-09 14:57:42 +02005951 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005952 u8 op_mod[0x10];
5953
Saeed Mahameed7d5e1422016-04-11 23:10:22 +03005954 u8 other_vport[0x1];
5955 u8 reserved_at_41[0xf];
5956 u8 vport_number[0x10];
5957
5958 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005959
5960 u8 table_type[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005961 u8 reserved_at_88[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005962
Matan Barakb4ff3a32016-02-09 14:57:42 +02005963 u8 reserved_at_a0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03005964 u8 table_id[0x18];
5965
Matan Barakb4ff3a32016-02-09 14:57:42 +02005966 u8 reserved_at_c0[0x140];
Saeed Mahameede2816822015-05-28 22:28:40 +03005967};
5968
5969struct mlx5_ifc_destroy_flow_group_out_bits {
5970 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005971 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005972
5973 u8 syndrome[0x20];
5974
Matan Barakb4ff3a32016-02-09 14:57:42 +02005975 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005976};
5977
5978struct mlx5_ifc_destroy_flow_group_in_bits {
5979 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005980 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005981
Matan Barakb4ff3a32016-02-09 14:57:42 +02005982 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005983 u8 op_mod[0x10];
5984
Saeed Mahameed7d5e1422016-04-11 23:10:22 +03005985 u8 other_vport[0x1];
5986 u8 reserved_at_41[0xf];
5987 u8 vport_number[0x10];
5988
5989 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005990
5991 u8 table_type[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005992 u8 reserved_at_88[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005993
Matan Barakb4ff3a32016-02-09 14:57:42 +02005994 u8 reserved_at_a0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03005995 u8 table_id[0x18];
5996
5997 u8 group_id[0x20];
5998
Matan Barakb4ff3a32016-02-09 14:57:42 +02005999 u8 reserved_at_e0[0x120];
Saeed Mahameede2816822015-05-28 22:28:40 +03006000};
6001
6002struct mlx5_ifc_destroy_eq_out_bits {
6003 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006004 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006005
6006 u8 syndrome[0x20];
6007
Matan Barakb4ff3a32016-02-09 14:57:42 +02006008 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006009};
6010
6011struct mlx5_ifc_destroy_eq_in_bits {
6012 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006013 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006014
Matan Barakb4ff3a32016-02-09 14:57:42 +02006015 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006016 u8 op_mod[0x10];
6017
Matan Barakb4ff3a32016-02-09 14:57:42 +02006018 u8 reserved_at_40[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006019 u8 eq_number[0x8];
6020
Matan Barakb4ff3a32016-02-09 14:57:42 +02006021 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006022};
6023
6024struct mlx5_ifc_destroy_dct_out_bits {
6025 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006026 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006027
6028 u8 syndrome[0x20];
6029
Matan Barakb4ff3a32016-02-09 14:57:42 +02006030 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006031};
6032
6033struct mlx5_ifc_destroy_dct_in_bits {
6034 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006035 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006036
Matan Barakb4ff3a32016-02-09 14:57:42 +02006037 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006038 u8 op_mod[0x10];
6039
Matan Barakb4ff3a32016-02-09 14:57:42 +02006040 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006041 u8 dctn[0x18];
6042
Matan Barakb4ff3a32016-02-09 14:57:42 +02006043 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006044};
6045
6046struct mlx5_ifc_destroy_cq_out_bits {
6047 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006048 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006049
6050 u8 syndrome[0x20];
6051
Matan Barakb4ff3a32016-02-09 14:57:42 +02006052 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006053};
6054
6055struct mlx5_ifc_destroy_cq_in_bits {
6056 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006057 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006058
Matan Barakb4ff3a32016-02-09 14:57:42 +02006059 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006060 u8 op_mod[0x10];
6061
Matan Barakb4ff3a32016-02-09 14:57:42 +02006062 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006063 u8 cqn[0x18];
6064
Matan Barakb4ff3a32016-02-09 14:57:42 +02006065 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006066};
6067
6068struct mlx5_ifc_delete_vxlan_udp_dport_out_bits {
6069 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006070 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006071
6072 u8 syndrome[0x20];
6073
Matan Barakb4ff3a32016-02-09 14:57:42 +02006074 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006075};
6076
6077struct mlx5_ifc_delete_vxlan_udp_dport_in_bits {
6078 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006079 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006080
Matan Barakb4ff3a32016-02-09 14:57:42 +02006081 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006082 u8 op_mod[0x10];
6083
Matan Barakb4ff3a32016-02-09 14:57:42 +02006084 u8 reserved_at_40[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006085
Matan Barakb4ff3a32016-02-09 14:57:42 +02006086 u8 reserved_at_60[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006087 u8 vxlan_udp_port[0x10];
6088};
6089
6090struct mlx5_ifc_delete_l2_table_entry_out_bits {
6091 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006092 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006093
6094 u8 syndrome[0x20];
6095
Matan Barakb4ff3a32016-02-09 14:57:42 +02006096 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006097};
6098
6099struct mlx5_ifc_delete_l2_table_entry_in_bits {
6100 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006101 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006102
Matan Barakb4ff3a32016-02-09 14:57:42 +02006103 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006104 u8 op_mod[0x10];
6105
Matan Barakb4ff3a32016-02-09 14:57:42 +02006106 u8 reserved_at_40[0x60];
Saeed Mahameede2816822015-05-28 22:28:40 +03006107
Matan Barakb4ff3a32016-02-09 14:57:42 +02006108 u8 reserved_at_a0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006109 u8 table_index[0x18];
6110
Matan Barakb4ff3a32016-02-09 14:57:42 +02006111 u8 reserved_at_c0[0x140];
Saeed Mahameede2816822015-05-28 22:28:40 +03006112};
6113
6114struct mlx5_ifc_delete_fte_out_bits {
6115 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006116 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006117
6118 u8 syndrome[0x20];
6119
Matan Barakb4ff3a32016-02-09 14:57:42 +02006120 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006121};
6122
6123struct mlx5_ifc_delete_fte_in_bits {
6124 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006125 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006126
Matan Barakb4ff3a32016-02-09 14:57:42 +02006127 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006128 u8 op_mod[0x10];
6129
Saeed Mahameed7d5e1422016-04-11 23:10:22 +03006130 u8 other_vport[0x1];
6131 u8 reserved_at_41[0xf];
6132 u8 vport_number[0x10];
6133
6134 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006135
6136 u8 table_type[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006137 u8 reserved_at_88[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006138
Matan Barakb4ff3a32016-02-09 14:57:42 +02006139 u8 reserved_at_a0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006140 u8 table_id[0x18];
6141
Matan Barakb4ff3a32016-02-09 14:57:42 +02006142 u8 reserved_at_c0[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006143
6144 u8 flow_index[0x20];
6145
Matan Barakb4ff3a32016-02-09 14:57:42 +02006146 u8 reserved_at_120[0xe0];
Saeed Mahameede2816822015-05-28 22:28:40 +03006147};
6148
6149struct mlx5_ifc_dealloc_xrcd_out_bits {
6150 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006151 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006152
6153 u8 syndrome[0x20];
6154
Matan Barakb4ff3a32016-02-09 14:57:42 +02006155 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006156};
6157
6158struct mlx5_ifc_dealloc_xrcd_in_bits {
6159 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006160 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006161
Matan Barakb4ff3a32016-02-09 14:57:42 +02006162 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006163 u8 op_mod[0x10];
6164
Matan Barakb4ff3a32016-02-09 14:57:42 +02006165 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006166 u8 xrcd[0x18];
6167
Matan Barakb4ff3a32016-02-09 14:57:42 +02006168 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006169};
6170
6171struct mlx5_ifc_dealloc_uar_out_bits {
6172 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006173 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006174
6175 u8 syndrome[0x20];
6176
Matan Barakb4ff3a32016-02-09 14:57:42 +02006177 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006178};
6179
6180struct mlx5_ifc_dealloc_uar_in_bits {
6181 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006182 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006183
Matan Barakb4ff3a32016-02-09 14:57:42 +02006184 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006185 u8 op_mod[0x10];
6186
Matan Barakb4ff3a32016-02-09 14:57:42 +02006187 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006188 u8 uar[0x18];
6189
Matan Barakb4ff3a32016-02-09 14:57:42 +02006190 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006191};
6192
6193struct mlx5_ifc_dealloc_transport_domain_out_bits {
6194 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006195 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006196
6197 u8 syndrome[0x20];
6198
Matan Barakb4ff3a32016-02-09 14:57:42 +02006199 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006200};
6201
6202struct mlx5_ifc_dealloc_transport_domain_in_bits {
6203 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006204 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006205
Matan Barakb4ff3a32016-02-09 14:57:42 +02006206 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006207 u8 op_mod[0x10];
6208
Matan Barakb4ff3a32016-02-09 14:57:42 +02006209 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006210 u8 transport_domain[0x18];
6211
Matan Barakb4ff3a32016-02-09 14:57:42 +02006212 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006213};
6214
6215struct mlx5_ifc_dealloc_q_counter_out_bits {
6216 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006217 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006218
6219 u8 syndrome[0x20];
6220
Matan Barakb4ff3a32016-02-09 14:57:42 +02006221 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006222};
6223
6224struct mlx5_ifc_dealloc_q_counter_in_bits {
6225 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006226 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006227
Matan Barakb4ff3a32016-02-09 14:57:42 +02006228 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006229 u8 op_mod[0x10];
6230
Matan Barakb4ff3a32016-02-09 14:57:42 +02006231 u8 reserved_at_40[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006232 u8 counter_set_id[0x8];
6233
Matan Barakb4ff3a32016-02-09 14:57:42 +02006234 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006235};
6236
6237struct mlx5_ifc_dealloc_pd_out_bits {
6238 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006239 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006240
6241 u8 syndrome[0x20];
6242
Matan Barakb4ff3a32016-02-09 14:57:42 +02006243 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006244};
6245
6246struct mlx5_ifc_dealloc_pd_in_bits {
6247 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006248 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006249
Matan Barakb4ff3a32016-02-09 14:57:42 +02006250 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006251 u8 op_mod[0x10];
6252
Matan Barakb4ff3a32016-02-09 14:57:42 +02006253 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006254 u8 pd[0x18];
6255
Matan Barakb4ff3a32016-02-09 14:57:42 +02006256 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006257};
6258
Amir Vadai9dc0b282016-05-13 12:55:39 +00006259struct mlx5_ifc_dealloc_flow_counter_out_bits {
6260 u8 status[0x8];
6261 u8 reserved_at_8[0x18];
6262
6263 u8 syndrome[0x20];
6264
6265 u8 reserved_at_40[0x40];
6266};
6267
6268struct mlx5_ifc_dealloc_flow_counter_in_bits {
6269 u8 opcode[0x10];
6270 u8 reserved_at_10[0x10];
6271
6272 u8 reserved_at_20[0x10];
6273 u8 op_mod[0x10];
6274
6275 u8 reserved_at_40[0x10];
6276 u8 flow_counter_id[0x10];
6277
6278 u8 reserved_at_60[0x20];
6279};
6280
Saeed Mahameed74862162016-06-09 15:11:34 +03006281struct mlx5_ifc_create_xrq_out_bits {
6282 u8 status[0x8];
6283 u8 reserved_at_8[0x18];
6284
6285 u8 syndrome[0x20];
6286
6287 u8 reserved_at_40[0x8];
6288 u8 xrqn[0x18];
6289
6290 u8 reserved_at_60[0x20];
6291};
6292
6293struct mlx5_ifc_create_xrq_in_bits {
6294 u8 opcode[0x10];
6295 u8 reserved_at_10[0x10];
6296
6297 u8 reserved_at_20[0x10];
6298 u8 op_mod[0x10];
6299
6300 u8 reserved_at_40[0x40];
6301
6302 struct mlx5_ifc_xrqc_bits xrq_context;
6303};
6304
Saeed Mahameede2816822015-05-28 22:28:40 +03006305struct mlx5_ifc_create_xrc_srq_out_bits {
6306 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006307 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006308
6309 u8 syndrome[0x20];
6310
Matan Barakb4ff3a32016-02-09 14:57:42 +02006311 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006312 u8 xrc_srqn[0x18];
6313
Matan Barakb4ff3a32016-02-09 14:57:42 +02006314 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006315};
6316
6317struct mlx5_ifc_create_xrc_srq_in_bits {
6318 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006319 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006320
Matan Barakb4ff3a32016-02-09 14:57:42 +02006321 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006322 u8 op_mod[0x10];
6323
Matan Barakb4ff3a32016-02-09 14:57:42 +02006324 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006325
6326 struct mlx5_ifc_xrc_srqc_bits xrc_srq_context_entry;
6327
Matan Barakb4ff3a32016-02-09 14:57:42 +02006328 u8 reserved_at_280[0x600];
Saeed Mahameede2816822015-05-28 22:28:40 +03006329
6330 u8 pas[0][0x40];
6331};
6332
6333struct mlx5_ifc_create_tis_out_bits {
6334 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006335 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006336
6337 u8 syndrome[0x20];
6338
Matan Barakb4ff3a32016-02-09 14:57:42 +02006339 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006340 u8 tisn[0x18];
6341
Matan Barakb4ff3a32016-02-09 14:57:42 +02006342 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006343};
6344
6345struct mlx5_ifc_create_tis_in_bits {
6346 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006347 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006348
Matan Barakb4ff3a32016-02-09 14:57:42 +02006349 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006350 u8 op_mod[0x10];
6351
Matan Barakb4ff3a32016-02-09 14:57:42 +02006352 u8 reserved_at_40[0xc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03006353
6354 struct mlx5_ifc_tisc_bits ctx;
6355};
6356
6357struct mlx5_ifc_create_tir_out_bits {
6358 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006359 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006360
6361 u8 syndrome[0x20];
6362
Matan Barakb4ff3a32016-02-09 14:57:42 +02006363 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006364 u8 tirn[0x18];
6365
Matan Barakb4ff3a32016-02-09 14:57:42 +02006366 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006367};
6368
6369struct mlx5_ifc_create_tir_in_bits {
6370 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006371 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006372
Matan Barakb4ff3a32016-02-09 14:57:42 +02006373 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006374 u8 op_mod[0x10];
6375
Matan Barakb4ff3a32016-02-09 14:57:42 +02006376 u8 reserved_at_40[0xc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03006377
6378 struct mlx5_ifc_tirc_bits ctx;
6379};
6380
6381struct mlx5_ifc_create_srq_out_bits {
6382 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006383 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006384
6385 u8 syndrome[0x20];
6386
Matan Barakb4ff3a32016-02-09 14:57:42 +02006387 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006388 u8 srqn[0x18];
6389
Matan Barakb4ff3a32016-02-09 14:57:42 +02006390 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006391};
6392
6393struct mlx5_ifc_create_srq_in_bits {
6394 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006395 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006396
Matan Barakb4ff3a32016-02-09 14:57:42 +02006397 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006398 u8 op_mod[0x10];
6399
Matan Barakb4ff3a32016-02-09 14:57:42 +02006400 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006401
6402 struct mlx5_ifc_srqc_bits srq_context_entry;
6403
Matan Barakb4ff3a32016-02-09 14:57:42 +02006404 u8 reserved_at_280[0x600];
Saeed Mahameede2816822015-05-28 22:28:40 +03006405
6406 u8 pas[0][0x40];
6407};
6408
6409struct mlx5_ifc_create_sq_out_bits {
6410 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006411 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006412
6413 u8 syndrome[0x20];
6414
Matan Barakb4ff3a32016-02-09 14:57:42 +02006415 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006416 u8 sqn[0x18];
6417
Matan Barakb4ff3a32016-02-09 14:57:42 +02006418 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006419};
6420
6421struct mlx5_ifc_create_sq_in_bits {
6422 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006423 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006424
Matan Barakb4ff3a32016-02-09 14:57:42 +02006425 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006426 u8 op_mod[0x10];
6427
Matan Barakb4ff3a32016-02-09 14:57:42 +02006428 u8 reserved_at_40[0xc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03006429
6430 struct mlx5_ifc_sqc_bits ctx;
6431};
6432
Mohamad Haj Yahia813f8542016-08-11 11:21:39 +03006433struct mlx5_ifc_create_scheduling_element_out_bits {
6434 u8 status[0x8];
6435 u8 reserved_at_8[0x18];
6436
6437 u8 syndrome[0x20];
6438
6439 u8 reserved_at_40[0x40];
6440
6441 u8 scheduling_element_id[0x20];
6442
6443 u8 reserved_at_a0[0x160];
6444};
6445
6446struct mlx5_ifc_create_scheduling_element_in_bits {
6447 u8 opcode[0x10];
6448 u8 reserved_at_10[0x10];
6449
6450 u8 reserved_at_20[0x10];
6451 u8 op_mod[0x10];
6452
6453 u8 scheduling_hierarchy[0x8];
6454 u8 reserved_at_48[0x18];
6455
6456 u8 reserved_at_60[0xa0];
6457
6458 struct mlx5_ifc_scheduling_context_bits scheduling_context;
6459
6460 u8 reserved_at_300[0x100];
6461};
6462
Saeed Mahameede2816822015-05-28 22:28:40 +03006463struct mlx5_ifc_create_rqt_out_bits {
6464 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006465 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006466
6467 u8 syndrome[0x20];
6468
Matan Barakb4ff3a32016-02-09 14:57:42 +02006469 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006470 u8 rqtn[0x18];
6471
Matan Barakb4ff3a32016-02-09 14:57:42 +02006472 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006473};
6474
6475struct mlx5_ifc_create_rqt_in_bits {
6476 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006477 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006478
Matan Barakb4ff3a32016-02-09 14:57:42 +02006479 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006480 u8 op_mod[0x10];
6481
Matan Barakb4ff3a32016-02-09 14:57:42 +02006482 u8 reserved_at_40[0xc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03006483
6484 struct mlx5_ifc_rqtc_bits rqt_context;
6485};
6486
6487struct mlx5_ifc_create_rq_out_bits {
6488 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006489 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006490
6491 u8 syndrome[0x20];
6492
Matan Barakb4ff3a32016-02-09 14:57:42 +02006493 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006494 u8 rqn[0x18];
6495
Matan Barakb4ff3a32016-02-09 14:57:42 +02006496 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006497};
6498
6499struct mlx5_ifc_create_rq_in_bits {
6500 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006501 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006502
Matan Barakb4ff3a32016-02-09 14:57:42 +02006503 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006504 u8 op_mod[0x10];
6505
Matan Barakb4ff3a32016-02-09 14:57:42 +02006506 u8 reserved_at_40[0xc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03006507
6508 struct mlx5_ifc_rqc_bits ctx;
6509};
6510
6511struct mlx5_ifc_create_rmp_out_bits {
6512 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006513 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006514
6515 u8 syndrome[0x20];
6516
Matan Barakb4ff3a32016-02-09 14:57:42 +02006517 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006518 u8 rmpn[0x18];
6519
Matan Barakb4ff3a32016-02-09 14:57:42 +02006520 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006521};
6522
6523struct mlx5_ifc_create_rmp_in_bits {
6524 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006525 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006526
Matan Barakb4ff3a32016-02-09 14:57:42 +02006527 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006528 u8 op_mod[0x10];
6529
Matan Barakb4ff3a32016-02-09 14:57:42 +02006530 u8 reserved_at_40[0xc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03006531
6532 struct mlx5_ifc_rmpc_bits ctx;
6533};
6534
6535struct mlx5_ifc_create_qp_out_bits {
6536 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006537 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006538
6539 u8 syndrome[0x20];
6540
Matan Barakb4ff3a32016-02-09 14:57:42 +02006541 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006542 u8 qpn[0x18];
6543
Matan Barakb4ff3a32016-02-09 14:57:42 +02006544 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006545};
6546
6547struct mlx5_ifc_create_qp_in_bits {
6548 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006549 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006550
Matan Barakb4ff3a32016-02-09 14:57:42 +02006551 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006552 u8 op_mod[0x10];
6553
Matan Barakb4ff3a32016-02-09 14:57:42 +02006554 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006555
6556 u8 opt_param_mask[0x20];
6557
Matan Barakb4ff3a32016-02-09 14:57:42 +02006558 u8 reserved_at_a0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006559
6560 struct mlx5_ifc_qpc_bits qpc;
6561
Matan Barakb4ff3a32016-02-09 14:57:42 +02006562 u8 reserved_at_800[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03006563
6564 u8 pas[0][0x40];
6565};
6566
6567struct mlx5_ifc_create_psv_out_bits {
6568 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006569 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006570
6571 u8 syndrome[0x20];
6572
Matan Barakb4ff3a32016-02-09 14:57:42 +02006573 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006574
Matan Barakb4ff3a32016-02-09 14:57:42 +02006575 u8 reserved_at_80[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006576 u8 psv0_index[0x18];
6577
Matan Barakb4ff3a32016-02-09 14:57:42 +02006578 u8 reserved_at_a0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006579 u8 psv1_index[0x18];
6580
Matan Barakb4ff3a32016-02-09 14:57:42 +02006581 u8 reserved_at_c0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006582 u8 psv2_index[0x18];
6583
Matan Barakb4ff3a32016-02-09 14:57:42 +02006584 u8 reserved_at_e0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006585 u8 psv3_index[0x18];
6586};
6587
6588struct mlx5_ifc_create_psv_in_bits {
6589 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006590 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006591
Matan Barakb4ff3a32016-02-09 14:57:42 +02006592 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006593 u8 op_mod[0x10];
6594
6595 u8 num_psv[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006596 u8 reserved_at_44[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03006597 u8 pd[0x18];
6598
Matan Barakb4ff3a32016-02-09 14:57:42 +02006599 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006600};
6601
6602struct mlx5_ifc_create_mkey_out_bits {
6603 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006604 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006605
6606 u8 syndrome[0x20];
6607
Matan Barakb4ff3a32016-02-09 14:57:42 +02006608 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006609 u8 mkey_index[0x18];
6610
Matan Barakb4ff3a32016-02-09 14:57:42 +02006611 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006612};
6613
6614struct mlx5_ifc_create_mkey_in_bits {
6615 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006616 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006617
Matan Barakb4ff3a32016-02-09 14:57:42 +02006618 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006619 u8 op_mod[0x10];
6620
Matan Barakb4ff3a32016-02-09 14:57:42 +02006621 u8 reserved_at_40[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006622
6623 u8 pg_access[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006624 u8 reserved_at_61[0x1f];
Saeed Mahameede2816822015-05-28 22:28:40 +03006625
6626 struct mlx5_ifc_mkc_bits memory_key_mkey_entry;
6627
Matan Barakb4ff3a32016-02-09 14:57:42 +02006628 u8 reserved_at_280[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03006629
6630 u8 translations_octword_actual_size[0x20];
6631
Matan Barakb4ff3a32016-02-09 14:57:42 +02006632 u8 reserved_at_320[0x560];
Saeed Mahameede2816822015-05-28 22:28:40 +03006633
6634 u8 klm_pas_mtt[0][0x20];
6635};
6636
6637struct mlx5_ifc_create_flow_table_out_bits {
6638 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006639 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006640
6641 u8 syndrome[0x20];
6642
Matan Barakb4ff3a32016-02-09 14:57:42 +02006643 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006644 u8 table_id[0x18];
6645
Matan Barakb4ff3a32016-02-09 14:57:42 +02006646 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006647};
6648
Maor Gottlieb0c90e9c2017-03-12 11:35:23 +02006649struct mlx5_ifc_flow_table_context_bits {
6650 u8 encap_en[0x1];
6651 u8 decap_en[0x1];
6652 u8 reserved_at_2[0x2];
6653 u8 table_miss_action[0x4];
6654 u8 level[0x8];
6655 u8 reserved_at_10[0x8];
6656 u8 log_size[0x8];
6657
6658 u8 reserved_at_20[0x8];
6659 u8 table_miss_id[0x18];
6660
6661 u8 reserved_at_40[0x8];
6662 u8 lag_master_next_table_id[0x18];
6663
6664 u8 reserved_at_60[0xe0];
6665};
6666
Saeed Mahameede2816822015-05-28 22:28:40 +03006667struct mlx5_ifc_create_flow_table_in_bits {
6668 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006669 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006670
Matan Barakb4ff3a32016-02-09 14:57:42 +02006671 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006672 u8 op_mod[0x10];
6673
Saeed Mahameed7d5e1422016-04-11 23:10:22 +03006674 u8 other_vport[0x1];
6675 u8 reserved_at_41[0xf];
6676 u8 vport_number[0x10];
6677
6678 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006679
6680 u8 table_type[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006681 u8 reserved_at_88[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006682
Matan Barakb4ff3a32016-02-09 14:57:42 +02006683 u8 reserved_at_a0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006684
Maor Gottlieb0c90e9c2017-03-12 11:35:23 +02006685 struct mlx5_ifc_flow_table_context_bits flow_table_context;
Saeed Mahameede2816822015-05-28 22:28:40 +03006686};
6687
6688struct mlx5_ifc_create_flow_group_out_bits {
6689 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006690 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006691
6692 u8 syndrome[0x20];
6693
Matan Barakb4ff3a32016-02-09 14:57:42 +02006694 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006695 u8 group_id[0x18];
6696
Matan Barakb4ff3a32016-02-09 14:57:42 +02006697 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006698};
6699
6700enum {
6701 MLX5_CREATE_FLOW_GROUP_IN_MATCH_CRITERIA_ENABLE_OUTER_HEADERS = 0x0,
6702 MLX5_CREATE_FLOW_GROUP_IN_MATCH_CRITERIA_ENABLE_MISC_PARAMETERS = 0x1,
6703 MLX5_CREATE_FLOW_GROUP_IN_MATCH_CRITERIA_ENABLE_INNER_HEADERS = 0x2,
6704};
6705
6706struct mlx5_ifc_create_flow_group_in_bits {
6707 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006708 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006709
Matan Barakb4ff3a32016-02-09 14:57:42 +02006710 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006711 u8 op_mod[0x10];
6712
Saeed Mahameed7d5e1422016-04-11 23:10:22 +03006713 u8 other_vport[0x1];
6714 u8 reserved_at_41[0xf];
6715 u8 vport_number[0x10];
6716
6717 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006718
6719 u8 table_type[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006720 u8 reserved_at_88[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006721
Matan Barakb4ff3a32016-02-09 14:57:42 +02006722 u8 reserved_at_a0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006723 u8 table_id[0x18];
6724
Matan Barakb4ff3a32016-02-09 14:57:42 +02006725 u8 reserved_at_c0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006726
6727 u8 start_flow_index[0x20];
6728
Matan Barakb4ff3a32016-02-09 14:57:42 +02006729 u8 reserved_at_100[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006730
6731 u8 end_flow_index[0x20];
6732
Matan Barakb4ff3a32016-02-09 14:57:42 +02006733 u8 reserved_at_140[0xa0];
Saeed Mahameede2816822015-05-28 22:28:40 +03006734
Matan Barakb4ff3a32016-02-09 14:57:42 +02006735 u8 reserved_at_1e0[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006736 u8 match_criteria_enable[0x8];
6737
6738 struct mlx5_ifc_fte_match_param_bits match_criteria;
6739
Matan Barakb4ff3a32016-02-09 14:57:42 +02006740 u8 reserved_at_1200[0xe00];
Saeed Mahameede2816822015-05-28 22:28:40 +03006741};
6742
6743struct mlx5_ifc_create_eq_out_bits {
6744 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006745 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006746
6747 u8 syndrome[0x20];
6748
Matan Barakb4ff3a32016-02-09 14:57:42 +02006749 u8 reserved_at_40[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006750 u8 eq_number[0x8];
6751
Matan Barakb4ff3a32016-02-09 14:57:42 +02006752 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006753};
6754
6755struct mlx5_ifc_create_eq_in_bits {
6756 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006757 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006758
Matan Barakb4ff3a32016-02-09 14:57:42 +02006759 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006760 u8 op_mod[0x10];
6761
Matan Barakb4ff3a32016-02-09 14:57:42 +02006762 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006763
6764 struct mlx5_ifc_eqc_bits eq_context_entry;
6765
Matan Barakb4ff3a32016-02-09 14:57:42 +02006766 u8 reserved_at_280[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006767
6768 u8 event_bitmask[0x40];
6769
Matan Barakb4ff3a32016-02-09 14:57:42 +02006770 u8 reserved_at_300[0x580];
Saeed Mahameede2816822015-05-28 22:28:40 +03006771
6772 u8 pas[0][0x40];
6773};
6774
6775struct mlx5_ifc_create_dct_out_bits {
6776 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006777 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006778
6779 u8 syndrome[0x20];
6780
Matan Barakb4ff3a32016-02-09 14:57:42 +02006781 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006782 u8 dctn[0x18];
6783
Matan Barakb4ff3a32016-02-09 14:57:42 +02006784 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006785};
6786
6787struct mlx5_ifc_create_dct_in_bits {
6788 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006789 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006790
Matan Barakb4ff3a32016-02-09 14:57:42 +02006791 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006792 u8 op_mod[0x10];
6793
Matan Barakb4ff3a32016-02-09 14:57:42 +02006794 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006795
6796 struct mlx5_ifc_dctc_bits dct_context_entry;
6797
Matan Barakb4ff3a32016-02-09 14:57:42 +02006798 u8 reserved_at_280[0x180];
Saeed Mahameede2816822015-05-28 22:28:40 +03006799};
6800
6801struct mlx5_ifc_create_cq_out_bits {
6802 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006803 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006804
6805 u8 syndrome[0x20];
6806
Matan Barakb4ff3a32016-02-09 14:57:42 +02006807 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006808 u8 cqn[0x18];
6809
Matan Barakb4ff3a32016-02-09 14:57:42 +02006810 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006811};
6812
6813struct mlx5_ifc_create_cq_in_bits {
6814 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006815 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006816
Matan Barakb4ff3a32016-02-09 14:57:42 +02006817 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006818 u8 op_mod[0x10];
6819
Matan Barakb4ff3a32016-02-09 14:57:42 +02006820 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006821
6822 struct mlx5_ifc_cqc_bits cq_context;
6823
Matan Barakb4ff3a32016-02-09 14:57:42 +02006824 u8 reserved_at_280[0x600];
Saeed Mahameede2816822015-05-28 22:28:40 +03006825
6826 u8 pas[0][0x40];
6827};
6828
6829struct mlx5_ifc_config_int_moderation_out_bits {
6830 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006831 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006832
6833 u8 syndrome[0x20];
6834
Matan Barakb4ff3a32016-02-09 14:57:42 +02006835 u8 reserved_at_40[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03006836 u8 min_delay[0xc];
6837 u8 int_vector[0x10];
6838
Matan Barakb4ff3a32016-02-09 14:57:42 +02006839 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006840};
6841
6842enum {
6843 MLX5_CONFIG_INT_MODERATION_IN_OP_MOD_WRITE = 0x0,
6844 MLX5_CONFIG_INT_MODERATION_IN_OP_MOD_READ = 0x1,
6845};
6846
6847struct mlx5_ifc_config_int_moderation_in_bits {
6848 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006849 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006850
Matan Barakb4ff3a32016-02-09 14:57:42 +02006851 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006852 u8 op_mod[0x10];
6853
Matan Barakb4ff3a32016-02-09 14:57:42 +02006854 u8 reserved_at_40[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03006855 u8 min_delay[0xc];
6856 u8 int_vector[0x10];
6857
Matan Barakb4ff3a32016-02-09 14:57:42 +02006858 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006859};
6860
6861struct mlx5_ifc_attach_to_mcg_out_bits {
6862 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006863 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006864
6865 u8 syndrome[0x20];
6866
Matan Barakb4ff3a32016-02-09 14:57:42 +02006867 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006868};
6869
6870struct mlx5_ifc_attach_to_mcg_in_bits {
6871 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006872 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006873
Matan Barakb4ff3a32016-02-09 14:57:42 +02006874 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006875 u8 op_mod[0x10];
6876
Matan Barakb4ff3a32016-02-09 14:57:42 +02006877 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006878 u8 qpn[0x18];
6879
Matan Barakb4ff3a32016-02-09 14:57:42 +02006880 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006881
6882 u8 multicast_gid[16][0x8];
6883};
6884
Saeed Mahameed74862162016-06-09 15:11:34 +03006885struct mlx5_ifc_arm_xrq_out_bits {
6886 u8 status[0x8];
6887 u8 reserved_at_8[0x18];
6888
6889 u8 syndrome[0x20];
6890
6891 u8 reserved_at_40[0x40];
6892};
6893
6894struct mlx5_ifc_arm_xrq_in_bits {
6895 u8 opcode[0x10];
6896 u8 reserved_at_10[0x10];
6897
6898 u8 reserved_at_20[0x10];
6899 u8 op_mod[0x10];
6900
6901 u8 reserved_at_40[0x8];
6902 u8 xrqn[0x18];
6903
6904 u8 reserved_at_60[0x10];
6905 u8 lwm[0x10];
6906};
6907
Saeed Mahameede2816822015-05-28 22:28:40 +03006908struct mlx5_ifc_arm_xrc_srq_out_bits {
6909 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006910 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006911
6912 u8 syndrome[0x20];
6913
Matan Barakb4ff3a32016-02-09 14:57:42 +02006914 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006915};
6916
6917enum {
6918 MLX5_ARM_XRC_SRQ_IN_OP_MOD_XRC_SRQ = 0x1,
6919};
6920
6921struct mlx5_ifc_arm_xrc_srq_in_bits {
6922 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006923 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006924
Matan Barakb4ff3a32016-02-09 14:57:42 +02006925 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006926 u8 op_mod[0x10];
6927
Matan Barakb4ff3a32016-02-09 14:57:42 +02006928 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006929 u8 xrc_srqn[0x18];
6930
Matan Barakb4ff3a32016-02-09 14:57:42 +02006931 u8 reserved_at_60[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006932 u8 lwm[0x10];
6933};
6934
6935struct mlx5_ifc_arm_rq_out_bits {
6936 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006937 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006938
6939 u8 syndrome[0x20];
6940
Matan Barakb4ff3a32016-02-09 14:57:42 +02006941 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006942};
6943
6944enum {
Saeed Mahameed74862162016-06-09 15:11:34 +03006945 MLX5_ARM_RQ_IN_OP_MOD_SRQ = 0x1,
6946 MLX5_ARM_RQ_IN_OP_MOD_XRQ = 0x2,
Saeed Mahameede2816822015-05-28 22:28:40 +03006947};
6948
6949struct mlx5_ifc_arm_rq_in_bits {
6950 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006951 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006952
Matan Barakb4ff3a32016-02-09 14:57:42 +02006953 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006954 u8 op_mod[0x10];
6955
Matan Barakb4ff3a32016-02-09 14:57:42 +02006956 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006957 u8 srq_number[0x18];
6958
Matan Barakb4ff3a32016-02-09 14:57:42 +02006959 u8 reserved_at_60[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006960 u8 lwm[0x10];
6961};
6962
6963struct mlx5_ifc_arm_dct_out_bits {
6964 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006965 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006966
6967 u8 syndrome[0x20];
6968
Matan Barakb4ff3a32016-02-09 14:57:42 +02006969 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006970};
6971
6972struct mlx5_ifc_arm_dct_in_bits {
6973 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006974 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006975
Matan Barakb4ff3a32016-02-09 14:57:42 +02006976 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006977 u8 op_mod[0x10];
6978
Matan Barakb4ff3a32016-02-09 14:57:42 +02006979 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006980 u8 dct_number[0x18];
6981
Matan Barakb4ff3a32016-02-09 14:57:42 +02006982 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006983};
6984
6985struct mlx5_ifc_alloc_xrcd_out_bits {
6986 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006987 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006988
6989 u8 syndrome[0x20];
6990
Matan Barakb4ff3a32016-02-09 14:57:42 +02006991 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006992 u8 xrcd[0x18];
6993
Matan Barakb4ff3a32016-02-09 14:57:42 +02006994 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006995};
6996
6997struct mlx5_ifc_alloc_xrcd_in_bits {
6998 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006999 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007000
Matan Barakb4ff3a32016-02-09 14:57:42 +02007001 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007002 u8 op_mod[0x10];
7003
Matan Barakb4ff3a32016-02-09 14:57:42 +02007004 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03007005};
7006
7007struct mlx5_ifc_alloc_uar_out_bits {
7008 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007009 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03007010
7011 u8 syndrome[0x20];
7012
Matan Barakb4ff3a32016-02-09 14:57:42 +02007013 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007014 u8 uar[0x18];
7015
Matan Barakb4ff3a32016-02-09 14:57:42 +02007016 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007017};
7018
7019struct mlx5_ifc_alloc_uar_in_bits {
7020 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007021 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007022
Matan Barakb4ff3a32016-02-09 14:57:42 +02007023 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007024 u8 op_mod[0x10];
7025
Matan Barakb4ff3a32016-02-09 14:57:42 +02007026 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03007027};
7028
7029struct mlx5_ifc_alloc_transport_domain_out_bits {
7030 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007031 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03007032
7033 u8 syndrome[0x20];
7034
Matan Barakb4ff3a32016-02-09 14:57:42 +02007035 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007036 u8 transport_domain[0x18];
7037
Matan Barakb4ff3a32016-02-09 14:57:42 +02007038 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007039};
7040
7041struct mlx5_ifc_alloc_transport_domain_in_bits {
7042 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007043 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007044
Matan Barakb4ff3a32016-02-09 14:57:42 +02007045 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007046 u8 op_mod[0x10];
7047
Matan Barakb4ff3a32016-02-09 14:57:42 +02007048 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03007049};
7050
7051struct mlx5_ifc_alloc_q_counter_out_bits {
7052 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007053 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03007054
7055 u8 syndrome[0x20];
7056
Matan Barakb4ff3a32016-02-09 14:57:42 +02007057 u8 reserved_at_40[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03007058 u8 counter_set_id[0x8];
7059
Matan Barakb4ff3a32016-02-09 14:57:42 +02007060 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007061};
7062
7063struct mlx5_ifc_alloc_q_counter_in_bits {
7064 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007065 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007066
Matan Barakb4ff3a32016-02-09 14:57:42 +02007067 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007068 u8 op_mod[0x10];
7069
Matan Barakb4ff3a32016-02-09 14:57:42 +02007070 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03007071};
7072
7073struct mlx5_ifc_alloc_pd_out_bits {
7074 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007075 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03007076
7077 u8 syndrome[0x20];
7078
Matan Barakb4ff3a32016-02-09 14:57:42 +02007079 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007080 u8 pd[0x18];
7081
Matan Barakb4ff3a32016-02-09 14:57:42 +02007082 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007083};
7084
7085struct mlx5_ifc_alloc_pd_in_bits {
7086 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007087 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007088
Matan Barakb4ff3a32016-02-09 14:57:42 +02007089 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007090 u8 op_mod[0x10];
7091
Matan Barakb4ff3a32016-02-09 14:57:42 +02007092 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03007093};
7094
Amir Vadai9dc0b282016-05-13 12:55:39 +00007095struct mlx5_ifc_alloc_flow_counter_out_bits {
7096 u8 status[0x8];
7097 u8 reserved_at_8[0x18];
7098
7099 u8 syndrome[0x20];
7100
7101 u8 reserved_at_40[0x10];
7102 u8 flow_counter_id[0x10];
7103
7104 u8 reserved_at_60[0x20];
7105};
7106
7107struct mlx5_ifc_alloc_flow_counter_in_bits {
7108 u8 opcode[0x10];
7109 u8 reserved_at_10[0x10];
7110
7111 u8 reserved_at_20[0x10];
7112 u8 op_mod[0x10];
7113
7114 u8 reserved_at_40[0x40];
7115};
7116
Saeed Mahameede2816822015-05-28 22:28:40 +03007117struct mlx5_ifc_add_vxlan_udp_dport_out_bits {
7118 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007119 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03007120
7121 u8 syndrome[0x20];
7122
Matan Barakb4ff3a32016-02-09 14:57:42 +02007123 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03007124};
7125
7126struct mlx5_ifc_add_vxlan_udp_dport_in_bits {
7127 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007128 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007129
Matan Barakb4ff3a32016-02-09 14:57:42 +02007130 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007131 u8 op_mod[0x10];
7132
Matan Barakb4ff3a32016-02-09 14:57:42 +02007133 u8 reserved_at_40[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007134
Matan Barakb4ff3a32016-02-09 14:57:42 +02007135 u8 reserved_at_60[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007136 u8 vxlan_udp_port[0x10];
7137};
7138
Saeed Mahameed74862162016-06-09 15:11:34 +03007139struct mlx5_ifc_set_rate_limit_out_bits {
7140 u8 status[0x8];
7141 u8 reserved_at_8[0x18];
7142
7143 u8 syndrome[0x20];
7144
7145 u8 reserved_at_40[0x40];
7146};
7147
7148struct mlx5_ifc_set_rate_limit_in_bits {
7149 u8 opcode[0x10];
7150 u8 reserved_at_10[0x10];
7151
7152 u8 reserved_at_20[0x10];
7153 u8 op_mod[0x10];
7154
7155 u8 reserved_at_40[0x10];
7156 u8 rate_limit_index[0x10];
7157
7158 u8 reserved_at_60[0x20];
7159
7160 u8 rate_limit[0x20];
7161};
7162
Saeed Mahameede2816822015-05-28 22:28:40 +03007163struct mlx5_ifc_access_register_out_bits {
7164 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007165 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03007166
7167 u8 syndrome[0x20];
7168
Matan Barakb4ff3a32016-02-09 14:57:42 +02007169 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03007170
7171 u8 register_data[0][0x20];
7172};
7173
7174enum {
7175 MLX5_ACCESS_REGISTER_IN_OP_MOD_WRITE = 0x0,
7176 MLX5_ACCESS_REGISTER_IN_OP_MOD_READ = 0x1,
7177};
7178
7179struct mlx5_ifc_access_register_in_bits {
7180 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007181 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007182
Matan Barakb4ff3a32016-02-09 14:57:42 +02007183 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007184 u8 op_mod[0x10];
7185
Matan Barakb4ff3a32016-02-09 14:57:42 +02007186 u8 reserved_at_40[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007187 u8 register_id[0x10];
7188
7189 u8 argument[0x20];
7190
7191 u8 register_data[0][0x20];
7192};
7193
7194struct mlx5_ifc_sltp_reg_bits {
7195 u8 status[0x4];
7196 u8 version[0x4];
7197 u8 local_port[0x8];
7198 u8 pnat[0x2];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007199 u8 reserved_at_12[0x2];
Saeed Mahameede2816822015-05-28 22:28:40 +03007200 u8 lane[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007201 u8 reserved_at_18[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007202
Matan Barakb4ff3a32016-02-09 14:57:42 +02007203 u8 reserved_at_20[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007204
Matan Barakb4ff3a32016-02-09 14:57:42 +02007205 u8 reserved_at_40[0x7];
Saeed Mahameede2816822015-05-28 22:28:40 +03007206 u8 polarity[0x1];
7207 u8 ob_tap0[0x8];
7208 u8 ob_tap1[0x8];
7209 u8 ob_tap2[0x8];
7210
Matan Barakb4ff3a32016-02-09 14:57:42 +02007211 u8 reserved_at_60[0xc];
Saeed Mahameede2816822015-05-28 22:28:40 +03007212 u8 ob_preemp_mode[0x4];
7213 u8 ob_reg[0x8];
7214 u8 ob_bias[0x8];
7215
Matan Barakb4ff3a32016-02-09 14:57:42 +02007216 u8 reserved_at_80[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007217};
7218
7219struct mlx5_ifc_slrg_reg_bits {
7220 u8 status[0x4];
7221 u8 version[0x4];
7222 u8 local_port[0x8];
7223 u8 pnat[0x2];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007224 u8 reserved_at_12[0x2];
Saeed Mahameede2816822015-05-28 22:28:40 +03007225 u8 lane[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007226 u8 reserved_at_18[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007227
7228 u8 time_to_link_up[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007229 u8 reserved_at_30[0xc];
Saeed Mahameede2816822015-05-28 22:28:40 +03007230 u8 grade_lane_speed[0x4];
7231
7232 u8 grade_version[0x8];
7233 u8 grade[0x18];
7234
Matan Barakb4ff3a32016-02-09 14:57:42 +02007235 u8 reserved_at_60[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03007236 u8 height_grade_type[0x4];
7237 u8 height_grade[0x18];
7238
7239 u8 height_dz[0x10];
7240 u8 height_dv[0x10];
7241
Matan Barakb4ff3a32016-02-09 14:57:42 +02007242 u8 reserved_at_a0[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007243 u8 height_sigma[0x10];
7244
Matan Barakb4ff3a32016-02-09 14:57:42 +02007245 u8 reserved_at_c0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007246
Matan Barakb4ff3a32016-02-09 14:57:42 +02007247 u8 reserved_at_e0[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03007248 u8 phase_grade_type[0x4];
7249 u8 phase_grade[0x18];
7250
Matan Barakb4ff3a32016-02-09 14:57:42 +02007251 u8 reserved_at_100[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007252 u8 phase_eo_pos[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007253 u8 reserved_at_110[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007254 u8 phase_eo_neg[0x8];
7255
7256 u8 ffe_set_tested[0x10];
7257 u8 test_errors_per_lane[0x10];
7258};
7259
7260struct mlx5_ifc_pvlc_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007261 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007262 u8 local_port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007263 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007264
Matan Barakb4ff3a32016-02-09 14:57:42 +02007265 u8 reserved_at_20[0x1c];
Saeed Mahameede2816822015-05-28 22:28:40 +03007266 u8 vl_hw_cap[0x4];
7267
Matan Barakb4ff3a32016-02-09 14:57:42 +02007268 u8 reserved_at_40[0x1c];
Saeed Mahameede2816822015-05-28 22:28:40 +03007269 u8 vl_admin[0x4];
7270
Matan Barakb4ff3a32016-02-09 14:57:42 +02007271 u8 reserved_at_60[0x1c];
Saeed Mahameede2816822015-05-28 22:28:40 +03007272 u8 vl_operational[0x4];
7273};
7274
7275struct mlx5_ifc_pude_reg_bits {
7276 u8 swid[0x8];
7277 u8 local_port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007278 u8 reserved_at_10[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03007279 u8 admin_status[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007280 u8 reserved_at_18[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03007281 u8 oper_status[0x4];
7282
Matan Barakb4ff3a32016-02-09 14:57:42 +02007283 u8 reserved_at_20[0x60];
Saeed Mahameede2816822015-05-28 22:28:40 +03007284};
7285
7286struct mlx5_ifc_ptys_reg_bits {
Bodong Wange7e31ca2016-09-07 19:07:58 +03007287 u8 reserved_at_0[0x1];
Saeed Mahameed74862162016-06-09 15:11:34 +03007288 u8 an_disable_admin[0x1];
Bodong Wange7e31ca2016-09-07 19:07:58 +03007289 u8 an_disable_cap[0x1];
7290 u8 reserved_at_3[0x5];
Saeed Mahameede2816822015-05-28 22:28:40 +03007291 u8 local_port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007292 u8 reserved_at_10[0xd];
Saeed Mahameede2816822015-05-28 22:28:40 +03007293 u8 proto_mask[0x3];
7294
Saeed Mahameed74862162016-06-09 15:11:34 +03007295 u8 an_status[0x4];
7296 u8 reserved_at_24[0x3c];
Saeed Mahameede2816822015-05-28 22:28:40 +03007297
7298 u8 eth_proto_capability[0x20];
7299
7300 u8 ib_link_width_capability[0x10];
7301 u8 ib_proto_capability[0x10];
7302
Matan Barakb4ff3a32016-02-09 14:57:42 +02007303 u8 reserved_at_a0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007304
7305 u8 eth_proto_admin[0x20];
7306
7307 u8 ib_link_width_admin[0x10];
7308 u8 ib_proto_admin[0x10];
7309
Matan Barakb4ff3a32016-02-09 14:57:42 +02007310 u8 reserved_at_100[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007311
7312 u8 eth_proto_oper[0x20];
7313
7314 u8 ib_link_width_oper[0x10];
7315 u8 ib_proto_oper[0x10];
7316
Eran Ben Elisha5b4793f2017-02-13 14:00:59 +02007317 u8 reserved_at_160[0x1c];
7318 u8 connector_type[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03007319
7320 u8 eth_proto_lp_advertise[0x20];
7321
Matan Barakb4ff3a32016-02-09 14:57:42 +02007322 u8 reserved_at_1a0[0x60];
Saeed Mahameede2816822015-05-28 22:28:40 +03007323};
7324
Saeed Mahameed7d5e1422016-04-11 23:10:22 +03007325struct mlx5_ifc_mlcr_reg_bits {
7326 u8 reserved_at_0[0x8];
7327 u8 local_port[0x8];
7328 u8 reserved_at_10[0x20];
7329
7330 u8 beacon_duration[0x10];
7331 u8 reserved_at_40[0x10];
7332
7333 u8 beacon_remain[0x10];
7334};
7335
Saeed Mahameede2816822015-05-28 22:28:40 +03007336struct mlx5_ifc_ptas_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007337 u8 reserved_at_0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007338
7339 u8 algorithm_options[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007340 u8 reserved_at_30[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03007341 u8 repetitions_mode[0x4];
7342 u8 num_of_repetitions[0x8];
7343
7344 u8 grade_version[0x8];
7345 u8 height_grade_type[0x4];
7346 u8 phase_grade_type[0x4];
7347 u8 height_grade_weight[0x8];
7348 u8 phase_grade_weight[0x8];
7349
7350 u8 gisim_measure_bits[0x10];
7351 u8 adaptive_tap_measure_bits[0x10];
7352
7353 u8 ber_bath_high_error_threshold[0x10];
7354 u8 ber_bath_mid_error_threshold[0x10];
7355
7356 u8 ber_bath_low_error_threshold[0x10];
7357 u8 one_ratio_high_threshold[0x10];
7358
7359 u8 one_ratio_high_mid_threshold[0x10];
7360 u8 one_ratio_low_mid_threshold[0x10];
7361
7362 u8 one_ratio_low_threshold[0x10];
7363 u8 ndeo_error_threshold[0x10];
7364
7365 u8 mixer_offset_step_size[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007366 u8 reserved_at_110[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007367 u8 mix90_phase_for_voltage_bath[0x8];
7368
7369 u8 mixer_offset_start[0x10];
7370 u8 mixer_offset_end[0x10];
7371
Matan Barakb4ff3a32016-02-09 14:57:42 +02007372 u8 reserved_at_140[0x15];
Saeed Mahameede2816822015-05-28 22:28:40 +03007373 u8 ber_test_time[0xb];
7374};
7375
7376struct mlx5_ifc_pspa_reg_bits {
7377 u8 swid[0x8];
7378 u8 local_port[0x8];
7379 u8 sub_port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007380 u8 reserved_at_18[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007381
Matan Barakb4ff3a32016-02-09 14:57:42 +02007382 u8 reserved_at_20[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007383};
7384
7385struct mlx5_ifc_pqdr_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007386 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007387 u8 local_port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007388 u8 reserved_at_10[0x5];
Saeed Mahameede2816822015-05-28 22:28:40 +03007389 u8 prio[0x3];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007390 u8 reserved_at_18[0x6];
Saeed Mahameede2816822015-05-28 22:28:40 +03007391 u8 mode[0x2];
7392
Matan Barakb4ff3a32016-02-09 14:57:42 +02007393 u8 reserved_at_20[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007394
Matan Barakb4ff3a32016-02-09 14:57:42 +02007395 u8 reserved_at_40[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007396 u8 min_threshold[0x10];
7397
Matan Barakb4ff3a32016-02-09 14:57:42 +02007398 u8 reserved_at_60[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007399 u8 max_threshold[0x10];
7400
Matan Barakb4ff3a32016-02-09 14:57:42 +02007401 u8 reserved_at_80[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007402 u8 mark_probability_denominator[0x10];
7403
Matan Barakb4ff3a32016-02-09 14:57:42 +02007404 u8 reserved_at_a0[0x60];
Saeed Mahameede2816822015-05-28 22:28:40 +03007405};
7406
7407struct mlx5_ifc_ppsc_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007408 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007409 u8 local_port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007410 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007411
Matan Barakb4ff3a32016-02-09 14:57:42 +02007412 u8 reserved_at_20[0x60];
Saeed Mahameede2816822015-05-28 22:28:40 +03007413
Matan Barakb4ff3a32016-02-09 14:57:42 +02007414 u8 reserved_at_80[0x1c];
Saeed Mahameede2816822015-05-28 22:28:40 +03007415 u8 wrps_admin[0x4];
7416
Matan Barakb4ff3a32016-02-09 14:57:42 +02007417 u8 reserved_at_a0[0x1c];
Saeed Mahameede2816822015-05-28 22:28:40 +03007418 u8 wrps_status[0x4];
7419
Matan Barakb4ff3a32016-02-09 14:57:42 +02007420 u8 reserved_at_c0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007421 u8 up_threshold[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007422 u8 reserved_at_d0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007423 u8 down_threshold[0x8];
7424
Matan Barakb4ff3a32016-02-09 14:57:42 +02007425 u8 reserved_at_e0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007426
Matan Barakb4ff3a32016-02-09 14:57:42 +02007427 u8 reserved_at_100[0x1c];
Saeed Mahameede2816822015-05-28 22:28:40 +03007428 u8 srps_admin[0x4];
7429
Matan Barakb4ff3a32016-02-09 14:57:42 +02007430 u8 reserved_at_120[0x1c];
Saeed Mahameede2816822015-05-28 22:28:40 +03007431 u8 srps_status[0x4];
7432
Matan Barakb4ff3a32016-02-09 14:57:42 +02007433 u8 reserved_at_140[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03007434};
7435
7436struct mlx5_ifc_pplr_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007437 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007438 u8 local_port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007439 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007440
Matan Barakb4ff3a32016-02-09 14:57:42 +02007441 u8 reserved_at_20[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007442 u8 lb_cap[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007443 u8 reserved_at_30[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007444 u8 lb_en[0x8];
7445};
7446
7447struct mlx5_ifc_pplm_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007448 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007449 u8 local_port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007450 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007451
Matan Barakb4ff3a32016-02-09 14:57:42 +02007452 u8 reserved_at_20[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007453
7454 u8 port_profile_mode[0x8];
7455 u8 static_port_profile[0x8];
7456 u8 active_port_profile[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007457 u8 reserved_at_58[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007458
7459 u8 retransmission_active[0x8];
7460 u8 fec_mode_active[0x18];
7461
Matan Barakb4ff3a32016-02-09 14:57:42 +02007462 u8 reserved_at_80[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007463};
7464
7465struct mlx5_ifc_ppcnt_reg_bits {
7466 u8 swid[0x8];
7467 u8 local_port[0x8];
7468 u8 pnat[0x2];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007469 u8 reserved_at_12[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007470 u8 grp[0x6];
7471
7472 u8 clr[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007473 u8 reserved_at_21[0x1c];
Saeed Mahameede2816822015-05-28 22:28:40 +03007474 u8 prio_tc[0x3];
7475
7476 union mlx5_ifc_eth_cntrs_grp_data_layout_auto_bits counter_set;
7477};
7478
Gal Pressman8ed1a632016-11-17 13:46:01 +02007479struct mlx5_ifc_mpcnt_reg_bits {
7480 u8 reserved_at_0[0x8];
7481 u8 pcie_index[0x8];
7482 u8 reserved_at_10[0xa];
7483 u8 grp[0x6];
7484
7485 u8 clr[0x1];
7486 u8 reserved_at_21[0x1f];
7487
7488 union mlx5_ifc_pcie_cntrs_grp_data_layout_auto_bits counter_set;
7489};
7490
Saeed Mahameede2816822015-05-28 22:28:40 +03007491struct mlx5_ifc_ppad_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007492 u8 reserved_at_0[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03007493 u8 single_mac[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007494 u8 reserved_at_4[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03007495 u8 local_port[0x8];
7496 u8 mac_47_32[0x10];
7497
7498 u8 mac_31_0[0x20];
7499
Matan Barakb4ff3a32016-02-09 14:57:42 +02007500 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03007501};
7502
7503struct mlx5_ifc_pmtu_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007504 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007505 u8 local_port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007506 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007507
7508 u8 max_mtu[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007509 u8 reserved_at_30[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007510
7511 u8 admin_mtu[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007512 u8 reserved_at_50[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007513
7514 u8 oper_mtu[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007515 u8 reserved_at_70[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007516};
7517
7518struct mlx5_ifc_pmpr_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007519 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007520 u8 module[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007521 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007522
Matan Barakb4ff3a32016-02-09 14:57:42 +02007523 u8 reserved_at_20[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03007524 u8 attenuation_5g[0x8];
7525
Matan Barakb4ff3a32016-02-09 14:57:42 +02007526 u8 reserved_at_40[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03007527 u8 attenuation_7g[0x8];
7528
Matan Barakb4ff3a32016-02-09 14:57:42 +02007529 u8 reserved_at_60[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03007530 u8 attenuation_12g[0x8];
7531};
7532
7533struct mlx5_ifc_pmpe_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007534 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007535 u8 module[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007536 u8 reserved_at_10[0xc];
Saeed Mahameede2816822015-05-28 22:28:40 +03007537 u8 module_status[0x4];
7538
Matan Barakb4ff3a32016-02-09 14:57:42 +02007539 u8 reserved_at_20[0x60];
Saeed Mahameede2816822015-05-28 22:28:40 +03007540};
7541
7542struct mlx5_ifc_pmpc_reg_bits {
7543 u8 module_state_updated[32][0x8];
7544};
7545
7546struct mlx5_ifc_pmlpn_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007547 u8 reserved_at_0[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03007548 u8 mlpn_status[0x4];
7549 u8 local_port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007550 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007551
7552 u8 e[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007553 u8 reserved_at_21[0x1f];
Saeed Mahameede2816822015-05-28 22:28:40 +03007554};
7555
7556struct mlx5_ifc_pmlp_reg_bits {
7557 u8 rxtx[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007558 u8 reserved_at_1[0x7];
Saeed Mahameede2816822015-05-28 22:28:40 +03007559 u8 local_port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007560 u8 reserved_at_10[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007561 u8 width[0x8];
7562
7563 u8 lane0_module_mapping[0x20];
7564
7565 u8 lane1_module_mapping[0x20];
7566
7567 u8 lane2_module_mapping[0x20];
7568
7569 u8 lane3_module_mapping[0x20];
7570
Matan Barakb4ff3a32016-02-09 14:57:42 +02007571 u8 reserved_at_a0[0x160];
Saeed Mahameede2816822015-05-28 22:28:40 +03007572};
7573
7574struct mlx5_ifc_pmaos_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007575 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007576 u8 module[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007577 u8 reserved_at_10[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03007578 u8 admin_status[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007579 u8 reserved_at_18[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03007580 u8 oper_status[0x4];
7581
7582 u8 ase[0x1];
7583 u8 ee[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007584 u8 reserved_at_22[0x1c];
Saeed Mahameede2816822015-05-28 22:28:40 +03007585 u8 e[0x2];
7586
Matan Barakb4ff3a32016-02-09 14:57:42 +02007587 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03007588};
7589
7590struct mlx5_ifc_plpc_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007591 u8 reserved_at_0[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03007592 u8 profile_id[0xc];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007593 u8 reserved_at_10[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03007594 u8 proto_mask[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007595 u8 reserved_at_18[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007596
Matan Barakb4ff3a32016-02-09 14:57:42 +02007597 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007598 u8 lane_speed[0x10];
7599
Matan Barakb4ff3a32016-02-09 14:57:42 +02007600 u8 reserved_at_40[0x17];
Saeed Mahameede2816822015-05-28 22:28:40 +03007601 u8 lpbf[0x1];
7602 u8 fec_mode_policy[0x8];
7603
7604 u8 retransmission_capability[0x8];
7605 u8 fec_mode_capability[0x18];
7606
7607 u8 retransmission_support_admin[0x8];
7608 u8 fec_mode_support_admin[0x18];
7609
7610 u8 retransmission_request_admin[0x8];
7611 u8 fec_mode_request_admin[0x18];
7612
Matan Barakb4ff3a32016-02-09 14:57:42 +02007613 u8 reserved_at_c0[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03007614};
7615
7616struct mlx5_ifc_plib_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007617 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007618 u8 local_port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007619 u8 reserved_at_10[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007620 u8 ib_port[0x8];
7621
Matan Barakb4ff3a32016-02-09 14:57:42 +02007622 u8 reserved_at_20[0x60];
Saeed Mahameede2816822015-05-28 22:28:40 +03007623};
7624
7625struct mlx5_ifc_plbf_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007626 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007627 u8 local_port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007628 u8 reserved_at_10[0xd];
Saeed Mahameede2816822015-05-28 22:28:40 +03007629 u8 lbf_mode[0x3];
7630
Matan Barakb4ff3a32016-02-09 14:57:42 +02007631 u8 reserved_at_20[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007632};
7633
7634struct mlx5_ifc_pipg_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007635 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007636 u8 local_port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007637 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007638
7639 u8 dic[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007640 u8 reserved_at_21[0x19];
Saeed Mahameede2816822015-05-28 22:28:40 +03007641 u8 ipg[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007642 u8 reserved_at_3e[0x2];
Saeed Mahameede2816822015-05-28 22:28:40 +03007643};
7644
7645struct mlx5_ifc_pifr_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007646 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007647 u8 local_port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007648 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007649
Matan Barakb4ff3a32016-02-09 14:57:42 +02007650 u8 reserved_at_20[0xe0];
Saeed Mahameede2816822015-05-28 22:28:40 +03007651
7652 u8 port_filter[8][0x20];
7653
7654 u8 port_filter_update_en[8][0x20];
7655};
7656
7657struct mlx5_ifc_pfcc_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007658 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007659 u8 local_port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007660 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007661
7662 u8 ppan[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007663 u8 reserved_at_24[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03007664 u8 prio_mask_tx[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007665 u8 reserved_at_30[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007666 u8 prio_mask_rx[0x8];
7667
7668 u8 pptx[0x1];
7669 u8 aptx[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007670 u8 reserved_at_42[0x6];
Saeed Mahameede2816822015-05-28 22:28:40 +03007671 u8 pfctx[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007672 u8 reserved_at_50[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007673
7674 u8 pprx[0x1];
7675 u8 aprx[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007676 u8 reserved_at_62[0x6];
Saeed Mahameede2816822015-05-28 22:28:40 +03007677 u8 pfcrx[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007678 u8 reserved_at_70[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007679
Matan Barakb4ff3a32016-02-09 14:57:42 +02007680 u8 reserved_at_80[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03007681};
7682
7683struct mlx5_ifc_pelc_reg_bits {
7684 u8 op[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007685 u8 reserved_at_4[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03007686 u8 local_port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007687 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007688
7689 u8 op_admin[0x8];
7690 u8 op_capability[0x8];
7691 u8 op_request[0x8];
7692 u8 op_active[0x8];
7693
7694 u8 admin[0x40];
7695
7696 u8 capability[0x40];
7697
7698 u8 request[0x40];
7699
7700 u8 active[0x40];
7701
Matan Barakb4ff3a32016-02-09 14:57:42 +02007702 u8 reserved_at_140[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03007703};
7704
7705struct mlx5_ifc_peir_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007706 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007707 u8 local_port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007708 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007709
Matan Barakb4ff3a32016-02-09 14:57:42 +02007710 u8 reserved_at_20[0xc];
Saeed Mahameede2816822015-05-28 22:28:40 +03007711 u8 error_count[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007712 u8 reserved_at_30[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007713
Matan Barakb4ff3a32016-02-09 14:57:42 +02007714 u8 reserved_at_40[0xc];
Saeed Mahameede2816822015-05-28 22:28:40 +03007715 u8 lane[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007716 u8 reserved_at_50[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007717 u8 error_type[0x8];
7718};
7719
Gal Pressmancfdcbcea2016-12-08 15:52:00 +02007720struct mlx5_ifc_pcam_enhanced_features_bits {
Eran Ben Elisha5b4793f2017-02-13 14:00:59 +02007721 u8 reserved_at_0[0x7c];
Gal Pressmancfdcbcea2016-12-08 15:52:00 +02007722
Eran Ben Elisha5b4793f2017-02-13 14:00:59 +02007723 u8 ptys_connector_type[0x1];
7724 u8 reserved_at_7d[0x1];
Gal Pressmancfdcbcea2016-12-08 15:52:00 +02007725 u8 ppcnt_discard_group[0x1];
7726 u8 ppcnt_statistical_group[0x1];
7727};
7728
7729struct mlx5_ifc_pcam_reg_bits {
7730 u8 reserved_at_0[0x8];
7731 u8 feature_group[0x8];
7732 u8 reserved_at_10[0x8];
7733 u8 access_reg_group[0x8];
7734
7735 u8 reserved_at_20[0x20];
7736
7737 union {
7738 u8 reserved_at_0[0x80];
7739 } port_access_reg_cap_mask;
7740
7741 u8 reserved_at_c0[0x80];
7742
7743 union {
7744 struct mlx5_ifc_pcam_enhanced_features_bits enhanced_features;
7745 u8 reserved_at_0[0x80];
7746 } feature_cap_mask;
7747
7748 u8 reserved_at_1c0[0xc0];
7749};
7750
7751struct mlx5_ifc_mcam_enhanced_features_bits {
7752 u8 reserved_at_0[0x7f];
7753
7754 u8 pcie_performance_group[0x1];
7755};
7756
Or Gerlitz0ab87742017-06-11 15:25:38 +03007757struct mlx5_ifc_mcam_access_reg_bits {
7758 u8 reserved_at_0[0x1c];
7759 u8 mcda[0x1];
7760 u8 mcc[0x1];
7761 u8 mcqi[0x1];
7762 u8 reserved_at_1f[0x1];
7763
7764 u8 regs_95_to_64[0x20];
7765 u8 regs_63_to_32[0x20];
7766 u8 regs_31_to_0[0x20];
7767};
7768
Gal Pressmancfdcbcea2016-12-08 15:52:00 +02007769struct mlx5_ifc_mcam_reg_bits {
7770 u8 reserved_at_0[0x8];
7771 u8 feature_group[0x8];
7772 u8 reserved_at_10[0x8];
7773 u8 access_reg_group[0x8];
7774
7775 u8 reserved_at_20[0x20];
7776
7777 union {
Or Gerlitz0ab87742017-06-11 15:25:38 +03007778 struct mlx5_ifc_mcam_access_reg_bits access_regs;
Gal Pressmancfdcbcea2016-12-08 15:52:00 +02007779 u8 reserved_at_0[0x80];
7780 } mng_access_reg_cap_mask;
7781
7782 u8 reserved_at_c0[0x80];
7783
7784 union {
7785 struct mlx5_ifc_mcam_enhanced_features_bits enhanced_features;
7786 u8 reserved_at_0[0x80];
7787 } mng_feature_cap_mask;
7788
7789 u8 reserved_at_1c0[0x80];
7790};
7791
Saeed Mahameede2816822015-05-28 22:28:40 +03007792struct mlx5_ifc_pcap_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007793 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007794 u8 local_port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007795 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007796
7797 u8 port_capability_mask[4][0x20];
7798};
7799
7800struct mlx5_ifc_paos_reg_bits {
7801 u8 swid[0x8];
7802 u8 local_port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007803 u8 reserved_at_10[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03007804 u8 admin_status[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007805 u8 reserved_at_18[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03007806 u8 oper_status[0x4];
7807
7808 u8 ase[0x1];
7809 u8 ee[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007810 u8 reserved_at_22[0x1c];
Saeed Mahameede2816822015-05-28 22:28:40 +03007811 u8 e[0x2];
7812
Matan Barakb4ff3a32016-02-09 14:57:42 +02007813 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03007814};
7815
7816struct mlx5_ifc_pamp_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007817 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007818 u8 opamp_group[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007819 u8 reserved_at_10[0xc];
Saeed Mahameede2816822015-05-28 22:28:40 +03007820 u8 opamp_group_type[0x4];
7821
7822 u8 start_index[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007823 u8 reserved_at_30[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03007824 u8 num_of_indices[0xc];
7825
7826 u8 index_data[18][0x10];
7827};
7828
Saeed Mahameed7d5e1422016-04-11 23:10:22 +03007829struct mlx5_ifc_pcmr_reg_bits {
7830 u8 reserved_at_0[0x8];
7831 u8 local_port[0x8];
7832 u8 reserved_at_10[0x2e];
7833 u8 fcs_cap[0x1];
7834 u8 reserved_at_3f[0x1f];
7835 u8 fcs_chk[0x1];
7836 u8 reserved_at_5f[0x1];
7837};
7838
Saeed Mahameede2816822015-05-28 22:28:40 +03007839struct mlx5_ifc_lane_2_module_mapping_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007840 u8 reserved_at_0[0x6];
Saeed Mahameede2816822015-05-28 22:28:40 +03007841 u8 rx_lane[0x2];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007842 u8 reserved_at_8[0x6];
Saeed Mahameede2816822015-05-28 22:28:40 +03007843 u8 tx_lane[0x2];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007844 u8 reserved_at_10[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007845 u8 module[0x8];
7846};
7847
7848struct mlx5_ifc_bufferx_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007849 u8 reserved_at_0[0x6];
Saeed Mahameede2816822015-05-28 22:28:40 +03007850 u8 lossy[0x1];
7851 u8 epsb[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007852 u8 reserved_at_8[0xc];
Saeed Mahameede2816822015-05-28 22:28:40 +03007853 u8 size[0xc];
7854
7855 u8 xoff_threshold[0x10];
7856 u8 xon_threshold[0x10];
7857};
7858
7859struct mlx5_ifc_set_node_in_bits {
7860 u8 node_description[64][0x8];
7861};
7862
7863struct mlx5_ifc_register_power_settings_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007864 u8 reserved_at_0[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03007865 u8 power_settings_level[0x8];
7866
Matan Barakb4ff3a32016-02-09 14:57:42 +02007867 u8 reserved_at_20[0x60];
Saeed Mahameede2816822015-05-28 22:28:40 +03007868};
7869
7870struct mlx5_ifc_register_host_endianness_bits {
7871 u8 he[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007872 u8 reserved_at_1[0x1f];
Saeed Mahameede2816822015-05-28 22:28:40 +03007873
Matan Barakb4ff3a32016-02-09 14:57:42 +02007874 u8 reserved_at_20[0x60];
Saeed Mahameede2816822015-05-28 22:28:40 +03007875};
7876
7877struct mlx5_ifc_umr_pointer_desc_argument_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007878 u8 reserved_at_0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007879
7880 u8 mkey[0x20];
7881
7882 u8 addressh_63_32[0x20];
7883
7884 u8 addressl_31_0[0x20];
7885};
7886
7887struct mlx5_ifc_ud_adrs_vector_bits {
7888 u8 dc_key[0x40];
7889
7890 u8 ext[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007891 u8 reserved_at_41[0x7];
Saeed Mahameede2816822015-05-28 22:28:40 +03007892 u8 destination_qp_dct[0x18];
7893
7894 u8 static_rate[0x4];
7895 u8 sl_eth_prio[0x4];
7896 u8 fl[0x1];
7897 u8 mlid[0x7];
7898 u8 rlid_udp_sport[0x10];
7899
Matan Barakb4ff3a32016-02-09 14:57:42 +02007900 u8 reserved_at_80[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007901
7902 u8 rmac_47_16[0x20];
7903
7904 u8 rmac_15_0[0x10];
7905 u8 tclass[0x8];
7906 u8 hop_limit[0x8];
7907
Matan Barakb4ff3a32016-02-09 14:57:42 +02007908 u8 reserved_at_e0[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03007909 u8 grh[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007910 u8 reserved_at_e2[0x2];
Saeed Mahameede2816822015-05-28 22:28:40 +03007911 u8 src_addr_index[0x8];
7912 u8 flow_label[0x14];
7913
7914 u8 rgid_rip[16][0x8];
7915};
7916
7917struct mlx5_ifc_pages_req_event_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007918 u8 reserved_at_0[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007919 u8 function_id[0x10];
7920
7921 u8 num_pages[0x20];
7922
Matan Barakb4ff3a32016-02-09 14:57:42 +02007923 u8 reserved_at_40[0xa0];
Saeed Mahameede2816822015-05-28 22:28:40 +03007924};
7925
7926struct mlx5_ifc_eqe_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007927 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007928 u8 event_type[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007929 u8 reserved_at_10[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007930 u8 event_sub_type[0x8];
7931
Matan Barakb4ff3a32016-02-09 14:57:42 +02007932 u8 reserved_at_20[0xe0];
Saeed Mahameede2816822015-05-28 22:28:40 +03007933
7934 union mlx5_ifc_event_auto_bits event_data;
7935
Matan Barakb4ff3a32016-02-09 14:57:42 +02007936 u8 reserved_at_1e0[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007937 u8 signature[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007938 u8 reserved_at_1f8[0x7];
Saeed Mahameede2816822015-05-28 22:28:40 +03007939 u8 owner[0x1];
7940};
7941
7942enum {
7943 MLX5_CMD_QUEUE_ENTRY_TYPE_PCIE_CMD_IF_TRANSPORT = 0x7,
7944};
7945
7946struct mlx5_ifc_cmd_queue_entry_bits {
7947 u8 type[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007948 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03007949
7950 u8 input_length[0x20];
7951
7952 u8 input_mailbox_pointer_63_32[0x20];
7953
7954 u8 input_mailbox_pointer_31_9[0x17];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007955 u8 reserved_at_77[0x9];
Saeed Mahameede2816822015-05-28 22:28:40 +03007956
7957 u8 command_input_inline_data[16][0x8];
7958
7959 u8 command_output_inline_data[16][0x8];
7960
7961 u8 output_mailbox_pointer_63_32[0x20];
7962
7963 u8 output_mailbox_pointer_31_9[0x17];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007964 u8 reserved_at_1b7[0x9];
Saeed Mahameede2816822015-05-28 22:28:40 +03007965
7966 u8 output_length[0x20];
7967
7968 u8 token[0x8];
7969 u8 signature[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007970 u8 reserved_at_1f0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007971 u8 status[0x7];
7972 u8 ownership[0x1];
7973};
7974
7975struct mlx5_ifc_cmd_out_bits {
7976 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007977 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03007978
7979 u8 syndrome[0x20];
7980
7981 u8 command_output[0x20];
7982};
7983
7984struct mlx5_ifc_cmd_in_bits {
7985 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007986 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007987
Matan Barakb4ff3a32016-02-09 14:57:42 +02007988 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007989 u8 op_mod[0x10];
7990
7991 u8 command[0][0x20];
7992};
7993
7994struct mlx5_ifc_cmd_if_box_bits {
7995 u8 mailbox_data[512][0x8];
7996
Matan Barakb4ff3a32016-02-09 14:57:42 +02007997 u8 reserved_at_1000[0x180];
Saeed Mahameede2816822015-05-28 22:28:40 +03007998
7999 u8 next_pointer_63_32[0x20];
8000
8001 u8 next_pointer_31_10[0x16];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008002 u8 reserved_at_11b6[0xa];
Saeed Mahameede2816822015-05-28 22:28:40 +03008003
8004 u8 block_number[0x20];
8005
Matan Barakb4ff3a32016-02-09 14:57:42 +02008006 u8 reserved_at_11e0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03008007 u8 token[0x8];
8008 u8 ctrl_signature[0x8];
8009 u8 signature[0x8];
8010};
8011
8012struct mlx5_ifc_mtt_bits {
8013 u8 ptag_63_32[0x20];
8014
8015 u8 ptag_31_8[0x18];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008016 u8 reserved_at_38[0x6];
Saeed Mahameede2816822015-05-28 22:28:40 +03008017 u8 wr_en[0x1];
8018 u8 rd_en[0x1];
8019};
8020
Tariq Toukan928cfe82016-02-22 18:17:29 +02008021struct mlx5_ifc_query_wol_rol_out_bits {
8022 u8 status[0x8];
8023 u8 reserved_at_8[0x18];
8024
8025 u8 syndrome[0x20];
8026
8027 u8 reserved_at_40[0x10];
8028 u8 rol_mode[0x8];
8029 u8 wol_mode[0x8];
8030
8031 u8 reserved_at_60[0x20];
8032};
8033
8034struct mlx5_ifc_query_wol_rol_in_bits {
8035 u8 opcode[0x10];
8036 u8 reserved_at_10[0x10];
8037
8038 u8 reserved_at_20[0x10];
8039 u8 op_mod[0x10];
8040
8041 u8 reserved_at_40[0x40];
8042};
8043
8044struct mlx5_ifc_set_wol_rol_out_bits {
8045 u8 status[0x8];
8046 u8 reserved_at_8[0x18];
8047
8048 u8 syndrome[0x20];
8049
8050 u8 reserved_at_40[0x40];
8051};
8052
8053struct mlx5_ifc_set_wol_rol_in_bits {
8054 u8 opcode[0x10];
8055 u8 reserved_at_10[0x10];
8056
8057 u8 reserved_at_20[0x10];
8058 u8 op_mod[0x10];
8059
8060 u8 rol_mode_valid[0x1];
8061 u8 wol_mode_valid[0x1];
8062 u8 reserved_at_42[0xe];
8063 u8 rol_mode[0x8];
8064 u8 wol_mode[0x8];
8065
8066 u8 reserved_at_60[0x20];
8067};
8068
Saeed Mahameede2816822015-05-28 22:28:40 +03008069enum {
8070 MLX5_INITIAL_SEG_NIC_INTERFACE_FULL_DRIVER = 0x0,
8071 MLX5_INITIAL_SEG_NIC_INTERFACE_DISABLED = 0x1,
8072 MLX5_INITIAL_SEG_NIC_INTERFACE_NO_DRAM_NIC = 0x2,
8073};
8074
8075enum {
8076 MLX5_INITIAL_SEG_NIC_INTERFACE_SUPPORTED_FULL_DRIVER = 0x0,
8077 MLX5_INITIAL_SEG_NIC_INTERFACE_SUPPORTED_DISABLED = 0x1,
8078 MLX5_INITIAL_SEG_NIC_INTERFACE_SUPPORTED_NO_DRAM_NIC = 0x2,
8079};
8080
8081enum {
8082 MLX5_INITIAL_SEG_HEALTH_SYNDROME_FW_INTERNAL_ERR = 0x1,
8083 MLX5_INITIAL_SEG_HEALTH_SYNDROME_DEAD_IRISC = 0x7,
8084 MLX5_INITIAL_SEG_HEALTH_SYNDROME_HW_FATAL_ERR = 0x8,
8085 MLX5_INITIAL_SEG_HEALTH_SYNDROME_FW_CRC_ERR = 0x9,
8086 MLX5_INITIAL_SEG_HEALTH_SYNDROME_ICM_FETCH_PCI_ERR = 0xa,
8087 MLX5_INITIAL_SEG_HEALTH_SYNDROME_ICM_PAGE_ERR = 0xb,
8088 MLX5_INITIAL_SEG_HEALTH_SYNDROME_ASYNCHRONOUS_EQ_BUF_OVERRUN = 0xc,
8089 MLX5_INITIAL_SEG_HEALTH_SYNDROME_EQ_IN_ERR = 0xd,
8090 MLX5_INITIAL_SEG_HEALTH_SYNDROME_EQ_INV = 0xe,
8091 MLX5_INITIAL_SEG_HEALTH_SYNDROME_FFSER_ERR = 0xf,
8092 MLX5_INITIAL_SEG_HEALTH_SYNDROME_HIGH_TEMP_ERR = 0x10,
8093};
8094
8095struct mlx5_ifc_initial_seg_bits {
8096 u8 fw_rev_minor[0x10];
8097 u8 fw_rev_major[0x10];
8098
8099 u8 cmd_interface_rev[0x10];
8100 u8 fw_rev_subminor[0x10];
8101
Matan Barakb4ff3a32016-02-09 14:57:42 +02008102 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03008103
8104 u8 cmdq_phy_addr_63_32[0x20];
8105
8106 u8 cmdq_phy_addr_31_12[0x14];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008107 u8 reserved_at_b4[0x2];
Saeed Mahameede2816822015-05-28 22:28:40 +03008108 u8 nic_interface[0x2];
8109 u8 log_cmdq_size[0x4];
8110 u8 log_cmdq_stride[0x4];
8111
8112 u8 command_doorbell_vector[0x20];
8113
Matan Barakb4ff3a32016-02-09 14:57:42 +02008114 u8 reserved_at_e0[0xf00];
Saeed Mahameede2816822015-05-28 22:28:40 +03008115
8116 u8 initializing[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008117 u8 reserved_at_fe1[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03008118 u8 nic_interface_supported[0x3];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008119 u8 reserved_at_fe8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03008120
8121 struct mlx5_ifc_health_buffer_bits health_buffer;
8122
8123 u8 no_dram_nic_offset[0x20];
8124
Matan Barakb4ff3a32016-02-09 14:57:42 +02008125 u8 reserved_at_1220[0x6e40];
Saeed Mahameede2816822015-05-28 22:28:40 +03008126
Matan Barakb4ff3a32016-02-09 14:57:42 +02008127 u8 reserved_at_8060[0x1f];
Saeed Mahameede2816822015-05-28 22:28:40 +03008128 u8 clear_int[0x1];
8129
8130 u8 health_syndrome[0x8];
8131 u8 health_counter[0x18];
8132
Matan Barakb4ff3a32016-02-09 14:57:42 +02008133 u8 reserved_at_80a0[0x17fc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03008134};
8135
Eugenia Emantayevf9a1ef72016-10-10 16:05:53 +03008136struct mlx5_ifc_mtpps_reg_bits {
8137 u8 reserved_at_0[0xc];
8138 u8 cap_number_of_pps_pins[0x4];
8139 u8 reserved_at_10[0x4];
8140 u8 cap_max_num_of_pps_in_pins[0x4];
8141 u8 reserved_at_18[0x4];
8142 u8 cap_max_num_of_pps_out_pins[0x4];
8143
8144 u8 reserved_at_20[0x24];
8145 u8 cap_pin_3_mode[0x4];
8146 u8 reserved_at_48[0x4];
8147 u8 cap_pin_2_mode[0x4];
8148 u8 reserved_at_50[0x4];
8149 u8 cap_pin_1_mode[0x4];
8150 u8 reserved_at_58[0x4];
8151 u8 cap_pin_0_mode[0x4];
8152
8153 u8 reserved_at_60[0x4];
8154 u8 cap_pin_7_mode[0x4];
8155 u8 reserved_at_68[0x4];
8156 u8 cap_pin_6_mode[0x4];
8157 u8 reserved_at_70[0x4];
8158 u8 cap_pin_5_mode[0x4];
8159 u8 reserved_at_78[0x4];
8160 u8 cap_pin_4_mode[0x4];
8161
8162 u8 reserved_at_80[0x80];
8163
8164 u8 enable[0x1];
8165 u8 reserved_at_101[0xb];
8166 u8 pattern[0x4];
8167 u8 reserved_at_110[0x4];
8168 u8 pin_mode[0x4];
8169 u8 pin[0x8];
8170
8171 u8 reserved_at_120[0x20];
8172
8173 u8 time_stamp[0x40];
8174
8175 u8 out_pulse_duration[0x10];
8176 u8 out_periodic_adjustment[0x10];
8177
8178 u8 reserved_at_1a0[0x60];
8179};
8180
8181struct mlx5_ifc_mtppse_reg_bits {
8182 u8 reserved_at_0[0x18];
8183 u8 pin[0x8];
8184 u8 event_arm[0x1];
8185 u8 reserved_at_21[0x1b];
8186 u8 event_generation_mode[0x4];
8187 u8 reserved_at_40[0x40];
8188};
8189
Or Gerlitz47176282017-04-18 13:35:39 +03008190struct mlx5_ifc_mcqi_cap_bits {
8191 u8 supported_info_bitmask[0x20];
8192
8193 u8 component_size[0x20];
8194
8195 u8 max_component_size[0x20];
8196
8197 u8 log_mcda_word_size[0x4];
8198 u8 reserved_at_64[0xc];
8199 u8 mcda_max_write_size[0x10];
8200
8201 u8 rd_en[0x1];
8202 u8 reserved_at_81[0x1];
8203 u8 match_chip_id[0x1];
8204 u8 match_psid[0x1];
8205 u8 check_user_timestamp[0x1];
8206 u8 match_base_guid_mac[0x1];
8207 u8 reserved_at_86[0x1a];
8208};
8209
8210struct mlx5_ifc_mcqi_reg_bits {
8211 u8 read_pending_component[0x1];
8212 u8 reserved_at_1[0xf];
8213 u8 component_index[0x10];
8214
8215 u8 reserved_at_20[0x20];
8216
8217 u8 reserved_at_40[0x1b];
8218 u8 info_type[0x5];
8219
8220 u8 info_size[0x20];
8221
8222 u8 offset[0x20];
8223
8224 u8 reserved_at_a0[0x10];
8225 u8 data_size[0x10];
8226
8227 u8 data[0][0x20];
8228};
8229
8230struct mlx5_ifc_mcc_reg_bits {
8231 u8 reserved_at_0[0x4];
8232 u8 time_elapsed_since_last_cmd[0xc];
8233 u8 reserved_at_10[0x8];
8234 u8 instruction[0x8];
8235
8236 u8 reserved_at_20[0x10];
8237 u8 component_index[0x10];
8238
8239 u8 reserved_at_40[0x8];
8240 u8 update_handle[0x18];
8241
8242 u8 handle_owner_type[0x4];
8243 u8 handle_owner_host_id[0x4];
8244 u8 reserved_at_68[0x1];
8245 u8 control_progress[0x7];
8246 u8 error_code[0x8];
8247 u8 reserved_at_78[0x4];
8248 u8 control_state[0x4];
8249
8250 u8 component_size[0x20];
8251
8252 u8 reserved_at_a0[0x60];
8253};
8254
8255struct mlx5_ifc_mcda_reg_bits {
8256 u8 reserved_at_0[0x8];
8257 u8 update_handle[0x18];
8258
8259 u8 offset[0x20];
8260
8261 u8 reserved_at_40[0x10];
8262 u8 size[0x10];
8263
8264 u8 reserved_at_60[0x20];
8265
8266 u8 data[0][0x20];
8267};
8268
Saeed Mahameede2816822015-05-28 22:28:40 +03008269union mlx5_ifc_ports_control_registers_document_bits {
8270 struct mlx5_ifc_bufferx_reg_bits bufferx_reg;
8271 struct mlx5_ifc_eth_2819_cntrs_grp_data_layout_bits eth_2819_cntrs_grp_data_layout;
8272 struct mlx5_ifc_eth_2863_cntrs_grp_data_layout_bits eth_2863_cntrs_grp_data_layout;
8273 struct mlx5_ifc_eth_3635_cntrs_grp_data_layout_bits eth_3635_cntrs_grp_data_layout;
8274 struct mlx5_ifc_eth_802_3_cntrs_grp_data_layout_bits eth_802_3_cntrs_grp_data_layout;
8275 struct mlx5_ifc_eth_extended_cntrs_grp_data_layout_bits eth_extended_cntrs_grp_data_layout;
8276 struct mlx5_ifc_eth_per_prio_grp_data_layout_bits eth_per_prio_grp_data_layout;
8277 struct mlx5_ifc_eth_per_traffic_grp_data_layout_bits eth_per_traffic_grp_data_layout;
8278 struct mlx5_ifc_lane_2_module_mapping_bits lane_2_module_mapping;
8279 struct mlx5_ifc_pamp_reg_bits pamp_reg;
8280 struct mlx5_ifc_paos_reg_bits paos_reg;
8281 struct mlx5_ifc_pcap_reg_bits pcap_reg;
8282 struct mlx5_ifc_peir_reg_bits peir_reg;
8283 struct mlx5_ifc_pelc_reg_bits pelc_reg;
8284 struct mlx5_ifc_pfcc_reg_bits pfcc_reg;
Meny Yossefi1c64bf62016-02-18 18:15:00 +02008285 struct mlx5_ifc_ib_port_cntrs_grp_data_layout_bits ib_port_cntrs_grp_data_layout;
Saeed Mahameede2816822015-05-28 22:28:40 +03008286 struct mlx5_ifc_phys_layer_cntrs_bits phys_layer_cntrs;
8287 struct mlx5_ifc_pifr_reg_bits pifr_reg;
8288 struct mlx5_ifc_pipg_reg_bits pipg_reg;
8289 struct mlx5_ifc_plbf_reg_bits plbf_reg;
8290 struct mlx5_ifc_plib_reg_bits plib_reg;
8291 struct mlx5_ifc_plpc_reg_bits plpc_reg;
8292 struct mlx5_ifc_pmaos_reg_bits pmaos_reg;
8293 struct mlx5_ifc_pmlp_reg_bits pmlp_reg;
8294 struct mlx5_ifc_pmlpn_reg_bits pmlpn_reg;
8295 struct mlx5_ifc_pmpc_reg_bits pmpc_reg;
8296 struct mlx5_ifc_pmpe_reg_bits pmpe_reg;
8297 struct mlx5_ifc_pmpr_reg_bits pmpr_reg;
8298 struct mlx5_ifc_pmtu_reg_bits pmtu_reg;
8299 struct mlx5_ifc_ppad_reg_bits ppad_reg;
8300 struct mlx5_ifc_ppcnt_reg_bits ppcnt_reg;
Gal Pressman8ed1a632016-11-17 13:46:01 +02008301 struct mlx5_ifc_mpcnt_reg_bits mpcnt_reg;
Saeed Mahameede2816822015-05-28 22:28:40 +03008302 struct mlx5_ifc_pplm_reg_bits pplm_reg;
8303 struct mlx5_ifc_pplr_reg_bits pplr_reg;
8304 struct mlx5_ifc_ppsc_reg_bits ppsc_reg;
8305 struct mlx5_ifc_pqdr_reg_bits pqdr_reg;
8306 struct mlx5_ifc_pspa_reg_bits pspa_reg;
8307 struct mlx5_ifc_ptas_reg_bits ptas_reg;
8308 struct mlx5_ifc_ptys_reg_bits ptys_reg;
Saeed Mahameed7d5e1422016-04-11 23:10:22 +03008309 struct mlx5_ifc_mlcr_reg_bits mlcr_reg;
Saeed Mahameede2816822015-05-28 22:28:40 +03008310 struct mlx5_ifc_pude_reg_bits pude_reg;
8311 struct mlx5_ifc_pvlc_reg_bits pvlc_reg;
8312 struct mlx5_ifc_slrg_reg_bits slrg_reg;
8313 struct mlx5_ifc_sltp_reg_bits sltp_reg;
Eugenia Emantayevf9a1ef72016-10-10 16:05:53 +03008314 struct mlx5_ifc_mtpps_reg_bits mtpps_reg;
8315 struct mlx5_ifc_mtppse_reg_bits mtppse_reg;
Ilan Tayaria9956d32017-04-18 13:10:41 +03008316 struct mlx5_ifc_fpga_access_reg_bits fpga_access_reg;
Ilan Tayarie29341f2017-03-13 20:05:45 +02008317 struct mlx5_ifc_fpga_ctrl_bits fpga_ctrl_bits;
8318 struct mlx5_ifc_fpga_cap_bits fpga_cap_bits;
Or Gerlitz47176282017-04-18 13:35:39 +03008319 struct mlx5_ifc_mcqi_reg_bits mcqi_reg;
8320 struct mlx5_ifc_mcc_reg_bits mcc_reg;
8321 struct mlx5_ifc_mcda_reg_bits mcda_reg;
Matan Barakb4ff3a32016-02-09 14:57:42 +02008322 u8 reserved_at_0[0x60e0];
Saeed Mahameede2816822015-05-28 22:28:40 +03008323};
8324
8325union mlx5_ifc_debug_enhancements_document_bits {
8326 struct mlx5_ifc_health_buffer_bits health_buffer;
Matan Barakb4ff3a32016-02-09 14:57:42 +02008327 u8 reserved_at_0[0x200];
Saeed Mahameede2816822015-05-28 22:28:40 +03008328};
8329
8330union mlx5_ifc_uplink_pci_interface_document_bits {
8331 struct mlx5_ifc_initial_seg_bits initial_seg;
Matan Barakb4ff3a32016-02-09 14:57:42 +02008332 u8 reserved_at_0[0x20060];
Eli Cohenb7755162014-10-02 12:19:44 +03008333};
8334
Maor Gottlieb2cc43b42016-01-11 10:25:59 +02008335struct mlx5_ifc_set_flow_table_root_out_bits {
8336 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008337 u8 reserved_at_8[0x18];
Maor Gottlieb2cc43b42016-01-11 10:25:59 +02008338
8339 u8 syndrome[0x20];
8340
Matan Barakb4ff3a32016-02-09 14:57:42 +02008341 u8 reserved_at_40[0x40];
Maor Gottlieb2cc43b42016-01-11 10:25:59 +02008342};
8343
8344struct mlx5_ifc_set_flow_table_root_in_bits {
8345 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008346 u8 reserved_at_10[0x10];
Maor Gottlieb2cc43b42016-01-11 10:25:59 +02008347
Matan Barakb4ff3a32016-02-09 14:57:42 +02008348 u8 reserved_at_20[0x10];
Maor Gottlieb2cc43b42016-01-11 10:25:59 +02008349 u8 op_mod[0x10];
8350
Saeed Mahameed7d5e1422016-04-11 23:10:22 +03008351 u8 other_vport[0x1];
8352 u8 reserved_at_41[0xf];
8353 u8 vport_number[0x10];
8354
8355 u8 reserved_at_60[0x20];
Maor Gottlieb2cc43b42016-01-11 10:25:59 +02008356
8357 u8 table_type[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008358 u8 reserved_at_88[0x18];
Maor Gottlieb2cc43b42016-01-11 10:25:59 +02008359
Matan Barakb4ff3a32016-02-09 14:57:42 +02008360 u8 reserved_at_a0[0x8];
Maor Gottlieb2cc43b42016-01-11 10:25:59 +02008361 u8 table_id[0x18];
8362
Erez Shitrit500a3d02017-04-13 06:36:51 +03008363 u8 reserved_at_c0[0x8];
8364 u8 underlay_qpn[0x18];
8365 u8 reserved_at_e0[0x120];
Maor Gottlieb2cc43b42016-01-11 10:25:59 +02008366};
8367
Maor Gottlieb34a40e62016-01-11 10:26:00 +02008368enum {
Aviv Heller84df61e2016-05-10 13:47:50 +03008369 MLX5_MODIFY_FLOW_TABLE_MISS_TABLE_ID = (1UL << 0),
8370 MLX5_MODIFY_FLOW_TABLE_LAG_NEXT_TABLE_ID = (1UL << 15),
Maor Gottlieb34a40e62016-01-11 10:26:00 +02008371};
8372
8373struct mlx5_ifc_modify_flow_table_out_bits {
8374 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008375 u8 reserved_at_8[0x18];
Maor Gottlieb34a40e62016-01-11 10:26:00 +02008376
8377 u8 syndrome[0x20];
8378
Matan Barakb4ff3a32016-02-09 14:57:42 +02008379 u8 reserved_at_40[0x40];
Maor Gottlieb34a40e62016-01-11 10:26:00 +02008380};
8381
8382struct mlx5_ifc_modify_flow_table_in_bits {
8383 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008384 u8 reserved_at_10[0x10];
Maor Gottlieb34a40e62016-01-11 10:26:00 +02008385
Matan Barakb4ff3a32016-02-09 14:57:42 +02008386 u8 reserved_at_20[0x10];
Maor Gottlieb34a40e62016-01-11 10:26:00 +02008387 u8 op_mod[0x10];
8388
Saeed Mahameed7d5e1422016-04-11 23:10:22 +03008389 u8 other_vport[0x1];
8390 u8 reserved_at_41[0xf];
8391 u8 vport_number[0x10];
Maor Gottlieb34a40e62016-01-11 10:26:00 +02008392
Matan Barakb4ff3a32016-02-09 14:57:42 +02008393 u8 reserved_at_60[0x10];
Maor Gottlieb34a40e62016-01-11 10:26:00 +02008394 u8 modify_field_select[0x10];
8395
8396 u8 table_type[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008397 u8 reserved_at_88[0x18];
Maor Gottlieb34a40e62016-01-11 10:26:00 +02008398
Matan Barakb4ff3a32016-02-09 14:57:42 +02008399 u8 reserved_at_a0[0x8];
Maor Gottlieb34a40e62016-01-11 10:26:00 +02008400 u8 table_id[0x18];
8401
Maor Gottlieb0c90e9c2017-03-12 11:35:23 +02008402 struct mlx5_ifc_flow_table_context_bits flow_table_context;
Maor Gottlieb34a40e62016-01-11 10:26:00 +02008403};
8404
Saeed Mahameed4f3961e2016-02-22 18:17:25 +02008405struct mlx5_ifc_ets_tcn_config_reg_bits {
8406 u8 g[0x1];
8407 u8 b[0x1];
8408 u8 r[0x1];
8409 u8 reserved_at_3[0x9];
8410 u8 group[0x4];
8411 u8 reserved_at_10[0x9];
8412 u8 bw_allocation[0x7];
8413
8414 u8 reserved_at_20[0xc];
8415 u8 max_bw_units[0x4];
8416 u8 reserved_at_30[0x8];
8417 u8 max_bw_value[0x8];
8418};
8419
8420struct mlx5_ifc_ets_global_config_reg_bits {
8421 u8 reserved_at_0[0x2];
8422 u8 r[0x1];
8423 u8 reserved_at_3[0x1d];
8424
8425 u8 reserved_at_20[0xc];
8426 u8 max_bw_units[0x4];
8427 u8 reserved_at_30[0x8];
8428 u8 max_bw_value[0x8];
8429};
8430
8431struct mlx5_ifc_qetc_reg_bits {
8432 u8 reserved_at_0[0x8];
8433 u8 port_number[0x8];
8434 u8 reserved_at_10[0x30];
8435
8436 struct mlx5_ifc_ets_tcn_config_reg_bits tc_configuration[0x8];
8437 struct mlx5_ifc_ets_global_config_reg_bits global_configuration;
8438};
8439
8440struct mlx5_ifc_qtct_reg_bits {
8441 u8 reserved_at_0[0x8];
8442 u8 port_number[0x8];
8443 u8 reserved_at_10[0xd];
8444 u8 prio[0x3];
8445
8446 u8 reserved_at_20[0x1d];
8447 u8 tclass[0x3];
8448};
8449
Saeed Mahameed7d5e1422016-04-11 23:10:22 +03008450struct mlx5_ifc_mcia_reg_bits {
8451 u8 l[0x1];
8452 u8 reserved_at_1[0x7];
8453 u8 module[0x8];
8454 u8 reserved_at_10[0x8];
8455 u8 status[0x8];
8456
8457 u8 i2c_device_address[0x8];
8458 u8 page_number[0x8];
8459 u8 device_address[0x10];
8460
8461 u8 reserved_at_40[0x10];
8462 u8 size[0x10];
8463
8464 u8 reserved_at_60[0x20];
8465
8466 u8 dword_0[0x20];
8467 u8 dword_1[0x20];
8468 u8 dword_2[0x20];
8469 u8 dword_3[0x20];
8470 u8 dword_4[0x20];
8471 u8 dword_5[0x20];
8472 u8 dword_6[0x20];
8473 u8 dword_7[0x20];
8474 u8 dword_8[0x20];
8475 u8 dword_9[0x20];
8476 u8 dword_10[0x20];
8477 u8 dword_11[0x20];
8478};
8479
Saeed Mahameed74862162016-06-09 15:11:34 +03008480struct mlx5_ifc_dcbx_param_bits {
8481 u8 dcbx_cee_cap[0x1];
8482 u8 dcbx_ieee_cap[0x1];
8483 u8 dcbx_standby_cap[0x1];
8484 u8 reserved_at_0[0x5];
8485 u8 port_number[0x8];
8486 u8 reserved_at_10[0xa];
8487 u8 max_application_table_size[6];
8488 u8 reserved_at_20[0x15];
8489 u8 version_oper[0x3];
8490 u8 reserved_at_38[5];
8491 u8 version_admin[0x3];
8492 u8 willing_admin[0x1];
8493 u8 reserved_at_41[0x3];
8494 u8 pfc_cap_oper[0x4];
8495 u8 reserved_at_48[0x4];
8496 u8 pfc_cap_admin[0x4];
8497 u8 reserved_at_50[0x4];
8498 u8 num_of_tc_oper[0x4];
8499 u8 reserved_at_58[0x4];
8500 u8 num_of_tc_admin[0x4];
8501 u8 remote_willing[0x1];
8502 u8 reserved_at_61[3];
8503 u8 remote_pfc_cap[4];
8504 u8 reserved_at_68[0x14];
8505 u8 remote_num_of_tc[0x4];
8506 u8 reserved_at_80[0x18];
8507 u8 error[0x8];
8508 u8 reserved_at_a0[0x160];
8509};
Aviv Heller84df61e2016-05-10 13:47:50 +03008510
8511struct mlx5_ifc_lagc_bits {
8512 u8 reserved_at_0[0x1d];
8513 u8 lag_state[0x3];
8514
8515 u8 reserved_at_20[0x14];
8516 u8 tx_remap_affinity_2[0x4];
8517 u8 reserved_at_38[0x4];
8518 u8 tx_remap_affinity_1[0x4];
8519};
8520
8521struct mlx5_ifc_create_lag_out_bits {
8522 u8 status[0x8];
8523 u8 reserved_at_8[0x18];
8524
8525 u8 syndrome[0x20];
8526
8527 u8 reserved_at_40[0x40];
8528};
8529
8530struct mlx5_ifc_create_lag_in_bits {
8531 u8 opcode[0x10];
8532 u8 reserved_at_10[0x10];
8533
8534 u8 reserved_at_20[0x10];
8535 u8 op_mod[0x10];
8536
8537 struct mlx5_ifc_lagc_bits ctx;
8538};
8539
8540struct mlx5_ifc_modify_lag_out_bits {
8541 u8 status[0x8];
8542 u8 reserved_at_8[0x18];
8543
8544 u8 syndrome[0x20];
8545
8546 u8 reserved_at_40[0x40];
8547};
8548
8549struct mlx5_ifc_modify_lag_in_bits {
8550 u8 opcode[0x10];
8551 u8 reserved_at_10[0x10];
8552
8553 u8 reserved_at_20[0x10];
8554 u8 op_mod[0x10];
8555
8556 u8 reserved_at_40[0x20];
8557 u8 field_select[0x20];
8558
8559 struct mlx5_ifc_lagc_bits ctx;
8560};
8561
8562struct mlx5_ifc_query_lag_out_bits {
8563 u8 status[0x8];
8564 u8 reserved_at_8[0x18];
8565
8566 u8 syndrome[0x20];
8567
8568 u8 reserved_at_40[0x40];
8569
8570 struct mlx5_ifc_lagc_bits ctx;
8571};
8572
8573struct mlx5_ifc_query_lag_in_bits {
8574 u8 opcode[0x10];
8575 u8 reserved_at_10[0x10];
8576
8577 u8 reserved_at_20[0x10];
8578 u8 op_mod[0x10];
8579
8580 u8 reserved_at_40[0x40];
8581};
8582
8583struct mlx5_ifc_destroy_lag_out_bits {
8584 u8 status[0x8];
8585 u8 reserved_at_8[0x18];
8586
8587 u8 syndrome[0x20];
8588
8589 u8 reserved_at_40[0x40];
8590};
8591
8592struct mlx5_ifc_destroy_lag_in_bits {
8593 u8 opcode[0x10];
8594 u8 reserved_at_10[0x10];
8595
8596 u8 reserved_at_20[0x10];
8597 u8 op_mod[0x10];
8598
8599 u8 reserved_at_40[0x40];
8600};
8601
8602struct mlx5_ifc_create_vport_lag_out_bits {
8603 u8 status[0x8];
8604 u8 reserved_at_8[0x18];
8605
8606 u8 syndrome[0x20];
8607
8608 u8 reserved_at_40[0x40];
8609};
8610
8611struct mlx5_ifc_create_vport_lag_in_bits {
8612 u8 opcode[0x10];
8613 u8 reserved_at_10[0x10];
8614
8615 u8 reserved_at_20[0x10];
8616 u8 op_mod[0x10];
8617
8618 u8 reserved_at_40[0x40];
8619};
8620
8621struct mlx5_ifc_destroy_vport_lag_out_bits {
8622 u8 status[0x8];
8623 u8 reserved_at_8[0x18];
8624
8625 u8 syndrome[0x20];
8626
8627 u8 reserved_at_40[0x40];
8628};
8629
8630struct mlx5_ifc_destroy_vport_lag_in_bits {
8631 u8 opcode[0x10];
8632 u8 reserved_at_10[0x10];
8633
8634 u8 reserved_at_20[0x10];
8635 u8 op_mod[0x10];
8636
8637 u8 reserved_at_40[0x40];
8638};
8639
Eli Cohend29b7962014-10-02 12:19:43 +03008640#endif /* MLX5_IFC_H */