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Vinayak Holikattie0eca632013-02-25 21:44:33 +05301/*
2 * Universal Flash Storage Host controller driver
3 *
4 * This code is based on drivers/scsi/ufs/ufshcd.h
5 * Copyright (C) 2011-2013 Samsung India Software Operations
Yaniv Gardidc3c8d32016-02-01 15:02:46 +02006 * Copyright (c) 2013-2016, The Linux Foundation. All rights reserved.
Vinayak Holikattie0eca632013-02-25 21:44:33 +05307 *
8 * Authors:
9 * Santosh Yaraganavi <santosh.sy@samsung.com>
10 * Vinayak Holikatti <h.vinayak@samsung.com>
11 *
12 * This program is free software; you can redistribute it and/or
13 * modify it under the terms of the GNU General Public License
14 * as published by the Free Software Foundation; either version 2
15 * of the License, or (at your option) any later version.
16 * See the COPYING file in the top-level directory or visit
17 * <http://www.gnu.org/licenses/gpl-2.0.html>
18 *
19 * This program is distributed in the hope that it will be useful,
20 * but WITHOUT ANY WARRANTY; without even the implied warranty of
21 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
22 * GNU General Public License for more details.
23 *
24 * This program is provided "AS IS" and "WITH ALL FAULTS" and
25 * without warranty of any kind. You are solely responsible for
26 * determining the appropriateness of using and distributing
27 * the program and assume all risks associated with your exercise
28 * of rights with respect to the program, including but not limited
29 * to infringement of third party rights, the risks and costs of
30 * program errors, damage to or loss of data, programs or equipment,
31 * and unavailability or interruption of operations. Under no
32 * circumstances will the contributor of this Program be liable for
33 * any damages of any kind arising from your use or distribution of
34 * this program.
35 */
36
37#ifndef _UFSHCD_H
38#define _UFSHCD_H
39
40#include <linux/module.h>
41#include <linux/kernel.h>
42#include <linux/init.h>
43#include <linux/interrupt.h>
44#include <linux/io.h>
45#include <linux/delay.h>
46#include <linux/slab.h>
47#include <linux/spinlock.h>
48#include <linux/workqueue.h>
49#include <linux/errno.h>
50#include <linux/types.h>
51#include <linux/wait.h>
52#include <linux/bitops.h>
53#include <linux/pm_runtime.h>
54#include <linux/clk.h>
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +053055#include <linux/completion.h>
Sujit Reddy Thummaaa497612014-09-25 15:32:22 +030056#include <linux/regulator/consumer.h>
Vinayak Holikattie0eca632013-02-25 21:44:33 +053057
58#include <asm/irq.h>
59#include <asm/byteorder.h>
60#include <scsi/scsi.h>
61#include <scsi/scsi_cmnd.h>
62#include <scsi/scsi_host.h>
63#include <scsi/scsi_tcq.h>
64#include <scsi/scsi_dbg.h>
65#include <scsi/scsi_eh.h>
66
67#include "ufs.h"
68#include "ufshci.h"
69
70#define UFSHCD "ufshcd"
71#define UFSHCD_DRIVER_VERSION "0.2"
72
Sujit Reddy Thumma5c0c28a2014-09-25 15:32:21 +030073struct ufs_hba;
74
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +053075enum dev_cmd_type {
76 DEV_CMD_TYPE_NOP = 0x0,
Dolev Raviv68078d52013-07-30 00:35:58 +053077 DEV_CMD_TYPE_QUERY = 0x1,
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +053078};
79
Vinayak Holikattie0eca632013-02-25 21:44:33 +053080/**
81 * struct uic_command - UIC command structure
82 * @command: UIC command
83 * @argument1: UIC command argument 1
84 * @argument2: UIC command argument 2
85 * @argument3: UIC command argument 3
86 * @cmd_active: Indicate if UIC command is outstanding
87 * @result: UIC command result
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +053088 * @done: UIC command completion
Vinayak Holikattie0eca632013-02-25 21:44:33 +053089 */
90struct uic_command {
91 u32 command;
92 u32 argument1;
93 u32 argument2;
94 u32 argument3;
95 int cmd_active;
96 int result;
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +053097 struct completion done;
Vinayak Holikattie0eca632013-02-25 21:44:33 +053098};
99
Subhash Jadavani57d104c2014-09-25 15:32:30 +0300100/* Used to differentiate the power management options */
101enum ufs_pm_op {
102 UFS_RUNTIME_PM,
103 UFS_SYSTEM_PM,
104 UFS_SHUTDOWN_PM,
105};
106
107#define ufshcd_is_runtime_pm(op) ((op) == UFS_RUNTIME_PM)
108#define ufshcd_is_system_pm(op) ((op) == UFS_SYSTEM_PM)
109#define ufshcd_is_shutdown_pm(op) ((op) == UFS_SHUTDOWN_PM)
110
111/* Host <-> Device UniPro Link state */
112enum uic_link_state {
113 UIC_LINK_OFF_STATE = 0, /* Link powered down or disabled */
114 UIC_LINK_ACTIVE_STATE = 1, /* Link is in Fast/Slow/Sleep state */
115 UIC_LINK_HIBERN8_STATE = 2, /* Link is in Hibernate state */
116};
117
118#define ufshcd_is_link_off(hba) ((hba)->uic_link_state == UIC_LINK_OFF_STATE)
119#define ufshcd_is_link_active(hba) ((hba)->uic_link_state == \
120 UIC_LINK_ACTIVE_STATE)
121#define ufshcd_is_link_hibern8(hba) ((hba)->uic_link_state == \
122 UIC_LINK_HIBERN8_STATE)
123#define ufshcd_set_link_off(hba) ((hba)->uic_link_state = UIC_LINK_OFF_STATE)
124#define ufshcd_set_link_active(hba) ((hba)->uic_link_state = \
125 UIC_LINK_ACTIVE_STATE)
126#define ufshcd_set_link_hibern8(hba) ((hba)->uic_link_state = \
127 UIC_LINK_HIBERN8_STATE)
128
129/*
130 * UFS Power management levels.
131 * Each level is in increasing order of power savings.
132 */
133enum ufs_pm_level {
134 UFS_PM_LVL_0, /* UFS_ACTIVE_PWR_MODE, UIC_LINK_ACTIVE_STATE */
135 UFS_PM_LVL_1, /* UFS_ACTIVE_PWR_MODE, UIC_LINK_HIBERN8_STATE */
136 UFS_PM_LVL_2, /* UFS_SLEEP_PWR_MODE, UIC_LINK_ACTIVE_STATE */
137 UFS_PM_LVL_3, /* UFS_SLEEP_PWR_MODE, UIC_LINK_HIBERN8_STATE */
138 UFS_PM_LVL_4, /* UFS_POWERDOWN_PWR_MODE, UIC_LINK_HIBERN8_STATE */
139 UFS_PM_LVL_5, /* UFS_POWERDOWN_PWR_MODE, UIC_LINK_OFF_STATE */
140 UFS_PM_LVL_MAX
141};
142
143struct ufs_pm_lvl_states {
144 enum ufs_dev_pwr_mode dev_state;
145 enum uic_link_state link_state;
146};
147
Vinayak Holikattie0eca632013-02-25 21:44:33 +0530148/**
149 * struct ufshcd_lrb - local reference block
150 * @utr_descriptor_ptr: UTRD address of the command
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +0530151 * @ucd_req_ptr: UCD address of the command
Vinayak Holikattie0eca632013-02-25 21:44:33 +0530152 * @ucd_rsp_ptr: Response UPIU address for this command
153 * @ucd_prdt_ptr: PRDT address of the command
154 * @cmd: pointer to SCSI command
155 * @sense_buffer: pointer to sense buffer address of the SCSI command
156 * @sense_bufflen: Length of the sense buffer
157 * @scsi_status: SCSI status of the command
158 * @command_type: SCSI, UFS, Query.
159 * @task_tag: Task tag of the command
160 * @lun: LUN of the command
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +0530161 * @intr_cmd: Interrupt command (doesn't participate in interrupt aggregation)
Vinayak Holikattie0eca632013-02-25 21:44:33 +0530162 */
163struct ufshcd_lrb {
164 struct utp_transfer_req_desc *utr_descriptor_ptr;
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +0530165 struct utp_upiu_req *ucd_req_ptr;
Vinayak Holikattie0eca632013-02-25 21:44:33 +0530166 struct utp_upiu_rsp *ucd_rsp_ptr;
167 struct ufshcd_sg_entry *ucd_prdt_ptr;
168
169 struct scsi_cmnd *cmd;
170 u8 *sense_buffer;
171 unsigned int sense_bufflen;
172 int scsi_status;
173
174 int command_type;
175 int task_tag;
Subhash Jadavani0ce147d2014-09-25 15:32:29 +0300176 u8 lun; /* UPIU LUN id field is only 8-bit wide */
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +0530177 bool intr_cmd;
Vinayak Holikattie0eca632013-02-25 21:44:33 +0530178};
179
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +0530180/**
Tomas Winklera230c2f2016-02-09 10:25:41 +0200181 * struct ufs_query - holds relevant data structures for query request
Dolev Raviv68078d52013-07-30 00:35:58 +0530182 * @request: request upiu and function
183 * @descriptor: buffer for sending/receiving descriptor
184 * @response: response upiu and response
185 */
186struct ufs_query {
187 struct ufs_query_req request;
188 u8 *descriptor;
189 struct ufs_query_res response;
190};
191
192/**
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +0530193 * struct ufs_dev_cmd - all assosiated fields with device management commands
194 * @type: device management command type - Query, NOP OUT
195 * @lock: lock to allow one command at a time
196 * @complete: internal commands completion
197 * @tag_wq: wait queue until free command slot is available
198 */
199struct ufs_dev_cmd {
200 enum dev_cmd_type type;
201 struct mutex lock;
202 struct completion *complete;
203 wait_queue_head_t tag_wq;
Dolev Raviv68078d52013-07-30 00:35:58 +0530204 struct ufs_query query;
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +0530205};
Vinayak Holikattie0eca632013-02-25 21:44:33 +0530206
Sujit Reddy Thummac6e79da2014-09-25 15:32:23 +0300207/**
208 * struct ufs_clk_info - UFS clock related info
209 * @list: list headed by hba->clk_list_head
210 * @clk: clock node
211 * @name: clock name
212 * @max_freq: maximum frequency supported by the clock
Sahitya Tummala4cff6d992014-09-25 15:32:33 +0300213 * @min_freq: min frequency that can be used for clock scaling
Sahitya Tummala856b3482014-09-25 15:32:34 +0300214 * @curr_freq: indicates the current frequency that it is set to
Sujit Reddy Thummac6e79da2014-09-25 15:32:23 +0300215 * @enabled: variable to check against multiple enable/disable
216 */
217struct ufs_clk_info {
218 struct list_head list;
219 struct clk *clk;
220 const char *name;
221 u32 max_freq;
Sahitya Tummala4cff6d992014-09-25 15:32:33 +0300222 u32 min_freq;
Sahitya Tummala856b3482014-09-25 15:32:34 +0300223 u32 curr_freq;
Sujit Reddy Thummac6e79da2014-09-25 15:32:23 +0300224 bool enabled;
225};
226
Yaniv Gardif06fcc72015-10-28 13:15:51 +0200227enum ufs_notify_change_status {
228 PRE_CHANGE,
229 POST_CHANGE,
230};
Dolev Raviv7eb584d2014-09-25 15:32:31 +0300231
232struct ufs_pa_layer_attr {
233 u32 gear_rx;
234 u32 gear_tx;
235 u32 lane_rx;
236 u32 lane_tx;
237 u32 pwr_rx;
238 u32 pwr_tx;
239 u32 hs_rate;
240};
241
242struct ufs_pwr_mode_info {
243 bool is_valid;
244 struct ufs_pa_layer_attr info;
245};
246
Sujit Reddy Thumma5c0c28a2014-09-25 15:32:21 +0300247/**
248 * struct ufs_hba_variant_ops - variant specific callbacks
249 * @name: variant name
250 * @init: called when the driver is initialized
251 * @exit: called to cleanup everything done in init
Yaniv Gardi9949e702015-05-17 18:55:05 +0300252 * @get_ufs_hci_version: called to get UFS HCI version
Sahitya Tummala856b3482014-09-25 15:32:34 +0300253 * @clk_scale_notify: notifies that clks are scaled up/down
Sujit Reddy Thumma5c0c28a2014-09-25 15:32:21 +0300254 * @setup_clocks: called before touching any of the controller registers
255 * @setup_regulators: called before accessing the host controller
256 * @hce_enable_notify: called before and after HCE enable bit is set to allow
257 * variant specific Uni-Pro initialization.
258 * @link_startup_notify: called before and after Link startup is carried out
259 * to allow variant specific Uni-Pro initialization.
Dolev Raviv7eb584d2014-09-25 15:32:31 +0300260 * @pwr_change_notify: called before and after a power mode change
261 * is carried out to allow vendor spesific capabilities
262 * to be set.
Subhash Jadavani57d104c2014-09-25 15:32:30 +0300263 * @suspend: called during host controller PM callback
264 * @resume: called during host controller PM callback
Yaniv Gardi6e3fd442015-10-28 13:15:50 +0200265 * @dbg_register_dump: used to dump controller debug information
Sujit Reddy Thumma5c0c28a2014-09-25 15:32:21 +0300266 */
267struct ufs_hba_variant_ops {
268 const char *name;
269 int (*init)(struct ufs_hba *);
270 void (*exit)(struct ufs_hba *);
Yaniv Gardi9949e702015-05-17 18:55:05 +0300271 u32 (*get_ufs_hci_version)(struct ufs_hba *);
Yaniv Gardif06fcc72015-10-28 13:15:51 +0200272 int (*clk_scale_notify)(struct ufs_hba *, bool,
273 enum ufs_notify_change_status);
274 int (*setup_clocks)(struct ufs_hba *, bool);
Sujit Reddy Thumma5c0c28a2014-09-25 15:32:21 +0300275 int (*setup_regulators)(struct ufs_hba *, bool);
Yaniv Gardif06fcc72015-10-28 13:15:51 +0200276 int (*hce_enable_notify)(struct ufs_hba *,
277 enum ufs_notify_change_status);
278 int (*link_startup_notify)(struct ufs_hba *,
279 enum ufs_notify_change_status);
Dolev Raviv7eb584d2014-09-25 15:32:31 +0300280 int (*pwr_change_notify)(struct ufs_hba *,
Yaniv Gardif06fcc72015-10-28 13:15:51 +0200281 enum ufs_notify_change_status status,
282 struct ufs_pa_layer_attr *,
Dolev Raviv7eb584d2014-09-25 15:32:31 +0300283 struct ufs_pa_layer_attr *);
Subhash Jadavani57d104c2014-09-25 15:32:30 +0300284 int (*suspend)(struct ufs_hba *, enum ufs_pm_op);
285 int (*resume)(struct ufs_hba *, enum ufs_pm_op);
Yaniv Gardi6e3fd442015-10-28 13:15:50 +0200286 void (*dbg_register_dump)(struct ufs_hba *hba);
Sujit Reddy Thumma5c0c28a2014-09-25 15:32:21 +0300287};
288
Sahitya Tummala1ab27c92014-09-25 15:32:32 +0300289/* clock gating state */
290enum clk_gating_state {
291 CLKS_OFF,
292 CLKS_ON,
293 REQ_CLKS_OFF,
294 REQ_CLKS_ON,
295};
296
297/**
298 * struct ufs_clk_gating - UFS clock gating related info
299 * @gate_work: worker to turn off clocks after some delay as specified in
300 * delay_ms
301 * @ungate_work: worker to turn on clocks that will be used in case of
302 * interrupt context
303 * @state: the current clocks state
304 * @delay_ms: gating delay in ms
305 * @is_suspended: clk gating is suspended when set to 1 which can be used
306 * during suspend/resume
307 * @delay_attr: sysfs attribute to control delay_attr
308 * @active_reqs: number of requests that are pending and should be waited for
309 * completion before gating clocks.
310 */
311struct ufs_clk_gating {
312 struct delayed_work gate_work;
313 struct work_struct ungate_work;
314 enum clk_gating_state state;
315 unsigned long delay_ms;
316 bool is_suspended;
317 struct device_attribute delay_attr;
318 int active_reqs;
319};
320
Sahitya Tummala856b3482014-09-25 15:32:34 +0300321struct ufs_clk_scaling {
322 ktime_t busy_start_t;
323 bool is_busy_started;
324 unsigned long tot_busy_t;
325 unsigned long window_start_t;
326};
327
Vinayak Holikattie0eca632013-02-25 21:44:33 +0530328/**
Yaniv Gardi3a4bf062014-09-25 15:32:27 +0300329 * struct ufs_init_prefetch - contains data that is pre-fetched once during
330 * initialization
331 * @icc_level: icc level which was read during initialization
332 */
333struct ufs_init_prefetch {
334 u32 icc_level;
335};
336
337/**
Vinayak Holikattie0eca632013-02-25 21:44:33 +0530338 * struct ufs_hba - per adapter private structure
339 * @mmio_base: UFSHCI base register address
340 * @ucdl_base_addr: UFS Command Descriptor base address
341 * @utrdl_base_addr: UTP Transfer Request Descriptor base address
342 * @utmrdl_base_addr: UTP Task Management Descriptor base address
343 * @ucdl_dma_addr: UFS Command Descriptor DMA address
344 * @utrdl_dma_addr: UTRDL DMA address
345 * @utmrdl_dma_addr: UTMRDL DMA address
346 * @host: Scsi_Host instance of the driver
347 * @dev: device handle
348 * @lrb: local reference block
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +0530349 * @lrb_in_use: lrb in use
Vinayak Holikattie0eca632013-02-25 21:44:33 +0530350 * @outstanding_tasks: Bits representing outstanding task requests
351 * @outstanding_reqs: Bits representing outstanding transfer requests
352 * @capabilities: UFS Controller Capabilities
353 * @nutrs: Transfer Request Queue depth supported by controller
354 * @nutmrs: Task Management Queue depth supported by controller
355 * @ufs_version: UFS Version to which controller complies
Sujit Reddy Thumma5c0c28a2014-09-25 15:32:21 +0300356 * @vops: pointer to variant specific operations
357 * @priv: pointer to variant specific private data
Vinayak Holikattie0eca632013-02-25 21:44:33 +0530358 * @irq: Irq number of the controller
359 * @active_uic_cmd: handle of active UIC command
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +0530360 * @uic_cmd_mutex: mutex for uic command
Sujit Reddy Thummae2933132014-05-26 10:59:12 +0530361 * @tm_wq: wait queue for task management
362 * @tm_tag_wq: wait queue for free task management slots
363 * @tm_slots_in_use: bit map of task management request slots in use
Seungwon Jeon53b3d9c2013-08-31 21:40:22 +0530364 * @pwr_done: completion for power mode change
Vinayak Holikattie0eca632013-02-25 21:44:33 +0530365 * @tm_condition: condition variable for task management
366 * @ufshcd_state: UFSHCD states
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +0530367 * @eh_flags: Error handling flags
Seungwon Jeon2fbd0092013-06-26 22:39:27 +0530368 * @intr_mask: Interrupt Mask Bits
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +0530369 * @ee_ctrl_mask: Exception event control mask
Sujit Reddy Thumma1d337ec2014-09-25 15:32:26 +0300370 * @is_powered: flag to check if HBA is powered
Yaniv Gardi3a4bf062014-09-25 15:32:27 +0300371 * @is_init_prefetch: flag to check if data was pre-fetched in initialization
372 * @init_prefetch_data: data pre-fetched during initialization
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +0530373 * @eh_work: Worker to handle UFS errors that require s/w attention
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +0530374 * @eeh_work: Worker to handle exception events
Vinayak Holikattie0eca632013-02-25 21:44:33 +0530375 * @errors: HBA errors
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +0530376 * @uic_error: UFS interconnect layer error status
377 * @saved_err: sticky error mask
378 * @saved_uic_err: sticky UIC error mask
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +0530379 * @dev_cmd: ufs device management command information
Yaniv Gardicad2e032015-03-31 17:37:14 +0300380 * @last_dme_cmd_tstamp: time stamp of the last completed DME command
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +0530381 * @auto_bkops_enabled: to track whether bkops is enabled in device
Sujit Reddy Thummaaa497612014-09-25 15:32:22 +0300382 * @vreg_info: UFS device voltage regulator information
Sujit Reddy Thummac6e79da2014-09-25 15:32:23 +0300383 * @clk_list_head: UFS host controller clocks list node head
Dolev Raviv7eb584d2014-09-25 15:32:31 +0300384 * @pwr_info: holds current power mode
385 * @max_pwr_info: keeps the device max valid pwm
Vinayak Holikattie0eca632013-02-25 21:44:33 +0530386 */
387struct ufs_hba {
388 void __iomem *mmio_base;
389
390 /* Virtual memory reference */
391 struct utp_transfer_cmd_desc *ucdl_base_addr;
392 struct utp_transfer_req_desc *utrdl_base_addr;
393 struct utp_task_req_desc *utmrdl_base_addr;
394
395 /* DMA memory reference */
396 dma_addr_t ucdl_dma_addr;
397 dma_addr_t utrdl_dma_addr;
398 dma_addr_t utmrdl_dma_addr;
399
400 struct Scsi_Host *host;
401 struct device *dev;
Subhash Jadavani2a8fa602014-09-25 15:32:28 +0300402 /*
403 * This field is to keep a reference to "scsi_device" corresponding to
404 * "UFS device" W-LU.
405 */
406 struct scsi_device *sdev_ufs_device;
Vinayak Holikattie0eca632013-02-25 21:44:33 +0530407
Subhash Jadavani57d104c2014-09-25 15:32:30 +0300408 enum ufs_dev_pwr_mode curr_dev_pwr_mode;
409 enum uic_link_state uic_link_state;
410 /* Desired UFS power management level during runtime PM */
411 enum ufs_pm_level rpm_lvl;
412 /* Desired UFS power management level during system PM */
413 enum ufs_pm_level spm_lvl;
414 int pm_op_in_progress;
415
Vinayak Holikattie0eca632013-02-25 21:44:33 +0530416 struct ufshcd_lrb *lrb;
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +0530417 unsigned long lrb_in_use;
Vinayak Holikattie0eca632013-02-25 21:44:33 +0530418
419 unsigned long outstanding_tasks;
420 unsigned long outstanding_reqs;
421
422 u32 capabilities;
423 int nutrs;
424 int nutmrs;
425 u32 ufs_version;
Sujit Reddy Thumma5c0c28a2014-09-25 15:32:21 +0300426 struct ufs_hba_variant_ops *vops;
427 void *priv;
Vinayak Holikattie0eca632013-02-25 21:44:33 +0530428 unsigned int irq;
Subhash Jadavani57d104c2014-09-25 15:32:30 +0300429 bool is_irq_enabled;
Vinayak Holikattie0eca632013-02-25 21:44:33 +0530430
Yaniv Gardib8521902015-05-17 18:54:57 +0300431 /* Interrupt aggregation support is broken */
432 #define UFSHCD_QUIRK_BROKEN_INTR_AGGR UFS_BIT(0)
433
Yaniv Gardicad2e032015-03-31 17:37:14 +0300434 /*
435 * delay before each dme command is required as the unipro
436 * layer has shown instabilities
437 */
Yaniv Gardib8521902015-05-17 18:54:57 +0300438 #define UFSHCD_QUIRK_DELAY_BEFORE_DME_CMDS UFS_BIT(1)
439
Yaniv Gardi7ca38cf2015-05-17 18:54:59 +0300440 /*
441 * If UFS host controller is having issue in processing LCC (Line
442 * Control Command) coming from device then enable this quirk.
443 * When this quirk is enabled, host controller driver should disable
444 * the LCC transmission on UFS device (by clearing TX_LCC_ENABLE
445 * attribute of device to 0).
446 */
447 #define UFSHCD_QUIRK_BROKEN_LCC UFS_BIT(2)
Yaniv Gardicad2e032015-03-31 17:37:14 +0300448
Yaniv Gardic3a2f9e2015-05-17 18:55:01 +0300449 /*
450 * The attribute PA_RXHSUNTERMCAP specifies whether or not the
451 * inbound Link supports unterminated line in HS mode. Setting this
452 * attribute to 1 fixes moving to HS gear.
453 */
454 #define UFSHCD_QUIRK_BROKEN_PA_RXHSUNTERMCAP UFS_BIT(3)
455
Yaniv Gardi874237f2015-05-17 18:55:03 +0300456 /*
457 * This quirk needs to be enabled if the host contoller only allows
458 * accessing the peer dme attributes in AUTO mode (FAST AUTO or
459 * SLOW AUTO).
460 */
461 #define UFSHCD_QUIRK_DME_PEER_ACCESS_AUTO_MODE UFS_BIT(4)
462
Yaniv Gardi9949e702015-05-17 18:55:05 +0300463 /*
464 * This quirk needs to be enabled if the host contoller doesn't
465 * advertise the correct version in UFS_VER register. If this quirk
466 * is enabled, standard UFS host driver will call the vendor specific
467 * ops (get_ufs_hci_version) to get the correct version.
468 */
469 #define UFSHCD_QUIRK_BROKEN_UFS_HCI_VERSION UFS_BIT(5)
470
Yaniv Gardicad2e032015-03-31 17:37:14 +0300471 unsigned int quirks; /* Deviations from standard UFSHCI spec. */
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +0530472
Sujit Reddy Thummae2933132014-05-26 10:59:12 +0530473 wait_queue_head_t tm_wq;
474 wait_queue_head_t tm_tag_wq;
Vinayak Holikattie0eca632013-02-25 21:44:33 +0530475 unsigned long tm_condition;
Sujit Reddy Thummae2933132014-05-26 10:59:12 +0530476 unsigned long tm_slots_in_use;
Vinayak Holikattie0eca632013-02-25 21:44:33 +0530477
Subhash Jadavani57d104c2014-09-25 15:32:30 +0300478 struct uic_command *active_uic_cmd;
479 struct mutex uic_cmd_mutex;
480 struct completion *uic_async_done;
Seungwon Jeon53b3d9c2013-08-31 21:40:22 +0530481
Vinayak Holikattie0eca632013-02-25 21:44:33 +0530482 u32 ufshcd_state;
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +0530483 u32 eh_flags;
Seungwon Jeon2fbd0092013-06-26 22:39:27 +0530484 u32 intr_mask;
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +0530485 u16 ee_ctrl_mask;
Sujit Reddy Thumma1d337ec2014-09-25 15:32:26 +0300486 bool is_powered;
Yaniv Gardi3a4bf062014-09-25 15:32:27 +0300487 bool is_init_prefetch;
488 struct ufs_init_prefetch init_prefetch_data;
Vinayak Holikattie0eca632013-02-25 21:44:33 +0530489
490 /* Work Queues */
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +0530491 struct work_struct eh_work;
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +0530492 struct work_struct eeh_work;
Vinayak Holikattie0eca632013-02-25 21:44:33 +0530493
494 /* HBA Errors */
495 u32 errors;
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +0530496 u32 uic_error;
497 u32 saved_err;
498 u32 saved_uic_err;
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +0530499
500 /* Device management request data */
501 struct ufs_dev_cmd dev_cmd;
Yaniv Gardicad2e032015-03-31 17:37:14 +0300502 ktime_t last_dme_cmd_tstamp;
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +0530503
Subhash Jadavani57d104c2014-09-25 15:32:30 +0300504 /* Keeps information of the UFS device connected to this host */
505 struct ufs_dev_info dev_info;
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +0530506 bool auto_bkops_enabled;
Sujit Reddy Thummaaa497612014-09-25 15:32:22 +0300507 struct ufs_vreg_info vreg_info;
Sujit Reddy Thummac6e79da2014-09-25 15:32:23 +0300508 struct list_head clk_list_head;
Subhash Jadavani57d104c2014-09-25 15:32:30 +0300509
510 bool wlun_dev_clr_ua;
Dolev Raviv7eb584d2014-09-25 15:32:31 +0300511
Yaniv Gardi54b879b2016-03-10 17:37:05 +0200512 /* Number of lanes available (1 or 2) for Rx/Tx */
513 u32 lanes_per_direction;
Dolev Raviv7eb584d2014-09-25 15:32:31 +0300514 struct ufs_pa_layer_attr pwr_info;
515 struct ufs_pwr_mode_info max_pwr_info;
Sahitya Tummala1ab27c92014-09-25 15:32:32 +0300516
517 struct ufs_clk_gating clk_gating;
518 /* Control to enable/disable host capabilities */
519 u32 caps;
520 /* Allow dynamic clk gating */
521#define UFSHCD_CAP_CLK_GATING (1 << 0)
522 /* Allow hiberb8 with clk gating */
523#define UFSHCD_CAP_HIBERN8_WITH_CLK_GATING (1 << 1)
Sahitya Tummala856b3482014-09-25 15:32:34 +0300524 /* Allow dynamic clk scaling */
525#define UFSHCD_CAP_CLK_SCALING (1 << 2)
Subhash Jadavani374a2462014-09-25 15:32:35 +0300526 /* Allow auto bkops to enabled during runtime suspend */
527#define UFSHCD_CAP_AUTO_BKOPS_SUSPEND (1 << 3)
Yaniv Gardib8521902015-05-17 18:54:57 +0300528 /*
529 * This capability allows host controller driver to use the UFS HCI's
530 * interrupt aggregation capability.
531 * CAUTION: Enabling this might reduce overall UFS throughput.
532 */
533#define UFSHCD_CAP_INTR_AGGR (1 << 4)
Sahitya Tummala856b3482014-09-25 15:32:34 +0300534
535 struct devfreq *devfreq;
536 struct ufs_clk_scaling clk_scaling;
Dolev Ravive7850602014-09-25 15:32:36 +0300537 bool is_sys_suspended;
Vinayak Holikattie0eca632013-02-25 21:44:33 +0530538};
539
Sahitya Tummala1ab27c92014-09-25 15:32:32 +0300540/* Returns true if clocks can be gated. Otherwise false */
541static inline bool ufshcd_is_clkgating_allowed(struct ufs_hba *hba)
542{
543 return hba->caps & UFSHCD_CAP_CLK_GATING;
544}
545static inline bool ufshcd_can_hibern8_during_gating(struct ufs_hba *hba)
546{
547 return hba->caps & UFSHCD_CAP_HIBERN8_WITH_CLK_GATING;
548}
Sahitya Tummala856b3482014-09-25 15:32:34 +0300549static inline int ufshcd_is_clkscaling_enabled(struct ufs_hba *hba)
550{
551 return hba->caps & UFSHCD_CAP_CLK_SCALING;
552}
Subhash Jadavani374a2462014-09-25 15:32:35 +0300553static inline bool ufshcd_can_autobkops_during_suspend(struct ufs_hba *hba)
554{
555 return hba->caps & UFSHCD_CAP_AUTO_BKOPS_SUSPEND;
556}
557
Yaniv Gardib8521902015-05-17 18:54:57 +0300558static inline bool ufshcd_is_intr_aggr_allowed(struct ufs_hba *hba)
559{
560 if ((hba->caps & UFSHCD_CAP_INTR_AGGR) &&
561 !(hba->quirks & UFSHCD_QUIRK_BROKEN_INTR_AGGR))
562 return true;
563 else
564 return false;
565}
566
Seungwon Jeonb873a2752013-06-26 22:39:26 +0530567#define ufshcd_writel(hba, val, reg) \
568 writel((val), (hba)->mmio_base + (reg))
569#define ufshcd_readl(hba, reg) \
570 readl((hba)->mmio_base + (reg))
571
Dolev Ravive7850602014-09-25 15:32:36 +0300572/**
573 * ufshcd_rmwl - read modify write into a register
574 * @hba - per adapter instance
575 * @mask - mask to apply on read value
576 * @val - actual value to write
577 * @reg - register address
578 */
579static inline void ufshcd_rmwl(struct ufs_hba *hba, u32 mask, u32 val, u32 reg)
580{
581 u32 tmp;
582
583 tmp = ufshcd_readl(hba, reg);
584 tmp &= ~mask;
585 tmp |= (val & mask);
586 ufshcd_writel(hba, tmp, reg);
587}
588
Sujit Reddy Thumma5c0c28a2014-09-25 15:32:21 +0300589int ufshcd_alloc_host(struct device *, struct ufs_hba **);
Yaniv Gardi47555a52015-10-28 13:15:49 +0200590void ufshcd_dealloc_host(struct ufs_hba *);
Sujit Reddy Thumma5c0c28a2014-09-25 15:32:21 +0300591int ufshcd_init(struct ufs_hba * , void __iomem * , unsigned int);
Vinayak Holikattie0eca632013-02-25 21:44:33 +0530592void ufshcd_remove(struct ufs_hba *);
593
594/**
595 * ufshcd_hba_stop - Send controller to reset state
596 * @hba: per adapter instance
597 */
598static inline void ufshcd_hba_stop(struct ufs_hba *hba)
599{
Seungwon Jeonb873a2752013-06-26 22:39:26 +0530600 ufshcd_writel(hba, CONTROLLER_DISABLE, REG_CONTROLLER_ENABLE);
Vinayak Holikattie0eca632013-02-25 21:44:33 +0530601}
602
Dolev Raviv68078d52013-07-30 00:35:58 +0530603static inline void check_upiu_size(void)
604{
605 BUILD_BUG_ON(ALIGNED_UPIU_SIZE <
606 GENERAL_UPIU_REQUEST_SIZE + QUERY_DESC_MAX_SIZE);
607}
608
Yaniv Gardi1ce58982015-10-28 13:15:47 +0200609/**
610 * ufshcd_set_variant - set variant specific data to the hba
611 * @hba - per adapter instance
612 * @variant - pointer to variant specific data
613 */
614static inline void ufshcd_set_variant(struct ufs_hba *hba, void *variant)
615{
616 BUG_ON(!hba);
617 hba->priv = variant;
618}
619
620/**
621 * ufshcd_get_variant - get variant specific data from the hba
622 * @hba - per adapter instance
623 */
624static inline void *ufshcd_get_variant(struct ufs_hba *hba)
625{
626 BUG_ON(!hba);
627 return hba->priv;
628}
629
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +0530630extern int ufshcd_runtime_suspend(struct ufs_hba *hba);
631extern int ufshcd_runtime_resume(struct ufs_hba *hba);
632extern int ufshcd_runtime_idle(struct ufs_hba *hba);
Subhash Jadavani57d104c2014-09-25 15:32:30 +0300633extern int ufshcd_system_suspend(struct ufs_hba *hba);
634extern int ufshcd_system_resume(struct ufs_hba *hba);
635extern int ufshcd_shutdown(struct ufs_hba *hba);
Seungwon Jeon12b4fdb2013-08-31 21:40:21 +0530636extern int ufshcd_dme_set_attr(struct ufs_hba *hba, u32 attr_sel,
637 u8 attr_set, u32 mib_val, u8 peer);
638extern int ufshcd_dme_get_attr(struct ufs_hba *hba, u32 attr_sel,
639 u32 *mib_val, u8 peer);
640
641/* UIC command interfaces for DME primitives */
642#define DME_LOCAL 0
643#define DME_PEER 1
644#define ATTR_SET_NOR 0 /* NORMAL */
645#define ATTR_SET_ST 1 /* STATIC */
646
647static inline int ufshcd_dme_set(struct ufs_hba *hba, u32 attr_sel,
648 u32 mib_val)
649{
650 return ufshcd_dme_set_attr(hba, attr_sel, ATTR_SET_NOR,
651 mib_val, DME_LOCAL);
652}
653
654static inline int ufshcd_dme_st_set(struct ufs_hba *hba, u32 attr_sel,
655 u32 mib_val)
656{
657 return ufshcd_dme_set_attr(hba, attr_sel, ATTR_SET_ST,
658 mib_val, DME_LOCAL);
659}
660
661static inline int ufshcd_dme_peer_set(struct ufs_hba *hba, u32 attr_sel,
662 u32 mib_val)
663{
664 return ufshcd_dme_set_attr(hba, attr_sel, ATTR_SET_NOR,
665 mib_val, DME_PEER);
666}
667
668static inline int ufshcd_dme_peer_st_set(struct ufs_hba *hba, u32 attr_sel,
669 u32 mib_val)
670{
671 return ufshcd_dme_set_attr(hba, attr_sel, ATTR_SET_ST,
672 mib_val, DME_PEER);
673}
674
675static inline int ufshcd_dme_get(struct ufs_hba *hba,
676 u32 attr_sel, u32 *mib_val)
677{
678 return ufshcd_dme_get_attr(hba, attr_sel, mib_val, DME_LOCAL);
679}
680
681static inline int ufshcd_dme_peer_get(struct ufs_hba *hba,
682 u32 attr_sel, u32 *mib_val)
683{
684 return ufshcd_dme_get_attr(hba, attr_sel, mib_val, DME_PEER);
685}
686
Yaniv Gardidc3c8d32016-02-01 15:02:46 +0200687/* Expose Query-Request API */
688int ufshcd_query_flag(struct ufs_hba *hba, enum query_opcode opcode,
689 enum flag_idn idn, bool *flag_res);
Sahitya Tummala1ab27c92014-09-25 15:32:32 +0300690int ufshcd_hold(struct ufs_hba *hba, bool async);
691void ufshcd_release(struct ufs_hba *hba);
Yaniv Gardi0263bcd2015-10-28 13:15:48 +0200692
693/* Wrapper functions for safely calling variant operations */
694static inline const char *ufshcd_get_var_name(struct ufs_hba *hba)
695{
696 if (hba->vops)
697 return hba->vops->name;
698 return "";
699}
700
701static inline int ufshcd_vops_init(struct ufs_hba *hba)
702{
703 if (hba->vops && hba->vops->init)
704 return hba->vops->init(hba);
705
706 return 0;
707}
708
709static inline void ufshcd_vops_exit(struct ufs_hba *hba)
710{
711 if (hba->vops && hba->vops->exit)
712 return hba->vops->exit(hba);
713}
714
715static inline u32 ufshcd_vops_get_ufs_hci_version(struct ufs_hba *hba)
716{
717 if (hba->vops && hba->vops->get_ufs_hci_version)
718 return hba->vops->get_ufs_hci_version(hba);
719
720 return ufshcd_readl(hba, REG_UFS_VERSION);
721}
722
Yaniv Gardif06fcc72015-10-28 13:15:51 +0200723static inline int ufshcd_vops_clk_scale_notify(struct ufs_hba *hba,
724 bool up, enum ufs_notify_change_status status)
Yaniv Gardi0263bcd2015-10-28 13:15:48 +0200725{
726 if (hba->vops && hba->vops->clk_scale_notify)
Yaniv Gardif06fcc72015-10-28 13:15:51 +0200727 return hba->vops->clk_scale_notify(hba, up, status);
728 return 0;
Yaniv Gardi0263bcd2015-10-28 13:15:48 +0200729}
730
731static inline int ufshcd_vops_setup_clocks(struct ufs_hba *hba, bool on)
732{
733 if (hba->vops && hba->vops->setup_clocks)
734 return hba->vops->setup_clocks(hba, on);
Yaniv Gardi0263bcd2015-10-28 13:15:48 +0200735 return 0;
736}
737
738static inline int ufshcd_vops_setup_regulators(struct ufs_hba *hba, bool status)
739{
740 if (hba->vops && hba->vops->setup_regulators)
741 return hba->vops->setup_regulators(hba, status);
742
743 return 0;
744}
745
746static inline int ufshcd_vops_hce_enable_notify(struct ufs_hba *hba,
747 bool status)
748{
749 if (hba->vops && hba->vops->hce_enable_notify)
750 return hba->vops->hce_enable_notify(hba, status);
751
752 return 0;
753}
754static inline int ufshcd_vops_link_startup_notify(struct ufs_hba *hba,
755 bool status)
756{
757 if (hba->vops && hba->vops->link_startup_notify)
758 return hba->vops->link_startup_notify(hba, status);
759
760 return 0;
761}
762
763static inline int ufshcd_vops_pwr_change_notify(struct ufs_hba *hba,
764 bool status,
765 struct ufs_pa_layer_attr *dev_max_params,
766 struct ufs_pa_layer_attr *dev_req_params)
767{
768 if (hba->vops && hba->vops->pwr_change_notify)
769 return hba->vops->pwr_change_notify(hba, status,
770 dev_max_params, dev_req_params);
771
772 return -ENOTSUPP;
773}
774
775static inline int ufshcd_vops_suspend(struct ufs_hba *hba, enum ufs_pm_op op)
776{
777 if (hba->vops && hba->vops->suspend)
778 return hba->vops->suspend(hba, op);
779
780 return 0;
781}
782
783static inline int ufshcd_vops_resume(struct ufs_hba *hba, enum ufs_pm_op op)
784{
785 if (hba->vops && hba->vops->resume)
786 return hba->vops->resume(hba, op);
787
788 return 0;
789}
790
Yaniv Gardi6e3fd442015-10-28 13:15:50 +0200791static inline void ufshcd_vops_dbg_register_dump(struct ufs_hba *hba)
792{
793 if (hba->vops && hba->vops->dbg_register_dump)
794 hba->vops->dbg_register_dump(hba);
795}
796
Vinayak Holikattie0eca632013-02-25 21:44:33 +0530797#endif /* End of Header */