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Alan Tull6a8c3be2015-10-07 16:36:28 +01001#
2# FPGA framework configuration
3#
4
Vincent Legoll50fa0282017-06-14 10:36:26 -05005menuconfig FPGA
Alan Tull6a8c3be2015-10-07 16:36:28 +01006 tristate "FPGA Configuration Framework"
7 help
8 Say Y here if you want support for configuring FPGAs from the
9 kernel. The FPGA framework adds a FPGA manager class and FPGA
10 manager drivers.
11
Alan Tullfab62662015-10-07 16:36:29 +010012if FPGA
13
Alan Tull0fa20cd2016-11-01 14:14:29 -050014config FPGA_REGION
15 tristate "FPGA Region"
16 depends on OF && FPGA_BRIDGE
17 help
18 FPGA Regions allow loading FPGA images under control of
19 the Device Tree.
20
Joel Holdsworth21f8ba22017-02-27 16:14:26 -060021config FPGA_MGR_ICE40_SPI
22 tristate "Lattice iCE40 SPI"
23 depends on OF && SPI
24 help
25 FPGA manager driver support for Lattice iCE40 FPGAs over SPI.
26
Joshua Clayton5692fae2017-06-14 10:36:29 -050027config FPGA_MGR_ALTERA_PS_SPI
28 tristate "Altera FPGA Passive Serial over SPI"
29 depends on SPI
30 help
31 FPGA manager driver support for Altera Arria/Cyclone/Stratix
32 using the passive serial interface over SPI.
33
Alan Tullfab62662015-10-07 16:36:29 +010034config FPGA_MGR_SOCFPGA
35 tristate "Altera SOCFPGA FPGA Manager"
Jason Gunthorpea0e1b612016-11-21 22:26:42 +000036 depends on ARCH_SOCFPGA || COMPILE_TEST
Alan Tullfab62662015-10-07 16:36:29 +010037 help
38 FPGA manager driver support for Altera SOCFPGA.
39
Alan Tullacbb910a2016-11-01 14:14:32 -050040config FPGA_MGR_SOCFPGA_A10
41 tristate "Altera SoCFPGA Arria10"
Jason Gunthorpea0e1b612016-11-21 22:26:42 +000042 depends on ARCH_SOCFPGA || COMPILE_TEST
43 select REGMAP_MMIO
Alan Tullacbb910a2016-11-01 14:14:32 -050044 help
45 FPGA manager driver support for Altera Arria10 SoCFPGA.
46
Florian Fainelli4348f7e2017-02-27 16:14:22 -060047config FPGA_MGR_TS73XX
48 tristate "Technologic Systems TS-73xx SBC FPGA Manager"
49 depends on ARCH_EP93XX && MACH_TS72XX
50 help
51 FPGA manager driver support for the Altera Cyclone II FPGA
52 present on the TS-73xx SBC boards.
53
Anatolij Gustschin061c97d2017-03-23 19:34:26 -050054config FPGA_MGR_XILINX_SPI
55 tristate "Xilinx Configuration over Slave Serial (SPI)"
56 depends on SPI
57 help
58 FPGA manager driver support for Xilinx FPGA configuration
59 over slave serial interface.
60
Moritz Fischer37784702015-10-16 15:42:30 -070061config FPGA_MGR_ZYNQ_FPGA
62 tristate "Xilinx Zynq FPGA"
Jean Delvare54e9b092016-09-08 09:38:05 -050063 depends on ARCH_ZYNQ || COMPILE_TEST
Sudip Mukherjee1c8cb402016-08-03 13:45:46 -070064 depends on HAS_DMA
Moritz Fischer37784702015-10-16 15:42:30 -070065 help
66 FPGA manager driver support for Xilinx Zynq FPGAs.
67
Alan Tull21aeda92016-11-01 14:14:28 -050068config FPGA_BRIDGE
69 tristate "FPGA Bridge Framework"
70 depends on OF
71 help
72 Say Y here if you want to support bridges connected between host
73 processors and FPGAs or between FPGAs.
74
Alan Tulle5f8efa2016-11-01 14:14:30 -050075config SOCFPGA_FPGA_BRIDGE
76 tristate "Altera SoCFPGA FPGA Bridges"
77 depends on ARCH_SOCFPGA && FPGA_BRIDGE
78 help
79 Say Y to enable drivers for FPGA bridges for Altera SOCFPGA
80 devices.
81
Alan Tullca24a642016-11-01 14:14:31 -050082config ALTERA_FREEZE_BRIDGE
83 tristate "Altera FPGA Freeze Bridge"
84 depends on ARCH_SOCFPGA && FPGA_BRIDGE
85 help
86 Say Y to enable drivers for Altera FPGA Freeze bridges. A
87 freeze bridge is a bridge that exists in the FPGA fabric to
88 isolate one region of the FPGA from the busses while that
89 region is being reprogrammed.
90
Matthew Gerlachd201cc12017-03-23 19:34:28 -050091config ALTERA_PR_IP_CORE
92 tristate "Altera Partial Reconfiguration IP Core"
93 help
94 Core driver support for Altera Partial Reconfiguration IP component
95
Matthew Gerlach5b73cb52017-03-23 19:34:30 -050096config ALTERA_PR_IP_CORE_PLAT
97 tristate "Platform support of Altera Partial Reconfiguration IP Core"
98 depends on ALTERA_PR_IP_CORE && OF && HAS_IOMEM
99 help
100 Platform driver support for Altera Partial Reconfiguration IP
101 component
102
Moritz Fischer7e961c12017-03-24 10:33:21 -0500103config XILINX_PR_DECOUPLER
104 tristate "Xilinx LogiCORE PR Decoupler"
105 depends on FPGA_BRIDGE
106 depends on HAS_IOMEM
107 help
108 Say Y to enable drivers for Xilinx LogiCORE PR Decoupler.
109 The PR Decoupler exists in the FPGA fabric to isolate one
110 region of the FPGA from the busses while that region is
111 being reprogrammed during partial reconfig.
112
Alan Tullfab62662015-10-07 16:36:29 +0100113endif # FPGA