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Vaibhav Hiremathddd04b92012-06-18 00:47:26 -06001/*
2 * AM33XX PRM_XXX register bits
3 *
4 * Copyright (C) 2011-2012 Texas Instruments Incorporated - http://www.ti.com/
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License as
8 * published by the Free Software Foundation version 2.
9 *
10 * This program is distributed "as is" WITHOUT ANY WARRANTY of any
11 * kind, whether express or implied; without even the implied warranty
12 * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
14 */
15
16#ifndef __ARCH_ARM_MACH_OMAP2_PRM_REGBITS_33XX_H
17#define __ARCH_ARM_MACH_OMAP2_PRM_REGBITS_33XX_H
18
19#include "prm.h"
20
Vaibhav Hiremathddd04b92012-06-18 00:47:26 -060021#define AM33XX_GFX_MEM_ONSTATE_MASK (0x3 << 17)
Vaibhav Hiremathddd04b92012-06-18 00:47:26 -060022#define AM33XX_GFX_MEM_RETSTATE_MASK (1 << 6)
Vaibhav Hiremathddd04b92012-06-18 00:47:26 -060023#define AM33XX_GFX_MEM_STATEST_MASK (0x3 << 4)
Vaibhav Hiremathddd04b92012-06-18 00:47:26 -060024#define AM33XX_GLOBAL_WARM_SW_RST_MASK (1 << 1)
Tony Lindgren7323f212013-08-28 22:24:13 -070025#define AM33XX_RST_GLOBAL_WARM_SW_MASK (1 << 0)
Vaibhav Hiremathddd04b92012-06-18 00:47:26 -060026#define AM33XX_PRUSS_MEM_ONSTATE_MASK (0x3 << 5)
Vaibhav Hiremathddd04b92012-06-18 00:47:26 -060027#define AM33XX_PRUSS_MEM_RETSTATE_MASK (1 << 7)
Vaibhav Hiremathddd04b92012-06-18 00:47:26 -060028#define AM33XX_PRUSS_MEM_STATEST_MASK (0x3 << 23)
Vaibhav Hiremathddd04b92012-06-18 00:47:26 -060029#define AM33XX_LASTPOWERSTATEENTERED_SHIFT 24
30#define AM33XX_LASTPOWERSTATEENTERED_MASK (0x3 << 24)
Vaibhav Hiremathddd04b92012-06-18 00:47:26 -060031#define AM33XX_LOGICRETSTATE_MASK (1 << 2)
Vaibhav Hiremathddd04b92012-06-18 00:47:26 -060032#define AM33XX_LOGICRETSTATE_3_3_MASK (1 << 3)
Vaibhav Hiremathddd04b92012-06-18 00:47:26 -060033#define AM33XX_LOGICSTATEST_SHIFT 2
34#define AM33XX_LOGICSTATEST_MASK (1 << 2)
Vaibhav Hiremathddd04b92012-06-18 00:47:26 -060035#define AM33XX_LOWPOWERSTATECHANGE_SHIFT 4
36#define AM33XX_LOWPOWERSTATECHANGE_MASK (1 << 4)
Vaibhav Hiremathddd04b92012-06-18 00:47:26 -060037#define AM33XX_MPU_L1_ONSTATE_MASK (0x3 << 18)
Vaibhav Hiremathddd04b92012-06-18 00:47:26 -060038#define AM33XX_MPU_L1_RETSTATE_MASK (1 << 22)
Vaibhav Hiremathddd04b92012-06-18 00:47:26 -060039#define AM33XX_MPU_L1_STATEST_MASK (0x3 << 6)
Vaibhav Hiremathddd04b92012-06-18 00:47:26 -060040#define AM33XX_MPU_L2_ONSTATE_MASK (0x3 << 20)
Vaibhav Hiremathddd04b92012-06-18 00:47:26 -060041#define AM33XX_MPU_L2_RETSTATE_MASK (1 << 23)
Vaibhav Hiremathddd04b92012-06-18 00:47:26 -060042#define AM33XX_MPU_L2_STATEST_MASK (0x3 << 8)
Vaibhav Hiremathddd04b92012-06-18 00:47:26 -060043#define AM33XX_MPU_RAM_ONSTATE_MASK (0x3 << 16)
Vaibhav Hiremathddd04b92012-06-18 00:47:26 -060044#define AM33XX_MPU_RAM_RETSTATE_MASK (1 << 24)
Vaibhav Hiremathddd04b92012-06-18 00:47:26 -060045#define AM33XX_MPU_RAM_STATEST_MASK (0x3 << 4)
Vaibhav Hiremathddd04b92012-06-18 00:47:26 -060046#define AM33XX_PER_MEM_ONSTATE_MASK (0x3 << 25)
Vaibhav Hiremathddd04b92012-06-18 00:47:26 -060047#define AM33XX_PER_MEM_RETSTATE_MASK (1 << 29)
Vaibhav Hiremathddd04b92012-06-18 00:47:26 -060048#define AM33XX_PER_MEM_STATEST_MASK (0x3 << 17)
Vaibhav Hiremathddd04b92012-06-18 00:47:26 -060049#define AM33XX_RAM_MEM_ONSTATE_MASK (0x3 << 30)
Vaibhav Hiremathddd04b92012-06-18 00:47:26 -060050#define AM33XX_RAM_MEM_RETSTATE_MASK (1 << 27)
Vaibhav Hiremathddd04b92012-06-18 00:47:26 -060051#define AM33XX_RAM_MEM_STATEST_MASK (0x3 << 21)
Vaibhav Hiremathddd04b92012-06-18 00:47:26 -060052#endif