Jerome Glisse | 771fe6b | 2009-06-05 14:42:42 +0200 | [diff] [blame] | 1 | /* |
| 2 | * Copyright 2009 Jerome Glisse. |
| 3 | * |
| 4 | * Permission is hereby granted, free of charge, to any person obtaining a |
| 5 | * copy of this software and associated documentation files (the "Software"), |
| 6 | * to deal in the Software without restriction, including without limitation |
| 7 | * the rights to use, copy, modify, merge, publish, distribute, sublicense, |
| 8 | * and/or sell copies of the Software, and to permit persons to whom the |
| 9 | * Software is furnished to do so, subject to the following conditions: |
| 10 | * |
| 11 | * The above copyright notice and this permission notice shall be included in |
| 12 | * all copies or substantial portions of the Software. |
| 13 | * |
| 14 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR |
| 15 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, |
| 16 | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL |
| 17 | * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR |
| 18 | * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, |
| 19 | * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR |
| 20 | * OTHER DEALINGS IN THE SOFTWARE. |
| 21 | * |
| 22 | * Authors: Jerome Glisse |
| 23 | */ |
| 24 | #include <drm/drmP.h> |
| 25 | #include <drm/radeon_drm.h> |
| 26 | #include "radeon_reg.h" |
| 27 | #include "radeon.h" |
| 28 | |
Ilija Hadzic | cc34051 | 2011-10-12 23:29:38 -0400 | [diff] [blame] | 29 | #define RADEON_BENCHMARK_COPY_BLIT 1 |
| 30 | #define RADEON_BENCHMARK_COPY_DMA 0 |
| 31 | |
| 32 | #define RADEON_BENCHMARK_ITERATIONS 1024 |
Ilija Hadzic | 638dd7d | 2011-10-12 23:29:39 -0400 | [diff] [blame] | 33 | #define RADEON_BENCHMARK_COMMON_MODES_N 17 |
Ilija Hadzic | cc34051 | 2011-10-12 23:29:38 -0400 | [diff] [blame] | 34 | |
| 35 | static int radeon_benchmark_do_move(struct radeon_device *rdev, unsigned size, |
| 36 | uint64_t saddr, uint64_t daddr, |
| 37 | int flag, int n) |
| 38 | { |
| 39 | unsigned long start_jiffies; |
| 40 | unsigned long end_jiffies; |
| 41 | struct radeon_fence *fence = NULL; |
| 42 | int i, r; |
| 43 | |
| 44 | start_jiffies = jiffies; |
| 45 | for (i = 0; i < n; i++) { |
Ilija Hadzic | cc34051 | 2011-10-12 23:29:38 -0400 | [diff] [blame] | 46 | switch (flag) { |
| 47 | case RADEON_BENCHMARK_COPY_DMA: |
Christian König | 57d20a4 | 2014-09-04 20:01:53 +0200 | [diff] [blame^] | 48 | fence = radeon_copy_dma(rdev, saddr, daddr, |
| 49 | size / RADEON_GPU_PAGE_SIZE, |
| 50 | NULL); |
Ilija Hadzic | cc34051 | 2011-10-12 23:29:38 -0400 | [diff] [blame] | 51 | break; |
| 52 | case RADEON_BENCHMARK_COPY_BLIT: |
Christian König | 57d20a4 | 2014-09-04 20:01:53 +0200 | [diff] [blame^] | 53 | fence = radeon_copy_blit(rdev, saddr, daddr, |
| 54 | size / RADEON_GPU_PAGE_SIZE, |
| 55 | NULL); |
Ilija Hadzic | cc34051 | 2011-10-12 23:29:38 -0400 | [diff] [blame] | 56 | break; |
| 57 | default: |
| 58 | DRM_ERROR("Unknown copy method\n"); |
Christian König | 57d20a4 | 2014-09-04 20:01:53 +0200 | [diff] [blame^] | 59 | return -EINVAL; |
Ilija Hadzic | cc34051 | 2011-10-12 23:29:38 -0400 | [diff] [blame] | 60 | } |
Christian König | 57d20a4 | 2014-09-04 20:01:53 +0200 | [diff] [blame^] | 61 | if (IS_ERR(fence)) |
| 62 | return PTR_ERR(fence); |
| 63 | |
Ilija Hadzic | cc34051 | 2011-10-12 23:29:38 -0400 | [diff] [blame] | 64 | r = radeon_fence_wait(fence, false); |
Ilija Hadzic | cc34051 | 2011-10-12 23:29:38 -0400 | [diff] [blame] | 65 | radeon_fence_unref(&fence); |
Christian König | 57d20a4 | 2014-09-04 20:01:53 +0200 | [diff] [blame^] | 66 | if (r) |
| 67 | return r; |
Ilija Hadzic | cc34051 | 2011-10-12 23:29:38 -0400 | [diff] [blame] | 68 | } |
| 69 | end_jiffies = jiffies; |
Christian König | 57d20a4 | 2014-09-04 20:01:53 +0200 | [diff] [blame^] | 70 | return jiffies_to_msecs(end_jiffies - start_jiffies); |
Ilija Hadzic | cc34051 | 2011-10-12 23:29:38 -0400 | [diff] [blame] | 71 | } |
| 72 | |
| 73 | |
| 74 | static void radeon_benchmark_log_results(int n, unsigned size, |
| 75 | unsigned int time, |
| 76 | unsigned sdomain, unsigned ddomain, |
| 77 | char *kind) |
| 78 | { |
| 79 | unsigned int throughput = (n * (size >> 10)) / time; |
| 80 | DRM_INFO("radeon: %s %u bo moves of %u kB from" |
| 81 | " %d to %d in %u ms, throughput: %u Mb/s or %u MB/s\n", |
| 82 | kind, n, size >> 10, sdomain, ddomain, time, |
| 83 | throughput * 8, throughput); |
| 84 | } |
| 85 | |
| 86 | static void radeon_benchmark_move(struct radeon_device *rdev, unsigned size, |
| 87 | unsigned sdomain, unsigned ddomain) |
Jerome Glisse | 771fe6b | 2009-06-05 14:42:42 +0200 | [diff] [blame] | 88 | { |
Jerome Glisse | 4c78867 | 2009-11-20 14:29:23 +0100 | [diff] [blame] | 89 | struct radeon_bo *dobj = NULL; |
| 90 | struct radeon_bo *sobj = NULL; |
Jerome Glisse | 771fe6b | 2009-06-05 14:42:42 +0200 | [diff] [blame] | 91 | uint64_t saddr, daddr; |
Ilija Hadzic | cc34051 | 2011-10-12 23:29:38 -0400 | [diff] [blame] | 92 | int r, n; |
Dan Carpenter | bfba165 | 2011-10-29 10:21:28 +0300 | [diff] [blame] | 93 | int time; |
Jerome Glisse | 771fe6b | 2009-06-05 14:42:42 +0200 | [diff] [blame] | 94 | |
Ilija Hadzic | cc34051 | 2011-10-12 23:29:38 -0400 | [diff] [blame] | 95 | n = RADEON_BENCHMARK_ITERATIONS; |
Michel Dänzer | 02376d8 | 2014-07-17 19:01:08 +0900 | [diff] [blame] | 96 | r = radeon_bo_create(rdev, size, PAGE_SIZE, true, sdomain, 0, NULL, &sobj); |
Jerome Glisse | 771fe6b | 2009-06-05 14:42:42 +0200 | [diff] [blame] | 97 | if (r) { |
| 98 | goto out_cleanup; |
| 99 | } |
Jerome Glisse | 4c78867 | 2009-11-20 14:29:23 +0100 | [diff] [blame] | 100 | r = radeon_bo_reserve(sobj, false); |
| 101 | if (unlikely(r != 0)) |
| 102 | goto out_cleanup; |
| 103 | r = radeon_bo_pin(sobj, sdomain, &saddr); |
| 104 | radeon_bo_unreserve(sobj); |
Jerome Glisse | 771fe6b | 2009-06-05 14:42:42 +0200 | [diff] [blame] | 105 | if (r) { |
| 106 | goto out_cleanup; |
| 107 | } |
Michel Dänzer | 02376d8 | 2014-07-17 19:01:08 +0900 | [diff] [blame] | 108 | r = radeon_bo_create(rdev, size, PAGE_SIZE, true, ddomain, 0, NULL, &dobj); |
Jerome Glisse | 771fe6b | 2009-06-05 14:42:42 +0200 | [diff] [blame] | 109 | if (r) { |
| 110 | goto out_cleanup; |
| 111 | } |
Jerome Glisse | 4c78867 | 2009-11-20 14:29:23 +0100 | [diff] [blame] | 112 | r = radeon_bo_reserve(dobj, false); |
| 113 | if (unlikely(r != 0)) |
| 114 | goto out_cleanup; |
| 115 | r = radeon_bo_pin(dobj, ddomain, &daddr); |
| 116 | radeon_bo_unreserve(dobj); |
Jerome Glisse | 771fe6b | 2009-06-05 14:42:42 +0200 | [diff] [blame] | 117 | if (r) { |
| 118 | goto out_cleanup; |
| 119 | } |
Pauli Nieminen | c60a284 | 2010-02-11 00:10:33 +0200 | [diff] [blame] | 120 | |
Alex Deucher | 271e53d | 2013-03-12 12:55:56 -0400 | [diff] [blame] | 121 | if (rdev->asic->copy.dma) { |
Ilija Hadzic | cc34051 | 2011-10-12 23:29:38 -0400 | [diff] [blame] | 122 | time = radeon_benchmark_do_move(rdev, size, saddr, daddr, |
| 123 | RADEON_BENCHMARK_COPY_DMA, n); |
| 124 | if (time < 0) |
| 125 | goto out_cleanup; |
| 126 | if (time > 0) |
| 127 | radeon_benchmark_log_results(n, size, time, |
| 128 | sdomain, ddomain, "dma"); |
Jerome Glisse | 771fe6b | 2009-06-05 14:42:42 +0200 | [diff] [blame] | 129 | } |
Pauli Nieminen | c60a284 | 2010-02-11 00:10:33 +0200 | [diff] [blame] | 130 | |
Alex Deucher | fa8d387 | 2013-03-12 12:53:13 -0400 | [diff] [blame] | 131 | if (rdev->asic->copy.blit) { |
| 132 | time = radeon_benchmark_do_move(rdev, size, saddr, daddr, |
| 133 | RADEON_BENCHMARK_COPY_BLIT, n); |
| 134 | if (time < 0) |
| 135 | goto out_cleanup; |
| 136 | if (time > 0) |
| 137 | radeon_benchmark_log_results(n, size, time, |
| 138 | sdomain, ddomain, "blit"); |
| 139 | } |
Ilija Hadzic | cc34051 | 2011-10-12 23:29:38 -0400 | [diff] [blame] | 140 | |
Jerome Glisse | 771fe6b | 2009-06-05 14:42:42 +0200 | [diff] [blame] | 141 | out_cleanup: |
| 142 | if (sobj) { |
Jerome Glisse | 4c78867 | 2009-11-20 14:29:23 +0100 | [diff] [blame] | 143 | r = radeon_bo_reserve(sobj, false); |
| 144 | if (likely(r == 0)) { |
| 145 | radeon_bo_unpin(sobj); |
| 146 | radeon_bo_unreserve(sobj); |
| 147 | } |
| 148 | radeon_bo_unref(&sobj); |
Jerome Glisse | 771fe6b | 2009-06-05 14:42:42 +0200 | [diff] [blame] | 149 | } |
| 150 | if (dobj) { |
Jerome Glisse | 4c78867 | 2009-11-20 14:29:23 +0100 | [diff] [blame] | 151 | r = radeon_bo_reserve(dobj, false); |
| 152 | if (likely(r == 0)) { |
| 153 | radeon_bo_unpin(dobj); |
| 154 | radeon_bo_unreserve(dobj); |
| 155 | } |
| 156 | radeon_bo_unref(&dobj); |
Jerome Glisse | 771fe6b | 2009-06-05 14:42:42 +0200 | [diff] [blame] | 157 | } |
Ilija Hadzic | cc34051 | 2011-10-12 23:29:38 -0400 | [diff] [blame] | 158 | |
Jerome Glisse | 771fe6b | 2009-06-05 14:42:42 +0200 | [diff] [blame] | 159 | if (r) { |
Ilija Hadzic | cc34051 | 2011-10-12 23:29:38 -0400 | [diff] [blame] | 160 | DRM_ERROR("Error while benchmarking BO move.\n"); |
Jerome Glisse | 771fe6b | 2009-06-05 14:42:42 +0200 | [diff] [blame] | 161 | } |
| 162 | } |
| 163 | |
Ilija Hadzic | 638dd7d | 2011-10-12 23:29:39 -0400 | [diff] [blame] | 164 | void radeon_benchmark(struct radeon_device *rdev, int test_number) |
Jerome Glisse | 771fe6b | 2009-06-05 14:42:42 +0200 | [diff] [blame] | 165 | { |
Ilija Hadzic | 638dd7d | 2011-10-12 23:29:39 -0400 | [diff] [blame] | 166 | int i; |
| 167 | int common_modes[RADEON_BENCHMARK_COMMON_MODES_N] = { |
| 168 | 640 * 480 * 4, |
| 169 | 720 * 480 * 4, |
| 170 | 800 * 600 * 4, |
| 171 | 848 * 480 * 4, |
| 172 | 1024 * 768 * 4, |
| 173 | 1152 * 768 * 4, |
| 174 | 1280 * 720 * 4, |
| 175 | 1280 * 800 * 4, |
| 176 | 1280 * 854 * 4, |
| 177 | 1280 * 960 * 4, |
| 178 | 1280 * 1024 * 4, |
| 179 | 1440 * 900 * 4, |
| 180 | 1400 * 1050 * 4, |
| 181 | 1680 * 1050 * 4, |
| 182 | 1600 * 1200 * 4, |
| 183 | 1920 * 1080 * 4, |
| 184 | 1920 * 1200 * 4 |
| 185 | }; |
| 186 | |
| 187 | switch (test_number) { |
| 188 | case 1: |
| 189 | /* simple test, VRAM to GTT and GTT to VRAM */ |
| 190 | radeon_benchmark_move(rdev, 1024*1024, RADEON_GEM_DOMAIN_GTT, |
| 191 | RADEON_GEM_DOMAIN_VRAM); |
| 192 | radeon_benchmark_move(rdev, 1024*1024, RADEON_GEM_DOMAIN_VRAM, |
| 193 | RADEON_GEM_DOMAIN_GTT); |
| 194 | break; |
| 195 | case 2: |
| 196 | /* simple test, VRAM to VRAM */ |
| 197 | radeon_benchmark_move(rdev, 1024*1024, RADEON_GEM_DOMAIN_VRAM, |
| 198 | RADEON_GEM_DOMAIN_VRAM); |
| 199 | break; |
| 200 | case 3: |
| 201 | /* GTT to VRAM, buffer size sweep, powers of 2 */ |
Ilija Hadzic | 6d75e83 | 2012-01-31 09:35:25 -0500 | [diff] [blame] | 202 | for (i = 1; i <= 16384; i <<= 1) |
| 203 | radeon_benchmark_move(rdev, i * RADEON_GPU_PAGE_SIZE, |
Ilija Hadzic | 638dd7d | 2011-10-12 23:29:39 -0400 | [diff] [blame] | 204 | RADEON_GEM_DOMAIN_GTT, |
| 205 | RADEON_GEM_DOMAIN_VRAM); |
| 206 | break; |
| 207 | case 4: |
| 208 | /* VRAM to GTT, buffer size sweep, powers of 2 */ |
Ilija Hadzic | 6d75e83 | 2012-01-31 09:35:25 -0500 | [diff] [blame] | 209 | for (i = 1; i <= 16384; i <<= 1) |
| 210 | radeon_benchmark_move(rdev, i * RADEON_GPU_PAGE_SIZE, |
Ilija Hadzic | 638dd7d | 2011-10-12 23:29:39 -0400 | [diff] [blame] | 211 | RADEON_GEM_DOMAIN_VRAM, |
| 212 | RADEON_GEM_DOMAIN_GTT); |
| 213 | break; |
| 214 | case 5: |
| 215 | /* VRAM to VRAM, buffer size sweep, powers of 2 */ |
Ilija Hadzic | 6d75e83 | 2012-01-31 09:35:25 -0500 | [diff] [blame] | 216 | for (i = 1; i <= 16384; i <<= 1) |
| 217 | radeon_benchmark_move(rdev, i * RADEON_GPU_PAGE_SIZE, |
Ilija Hadzic | 638dd7d | 2011-10-12 23:29:39 -0400 | [diff] [blame] | 218 | RADEON_GEM_DOMAIN_VRAM, |
| 219 | RADEON_GEM_DOMAIN_VRAM); |
| 220 | break; |
| 221 | case 6: |
| 222 | /* GTT to VRAM, buffer size sweep, common modes */ |
Chen Jie | d7d0a75 | 2011-12-07 10:18:18 +0800 | [diff] [blame] | 223 | for (i = 0; i < RADEON_BENCHMARK_COMMON_MODES_N; i++) |
Ilija Hadzic | 638dd7d | 2011-10-12 23:29:39 -0400 | [diff] [blame] | 224 | radeon_benchmark_move(rdev, common_modes[i], |
| 225 | RADEON_GEM_DOMAIN_GTT, |
| 226 | RADEON_GEM_DOMAIN_VRAM); |
| 227 | break; |
| 228 | case 7: |
| 229 | /* VRAM to GTT, buffer size sweep, common modes */ |
Chen Jie | d7d0a75 | 2011-12-07 10:18:18 +0800 | [diff] [blame] | 230 | for (i = 0; i < RADEON_BENCHMARK_COMMON_MODES_N; i++) |
Ilija Hadzic | 638dd7d | 2011-10-12 23:29:39 -0400 | [diff] [blame] | 231 | radeon_benchmark_move(rdev, common_modes[i], |
| 232 | RADEON_GEM_DOMAIN_VRAM, |
| 233 | RADEON_GEM_DOMAIN_GTT); |
| 234 | break; |
| 235 | case 8: |
| 236 | /* VRAM to VRAM, buffer size sweep, common modes */ |
Chen Jie | d7d0a75 | 2011-12-07 10:18:18 +0800 | [diff] [blame] | 237 | for (i = 0; i < RADEON_BENCHMARK_COMMON_MODES_N; i++) |
Ilija Hadzic | 638dd7d | 2011-10-12 23:29:39 -0400 | [diff] [blame] | 238 | radeon_benchmark_move(rdev, common_modes[i], |
| 239 | RADEON_GEM_DOMAIN_VRAM, |
| 240 | RADEON_GEM_DOMAIN_VRAM); |
| 241 | break; |
| 242 | |
| 243 | default: |
| 244 | DRM_ERROR("Unknown benchmark\n"); |
| 245 | } |
Jerome Glisse | 771fe6b | 2009-06-05 14:42:42 +0200 | [diff] [blame] | 246 | } |