Sjoerd Simons | 51e5084 | 2015-10-08 15:31:12 +0200 | [diff] [blame] | 1 | * Rockchip SPDIF transceiver |
| 2 | |
| 3 | The S/PDIF audio block is a stereo transceiver that allows the |
| 4 | processor to receive and transmit digital audio via an coaxial cable or |
| 5 | a fibre cable. |
| 6 | |
| 7 | Required properties: |
| 8 | |
| 9 | - compatible: should be one of the following: |
Sugar Zhang | ab87739 | 2016-03-04 18:31:54 +0800 | [diff] [blame] | 10 | - "rockchip,rk3066-spdif" |
| 11 | - "rockchip,rk3188-spdif" |
| 12 | - "rockchip,rk3288-spdif" |
| 13 | - "rockchip,rk3366-spdif" |
| 14 | - "rockchip,rk3368-spdif" |
| 15 | - "rockchip,rk3399-spdif" |
Sjoerd Simons | 51e5084 | 2015-10-08 15:31:12 +0200 | [diff] [blame] | 16 | - reg: physical base address of the controller and length of memory mapped |
| 17 | region. |
| 18 | - interrupts: should contain the SPDIF interrupt. |
Sjoerd Simons | 51e5084 | 2015-10-08 15:31:12 +0200 | [diff] [blame] | 19 | - dmas: DMA specifiers for tx dma. See the DMA client binding, |
| 20 | Documentation/devicetree/bindings/dma/dma.txt |
| 21 | - dma-names: should be "tx" |
| 22 | - clocks: a list of phandle + clock-specifier pairs, one for each entry |
| 23 | in clock-names. |
| 24 | - clock-names: should contain following: |
| 25 | - "hclk": clock for SPDIF controller |
| 26 | - "mclk" : clock for SPDIF bus |
| 27 | |
| 28 | Required properties on RK3288: |
| 29 | - rockchip,grf: the phandle of the syscon node for the general register |
| 30 | file (GRF) |
| 31 | |
| 32 | Example for the rk3188 SPDIF controller: |
| 33 | |
| 34 | spdif: spdif@0x1011e000 { |
| 35 | compatible = "rockchip,rk3188-spdif", "rockchip,rk3066-spdif"; |
| 36 | reg = <0x1011e000 0x2000>; |
| 37 | interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>; |
Sjoerd Simons | 51e5084 | 2015-10-08 15:31:12 +0200 | [diff] [blame] | 38 | dmas = <&dmac1_s 8>; |
| 39 | dma-names = "tx"; |
| 40 | clock-names = "hclk", "mclk"; |
| 41 | clocks = <&cru HCLK_SPDIF>, <&cru SCLK_SPDIF>; |
| 42 | status = "disabled"; |
| 43 | #sound-dai-cells = <0>; |
| 44 | }; |