| Sonic Zhang | 22a8262 | 2012-05-16 17:24:33 +0800 | [diff] [blame] | 1 | config BF60x |
| 2 | def_bool y |
| 3 | depends on (BF609) |
| 4 | select IRQ_PREFLOW_FASTEOI |
| 5 | |
| 6 | if (BF60x) |
| 7 | |
| 8 | source "arch/blackfin/mach-bf609/boards/Kconfig" |
| 9 | |
| 10 | menu "BF609 Specific Configuration" |
| 11 | |
| 12 | comment "Pin Interrupt to Port Assignment" |
| 13 | menu "Assignment" |
| 14 | |
| 15 | config PINTx_REASSIGN |
| 16 | bool "Reprogram PINT Assignment" |
| 17 | default y |
| 18 | help |
| 19 | The interrupt assignment registers controls the pin-to-interrupt |
| 20 | assignment in a byte-wide manner. Each option allows you to select |
| 21 | a set of pins (High/Low Byte) of an specific Port being mapped |
| 22 | to one of the four PIN Interrupts IRQ_PINTx. |
| 23 | |
| 24 | You shouldn't change any of these unless you know exactly what you're doing. |
| 25 | Please consult the Blackfin BF60x Processor Hardware Reference Manual. |
| 26 | |
| 27 | config PINT0_ASSIGN |
| 28 | hex "PINT0_ASSIGN" |
| 29 | depends on PINTx_REASSIGN |
| 30 | default 0x00000101 |
| 31 | config PINT1_ASSIGN |
| 32 | hex "PINT1_ASSIGN" |
| 33 | depends on PINTx_REASSIGN |
| 34 | default 0x00000101 |
| 35 | config PINT2_ASSIGN |
| 36 | hex "PINT2_ASSIGN" |
| 37 | depends on PINTx_REASSIGN |
| 38 | default 0x00000101 |
| 39 | config PINT3_ASSIGN |
| 40 | hex "PINT3_ASSIGN" |
| 41 | depends on PINTx_REASSIGN |
| 42 | default 0x00000101 |
| 43 | config PINT4_ASSIGN |
| 44 | hex "PINT3_ASSIGN" |
| 45 | depends on PINTx_REASSIGN |
| 46 | default 0x00000101 |
| 47 | config PINT5_ASSIGN |
| 48 | hex "PINT3_ASSIGN" |
| 49 | depends on PINTx_REASSIGN |
| 50 | default 0x00000101 |
| 51 | |
| 52 | endmenu |
| 53 | |
| Sonic Zhang | e0a5931 | 2012-06-29 18:19:29 +0800 | [diff] [blame] | 54 | config SEC_IRQ_PRIORITY_LEVELS |
| 55 | int "SEC interrupt priority levels" |
| 56 | default 7 |
| 57 | range 0 7 |
| 58 | help |
| Masanari Iida | 9c76820 | 2012-11-30 14:10:25 +0900 | [diff] [blame] | 59 | Divide the total number of interrupt priority levels into sub-levels. |
| Sonic Zhang | e0a5931 | 2012-06-29 18:19:29 +0800 | [diff] [blame] | 60 | There is 2 ^ (SEC_IRQ_PRIORITY_LEVELS + 1) different levels. |
| 61 | |
| Sonic Zhang | 22a8262 | 2012-05-16 17:24:33 +0800 | [diff] [blame] | 62 | endmenu |
| 63 | |
| 64 | endif |