Gabor Juhos | 69a2bac | 2013-03-29 15:52:27 +0100 | [diff] [blame] | 1 | /* |
| 2 | Copyright (C) 2004 - 2009 Ivo van Doorn <IvDoorn@gmail.com> |
| 3 | <http://rt2x00.serialmonkey.com> |
| 4 | |
| 5 | This program is free software; you can redistribute it and/or modify |
| 6 | it under the terms of the GNU General Public License as published by |
| 7 | the Free Software Foundation; either version 2 of the License, or |
| 8 | (at your option) any later version. |
| 9 | |
| 10 | This program is distributed in the hope that it will be useful, |
| 11 | but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 12 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 13 | GNU General Public License for more details. |
| 14 | |
| 15 | You should have received a copy of the GNU General Public License |
| 16 | along with this program; if not, write to the |
| 17 | Free Software Foundation, Inc., |
| 18 | 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. |
| 19 | */ |
| 20 | |
| 21 | /* |
| 22 | Module: rt2x00mmio |
| 23 | Abstract: Data structures for the rt2x00mmio module. |
| 24 | */ |
| 25 | |
| 26 | #ifndef RT2X00MMIO_H |
| 27 | #define RT2X00MMIO_H |
| 28 | |
| 29 | #include <linux/io.h> |
| 30 | |
| 31 | /* |
| 32 | * Register access. |
| 33 | */ |
Gabor Juhos | 58959bd | 2013-04-05 08:27:00 +0200 | [diff] [blame^] | 34 | static inline void rt2x00mmio_register_read(struct rt2x00_dev *rt2x00dev, |
| 35 | const unsigned int offset, |
| 36 | u32 *value) |
Gabor Juhos | 69a2bac | 2013-03-29 15:52:27 +0100 | [diff] [blame] | 37 | { |
| 38 | *value = readl(rt2x00dev->csr.base + offset); |
| 39 | } |
Gabor Juhos | 58959bd | 2013-04-05 08:27:00 +0200 | [diff] [blame^] | 40 | #define rt2x00pci_register_read rt2x00mmio_register_read |
Gabor Juhos | 69a2bac | 2013-03-29 15:52:27 +0100 | [diff] [blame] | 41 | |
Gabor Juhos | 58959bd | 2013-04-05 08:27:00 +0200 | [diff] [blame^] | 42 | static inline void rt2x00mmio_register_multiread(struct rt2x00_dev *rt2x00dev, |
| 43 | const unsigned int offset, |
| 44 | void *value, const u32 length) |
Gabor Juhos | 69a2bac | 2013-03-29 15:52:27 +0100 | [diff] [blame] | 45 | { |
| 46 | memcpy_fromio(value, rt2x00dev->csr.base + offset, length); |
| 47 | } |
Gabor Juhos | 58959bd | 2013-04-05 08:27:00 +0200 | [diff] [blame^] | 48 | #define rt2x00pci_register_multiread rt2x00mmio_register_multiread |
Gabor Juhos | 69a2bac | 2013-03-29 15:52:27 +0100 | [diff] [blame] | 49 | |
Gabor Juhos | 58959bd | 2013-04-05 08:27:00 +0200 | [diff] [blame^] | 50 | static inline void rt2x00mmio_register_write(struct rt2x00_dev *rt2x00dev, |
| 51 | const unsigned int offset, |
| 52 | u32 value) |
Gabor Juhos | 69a2bac | 2013-03-29 15:52:27 +0100 | [diff] [blame] | 53 | { |
| 54 | writel(value, rt2x00dev->csr.base + offset); |
| 55 | } |
Gabor Juhos | 58959bd | 2013-04-05 08:27:00 +0200 | [diff] [blame^] | 56 | #define rt2x00pci_register_write rt2x00mmio_register_write |
Gabor Juhos | 69a2bac | 2013-03-29 15:52:27 +0100 | [diff] [blame] | 57 | |
Gabor Juhos | 58959bd | 2013-04-05 08:27:00 +0200 | [diff] [blame^] | 58 | static inline void rt2x00mmio_register_multiwrite(struct rt2x00_dev *rt2x00dev, |
| 59 | const unsigned int offset, |
| 60 | const void *value, |
| 61 | const u32 length) |
Gabor Juhos | 69a2bac | 2013-03-29 15:52:27 +0100 | [diff] [blame] | 62 | { |
| 63 | __iowrite32_copy(rt2x00dev->csr.base + offset, value, length >> 2); |
| 64 | } |
Gabor Juhos | 58959bd | 2013-04-05 08:27:00 +0200 | [diff] [blame^] | 65 | #define rt2x00pci_register_multiwrite rt2x00mmio_register_multiwrite |
Gabor Juhos | 69a2bac | 2013-03-29 15:52:27 +0100 | [diff] [blame] | 66 | |
| 67 | /** |
Gabor Juhos | 58959bd | 2013-04-05 08:27:00 +0200 | [diff] [blame^] | 68 | * rt2x00mmio_regbusy_read - Read from register with busy check |
Gabor Juhos | 69a2bac | 2013-03-29 15:52:27 +0100 | [diff] [blame] | 69 | * @rt2x00dev: Device pointer, see &struct rt2x00_dev. |
| 70 | * @offset: Register offset |
| 71 | * @field: Field to check if register is busy |
| 72 | * @reg: Pointer to where register contents should be stored |
| 73 | * |
| 74 | * This function will read the given register, and checks if the |
| 75 | * register is busy. If it is, it will sleep for a couple of |
| 76 | * microseconds before reading the register again. If the register |
| 77 | * is not read after a certain timeout, this function will return |
| 78 | * FALSE. |
| 79 | */ |
Gabor Juhos | 58959bd | 2013-04-05 08:27:00 +0200 | [diff] [blame^] | 80 | int rt2x00mmio_regbusy_read(struct rt2x00_dev *rt2x00dev, |
| 81 | const unsigned int offset, |
| 82 | const struct rt2x00_field32 field, |
| 83 | u32 *reg); |
| 84 | #define rt2x00pci_regbusy_read rt2x00mmio_regbusy_read |
Gabor Juhos | 69a2bac | 2013-03-29 15:52:27 +0100 | [diff] [blame] | 85 | |
| 86 | /** |
Gabor Juhos | 58959bd | 2013-04-05 08:27:00 +0200 | [diff] [blame^] | 87 | * struct queue_entry_priv_mmio: Per entry PCI specific information |
Gabor Juhos | 69a2bac | 2013-03-29 15:52:27 +0100 | [diff] [blame] | 88 | * |
| 89 | * @desc: Pointer to device descriptor |
| 90 | * @desc_dma: DMA pointer to &desc. |
| 91 | * @data: Pointer to device's entry memory. |
| 92 | * @data_dma: DMA pointer to &data. |
| 93 | */ |
Gabor Juhos | 58959bd | 2013-04-05 08:27:00 +0200 | [diff] [blame^] | 94 | struct queue_entry_priv_mmio { |
Gabor Juhos | 69a2bac | 2013-03-29 15:52:27 +0100 | [diff] [blame] | 95 | __le32 *desc; |
| 96 | dma_addr_t desc_dma; |
| 97 | }; |
Gabor Juhos | 58959bd | 2013-04-05 08:27:00 +0200 | [diff] [blame^] | 98 | #define queue_entry_priv_pci queue_entry_priv_mmio |
Gabor Juhos | 69a2bac | 2013-03-29 15:52:27 +0100 | [diff] [blame] | 99 | |
| 100 | /** |
Gabor Juhos | 58959bd | 2013-04-05 08:27:00 +0200 | [diff] [blame^] | 101 | * rt2x00mmio_rxdone - Handle RX done events |
Gabor Juhos | 69a2bac | 2013-03-29 15:52:27 +0100 | [diff] [blame] | 102 | * @rt2x00dev: Device pointer, see &struct rt2x00_dev. |
| 103 | * |
| 104 | * Returns true if there are still rx frames pending and false if all |
| 105 | * pending rx frames were processed. |
| 106 | */ |
Gabor Juhos | 58959bd | 2013-04-05 08:27:00 +0200 | [diff] [blame^] | 107 | bool rt2x00mmio_rxdone(struct rt2x00_dev *rt2x00dev); |
| 108 | #define rt2x00pci_rxdone rt2x00mmio_rxdone |
Gabor Juhos | 69a2bac | 2013-03-29 15:52:27 +0100 | [diff] [blame] | 109 | |
| 110 | /** |
Gabor Juhos | 58959bd | 2013-04-05 08:27:00 +0200 | [diff] [blame^] | 111 | * rt2x00mmio_flush_queue - Flush data queue |
Gabor Juhos | 69a2bac | 2013-03-29 15:52:27 +0100 | [diff] [blame] | 112 | * @queue: Data queue to stop |
| 113 | * @drop: True to drop all pending frames. |
| 114 | * |
| 115 | * This will wait for a maximum of 100ms, waiting for the queues |
| 116 | * to become empty. |
| 117 | */ |
Gabor Juhos | 58959bd | 2013-04-05 08:27:00 +0200 | [diff] [blame^] | 118 | void rt2x00mmio_flush_queue(struct data_queue *queue, bool drop); |
| 119 | #define rt2x00pci_flush_queue rt2x00mmio_flush_queue |
Gabor Juhos | 69a2bac | 2013-03-29 15:52:27 +0100 | [diff] [blame] | 120 | |
| 121 | /* |
| 122 | * Device initialization handlers. |
| 123 | */ |
Gabor Juhos | 58959bd | 2013-04-05 08:27:00 +0200 | [diff] [blame^] | 124 | int rt2x00mmio_initialize(struct rt2x00_dev *rt2x00dev); |
| 125 | #define rt2x00pci_initialize rt2x00mmio_initialize |
| 126 | |
| 127 | void rt2x00mmio_uninitialize(struct rt2x00_dev *rt2x00dev); |
| 128 | #define rt2x00pci_uninitialize rt2x00mmio_uninitialize |
Gabor Juhos | 69a2bac | 2013-03-29 15:52:27 +0100 | [diff] [blame] | 129 | |
| 130 | #endif /* RT2X00MMIO_H */ |