Jim Cromie | 681a3e7 | 2006-06-27 02:54:21 -0700 | [diff] [blame] | 1 | /* linux/drivers/char/pc8736x_gpio.c |
| 2 | |
| 3 | National Semiconductor PC8736x GPIO driver. Allows a user space |
| 4 | process to play with the GPIO pins. |
| 5 | |
| 6 | Copyright (c) 2005 Jim Cromie <jim.cromie@gmail.com> |
| 7 | |
| 8 | adapted from linux/drivers/char/scx200_gpio.c |
| 9 | Copyright (c) 2001,2002 Christer Weinigel <wingel@nano-system.com>, |
| 10 | */ |
| 11 | |
| 12 | #include <linux/config.h> |
| 13 | #include <linux/fs.h> |
| 14 | #include <linux/module.h> |
| 15 | #include <linux/errno.h> |
| 16 | #include <linux/kernel.h> |
| 17 | #include <linux/init.h> |
| 18 | #include <linux/ioport.h> |
| 19 | #include <linux/nsc_gpio.h> |
Jim Cromie | 58b087c | 2006-06-27 02:54:22 -0700 | [diff] [blame^] | 20 | #include <linux/platform_device.h> |
Jim Cromie | 681a3e7 | 2006-06-27 02:54:21 -0700 | [diff] [blame] | 21 | #include <asm/uaccess.h> |
| 22 | #include <asm/io.h> |
| 23 | |
Jim Cromie | 58b087c | 2006-06-27 02:54:22 -0700 | [diff] [blame^] | 24 | #define DEVNAME "pc8736x_gpio" |
Jim Cromie | 681a3e7 | 2006-06-27 02:54:21 -0700 | [diff] [blame] | 25 | |
| 26 | MODULE_AUTHOR("Jim Cromie <jim.cromie@gmail.com>"); |
Jim Cromie | 58b087c | 2006-06-27 02:54:22 -0700 | [diff] [blame^] | 27 | MODULE_DESCRIPTION("NatSemi PC-8736x GPIO Pin Driver"); |
Jim Cromie | 681a3e7 | 2006-06-27 02:54:21 -0700 | [diff] [blame] | 28 | MODULE_LICENSE("GPL"); |
| 29 | |
| 30 | static int major; /* default to dynamic major */ |
| 31 | module_param(major, int, 0); |
| 32 | MODULE_PARM_DESC(major, "Major device number"); |
| 33 | |
| 34 | static DEFINE_SPINLOCK(pc8736x_gpio_config_lock); |
| 35 | static unsigned pc8736x_gpio_base; |
| 36 | |
| 37 | #define SIO_BASE1 0x2E /* 1st command-reg to check */ |
| 38 | #define SIO_BASE2 0x4E /* alt command-reg to check */ |
| 39 | #define SIO_BASE_OFFSET 0x20 |
| 40 | |
| 41 | #define SIO_SID 0x20 /* SuperI/O ID Register */ |
| 42 | #define SIO_SID_VALUE 0xe9 /* Expected value in SuperI/O ID Register */ |
| 43 | |
| 44 | #define SIO_CF1 0x21 /* chip config, bit0 is chip enable */ |
| 45 | |
Jim Cromie | 58b087c | 2006-06-27 02:54:22 -0700 | [diff] [blame^] | 46 | #define PC8736X_GPIO_SIZE 16 |
| 47 | |
Jim Cromie | 681a3e7 | 2006-06-27 02:54:21 -0700 | [diff] [blame] | 48 | #define SIO_UNIT_SEL 0x7 /* unit select reg */ |
| 49 | #define SIO_UNIT_ACT 0x30 /* unit enable */ |
| 50 | #define SIO_GPIO_UNIT 0x7 /* unit number of GPIO */ |
| 51 | #define SIO_VLM_UNIT 0x0D |
| 52 | #define SIO_TMS_UNIT 0x0E |
| 53 | |
| 54 | /* config-space addrs to read/write each unit's runtime addr */ |
| 55 | #define SIO_BASE_HADDR 0x60 |
| 56 | #define SIO_BASE_LADDR 0x61 |
| 57 | |
| 58 | /* GPIO config-space pin-control addresses */ |
| 59 | #define SIO_GPIO_PIN_SELECT 0xF0 |
| 60 | #define SIO_GPIO_PIN_CONFIG 0xF1 |
| 61 | #define SIO_GPIO_PIN_EVENT 0xF2 |
| 62 | |
| 63 | static unsigned char superio_cmd = 0; |
| 64 | static unsigned char selected_device = 0xFF; /* bogus start val */ |
| 65 | |
| 66 | /* GPIO port runtime access, functionality */ |
| 67 | static int port_offset[] = { 0, 4, 8, 10 }; /* non-uniform offsets ! */ |
| 68 | /* static int event_capable[] = { 1, 1, 0, 0 }; ports 2,3 are hobbled */ |
| 69 | |
| 70 | #define PORT_OUT 0 |
| 71 | #define PORT_IN 1 |
| 72 | #define PORT_EVT_EN 2 |
| 73 | #define PORT_EVT_STST 3 |
| 74 | |
Jim Cromie | 58b087c | 2006-06-27 02:54:22 -0700 | [diff] [blame^] | 75 | static struct platform_device *pdev; /* use in dev_*() */ |
| 76 | |
Jim Cromie | 681a3e7 | 2006-06-27 02:54:21 -0700 | [diff] [blame] | 77 | static inline void superio_outb(int addr, int val) |
| 78 | { |
| 79 | outb_p(addr, superio_cmd); |
| 80 | outb_p(val, superio_cmd + 1); |
| 81 | } |
| 82 | |
| 83 | static inline int superio_inb(int addr) |
| 84 | { |
| 85 | outb_p(addr, superio_cmd); |
| 86 | return inb_p(superio_cmd + 1); |
| 87 | } |
| 88 | |
| 89 | static int pc8736x_superio_present(void) |
| 90 | { |
| 91 | /* try the 2 possible values, read a hardware reg to verify */ |
| 92 | superio_cmd = SIO_BASE1; |
| 93 | if (superio_inb(SIO_SID) == SIO_SID_VALUE) |
| 94 | return superio_cmd; |
| 95 | |
| 96 | superio_cmd = SIO_BASE2; |
| 97 | if (superio_inb(SIO_SID) == SIO_SID_VALUE) |
| 98 | return superio_cmd; |
| 99 | |
| 100 | return 0; |
| 101 | } |
| 102 | |
| 103 | static void device_select(unsigned devldn) |
| 104 | { |
| 105 | superio_outb(SIO_UNIT_SEL, devldn); |
| 106 | selected_device = devldn; |
| 107 | } |
| 108 | |
| 109 | static void select_pin(unsigned iminor) |
| 110 | { |
| 111 | /* select GPIO port/pin from device minor number */ |
| 112 | device_select(SIO_GPIO_UNIT); |
| 113 | superio_outb(SIO_GPIO_PIN_SELECT, |
| 114 | ((iminor << 1) & 0xF0) | (iminor & 0x7)); |
| 115 | } |
| 116 | |
| 117 | static inline u32 pc8736x_gpio_configure_fn(unsigned index, u32 mask, u32 bits, |
| 118 | u32 func_slct) |
| 119 | { |
| 120 | u32 config, new_config; |
| 121 | unsigned long flags; |
| 122 | |
| 123 | spin_lock_irqsave(&pc8736x_gpio_config_lock, flags); |
| 124 | |
| 125 | device_select(SIO_GPIO_UNIT); |
| 126 | select_pin(index); |
| 127 | |
| 128 | /* read current config value */ |
| 129 | config = superio_inb(func_slct); |
| 130 | |
| 131 | /* set new config */ |
| 132 | new_config = (config & mask) | bits; |
| 133 | superio_outb(func_slct, new_config); |
| 134 | |
| 135 | spin_unlock_irqrestore(&pc8736x_gpio_config_lock, flags); |
| 136 | |
| 137 | return config; |
| 138 | } |
| 139 | |
| 140 | static u32 pc8736x_gpio_configure(unsigned index, u32 mask, u32 bits) |
| 141 | { |
| 142 | return pc8736x_gpio_configure_fn(index, mask, bits, |
| 143 | SIO_GPIO_PIN_CONFIG); |
| 144 | } |
| 145 | |
| 146 | static int pc8736x_gpio_get(unsigned minor) |
| 147 | { |
| 148 | int port, bit, val; |
| 149 | |
| 150 | port = minor >> 3; |
| 151 | bit = minor & 7; |
| 152 | val = inb_p(pc8736x_gpio_base + port_offset[port] + PORT_IN); |
| 153 | val >>= bit; |
| 154 | val &= 1; |
| 155 | |
Jim Cromie | 58b087c | 2006-06-27 02:54:22 -0700 | [diff] [blame^] | 156 | dev_dbg(&pdev->dev, "_gpio_get(%d from %x bit %d) == val %d\n", |
| 157 | minor, pc8736x_gpio_base + port_offset[port] + PORT_IN, bit, |
| 158 | val); |
Jim Cromie | 681a3e7 | 2006-06-27 02:54:21 -0700 | [diff] [blame] | 159 | |
| 160 | return val; |
| 161 | } |
| 162 | |
| 163 | static void pc8736x_gpio_set(unsigned minor, int val) |
| 164 | { |
| 165 | int port, bit, curval; |
| 166 | |
| 167 | minor &= 0x1f; |
| 168 | port = minor >> 3; |
| 169 | bit = minor & 7; |
| 170 | curval = inb_p(pc8736x_gpio_base + port_offset[port] + PORT_OUT); |
| 171 | |
Jim Cromie | 58b087c | 2006-06-27 02:54:22 -0700 | [diff] [blame^] | 172 | dev_dbg(&pdev->dev, "addr:%x cur:%x bit-pos:%d cur-bit:%x + new:%d -> bit-new:%d\n", |
| 173 | pc8736x_gpio_base + port_offset[port] + PORT_OUT, |
| 174 | curval, bit, (curval & ~(1 << bit)), val, (val << bit)); |
Jim Cromie | 681a3e7 | 2006-06-27 02:54:21 -0700 | [diff] [blame] | 175 | |
| 176 | val = (curval & ~(1 << bit)) | (val << bit); |
| 177 | |
Jim Cromie | 58b087c | 2006-06-27 02:54:22 -0700 | [diff] [blame^] | 178 | dev_dbg(&pdev->dev, "gpio_set(minor:%d port:%d bit:%d)" |
| 179 | " %2x -> %2x\n", minor, port, bit, curval, val); |
Jim Cromie | 681a3e7 | 2006-06-27 02:54:21 -0700 | [diff] [blame] | 180 | |
| 181 | outb_p(val, pc8736x_gpio_base + port_offset[port] + PORT_OUT); |
| 182 | |
| 183 | curval = inb_p(pc8736x_gpio_base + port_offset[port] + PORT_OUT); |
| 184 | val = inb_p(pc8736x_gpio_base + port_offset[port] + PORT_IN); |
| 185 | |
Jim Cromie | 58b087c | 2006-06-27 02:54:22 -0700 | [diff] [blame^] | 186 | dev_dbg(&pdev->dev, "wrote %x, read: %x\n", curval, val); |
Jim Cromie | 681a3e7 | 2006-06-27 02:54:21 -0700 | [diff] [blame] | 187 | } |
| 188 | |
| 189 | static void pc8736x_gpio_set_high(unsigned index) |
| 190 | { |
| 191 | pc8736x_gpio_set(index, 1); |
| 192 | } |
| 193 | |
| 194 | static void pc8736x_gpio_set_low(unsigned index) |
| 195 | { |
| 196 | pc8736x_gpio_set(index, 0); |
| 197 | } |
| 198 | |
| 199 | static int pc8736x_gpio_current(unsigned index) |
| 200 | { |
Jim Cromie | 58b087c | 2006-06-27 02:54:22 -0700 | [diff] [blame^] | 201 | dev_warn(&pdev->dev, "pc8736x_gpio_current unimplemented\n"); |
Jim Cromie | 681a3e7 | 2006-06-27 02:54:21 -0700 | [diff] [blame] | 202 | return 0; |
| 203 | } |
| 204 | |
| 205 | static void pc8736x_gpio_change(unsigned index) |
| 206 | { |
| 207 | pc8736x_gpio_set(index, !pc8736x_gpio_get(index)); |
| 208 | } |
| 209 | |
| 210 | extern void nsc_gpio_dump(unsigned iminor); |
| 211 | |
| 212 | static struct nsc_gpio_ops pc8736x_access = { |
| 213 | .owner = THIS_MODULE, |
| 214 | .gpio_config = pc8736x_gpio_configure, |
| 215 | .gpio_dump = nsc_gpio_dump, |
| 216 | .gpio_get = pc8736x_gpio_get, |
| 217 | .gpio_set = pc8736x_gpio_set, |
| 218 | .gpio_set_high = pc8736x_gpio_set_high, |
| 219 | .gpio_set_low = pc8736x_gpio_set_low, |
| 220 | .gpio_change = pc8736x_gpio_change, |
| 221 | .gpio_current = pc8736x_gpio_current |
| 222 | }; |
| 223 | |
| 224 | static int pc8736x_gpio_open(struct inode *inode, struct file *file) |
| 225 | { |
| 226 | unsigned m = iminor(inode); |
| 227 | file->private_data = &pc8736x_access; |
| 228 | |
Jim Cromie | 58b087c | 2006-06-27 02:54:22 -0700 | [diff] [blame^] | 229 | dev_dbg(&pdev->dev, "open %d\n", m); |
Jim Cromie | 681a3e7 | 2006-06-27 02:54:21 -0700 | [diff] [blame] | 230 | |
| 231 | if (m > 63) |
| 232 | return -EINVAL; |
| 233 | return nonseekable_open(inode, file); |
| 234 | } |
| 235 | |
| 236 | static struct file_operations pc8736x_gpio_fops = { |
Jim Cromie | 58b087c | 2006-06-27 02:54:22 -0700 | [diff] [blame^] | 237 | .owner = THIS_MODULE, |
| 238 | .open = pc8736x_gpio_open, |
| 239 | .write = nsc_gpio_write, |
| 240 | .read = nsc_gpio_read, |
Jim Cromie | 681a3e7 | 2006-06-27 02:54:21 -0700 | [diff] [blame] | 241 | }; |
| 242 | |
| 243 | static int __init pc8736x_gpio_init(void) |
| 244 | { |
Jim Cromie | 58b087c | 2006-06-27 02:54:22 -0700 | [diff] [blame^] | 245 | int rc = 0; |
Jim Cromie | 681a3e7 | 2006-06-27 02:54:21 -0700 | [diff] [blame] | 246 | |
Jim Cromie | 58b087c | 2006-06-27 02:54:22 -0700 | [diff] [blame^] | 247 | pdev = platform_device_alloc(DEVNAME, 0); |
| 248 | if (!pdev) |
| 249 | return -ENOMEM; |
| 250 | |
| 251 | rc = platform_device_add(pdev); |
| 252 | if (rc) { |
| 253 | rc = -ENODEV; |
| 254 | goto undo_platform_dev_alloc; |
| 255 | } |
| 256 | dev_info(&pdev->dev, "NatSemi pc8736x GPIO Driver Initializing\n"); |
Jim Cromie | 681a3e7 | 2006-06-27 02:54:21 -0700 | [diff] [blame] | 257 | |
| 258 | if (!pc8736x_superio_present()) { |
Jim Cromie | 58b087c | 2006-06-27 02:54:22 -0700 | [diff] [blame^] | 259 | rc = -ENODEV; |
| 260 | dev_err(&pdev->dev, "no device found\n"); |
| 261 | goto undo_platform_dev_add; |
Jim Cromie | 681a3e7 | 2006-06-27 02:54:21 -0700 | [diff] [blame] | 262 | } |
| 263 | |
| 264 | /* Verify that chip and it's GPIO unit are both enabled. |
| 265 | My BIOS does this, so I take minimum action here |
| 266 | */ |
| 267 | rc = superio_inb(SIO_CF1); |
| 268 | if (!(rc & 0x01)) { |
Jim Cromie | 58b087c | 2006-06-27 02:54:22 -0700 | [diff] [blame^] | 269 | rc = -ENODEV; |
| 270 | dev_err(&pdev->dev, "device not enabled\n"); |
| 271 | goto undo_platform_dev_add; |
Jim Cromie | 681a3e7 | 2006-06-27 02:54:21 -0700 | [diff] [blame] | 272 | } |
| 273 | device_select(SIO_GPIO_UNIT); |
| 274 | if (!superio_inb(SIO_UNIT_ACT)) { |
Jim Cromie | 58b087c | 2006-06-27 02:54:22 -0700 | [diff] [blame^] | 275 | rc = -ENODEV; |
| 276 | dev_err(&pdev->dev, "GPIO unit not enabled\n"); |
| 277 | goto undo_platform_dev_add; |
Jim Cromie | 681a3e7 | 2006-06-27 02:54:21 -0700 | [diff] [blame] | 278 | } |
| 279 | |
Jim Cromie | 58b087c | 2006-06-27 02:54:22 -0700 | [diff] [blame^] | 280 | /* read the GPIO unit base addr that chip responds to */ |
Jim Cromie | 681a3e7 | 2006-06-27 02:54:21 -0700 | [diff] [blame] | 281 | pc8736x_gpio_base = (superio_inb(SIO_BASE_HADDR) << 8 |
| 282 | | superio_inb(SIO_BASE_LADDR)); |
| 283 | |
Jim Cromie | 58b087c | 2006-06-27 02:54:22 -0700 | [diff] [blame^] | 284 | if (!request_region(pc8736x_gpio_base, 16, DEVNAME)) { |
| 285 | rc = -ENODEV; |
| 286 | dev_err(&pdev->dev, "GPIO ioport %x busy\n", |
| 287 | pc8736x_gpio_base); |
| 288 | goto undo_platform_dev_add; |
| 289 | } |
| 290 | dev_info(&pdev->dev, "GPIO ioport %x reserved\n", pc8736x_gpio_base); |
Jim Cromie | 681a3e7 | 2006-06-27 02:54:21 -0700 | [diff] [blame] | 291 | |
Jim Cromie | 58b087c | 2006-06-27 02:54:22 -0700 | [diff] [blame^] | 292 | rc = register_chrdev(major, DEVNAME, &pc8736x_gpio_fops); |
| 293 | if (rc < 0) { |
| 294 | dev_err(&pdev->dev, "register-chrdev failed: %d\n", rc); |
| 295 | goto undo_platform_dev_add; |
Jim Cromie | 681a3e7 | 2006-06-27 02:54:21 -0700 | [diff] [blame] | 296 | } |
| 297 | if (!major) { |
Jim Cromie | 58b087c | 2006-06-27 02:54:22 -0700 | [diff] [blame^] | 298 | major = rc; |
| 299 | dev_dbg(&pdev->dev, "got dynamic major %d\n", major); |
Jim Cromie | 681a3e7 | 2006-06-27 02:54:21 -0700 | [diff] [blame] | 300 | } |
| 301 | |
| 302 | pc8736x_init_shadow(); |
| 303 | return 0; |
Jim Cromie | 58b087c | 2006-06-27 02:54:22 -0700 | [diff] [blame^] | 304 | |
| 305 | undo_platform_dev_add: |
| 306 | platform_device_put(pdev); |
| 307 | undo_platform_dev_alloc: |
| 308 | kfree(pdev); |
| 309 | return rc; |
Jim Cromie | 681a3e7 | 2006-06-27 02:54:21 -0700 | [diff] [blame] | 310 | } |
| 311 | |
| 312 | static void __exit pc8736x_gpio_cleanup(void) |
| 313 | { |
Jim Cromie | 58b087c | 2006-06-27 02:54:22 -0700 | [diff] [blame^] | 314 | dev_dbg(&pdev->dev, " cleanup\n"); |
Jim Cromie | 681a3e7 | 2006-06-27 02:54:21 -0700 | [diff] [blame] | 315 | |
| 316 | release_region(pc8736x_gpio_base, 16); |
| 317 | |
Jim Cromie | 58b087c | 2006-06-27 02:54:22 -0700 | [diff] [blame^] | 318 | unregister_chrdev(major, DEVNAME); |
Jim Cromie | 681a3e7 | 2006-06-27 02:54:21 -0700 | [diff] [blame] | 319 | } |
| 320 | |
| 321 | module_init(pc8736x_gpio_init); |
| 322 | module_exit(pc8736x_gpio_cleanup); |