Russell King | f27ecac | 2005-08-18 21:31:00 +0100 | [diff] [blame] | 1 | /* |
Rob Herring | 520f7bd | 2012-12-27 13:10:24 -0600 | [diff] [blame] | 2 | * include/linux/irqchip/arm-gic.h |
Russell King | f27ecac | 2005-08-18 21:31:00 +0100 | [diff] [blame] | 3 | * |
| 4 | * Copyright (C) 2002 ARM Limited, All Rights Reserved. |
| 5 | * |
| 6 | * This program is free software; you can redistribute it and/or modify |
| 7 | * it under the terms of the GNU General Public License version 2 as |
| 8 | * published by the Free Software Foundation. |
| 9 | */ |
Rob Herring | 520f7bd | 2012-12-27 13:10:24 -0600 | [diff] [blame] | 10 | #ifndef __LINUX_IRQCHIP_ARM_GIC_H |
| 11 | #define __LINUX_IRQCHIP_ARM_GIC_H |
Russell King | f27ecac | 2005-08-18 21:31:00 +0100 | [diff] [blame] | 12 | |
Russell King | f27ecac | 2005-08-18 21:31:00 +0100 | [diff] [blame] | 13 | #define GIC_CPU_CTRL 0x00 |
| 14 | #define GIC_CPU_PRIMASK 0x04 |
| 15 | #define GIC_CPU_BINPOINT 0x08 |
| 16 | #define GIC_CPU_INTACK 0x0c |
| 17 | #define GIC_CPU_EOI 0x10 |
| 18 | #define GIC_CPU_RUNNINGPRI 0x14 |
| 19 | #define GIC_CPU_HIGHPRI 0x18 |
| 20 | |
| 21 | #define GIC_DIST_CTRL 0x000 |
| 22 | #define GIC_DIST_CTR 0x004 |
Christoffer Dall | 7c7945a | 2013-01-23 13:18:03 -0500 | [diff] [blame] | 23 | #define GIC_DIST_IGROUP 0x080 |
Russell King | f27ecac | 2005-08-18 21:31:00 +0100 | [diff] [blame] | 24 | #define GIC_DIST_ENABLE_SET 0x100 |
| 25 | #define GIC_DIST_ENABLE_CLEAR 0x180 |
| 26 | #define GIC_DIST_PENDING_SET 0x200 |
| 27 | #define GIC_DIST_PENDING_CLEAR 0x280 |
Christoffer Dall | 7c7945a | 2013-01-23 13:18:03 -0500 | [diff] [blame] | 28 | #define GIC_DIST_ACTIVE_SET 0x300 |
| 29 | #define GIC_DIST_ACTIVE_CLEAR 0x380 |
Russell King | f27ecac | 2005-08-18 21:31:00 +0100 | [diff] [blame] | 30 | #define GIC_DIST_PRI 0x400 |
| 31 | #define GIC_DIST_TARGET 0x800 |
| 32 | #define GIC_DIST_CONFIG 0xc00 |
| 33 | #define GIC_DIST_SOFTINT 0xf00 |
Nicolas Pitre | 1a6b69b | 2012-04-12 01:40:31 -0400 | [diff] [blame] | 34 | #define GIC_DIST_SGI_PENDING_CLEAR 0xf10 |
| 35 | #define GIC_DIST_SGI_PENDING_SET 0xf20 |
Russell King | f27ecac | 2005-08-18 21:31:00 +0100 | [diff] [blame] | 36 | |
Marc Zyngier | fdf77a7 | 2013-01-21 19:36:11 -0500 | [diff] [blame] | 37 | #define GICH_HCR 0x0 |
| 38 | #define GICH_VTR 0x4 |
| 39 | #define GICH_VMCR 0x8 |
| 40 | #define GICH_MISR 0x10 |
| 41 | #define GICH_EISR0 0x20 |
| 42 | #define GICH_EISR1 0x24 |
| 43 | #define GICH_ELRSR0 0x30 |
| 44 | #define GICH_ELRSR1 0x34 |
| 45 | #define GICH_APR 0xf0 |
| 46 | #define GICH_LR0 0x100 |
| 47 | |
| 48 | #define GICH_HCR_EN (1 << 0) |
| 49 | #define GICH_HCR_UIE (1 << 1) |
| 50 | |
| 51 | #define GICH_LR_VIRTUALID (0x3ff << 0) |
| 52 | #define GICH_LR_PHYSID_CPUID_SHIFT (10) |
| 53 | #define GICH_LR_PHYSID_CPUID (7 << GICH_LR_PHYSID_CPUID_SHIFT) |
| 54 | #define GICH_LR_STATE (3 << 28) |
| 55 | #define GICH_LR_PENDING_BIT (1 << 28) |
| 56 | #define GICH_LR_ACTIVE_BIT (1 << 29) |
| 57 | #define GICH_LR_EOI (1 << 19) |
| 58 | |
| 59 | #define GICH_MISR_EOI (1 << 0) |
| 60 | #define GICH_MISR_U (1 << 1) |
| 61 | |
Marc Zyngier | a96ab03 | 2013-01-24 13:39:43 +0000 | [diff] [blame] | 62 | #ifndef __ASSEMBLY__ |
| 63 | |
Rob Herring | 4294f8b | 2011-09-28 21:25:31 -0500 | [diff] [blame] | 64 | struct device_node; |
| 65 | |
Santosh Shilimkar | d7ed36a | 2011-03-02 08:03:22 +0100 | [diff] [blame] | 66 | extern struct irq_chip gic_arch_extn; |
Russell King | ff2e27a | 2010-12-04 16:13:29 +0000 | [diff] [blame] | 67 | |
Marc Zyngier | db0d4db | 2011-11-12 16:09:49 +0000 | [diff] [blame] | 68 | void gic_init_bases(unsigned int, int, void __iomem *, void __iomem *, |
Grant Likely | 7529495 | 2012-02-14 14:06:57 -0700 | [diff] [blame] | 69 | u32 offset, struct device_node *); |
Catalin Marinas | b3a1bde | 2007-02-14 19:14:56 +0100 | [diff] [blame] | 70 | void gic_cascade_irq(unsigned int gic_nr, unsigned int irq); |
Nicolas Pitre | 10d9eb8 | 2013-03-19 23:59:04 -0400 | [diff] [blame] | 71 | void gic_cpu_if_down(void); |
Changhwan Youn | e807acb | 2011-07-16 10:49:47 +0900 | [diff] [blame] | 72 | |
Marc Zyngier | db0d4db | 2011-11-12 16:09:49 +0000 | [diff] [blame] | 73 | static inline void gic_init(unsigned int nr, int start, |
| 74 | void __iomem *dist , void __iomem *cpu) |
| 75 | { |
Grant Likely | 7529495 | 2012-02-14 14:06:57 -0700 | [diff] [blame] | 76 | gic_init_bases(nr, start, dist, cpu, 0, NULL); |
Marc Zyngier | db0d4db | 2011-11-12 16:09:49 +0000 | [diff] [blame] | 77 | } |
| 78 | |
Nicolas Pitre | 14d2ca6 | 2012-11-28 18:48:19 -0500 | [diff] [blame] | 79 | void gic_send_sgi(unsigned int cpu_id, unsigned int irq); |
Nicolas Pitre | ed96762 | 2012-07-05 21:33:26 -0400 | [diff] [blame] | 80 | int gic_get_cpu_id(unsigned int cpu); |
Nicolas Pitre | 1a6b69b | 2012-04-12 01:40:31 -0400 | [diff] [blame] | 81 | void gic_migrate_target(unsigned int new_cpu_id); |
Nicolas Pitre | eeb4465 | 2012-11-28 18:17:25 -0500 | [diff] [blame] | 82 | unsigned long gic_get_sgir_physaddr(void); |
Nicolas Pitre | 1a6b69b | 2012-04-12 01:40:31 -0400 | [diff] [blame] | 83 | |
Marc Zyngier | a96ab03 | 2013-01-24 13:39:43 +0000 | [diff] [blame] | 84 | #endif /* __ASSEMBLY */ |
| 85 | |
Russell King | f27ecac | 2005-08-18 21:31:00 +0100 | [diff] [blame] | 86 | #endif |