blob: 4f5e8148440d25b2d89d8824e9387878e33e4802 [file] [log] [blame]
Linus Torvalds1da177e2005-04-16 15:20:36 -07001#ifndef _ASM_IA64_DMA_MAPPING_H
2#define _ASM_IA64_DMA_MAPPING_H
3
4/*
5 * Copyright (C) 2003-2004 Hewlett-Packard Co
6 * David Mosberger-Tang <davidm@hpl.hp.com>
7 */
Linus Torvalds1da177e2005-04-16 15:20:36 -07008#include <asm/machvec.h>
Jens Axboe9b6eccf2007-10-16 11:27:26 +02009#include <linux/scatterlist.h>
Fenghua Yu62fdd762008-10-17 12:14:13 -070010#include <asm/swiotlb.h>
FUJITA Tomonori99162192009-06-17 16:28:14 -070011#include <linux/dma-debug.h>
Fenghua Yu62fdd762008-10-17 12:14:13 -070012
John Keller175add12008-11-24 16:47:17 -060013#define ARCH_HAS_DMA_GET_REQUIRED_MASK
14
Konrad Rzeszutek Wilk9f975352010-12-06 18:24:32 -050015#define DMA_ERROR_CODE 0
16
FUJITA Tomonori160c1d82009-01-05 23:59:02 +090017extern struct dma_map_ops *dma_ops;
Fenghua Yu62fdd762008-10-17 12:14:13 -070018extern struct ia64_machine_vector ia64_mv;
19extern void set_iommu_machvec(void);
Linus Torvalds1da177e2005-04-16 15:20:36 -070020
FUJITA Tomonoric2990302009-01-07 02:13:42 +090021extern void machvec_dma_sync_single(struct device *, dma_addr_t, size_t,
22 enum dma_data_direction);
23extern void machvec_dma_sync_sg(struct device *, struct scatterlist *, int,
24 enum dma_data_direction);
25
Andrzej Pietrasiewiczbaa676f2012-03-27 14:28:18 +020026#define dma_alloc_coherent(d,s,h,f) dma_alloc_attrs(d,s,h,f,NULL)
27
28static inline void *dma_alloc_attrs(struct device *dev, size_t size,
29 dma_addr_t *daddr, gfp_t gfp,
30 struct dma_attrs *attrs)
FUJITA Tomonorib7ea6e92009-01-05 23:36:13 +090031{
FUJITA Tomonori160c1d82009-01-05 23:59:02 +090032 struct dma_map_ops *ops = platform_dma_get_ops(dev);
FUJITA Tomonori99162192009-06-17 16:28:14 -070033 void *caddr;
34
Andrzej Pietrasiewiczbaa676f2012-03-27 14:28:18 +020035 caddr = ops->alloc(dev, size, daddr, gfp, attrs);
FUJITA Tomonori99162192009-06-17 16:28:14 -070036 debug_dma_alloc_coherent(dev, size, *daddr, caddr);
37 return caddr;
FUJITA Tomonorib7ea6e92009-01-05 23:36:13 +090038}
FUJITA Tomonori3a80b6a2008-09-08 18:10:10 +090039
Andrzej Pietrasiewiczbaa676f2012-03-27 14:28:18 +020040#define dma_free_coherent(d,s,c,h) dma_free_attrs(d,s,c,h,NULL)
41
42static inline void dma_free_attrs(struct device *dev, size_t size,
43 void *caddr, dma_addr_t daddr,
44 struct dma_attrs *attrs)
Roland Dreierb7de8e72007-02-14 00:32:53 -080045{
FUJITA Tomonori160c1d82009-01-05 23:59:02 +090046 struct dma_map_ops *ops = platform_dma_get_ops(dev);
FUJITA Tomonori99162192009-06-17 16:28:14 -070047 debug_dma_free_coherent(dev, size, caddr, daddr);
Andrzej Pietrasiewiczbaa676f2012-03-27 14:28:18 +020048 ops->free(dev, size, caddr, daddr, attrs);
Roland Dreierb7de8e72007-02-14 00:32:53 -080049}
FUJITA Tomonorib7ea6e92009-01-05 23:36:13 +090050
51#define dma_alloc_noncoherent(d, s, h, f) dma_alloc_coherent(d, s, h, f)
52#define dma_free_noncoherent(d, s, v, h) dma_free_coherent(d, s, v, h)
53
FUJITA Tomonorid6d0a6a2009-06-17 16:28:13 -070054#define get_dma_ops(dev) platform_dma_get_ops(dev)
FUJITA Tomonorib7ea6e92009-01-05 23:36:13 +090055
FUJITA Tomonorid6d0a6a2009-06-17 16:28:13 -070056#include <asm-generic/dma-mapping-common.h>
FUJITA Tomonorib7ea6e92009-01-05 23:36:13 +090057
58static inline int dma_mapping_error(struct device *dev, dma_addr_t daddr)
59{
FUJITA Tomonori160c1d82009-01-05 23:59:02 +090060 struct dma_map_ops *ops = platform_dma_get_ops(dev);
FUJITA Tomonoric190ab02009-01-05 23:36:16 +090061 return ops->mapping_error(dev, daddr);
FUJITA Tomonorib7ea6e92009-01-05 23:36:13 +090062}
Linus Torvalds1da177e2005-04-16 15:20:36 -070063
FUJITA Tomonorib7ea6e92009-01-05 23:36:13 +090064static inline int dma_supported(struct device *dev, u64 mask)
65{
FUJITA Tomonori160c1d82009-01-05 23:59:02 +090066 struct dma_map_ops *ops = platform_dma_get_ops(dev);
67 return ops->dma_supported(dev, mask);
FUJITA Tomonorib7ea6e92009-01-05 23:36:13 +090068}
Linus Torvalds1da177e2005-04-16 15:20:36 -070069
70static inline int
71dma_set_mask (struct device *dev, u64 mask)
72{
73 if (!dev->dma_mask || !dma_supported(dev, mask))
74 return -EIO;
75 *dev->dma_mask = mask;
76 return 0;
77}
78
FUJITA Tomonoria0b00ca2009-07-10 10:04:56 +090079static inline bool dma_capable(struct device *dev, dma_addr_t addr, size_t size)
80{
81 if (!dev->dma_mask)
82 return 0;
83
Jan Beulichac2b3e62009-12-15 16:47:43 -080084 return addr + size - 1 <= *dev->dma_mask;
FUJITA Tomonoria0b00ca2009-07-10 10:04:56 +090085}
86
FUJITA Tomonori8d4f5332009-07-10 10:05:01 +090087static inline dma_addr_t phys_to_dma(struct device *dev, phys_addr_t paddr)
88{
89 return paddr;
90}
91
92static inline phys_addr_t dma_to_phys(struct device *dev, dma_addr_t daddr)
93{
94 return daddr;
95}
96
Linus Torvalds1da177e2005-04-16 15:20:36 -070097static inline void
Ralf Baechled3fa72e2006-12-06 20:38:56 -080098dma_cache_sync (struct device *dev, void *vaddr, size_t size,
99 enum dma_data_direction dir)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700100{
101 /*
102 * IA-64 is cache-coherent, so this is mostly a no-op. However, we do need to
103 * ensure that dma_cache_sync() enforces order, hence the mb().
104 */
105 mb();
106}
107
Linus Torvalds1da177e2005-04-16 15:20:36 -0700108#endif /* _ASM_IA64_DMA_MAPPING_H */