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Martyn Welch54508212008-09-16 10:57:47 +01001/*
Martyn Welch948e78c2010-03-01 14:41:59 +00002 * GE SBC610 Device Tree Source
Martyn Welch54508212008-09-16 10:57:47 +01003 *
Martyn Welch948e78c2010-03-01 14:41:59 +00004 * Copyright 2008 GE Intelligent Platforms Embedded Systems, Inc.
Martyn Welch54508212008-09-16 10:57:47 +01005 *
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms of the GNU General Public License as published by the
8 * Free Software Foundation; either version 2 of the License, or (at your
9 * option) any later version.
10 *
11 * Based on: SBS CM6 Device Tree Source
12 * Copyright 2007 SBS Technologies GmbH & Co. KG
13 * And: mpc8641_hpcn.dts (MPC8641 HPCN Device Tree Source)
14 * Copyright 2006 Freescale Semiconductor Inc.
15 */
16
17/*
18 * Compiled with dtc -I dts -O dtb -o gef_sbc610.dtb gef_sbc610.dts
19 */
20
21/dts-v1/;
22
23/ {
24 model = "GEF_SBC610";
25 compatible = "gef,sbc610";
26 #address-cells = <1>;
27 #size-cells = <1>;
Alessio Igor Bogani595207b2016-03-04 11:09:10 +010028 interrupt-parent = <&mpic>;
Martyn Welch54508212008-09-16 10:57:47 +010029
30 aliases {
31 ethernet0 = &enet0;
32 ethernet1 = &enet1;
33 serial0 = &serial0;
34 serial1 = &serial1;
35 pci0 = &pci0;
36 };
37
38 cpus {
39 #address-cells = <1>;
40 #size-cells = <0>;
41
42 PowerPC,8641@0 {
43 device_type = "cpu";
44 reg = <0>;
45 d-cache-line-size = <32>; // 32 bytes
46 i-cache-line-size = <32>; // 32 bytes
47 d-cache-size = <32768>; // L1, 32K
48 i-cache-size = <32768>; // L1, 32K
49 timebase-frequency = <0>; // From uboot
50 bus-frequency = <0>; // From uboot
51 clock-frequency = <0>; // From uboot
52 };
53 PowerPC,8641@1 {
54 device_type = "cpu";
55 reg = <1>;
56 d-cache-line-size = <32>; // 32 bytes
57 i-cache-line-size = <32>; // 32 bytes
58 d-cache-size = <32768>; // L1, 32K
59 i-cache-size = <32768>; // L1, 32K
60 timebase-frequency = <0>; // From uboot
61 bus-frequency = <0>; // From uboot
62 clock-frequency = <0>; // From uboot
63 };
64 };
65
66 memory {
67 device_type = "memory";
68 reg = <0x0 0x40000000>; // set by uboot
69 };
70
Martyn Welch3a470242008-10-01 09:32:39 +010071 localbus@fef05000 {
72 #address-cells = <2>;
73 #size-cells = <1>;
74 compatible = "fsl,mpc8641-localbus", "simple-bus";
Martyn Welchac4dff22009-02-27 15:53:10 +000075 reg = <0xfef05000 0x1000>;
Alessio Igor Bogani595207b2016-03-04 11:09:10 +010076 interrupts = <19 2 0 0>;
Martyn Welch3a470242008-10-01 09:32:39 +010077
Martyn Welchae1f7552010-01-11 12:23:31 +000078 ranges = <0 0 0xff000000 0x01000000 // 16MB Boot flash
79 1 0 0xe8000000 0x08000000 // Paged Flash 0
80 2 0 0xe0000000 0x08000000 // Paged Flash 1
81 3 0 0xfc100000 0x00020000 // NVRAM
82 4 0 0xfc000000 0x00008000 // FPGA
83 5 0 0xfc008000 0x00008000 // AFIX FPGA
84 6 0 0xfd000000 0x00800000 // IO FPGA (8-bit)
85 7 0 0xfd800000 0x00800000>; // IO FPGA (32-bit)
86
87 /* flash@0,0 is a mirror of part of the memory in flash@1,0
88 flash@0,0 {
89 compatible = "gef,sbc610-firmware-mirror", "cfi-flash";
90 reg = <0x0 0x0 0x1000000>;
91 bank-width = <4>;
92 device-width = <2>;
93 #address-cells = <1>;
94 #size-cells = <1>;
95 partition@0 {
96 label = "firmware";
97 reg = <0x0 0x1000000>;
98 read-only;
99 };
100 };
101 */
102
103 flash@1,0 {
104 compatible = "gef,sbc610-paged-flash", "cfi-flash";
105 reg = <0x1 0x0 0x8000000>;
106 bank-width = <4>;
107 device-width = <2>;
108 #address-cells = <1>;
109 #size-cells = <1>;
110 partition@0 {
111 label = "user";
112 reg = <0x0 0x7800000>;
113 };
114 partition@7800000 {
115 label = "firmware";
116 reg = <0x7800000 0x800000>;
117 read-only;
118 };
119 };
Martyn Welch3a470242008-10-01 09:32:39 +0100120
Martyn Welch0d81df82009-07-02 17:12:31 +0100121 nvram@3,0 {
122 device_type = "nvram";
123 compatible = "simtek,stk14ca8";
124 reg = <0x3 0x0 0x20000>;
125 };
126
Martyn Welch66758472008-10-13 16:16:45 +0100127 fpga@4,0 {
128 compatible = "gef,fpga-regs";
129 reg = <0x4 0x0 0x40>;
130 };
Martyn Welch6ec9eae2008-11-10 12:31:33 +0000131
132 wdt@4,2000 {
133 compatible = "gef,fpga-wdt";
134 reg = <0x4 0x2000 0x8>;
135 interrupts = <0x1a 0x4>;
136 interrupt-parent = <&gef_pic>;
137 };
138 /* Second watchdog available, driver currently supports one.
139 wdt@4,2010 {
140 compatible = "gef,fpga-wdt";
141 reg = <0x4 0x2010 0x8>;
142 interrupts = <0x1b 0x4>;
143 interrupt-parent = <&gef_pic>;
144 };
145 */
Martyn Welch3a470242008-10-01 09:32:39 +0100146 gef_pic: pic@4,4000 {
147 #interrupt-cells = <1>;
148 interrupt-controller;
149 compatible = "gef,fpga-pic";
150 reg = <0x4 0x4000 0x20>;
Alessio Igor Bogani595207b2016-03-04 11:09:10 +0100151 interrupts = <0x8 0x9 0 0>;
Martyn Welch3a470242008-10-01 09:32:39 +0100152
153 };
Martyn Welch965dc5f2008-11-07 14:15:42 +0000154 gef_gpio: gpio@7,14000 {
155 #gpio-cells = <2>;
156 compatible = "gef,sbc610-gpio";
157 reg = <0x7 0x14000 0x24>;
158 gpio-controller;
159 };
Martyn Welch3a470242008-10-01 09:32:39 +0100160 };
161
Martyn Welch54508212008-09-16 10:57:47 +0100162 soc@fef00000 {
163 #address-cells = <1>;
164 #size-cells = <1>;
Martyn Welch54508212008-09-16 10:57:47 +0100165 device_type = "soc";
166 compatible = "simple-bus";
167 ranges = <0x0 0xfef00000 0x00100000>;
Martyn Welch33d2d782008-11-07 13:43:43 +0000168 bus-frequency = <33333333>;
Martyn Welch54508212008-09-16 10:57:47 +0100169
Kumar Galada385782009-04-27 11:02:16 -0500170 mcm-law@0 {
171 compatible = "fsl,mcm-law";
172 reg = <0x0 0x1000>;
173 fsl,num-laws = <10>;
174 };
175
176 mcm@1000 {
177 compatible = "fsl,mpc8641-mcm", "fsl,mcm";
178 reg = <0x1000 0x1000>;
Alessio Igor Bogani595207b2016-03-04 11:09:10 +0100179 interrupts = <17 2 0 0>;
Kumar Galada385782009-04-27 11:02:16 -0500180 };
181
Alessio Igor Bogani595207b2016-03-04 11:09:10 +0100182 i2c@3000 {
Martyn Welch54508212008-09-16 10:57:47 +0100183 #address-cells = <1>;
184 #size-cells = <0>;
185 compatible = "fsl-i2c";
186 reg = <0x3000 0x100>;
Alessio Igor Bogani595207b2016-03-04 11:09:10 +0100187 interrupts = <0x2b 0x2 0 0>;
Martyn Welch54508212008-09-16 10:57:47 +0100188 dfsrr;
189
Martyn Welch7a5c62f2009-05-19 10:40:57 +0100190 hwmon@48 {
191 compatible = "national,lm92";
192 reg = <0x48>;
193 };
194
195 hwmon@4c {
196 compatible = "adi,adt7461";
197 reg = <0x4c>;
198 };
199
Martyn Welchd3a8cda2008-11-20 08:52:09 +0000200 rtc@51 {
201 compatible = "epson,rx8581";
202 reg = <0x00000051>;
203 };
204
Martyn Welch54508212008-09-16 10:57:47 +0100205 eti@6b {
206 compatible = "dallas,ds1682";
207 reg = <0x6b>;
208 };
209 };
210
Alessio Igor Bogani595207b2016-03-04 11:09:10 +0100211 i2c@3100 {
Martyn Welch54508212008-09-16 10:57:47 +0100212 #address-cells = <1>;
213 #size-cells = <0>;
214 compatible = "fsl-i2c";
215 reg = <0x3100 0x100>;
Alessio Igor Bogani595207b2016-03-04 11:09:10 +0100216 interrupts = <0x2b 0x2 0 0>;
Martyn Welch54508212008-09-16 10:57:47 +0100217 dfsrr;
218 };
219
220 dma@21300 {
221 #address-cells = <1>;
222 #size-cells = <1>;
223 compatible = "fsl,mpc8641-dma", "fsl,eloplus-dma";
224 reg = <0x21300 0x4>;
225 ranges = <0x0 0x21100 0x200>;
226 cell-index = <0>;
227 dma-channel@0 {
228 compatible = "fsl,mpc8641-dma-channel",
229 "fsl,eloplus-dma-channel";
230 reg = <0x0 0x80>;
231 cell-index = <0>;
Alessio Igor Bogani595207b2016-03-04 11:09:10 +0100232 interrupts = <20 2 0 0>;
Martyn Welch54508212008-09-16 10:57:47 +0100233 };
234 dma-channel@80 {
235 compatible = "fsl,mpc8641-dma-channel",
236 "fsl,eloplus-dma-channel";
237 reg = <0x80 0x80>;
238 cell-index = <1>;
Alessio Igor Bogani595207b2016-03-04 11:09:10 +0100239 interrupts = <21 2 0 0>;
Martyn Welch54508212008-09-16 10:57:47 +0100240 };
241 dma-channel@100 {
242 compatible = "fsl,mpc8641-dma-channel",
243 "fsl,eloplus-dma-channel";
244 reg = <0x100 0x80>;
245 cell-index = <2>;
Alessio Igor Bogani595207b2016-03-04 11:09:10 +0100246 interrupts = <22 2 0 0>;
Martyn Welch54508212008-09-16 10:57:47 +0100247 };
248 dma-channel@180 {
249 compatible = "fsl,mpc8641-dma-channel",
250 "fsl,eloplus-dma-channel";
251 reg = <0x180 0x80>;
252 cell-index = <3>;
Alessio Igor Bogani595207b2016-03-04 11:09:10 +0100253 interrupts = <23 2 0 0>;
Martyn Welch54508212008-09-16 10:57:47 +0100254 };
255 };
256
Martyn Welch54508212008-09-16 10:57:47 +0100257 enet0: ethernet@24000 {
Anton Vorontsovd8bc55f2009-03-19 21:01:51 +0300258 #address-cells = <1>;
259 #size-cells = <1>;
Martyn Welch62f3de92011-11-03 17:37:47 +0000260 cell-index = <0>;
Martyn Welch54508212008-09-16 10:57:47 +0100261 device_type = "network";
Martyn Welch62f3de92011-11-03 17:37:47 +0000262 model = "TSEC";
Martyn Welch54508212008-09-16 10:57:47 +0100263 compatible = "gianfar";
264 reg = <0x24000 0x1000>;
Anton Vorontsovd8bc55f2009-03-19 21:01:51 +0300265 ranges = <0x0 0x24000 0x1000>;
Martyn Welch54508212008-09-16 10:57:47 +0100266 local-mac-address = [ 00 00 00 00 00 00 ];
Alessio Igor Bogani595207b2016-03-04 11:09:10 +0100267 interrupts = <29 2 0 0 30 2 0 0 34 2 0 0>;
Martyn Welch62f3de92011-11-03 17:37:47 +0000268 tbi-handle = <&tbi0>;
Martyn Welch54508212008-09-16 10:57:47 +0100269 phy-handle = <&phy0>;
270 phy-connection-type = "gmii";
Anton Vorontsovd8bc55f2009-03-19 21:01:51 +0300271
272 mdio@520 {
273 #address-cells = <1>;
274 #size-cells = <0>;
275 compatible = "fsl,gianfar-mdio";
276 reg = <0x520 0x20>;
277
278 phy0: ethernet-phy@0 {
279 interrupt-parent = <&gef_pic>;
280 interrupts = <0x9 0x4>;
281 reg = <1>;
282 };
283 phy2: ethernet-phy@2 {
284 interrupt-parent = <&gef_pic>;
285 interrupts = <0x8 0x4>;
286 reg = <3>;
Martyn Welch62f3de92011-11-03 17:37:47 +0000287 };
288 tbi0: tbi-phy@11 {
289 reg = <0x11>;
290 device_type = "tbi-phy";
Anton Vorontsovd8bc55f2009-03-19 21:01:51 +0300291 };
292 };
Martyn Welch54508212008-09-16 10:57:47 +0100293 };
294
295 enet1: ethernet@26000 {
Martyn Welch62f3de92011-11-03 17:37:47 +0000296 #address-cells = <1>;
297 #size-cells = <1>;
298 cell-index = <2>;
Martyn Welch54508212008-09-16 10:57:47 +0100299 device_type = "network";
Martyn Welch62f3de92011-11-03 17:37:47 +0000300 model = "TSEC";
Martyn Welch54508212008-09-16 10:57:47 +0100301 compatible = "gianfar";
302 reg = <0x26000 0x1000>;
Martyn Welch62f3de92011-11-03 17:37:47 +0000303 ranges = <0x0 0x26000 0x1000>;
Martyn Welch54508212008-09-16 10:57:47 +0100304 local-mac-address = [ 00 00 00 00 00 00 ];
Alessio Igor Bogani595207b2016-03-04 11:09:10 +0100305 interrupts = <31 2 0 0 32 2 0 0 33 2 0 0>;
Martyn Welch62f3de92011-11-03 17:37:47 +0000306 tbi-handle = <&tbi2>;
Martyn Welch54508212008-09-16 10:57:47 +0100307 phy-handle = <&phy2>;
308 phy-connection-type = "gmii";
Martyn Welch62f3de92011-11-03 17:37:47 +0000309
310 mdio@520 {
311 #address-cells = <1>;
312 #size-cells = <0>;
313 compatible = "fsl,gianfar-tbi";
314 reg = <0x520 0x20>;
315
316 tbi2: tbi-phy@11 {
317 reg = <0x11>;
318 device_type = "tbi-phy";
319 };
320 };
Martyn Welch54508212008-09-16 10:57:47 +0100321 };
322
323 serial0: serial@4500 {
324 cell-index = <0>;
325 device_type = "serial";
Kumar Galaf706bed2011-11-28 13:58:53 -0600326 compatible = "fsl,ns16550", "ns16550";
Martyn Welch54508212008-09-16 10:57:47 +0100327 reg = <0x4500 0x100>;
328 clock-frequency = <0>;
Alessio Igor Bogani595207b2016-03-04 11:09:10 +0100329 interrupts = <0x2a 0x2 0 0>;
Martyn Welch54508212008-09-16 10:57:47 +0100330 };
331
332 serial1: serial@4600 {
333 cell-index = <1>;
334 device_type = "serial";
Kumar Galaf706bed2011-11-28 13:58:53 -0600335 compatible = "fsl,ns16550", "ns16550";
Martyn Welch54508212008-09-16 10:57:47 +0100336 reg = <0x4600 0x100>;
337 clock-frequency = <0>;
Alessio Igor Bogani595207b2016-03-04 11:09:10 +0100338 interrupts = <0x1c 0x2 0 0>;
Martyn Welch54508212008-09-16 10:57:47 +0100339 };
340
341 mpic: pic@40000 {
342 clock-frequency = <0>;
343 interrupt-controller;
344 #address-cells = <0>;
Alessio Igor Bogani595207b2016-03-04 11:09:10 +0100345 #interrupt-cells = <4>;
Martyn Welch54508212008-09-16 10:57:47 +0100346 reg = <0x40000 0x40000>;
Alessio Igor Bogani595207b2016-03-04 11:09:10 +0100347 compatible = "fsl,mpic", "chrp,open-pic";
Martyn Welch54508212008-09-16 10:57:47 +0100348 device_type = "open-pic";
349 };
350
Malcolm Crossley6459ba92010-01-11 12:23:24 +0000351 msi@41600 {
352 compatible = "fsl,mpc8641-msi", "fsl,mpic-msi";
353 reg = <0x41600 0x80>;
354 msi-available-ranges = <0 0x100>;
355 interrupts = <
Alessio Igor Bogani595207b2016-03-04 11:09:10 +0100356 0xe0 0 0 0
357 0xe1 0 0 0
358 0xe2 0 0 0
359 0xe3 0 0 0
360 0xe4 0 0 0
361 0xe5 0 0 0
362 0xe6 0 0 0
363 0xe7 0 0 0>;
Malcolm Crossley6459ba92010-01-11 12:23:24 +0000364 };
365
Martyn Welch54508212008-09-16 10:57:47 +0100366 global-utilities@e0000 {
367 compatible = "fsl,mpc8641-guts";
368 reg = <0xe0000 0x1000>;
369 fsl,has-rstcr;
370 };
371 };
372
373 pci0: pcie@fef08000 {
374 compatible = "fsl,mpc8641-pcie";
375 device_type = "pci";
Martyn Welch54508212008-09-16 10:57:47 +0100376 #size-cells = <2>;
377 #address-cells = <3>;
378 reg = <0xfef08000 0x1000>;
379 bus-range = <0x0 0xff>;
380 ranges = <0x02000000 0x0 0x80000000 0x80000000 0x0 0x40000000
381 0x01000000 0x0 0x00000000 0xfe000000 0x0 0x00400000>;
Alessio Igor Bogani595207b2016-03-04 11:09:10 +0100382 clock-frequency = <100000000>;
383 interrupts = <0x18 0x2 0 0>;
Martyn Welch54508212008-09-16 10:57:47 +0100384 interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
385 interrupt-map = <
386 0x0000 0x0 0x0 0x1 &mpic 0x0 0x1
387 0x0000 0x0 0x0 0x2 &mpic 0x1 0x1
388 0x0000 0x0 0x0 0x3 &mpic 0x2 0x1
389 0x0000 0x0 0x0 0x4 &mpic 0x3 0x1
390 >;
391
392 pcie@0 {
393 reg = <0 0 0 0 0>;
394 #size-cells = <2>;
395 #address-cells = <3>;
396 device_type = "pci";
397 ranges = <0x02000000 0x0 0x80000000
398 0x02000000 0x0 0x80000000
399 0x0 0x40000000
400
401 0x01000000 0x0 0x00000000
402 0x01000000 0x0 0x00000000
403 0x0 0x00400000>;
404 };
405 };
406};