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gerrit-public.fairphone.software / kernel / msm-4.19 / 59c69f2a51b41e9886b85f61c04e8d0d2a35f37b / . / include / asm-x86 / hpet.h
blob: 47de4b8cdda93f96d0c343f1836d5194fe0edec5 [file] [log] [blame]
Thomas Gleixnerb8ce3352007-10-12 23:04:07 +0200[diff] [blame]1#ifndef ASM_X86_HPET_H
2#define ASM_X86_HPET_H
3
4#ifdef CONFIG_HPET_TIMER
5
6/*
7 * Documentation on HPET can be found at:
8 * http://www.intel.com/ial/home/sp/pcmmspec.htm
9 * ftp://download.intel.com/ial/home/sp/mmts098.pdf
10 */
11
12#define HPET_MMAP_SIZE 1024
13
14#define HPET_ID 0x000
15#define HPET_PERIOD 0x004
16#define HPET_CFG 0x010
17#define HPET_STATUS 0x020
18#define HPET_COUNTER 0x0f0
19#define HPET_T0_CFG 0x100
20#define HPET_T0_CMP 0x108
21#define HPET_T0_ROUTE 0x110
22#define HPET_T1_CFG 0x120
23#define HPET_T1_CMP 0x128
24#define HPET_T1_ROUTE 0x130
25#define HPET_T2_CFG 0x140
26#define HPET_T2_CMP 0x148
27#define HPET_T2_ROUTE 0x150
28
29#define HPET_ID_REV 0x000000ff
30#define HPET_ID_NUMBER 0x00001f00
31#define HPET_ID_64BIT 0x00002000
32#define HPET_ID_LEGSUP 0x00008000
33#define HPET_ID_VENDOR 0xffff0000
34#define HPET_ID_NUMBER_SHIFT 8
35#define HPET_ID_VENDOR_SHIFT 16
36
37#define HPET_ID_VENDOR_8086 0x8086
38
39#define HPET_CFG_ENABLE 0x001
40#define HPET_CFG_LEGACY 0x002
41#define HPET_LEGACY_8254 2
42#define HPET_LEGACY_RTC 8
43
44#define HPET_TN_LEVEL 0x0002
45#define HPET_TN_ENABLE 0x0004
46#define HPET_TN_PERIODIC 0x0008
47#define HPET_TN_PERIODIC_CAP 0x0010
48#define HPET_TN_64BIT_CAP 0x0020
49#define HPET_TN_SETVAL 0x0040
50#define HPET_TN_32BIT 0x0100
51#define HPET_TN_ROUTE 0x3e00
52#define HPET_TN_FSB 0x4000
53#define HPET_TN_FSB_CAP 0x8000
54#define HPET_TN_ROUTE_SHIFT 9
55
56/* Max HPET Period is 10^8 femto sec as in HPET spec */
57#define HPET_MAX_PERIOD 100000000UL
58/*
59 * Min HPET period is 10^5 femto sec just for safety. If it is less than this,
60 * then 32 bit HPET counter wrapsaround in less than 0.5 sec.
61 */
62#define HPET_MIN_PERIOD 100000UL
63
64/* hpet memory map physical address */
65extern unsigned long hpet_address;
Venki Pallipadi59c69f22007-10-12 23:04:23 +0200[diff] [blame^]66extern unsigned long force_hpet_address;
Thomas Gleixnerb8ce3352007-10-12 23:04:07 +0200[diff] [blame]67extern int is_hpet_enabled(void);
68extern int hpet_enable(void);
Chris Wright31c435d2007-10-12 23:04:23 +0200[diff] [blame]69extern unsigned long hpet_readl(unsigned long a);
Venki Pallipadid54bd572007-10-12 23:04:23 +0200[diff] [blame]70extern void ich_force_hpet_resume(void);
Thomas Gleixnerb8ce3352007-10-12 23:04:07 +0200[diff] [blame]71
72#ifdef CONFIG_HPET_EMULATE_RTC
73
74#include <linux/interrupt.h>
75
76extern int hpet_mask_rtc_irq_bit(unsigned long bit_mask);
77extern int hpet_set_rtc_irq_bit(unsigned long bit_mask);
78extern int hpet_set_alarm_time(unsigned char hrs, unsigned char min,
79 unsigned char sec);
80extern int hpet_set_periodic_freq(unsigned long freq);
81extern int hpet_rtc_dropped_irq(void);
82extern int hpet_rtc_timer_init(void);
83extern irqreturn_t hpet_rtc_interrupt(int irq, void *dev_id);
84
85#endif /* CONFIG_HPET_EMULATE_RTC */
86
Thomas Gleixner96a388d2007-10-11 11:20:03 +0200[diff] [blame]87#else
Thomas Gleixnerb8ce3352007-10-12 23:04:07 +0200[diff] [blame]88
89static inline int hpet_enable(void) { return 0; }
Chris Wright31c435d2007-10-12 23:04:23 +0200[diff] [blame]90static inline unsigned long hpet_readl(unsigned long a) { return 0; }
Thomas Gleixnerb8ce3352007-10-12 23:04:07 +0200[diff] [blame]91
92#endif /* CONFIG_HPET_TIMER */
93#endif /* ASM_X86_HPET_H */