blob: 97102ebc54b19d44137945dcac23833eceec6ada [file] [log] [blame]
Linus Torvalds1da177e2005-04-16 15:20:36 -07001/*
2 * This file is subject to the terms and conditions of the GNU General Public
3 * License. See the file "COPYING" in the main directory of this archive
4 * for more details.
5 *
6 * Copyright (C) 1994 by Waldorf GMBH, written by Ralf Baechle
7 * Copyright (C) 1995, 96, 97, 98, 99, 2000, 01, 02, 03 by Ralf Baechle
8 */
9#ifndef _ASM_IRQ_H
10#define _ASM_IRQ_H
11
Linus Torvalds1da177e2005-04-16 15:20:36 -070012#include <linux/linkage.h>
Ralf Baechle41c594a2006-04-05 09:45:45 +010013
14#include <asm/mipsmtregs.h>
15
Linus Torvalds1da177e2005-04-16 15:20:36 -070016#include <irq.h>
17
18#ifdef CONFIG_I8259
19static inline int irq_canonicalize(int irq)
20{
Atsushi Nemoto2fa79372007-01-14 23:41:42 +090021 return ((irq == I8259A_IRQ_BASE + 2) ? I8259A_IRQ_BASE + 9 : irq);
Linus Torvalds1da177e2005-04-16 15:20:36 -070022}
23#else
24#define irq_canonicalize(irq) (irq) /* Sane hardware, sane code ... */
25#endif
26
Kevin D. Kissell0db34212007-07-12 16:21:08 +010027#ifdef CONFIG_MIPS_MT_SMTC_IM_BACKSTOP
Ralf Baechle41c594a2006-04-05 09:45:45 +010028/*
29 * Clear interrupt mask handling "backstop" if irq_hwmask
30 * entry so indicates. This implies that the ack() or end()
31 * functions will take over re-enabling the low-level mask.
32 * Otherwise it will be done on return from exception.
33 */
Atsushi Nemotof9bba752007-01-08 00:50:34 +090034#define __DO_IRQ_SMTC_HOOK(irq) \
Ralf Baechle41c594a2006-04-05 09:45:45 +010035do { \
36 if (irq_hwmask[irq] & 0x0000ff00) \
37 write_c0_tccontext(read_c0_tccontext() & \
38 ~(irq_hwmask[irq] & 0x0000ff00)); \
39} while (0)
40#else
Atsushi Nemotof9bba752007-01-08 00:50:34 +090041#define __DO_IRQ_SMTC_HOOK(irq) do { } while (0)
Ralf Baechle41c594a2006-04-05 09:45:45 +010042#endif
43
Linus Torvalds1da177e2005-04-16 15:20:36 -070044/*
45 * do_IRQ handles all normal device IRQ's (the special
46 * SMP cross-CPU interrupts have their own specific
47 * handlers).
48 *
49 * Ideally there should be away to get this into kernel/irq/handle.c to
50 * avoid the overhead of a call for just a tiny function ...
51 */
Ralf Baechle937a8012006-10-07 19:44:33 +010052#define do_IRQ(irq) \
Linus Torvalds1da177e2005-04-16 15:20:36 -070053do { \
54 irq_enter(); \
Atsushi Nemotof9bba752007-01-08 00:50:34 +090055 __DO_IRQ_SMTC_HOOK(irq); \
Atsushi Nemoto14178362006-11-14 01:13:18 +090056 generic_handle_irq(irq); \
Linus Torvalds1da177e2005-04-16 15:20:36 -070057 irq_exit(); \
58} while (0)
59
Linus Torvalds1da177e2005-04-16 15:20:36 -070060extern void arch_init_irq(void);
Ralf Baechle937a8012006-10-07 19:44:33 +010061extern void spurious_interrupt(void);
Linus Torvalds1da177e2005-04-16 15:20:36 -070062
Ralf Baechle41c594a2006-04-05 09:45:45 +010063#ifdef CONFIG_MIPS_MT_SMTC
64struct irqaction;
65
66extern unsigned long irq_hwmask[];
67extern int setup_irq_smtc(unsigned int irq, struct irqaction * new,
68 unsigned long hwmask);
69#endif /* CONFIG_MIPS_MT_SMTC */
70
Ralf Baechle4a4cf772006-11-06 17:41:06 +000071extern int allocate_irqno(void);
72extern void alloc_legacy_irqno(void);
73extern void free_irqno(unsigned int irq);
74
Ralf Baechle3b1d4ed2007-06-20 22:27:10 +010075/*
76 * Before R2 the timer and performance counter interrupts were both fixed to
77 * IE7. Since R2 their number has to be read from the c0_intctl register.
78 */
79#define CP0_LEGACY_COMPARE_IRQ 7
80
81extern int cp0_compare_irq;
82extern int cp0_perfcount_irq;
83
Linus Torvalds1da177e2005-04-16 15:20:36 -070084#endif /* _ASM_IRQ_H */