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Yoshihiro Shimodacbe9da02008-07-16 20:21:09 +09001/*
2 * Renesas Technology Corp. R0P7785LC0011RL Support.
3 *
4 * Copyright (C) 2008 Yoshihiro Shimoda
Paul Mundta77b5ac2009-05-13 17:55:00 +09005 * Copyright (C) 2009 Paul Mundt
Yoshihiro Shimodacbe9da02008-07-16 20:21:09 +09006 *
7 * This file is subject to the terms and conditions of the GNU General Public
8 * License. See the file "COPYING" in the main directory of this archive
9 * for more details.
10 */
Yoshihiro Shimodacbe9da02008-07-16 20:21:09 +090011#include <linux/init.h>
12#include <linux/platform_device.h>
13#include <linux/sm501.h>
14#include <linux/sm501-regs.h>
15#include <linux/fb.h>
16#include <linux/mtd/physmap.h>
17#include <linux/delay.h>
Yoshihiro Shimoda5a62a222009-05-26 09:33:02 +000018#include <linux/interrupt.h>
Yoshihiro Shimodacbe9da02008-07-16 20:21:09 +090019#include <linux/i2c.h>
20#include <linux/i2c-pca-platform.h>
21#include <linux/i2c-algo-pca.h>
Yoshihiro Shimoda5a62a222009-05-26 09:33:02 +000022#include <linux/usb/r8a66597.h>
Paul Mundt604437f2009-01-09 15:11:58 +090023#include <linux/irq.h>
Paul Mundta77b5ac2009-05-13 17:55:00 +090024#include <linux/clk.h>
25#include <linux/errno.h>
Paul Mundt7639a452008-10-20 13:02:48 +090026#include <mach/sh7785lcr.h>
Yoshihiro Shimoda5a62a222009-05-26 09:33:02 +000027#include <cpu/sh7785.h>
Paul Mundta77b5ac2009-05-13 17:55:00 +090028#include <asm/heartbeat.h>
29#include <asm/clock.h>
Yoshihiro Shimodacbe9da02008-07-16 20:21:09 +090030
31/*
32 * NOTE: This board has 2 physical memory maps.
33 * Please look at include/asm-sh/sh7785lcr.h or hardware manual.
34 */
35static struct resource heartbeat_resources[] = {
36 [0] = {
37 .start = PLD_LEDCR,
38 .end = PLD_LEDCR,
39 .flags = IORESOURCE_MEM,
40 },
41};
42
43static struct heartbeat_data heartbeat_data = {
44 .regsize = 8,
45};
46
47static struct platform_device heartbeat_device = {
48 .name = "heartbeat",
49 .id = -1,
50 .dev = {
51 .platform_data = &heartbeat_data,
52 },
53 .num_resources = ARRAY_SIZE(heartbeat_resources),
54 .resource = heartbeat_resources,
55};
56
57static struct mtd_partition nor_flash_partitions[] = {
58 {
59 .name = "loader",
60 .offset = 0x00000000,
61 .size = 512 * 1024,
62 },
63 {
64 .name = "bootenv",
65 .offset = MTDPART_OFS_APPEND,
66 .size = 512 * 1024,
67 },
68 {
69 .name = "kernel",
70 .offset = MTDPART_OFS_APPEND,
71 .size = 4 * 1024 * 1024,
72 },
73 {
74 .name = "data",
75 .offset = MTDPART_OFS_APPEND,
76 .size = MTDPART_SIZ_FULL,
77 },
78};
79
80static struct physmap_flash_data nor_flash_data = {
81 .width = 4,
82 .parts = nor_flash_partitions,
83 .nr_parts = ARRAY_SIZE(nor_flash_partitions),
84};
85
86static struct resource nor_flash_resources[] = {
87 [0] = {
88 .start = NOR_FLASH_ADDR,
89 .end = NOR_FLASH_ADDR + NOR_FLASH_SIZE - 1,
90 .flags = IORESOURCE_MEM,
91 }
92};
93
94static struct platform_device nor_flash_device = {
95 .name = "physmap-flash",
96 .dev = {
97 .platform_data = &nor_flash_data,
98 },
99 .num_resources = ARRAY_SIZE(nor_flash_resources),
100 .resource = nor_flash_resources,
101};
102
Yoshihiro Shimoda5a62a222009-05-26 09:33:02 +0000103static struct r8a66597_platdata r8a66597_data = {
104 .xtal = R8A66597_PLATDATA_XTAL_12MHZ,
105 .vif = 1,
106};
107
Yoshihiro Shimodacbe9da02008-07-16 20:21:09 +0900108static struct resource r8a66597_usb_host_resources[] = {
109 [0] = {
Yoshihiro Shimodacbe9da02008-07-16 20:21:09 +0900110 .start = R8A66597_ADDR,
111 .end = R8A66597_ADDR + R8A66597_SIZE - 1,
112 .flags = IORESOURCE_MEM,
113 },
114 [1] = {
Yoshihiro Shimodacbe9da02008-07-16 20:21:09 +0900115 .start = 2,
116 .end = 2,
Yoshihiro Shimoda5a62a222009-05-26 09:33:02 +0000117 .flags = IORESOURCE_IRQ | IRQF_TRIGGER_LOW,
Yoshihiro Shimodacbe9da02008-07-16 20:21:09 +0900118 },
119};
120
121static struct platform_device r8a66597_usb_host_device = {
122 .name = "r8a66597_hcd",
123 .id = -1,
124 .dev = {
125 .dma_mask = NULL,
126 .coherent_dma_mask = 0xffffffff,
Yoshihiro Shimoda5a62a222009-05-26 09:33:02 +0000127 .platform_data = &r8a66597_data,
Yoshihiro Shimodacbe9da02008-07-16 20:21:09 +0900128 },
129 .num_resources = ARRAY_SIZE(r8a66597_usb_host_resources),
130 .resource = r8a66597_usb_host_resources,
131};
132
133static struct resource sm501_resources[] = {
134 [0] = {
135 .start = SM107_MEM_ADDR,
136 .end = SM107_MEM_ADDR + SM107_MEM_SIZE - 1,
137 .flags = IORESOURCE_MEM,
138 },
139 [1] = {
140 .start = SM107_REG_ADDR,
141 .end = SM107_REG_ADDR + SM107_REG_SIZE - 1,
142 .flags = IORESOURCE_MEM,
143 },
144 [2] = {
145 .start = 10,
146 .flags = IORESOURCE_IRQ,
147 },
148};
149
150static struct fb_videomode sm501_default_mode_crt = {
151 .pixclock = 35714, /* 28MHz */
152 .xres = 640,
153 .yres = 480,
154 .left_margin = 105,
155 .right_margin = 16,
156 .upper_margin = 33,
157 .lower_margin = 10,
158 .hsync_len = 39,
159 .vsync_len = 2,
160 .sync = FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
161};
162
163static struct fb_videomode sm501_default_mode_pnl = {
164 .pixclock = 40000, /* 25MHz */
165 .xres = 640,
166 .yres = 480,
167 .left_margin = 2,
168 .right_margin = 16,
169 .upper_margin = 33,
170 .lower_margin = 10,
171 .hsync_len = 39,
172 .vsync_len = 2,
173 .sync = 0,
174};
175
176static struct sm501_platdata_fbsub sm501_pdata_fbsub_pnl = {
177 .def_bpp = 16,
178 .def_mode = &sm501_default_mode_pnl,
179 .flags = SM501FB_FLAG_USE_INIT_MODE |
180 SM501FB_FLAG_USE_HWCURSOR |
181 SM501FB_FLAG_USE_HWACCEL |
182 SM501FB_FLAG_DISABLE_AT_EXIT |
183 SM501FB_FLAG_PANEL_NO_VBIASEN,
184};
185
186static struct sm501_platdata_fbsub sm501_pdata_fbsub_crt = {
187 .def_bpp = 16,
188 .def_mode = &sm501_default_mode_crt,
189 .flags = SM501FB_FLAG_USE_INIT_MODE |
190 SM501FB_FLAG_USE_HWCURSOR |
191 SM501FB_FLAG_USE_HWACCEL |
192 SM501FB_FLAG_DISABLE_AT_EXIT,
193};
194
195static struct sm501_platdata_fb sm501_fb_pdata = {
196 .fb_route = SM501_FB_OWN,
197 .fb_crt = &sm501_pdata_fbsub_crt,
198 .fb_pnl = &sm501_pdata_fbsub_pnl,
199};
200
201static struct sm501_initdata sm501_initdata = {
202 .gpio_high = {
203 .set = 0x00001fe0,
204 .mask = 0x0,
205 },
206 .devices = 0,
207 .mclk = 84 * 1000000,
208 .m1xclk = 112 * 1000000,
209};
210
211static struct sm501_platdata sm501_platform_data = {
212 .init = &sm501_initdata,
213 .fb = &sm501_fb_pdata,
214};
215
216static struct platform_device sm501_device = {
217 .name = "sm501",
218 .id = -1,
219 .dev = {
220 .platform_data = &sm501_platform_data,
221 },
222 .num_resources = ARRAY_SIZE(sm501_resources),
223 .resource = sm501_resources,
224};
225
226static struct resource i2c_resources[] = {
227 [0] = {
228 .start = PCA9564_ADDR,
229 .end = PCA9564_ADDR + PCA9564_SIZE - 1,
230 .flags = IORESOURCE_MEM | IORESOURCE_MEM_8BIT,
231 },
232 [1] = {
233 .start = 12,
234 .end = 12,
235 .flags = IORESOURCE_IRQ,
236 },
237};
238
239static struct i2c_pca9564_pf_platform_data i2c_platform_data = {
240 .gpio = 0,
241 .i2c_clock_speed = I2C_PCA_CON_330kHz,
Wolfram Sang8e99ada2009-03-28 21:34:45 +0100242 .timeout = HZ,
Yoshihiro Shimodacbe9da02008-07-16 20:21:09 +0900243};
244
245static struct platform_device i2c_device = {
246 .name = "i2c-pca-platform",
247 .id = -1,
248 .dev = {
249 .platform_data = &i2c_platform_data,
250 },
251 .num_resources = ARRAY_SIZE(i2c_resources),
252 .resource = i2c_resources,
253};
254
255static struct platform_device *sh7785lcr_devices[] __initdata = {
256 &heartbeat_device,
257 &nor_flash_device,
258 &r8a66597_usb_host_device,
259 &sm501_device,
260 &i2c_device,
261};
262
263static struct i2c_board_info __initdata sh7785lcr_i2c_devices[] = {
264 {
265 I2C_BOARD_INFO("r2025sd", 0x32),
266 },
267};
268
269static int __init sh7785lcr_devices_setup(void)
270{
271 i2c_register_board_info(0, sh7785lcr_i2c_devices,
272 ARRAY_SIZE(sh7785lcr_i2c_devices));
273
274 return platform_add_devices(sh7785lcr_devices,
275 ARRAY_SIZE(sh7785lcr_devices));
276}
277__initcall(sh7785lcr_devices_setup);
278
279/* Initialize IRQ setting */
280void __init init_sh7785lcr_IRQ(void)
281{
282 plat_irq_setup_pins(IRQ_MODE_IRQ7654);
283 plat_irq_setup_pins(IRQ_MODE_IRQ3210);
284}
285
Paul Mundta77b5ac2009-05-13 17:55:00 +0900286static int sh7785lcr_clk_init(void)
287{
288 struct clk *clk;
289 int ret;
290
291 clk = clk_get(NULL, "extal");
292 if (!clk || IS_ERR(clk))
293 return PTR_ERR(clk);
294 ret = clk_set_rate(clk, 33333333);
295 clk_put(clk);
296
297 return ret;
298}
299
Yoshihiro Shimodacbe9da02008-07-16 20:21:09 +0900300static void sh7785lcr_power_off(void)
301{
Yoshihiro Shimodadf4d4f12009-03-10 15:50:44 +0900302 unsigned char *p;
303
304 p = ioremap(PLD_POFCR, PLD_POFCR + 1);
305 if (!p) {
306 printk(KERN_ERR "%s: ioremap error.\n", __func__);
307 return;
308 }
309 *p = 0x01;
310 iounmap(p);
Magnus Damm600fa572009-03-11 08:14:26 +0000311 set_bl_bit();
312 while (1)
313 cpu_relax();
Yoshihiro Shimodacbe9da02008-07-16 20:21:09 +0900314}
315
316/* Initialize the board */
317static void __init sh7785lcr_setup(char **cmdline_p)
318{
319 void __iomem *sm501_reg;
320
321 printk(KERN_INFO "Renesas Technology Corp. R0P7785LC0011RL support.\n");
322
323 pm_power_off = sh7785lcr_power_off;
324
325 /* sm501 DRAM configuration */
326 sm501_reg = (void __iomem *)0xb3e00000 + SM501_DRAM_CONTROL;
327 writel(0x000307c2, sm501_reg);
328}
329
Magnus Damm63d12e22009-05-28 12:00:25 +0000330/* Return the board specific boot mode pin configuration */
331static int sh7785lcr_mode_pins(void)
332{
333 int value = 0;
334
335 /* These are the factory default settings of S1 and S2.
336 * If you change these dip switches then you will need to
337 * adjust the values below as well.
338 */
Magnus Damm0d4fdbb2009-06-02 09:22:02 +0000339 value |= MODE_PIN4; /* Clock Mode 16 */
340 value |= MODE_PIN5; /* 32-bit Area0 bus width */
341 value |= MODE_PIN6; /* 32-bit Area0 bus width */
342 value |= MODE_PIN7; /* Area 0 SRAM interface [fixed] */
343 value |= MODE_PIN8; /* Little Endian */
344 value |= MODE_PIN9; /* Master Mode */
345 value |= MODE_PIN14; /* No PLL step-up */
Magnus Damm63d12e22009-05-28 12:00:25 +0000346
347 return value;
348}
349
Yoshihiro Shimodacbe9da02008-07-16 20:21:09 +0900350/*
351 * The Machine Vector
352 */
353static struct sh_machine_vector mv_sh7785lcr __initmv = {
354 .mv_name = "SH7785LCR",
355 .mv_setup = sh7785lcr_setup,
Paul Mundta77b5ac2009-05-13 17:55:00 +0900356 .mv_clk_init = sh7785lcr_clk_init,
Yoshihiro Shimodacbe9da02008-07-16 20:21:09 +0900357 .mv_init_irq = init_sh7785lcr_IRQ,
Magnus Damm63d12e22009-05-28 12:00:25 +0000358 .mv_mode_pins = sh7785lcr_mode_pins,
Yoshihiro Shimodacbe9da02008-07-16 20:21:09 +0900359};
360