blob: 7cfb59c9136d4169f4fc149a87d64e47f2a19389 [file] [log] [blame]
Ulf Hansson3b01f872012-08-27 15:45:50 +02001/*
2 * PRCC clock implementation for ux500 platform.
3 *
4 * Copyright (C) 2012 ST-Ericsson SA
5 * Author: Ulf Hansson <ulf.hansson@linaro.org>
6 *
7 * License terms: GNU General Public License (GPL) version 2
8 */
9
10#include <linux/clk-provider.h>
Ulf Hansson3b01f872012-08-27 15:45:50 +020011#include <linux/slab.h>
12#include <linux/io.h>
13#include <linux/err.h>
14#include <linux/types.h>
Ulf Hansson3b01f872012-08-27 15:45:50 +020015
16#include "clk.h"
17
18#define PRCC_PCKEN 0x000
19#define PRCC_PCKDIS 0x004
20#define PRCC_KCKEN 0x008
21#define PRCC_KCKDIS 0x00C
22#define PRCC_PCKSR 0x010
23#define PRCC_KCKSR 0x014
24
25#define to_clk_prcc(_hw) container_of(_hw, struct clk_prcc, hw)
26
27struct clk_prcc {
28 struct clk_hw hw;
29 void __iomem *base;
30 u32 cg_sel;
31 int is_enabled;
32};
33
34/* PRCC clock operations. */
35
36static int clk_prcc_pclk_enable(struct clk_hw *hw)
37{
38 struct clk_prcc *clk = to_clk_prcc(hw);
39
40 writel(clk->cg_sel, (clk->base + PRCC_PCKEN));
41 while (!(readl(clk->base + PRCC_PCKSR) & clk->cg_sel))
42 cpu_relax();
43
44 clk->is_enabled = 1;
45 return 0;
46}
47
48static void clk_prcc_pclk_disable(struct clk_hw *hw)
49{
50 struct clk_prcc *clk = to_clk_prcc(hw);
51
52 writel(clk->cg_sel, (clk->base + PRCC_PCKDIS));
53 clk->is_enabled = 0;
54}
55
56static int clk_prcc_kclk_enable(struct clk_hw *hw)
57{
58 struct clk_prcc *clk = to_clk_prcc(hw);
59
60 writel(clk->cg_sel, (clk->base + PRCC_KCKEN));
61 while (!(readl(clk->base + PRCC_KCKSR) & clk->cg_sel))
62 cpu_relax();
63
64 clk->is_enabled = 1;
65 return 0;
66}
67
68static void clk_prcc_kclk_disable(struct clk_hw *hw)
69{
70 struct clk_prcc *clk = to_clk_prcc(hw);
71
72 writel(clk->cg_sel, (clk->base + PRCC_KCKDIS));
73 clk->is_enabled = 0;
74}
75
76static int clk_prcc_is_enabled(struct clk_hw *hw)
77{
78 struct clk_prcc *clk = to_clk_prcc(hw);
79 return clk->is_enabled;
80}
81
Arvind Yadav56d87772017-08-28 12:32:41 +053082static const struct clk_ops clk_prcc_pclk_ops = {
Ulf Hansson3b01f872012-08-27 15:45:50 +020083 .enable = clk_prcc_pclk_enable,
84 .disable = clk_prcc_pclk_disable,
85 .is_enabled = clk_prcc_is_enabled,
86};
87
Arvind Yadav56d87772017-08-28 12:32:41 +053088static const struct clk_ops clk_prcc_kclk_ops = {
Ulf Hansson3b01f872012-08-27 15:45:50 +020089 .enable = clk_prcc_kclk_enable,
90 .disable = clk_prcc_kclk_disable,
91 .is_enabled = clk_prcc_is_enabled,
92};
93
94static struct clk *clk_reg_prcc(const char *name,
95 const char *parent_name,
96 resource_size_t phy_base,
97 u32 cg_sel,
98 unsigned long flags,
Arvind Yadav56d87772017-08-28 12:32:41 +053099 const struct clk_ops *clk_prcc_ops)
Ulf Hansson3b01f872012-08-27 15:45:50 +0200100{
101 struct clk_prcc *clk;
102 struct clk_init_data clk_prcc_init;
103 struct clk *clk_reg;
104
105 if (!name) {
106 pr_err("clk_prcc: %s invalid arguments passed\n", __func__);
107 return ERR_PTR(-EINVAL);
108 }
109
Markus Elfring0b10adbae2017-09-27 20:30:53 +0200110 clk = kzalloc(sizeof(*clk), GFP_KERNEL);
Markus Elfring7a294dc2017-09-27 20:23:58 +0200111 if (!clk)
Ulf Hansson3b01f872012-08-27 15:45:50 +0200112 return ERR_PTR(-ENOMEM);
Ulf Hansson3b01f872012-08-27 15:45:50 +0200113
114 clk->base = ioremap(phy_base, SZ_4K);
115 if (!clk->base)
116 goto free_clk;
117
118 clk->cg_sel = cg_sel;
119 clk->is_enabled = 1;
120
121 clk_prcc_init.name = name;
122 clk_prcc_init.ops = clk_prcc_ops;
123 clk_prcc_init.flags = flags;
124 clk_prcc_init.parent_names = (parent_name ? &parent_name : NULL);
125 clk_prcc_init.num_parents = (parent_name ? 1 : 0);
126 clk->hw.init = &clk_prcc_init;
127
128 clk_reg = clk_register(NULL, &clk->hw);
129 if (IS_ERR_OR_NULL(clk_reg))
130 goto unmap_clk;
131
132 return clk_reg;
133
134unmap_clk:
135 iounmap(clk->base);
136free_clk:
137 kfree(clk);
138 pr_err("clk_prcc: %s failed to register clk\n", __func__);
139 return ERR_PTR(-ENOMEM);
140}
141
142struct clk *clk_reg_prcc_pclk(const char *name,
143 const char *parent_name,
144 resource_size_t phy_base,
145 u32 cg_sel,
146 unsigned long flags)
147{
148 return clk_reg_prcc(name, parent_name, phy_base, cg_sel, flags,
149 &clk_prcc_pclk_ops);
150}
151
152struct clk *clk_reg_prcc_kclk(const char *name,
153 const char *parent_name,
154 resource_size_t phy_base,
155 u32 cg_sel,
156 unsigned long flags)
157{
158 return clk_reg_prcc(name, parent_name, phy_base, cg_sel, flags,
159 &clk_prcc_kclk_ops);
160}