Gitiles
Code Review Sign In
gerrit-public.fairphone.software / kernel / msm-4.19 / 5b43af6d25461d7de293e0704d3b4631dda9b1e8 / . / arch / arm / boot / dts / imx6qdl-dfi-fs700-m60.dtsi
blob: d78312c63672dc71d2ebbf102c77144c9b8778f2 [file] [log] [blame]
Dong Aisheng89c1a8cf2015-07-22 20:53:02 +0800[diff] [blame]1#include <dt-bindings/gpio/gpio.h>
2
Sascha Hauer420127e2014-01-18 16:41:30 +0800[diff] [blame]3/ {
4 regulators {
5 compatible = "simple-bus";
6 #address-cells = <1>;
7 #size-cells = <0>;
8
9 dummy_reg: regulator@0 {
10 compatible = "regulator-fixed";
11 reg = <0>;
12 regulator-name = "dummy-supply";
13 };
14
15 reg_usb_otg_vbus: regulator@1 {
16 compatible = "regulator-fixed";
17 reg = <1>;
18 regulator-name = "usb_otg_vbus";
19 regulator-min-microvolt = <5000000>;
20 regulator-max-microvolt = <5000000>;
21 gpio = <&gpio3 22 0>;
22 enable-active-high;
23 };
24 };
25
26 chosen {
Sascha Hauer48f51962014-05-07 15:19:00 +0200[diff] [blame]27 stdout-path = &uart1;
Sascha Hauer420127e2014-01-18 16:41:30 +0800[diff] [blame]28 };
29};
30
31&ecspi3 {
Sascha Hauer420127e2014-01-18 16:41:30 +0800[diff] [blame]32 cs-gpios = <&gpio4 24 0>;
33 pinctrl-names = "default";
34 pinctrl-0 = <&pinctrl_ecspi3>;
35 status = "okay";
36
37 flash: m25p80@0 {
38 #address-cells = <1>;
39 #size-cells = <1>;
Rafał Miłecki79826ac2015-08-16 08:39:17 +0200[diff] [blame]40 compatible = "sst,sst25vf040b", "jedec,spi-nor";
Sascha Hauer420127e2014-01-18 16:41:30 +0800[diff] [blame]41 spi-max-frequency = <20000000>;
42 reg = <0>;
43 };
44};
45
46&fec {
47 pinctrl-names = "default";
48 pinctrl-0 = <&pinctrl_enet>;
49 status = "okay";
50 phy-mode = "rgmii";
51};
52
53&iomuxc {
54 pinctrl-names = "default";
55 pinctrl-0 = <&pinctrl_hog>;
56
57 imx6qdl-dfi-fs700-m60 {
58 pinctrl_hog: hoggrp {
59 fsl,pins = <
60 MX6QDL_PAD_ENET_CRS_DV__GPIO1_IO25 0x80000000
61 MX6QDL_PAD_GPIO_18__GPIO7_IO13 0x80000000 /* PMIC irq */
62 MX6QDL_PAD_EIM_D26__GPIO3_IO26 0x80000000 /* MAX11801 irq */
63 MX6QDL_PAD_NANDF_D5__GPIO2_IO05 0x000030b0 /* Backlight enable */
64 >;
65 };
66
67 pinctrl_enet: enetgrp {
68 fsl,pins = <
Uwe Kleine-Königc007b3a2016-07-08 23:22:54 +0200[diff] [blame]69 MX6QDL_PAD_RGMII_RXC__RGMII_RXC 0x1b030
70 MX6QDL_PAD_RGMII_RD0__RGMII_RD0 0x1b030
71 MX6QDL_PAD_RGMII_RD1__RGMII_RD1 0x1b030
72 MX6QDL_PAD_RGMII_RD2__RGMII_RD2 0x1b030
73 MX6QDL_PAD_RGMII_RD3__RGMII_RD3 0x1b030
74 MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x1b030
75 MX6QDL_PAD_RGMII_TXC__RGMII_TXC 0x1b030
76 MX6QDL_PAD_RGMII_TD0__RGMII_TD0 0x1b030
77 MX6QDL_PAD_RGMII_TD1__RGMII_TD1 0x1b030
78 MX6QDL_PAD_RGMII_TD2__RGMII_TD2 0x1b030
79 MX6QDL_PAD_RGMII_TD3__RGMII_TD3 0x1b030
80 MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x1b030
Sascha Hauer420127e2014-01-18 16:41:30 +0800[diff] [blame]81 MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK 0x1b0b0
82 MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x1b0b0
83 MX6QDL_PAD_ENET_MDC__ENET_MDC 0x1b0b0
84 MX6QDL_PAD_GPIO_16__ENET_REF_CLK 0x4001b0a8
85 >;
86 };
87
88 pinctrl_i2c2: i2c2grp {
89 fsl,pins = <
90 MX6QDL_PAD_EIM_EB2__I2C2_SCL 0x4001b8b1
91 MX6QDL_PAD_EIM_D16__I2C2_SDA 0x4001b8b1
92 >;
93 };
94
95 pinctrl_uart1: uart1grp {
96 fsl,pins = <
97 MX6QDL_PAD_CSI0_DAT10__UART1_TX_DATA 0x1b0b1
98 MX6QDL_PAD_CSI0_DAT11__UART1_RX_DATA 0x1b0b1
99 >;
100 };
101
102 pinctrl_usbotg: usbotggrp {
103 fsl,pins = <
104 MX6QDL_PAD_ENET_RX_ER__USB_OTG_ID 0x17059
105 >;
106 };
107
108 pinctrl_usdhc2: usdhc2grp {
109 fsl,pins = <
110 MX6QDL_PAD_SD2_CMD__SD2_CMD 0x17059
111 MX6QDL_PAD_SD2_CLK__SD2_CLK 0x10059
112 MX6QDL_PAD_SD2_DAT0__SD2_DATA0 0x17059
113 MX6QDL_PAD_SD2_DAT1__SD2_DATA1 0x17059
114 MX6QDL_PAD_SD2_DAT2__SD2_DATA2 0x17059
115 MX6QDL_PAD_SD2_DAT3__SD2_DATA3 0x17059
116 MX6QDL_PAD_NANDF_D2__GPIO2_IO02 0x80000000 /* card detect */
117 >;
118 };
119
120 pinctrl_usdhc3: usdhc3grp {
121 fsl,pins = <
122 MX6QDL_PAD_SD3_CMD__SD3_CMD 0x17059
123 MX6QDL_PAD_SD3_CLK__SD3_CLK 0x10059
124 MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x17059
125 MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x17059
126 MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x17059
127 MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x17059
128 >;
129 };
130
131 pinctrl_usdhc4: usdhc4grp {
132 fsl,pins = <
133 MX6QDL_PAD_SD4_CMD__SD4_CMD 0x17059
134 MX6QDL_PAD_SD4_CLK__SD4_CLK 0x10059
135 MX6QDL_PAD_SD4_DAT0__SD4_DATA0 0x17059
136 MX6QDL_PAD_SD4_DAT1__SD4_DATA1 0x17059
137 MX6QDL_PAD_SD4_DAT2__SD4_DATA2 0x17059
138 MX6QDL_PAD_SD4_DAT3__SD4_DATA3 0x17059
139 MX6QDL_PAD_SD4_DAT4__SD4_DATA4 0x17059
140 MX6QDL_PAD_SD4_DAT5__SD4_DATA5 0x17059
141 MX6QDL_PAD_SD4_DAT6__SD4_DATA6 0x17059
142 MX6QDL_PAD_SD4_DAT7__SD4_DATA7 0x17059
143 >;
144 };
145
146 pinctrl_ecspi3: ecspi3grp {
147 fsl,pins = <
148 MX6QDL_PAD_DISP0_DAT2__ECSPI3_MISO 0x100b1
149 MX6QDL_PAD_DISP0_DAT1__ECSPI3_MOSI 0x100b1
150 MX6QDL_PAD_DISP0_DAT0__ECSPI3_SCLK 0x100b1
151 MX6QDL_PAD_DISP0_DAT3__GPIO4_IO24 0x80000000 /* SPI NOR chipselect */
152 >;
153 };
154 };
155};
156
157&i2c2 {
158 pinctrl-names = "default";
159 pinctrl-0 = <&pinctrl_i2c2>;
160 status = "okay";
161};
162
163&uart1 {
164 pinctrl-names = "default";
165 pinctrl-0 = <&pinctrl_uart1>;
166 status = "okay";
167};
168
169&usbh1 {
170 status = "okay";
171};
172
173&usbotg {
174 vbus-supply = <&reg_usb_otg_vbus>;
175 pinctrl-names = "default";
176 pinctrl-0 = <&pinctrl_usbotg>;
177 disable-over-current;
178 dr_mode = "host";
179 status = "okay";
180};
181
182&usdhc2 { /* module slot */
183 pinctrl-names = "default";
184 pinctrl-0 = <&pinctrl_usdhc2>;
Dong Aisheng89c1a8cf2015-07-22 20:53:02 +0800[diff] [blame]185 cd-gpios = <&gpio2 2 GPIO_ACTIVE_LOW>;
Sascha Hauer420127e2014-01-18 16:41:30 +0800[diff] [blame]186 status = "okay";
187};
188
189&usdhc3 { /* baseboard slot */
190 pinctrl-names = "default";
191 pinctrl-0 = <&pinctrl_usdhc3>;
192};
193
194&usdhc4 { /* eMMC */
195 pinctrl-names = "default";
196 pinctrl-0 = <&pinctrl_usdhc4>;
197 bus-width = <8>;
198 non-removable;
199 status = "okay";
200};