Dan Williams | 6f231dd | 2011-07-02 22:56:22 -0700 | [diff] [blame] | 1 | /* |
| 2 | * This file is provided under a dual BSD/GPLv2 license. When using or |
| 3 | * redistributing this file, you may do so under either license. |
| 4 | * |
| 5 | * GPL LICENSE SUMMARY |
| 6 | * |
| 7 | * Copyright(c) 2008 - 2011 Intel Corporation. All rights reserved. |
| 8 | * |
| 9 | * This program is free software; you can redistribute it and/or modify |
| 10 | * it under the terms of version 2 of the GNU General Public License as |
| 11 | * published by the Free Software Foundation. |
| 12 | * |
| 13 | * This program is distributed in the hope that it will be useful, but |
| 14 | * WITHOUT ANY WARRANTY; without even the implied warranty of |
| 15 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU |
| 16 | * General Public License for more details. |
| 17 | * |
| 18 | * You should have received a copy of the GNU General Public License |
| 19 | * along with this program; if not, write to the Free Software |
| 20 | * Foundation, Inc., 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA. |
| 21 | * The full GNU General Public License is included in this distribution |
| 22 | * in the file called LICENSE.GPL. |
| 23 | * |
| 24 | * BSD LICENSE |
| 25 | * |
| 26 | * Copyright(c) 2008 - 2011 Intel Corporation. All rights reserved. |
| 27 | * All rights reserved. |
| 28 | * |
| 29 | * Redistribution and use in source and binary forms, with or without |
| 30 | * modification, are permitted provided that the following conditions |
| 31 | * are met: |
| 32 | * |
| 33 | * * Redistributions of source code must retain the above copyright |
| 34 | * notice, this list of conditions and the following disclaimer. |
| 35 | * * Redistributions in binary form must reproduce the above copyright |
| 36 | * notice, this list of conditions and the following disclaimer in |
| 37 | * the documentation and/or other materials provided with the |
| 38 | * distribution. |
| 39 | * * Neither the name of Intel Corporation nor the names of its |
| 40 | * contributors may be used to endorse or promote products derived |
| 41 | * from this software without specific prior written permission. |
| 42 | * |
| 43 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS |
| 44 | * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT |
| 45 | * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR |
| 46 | * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT |
| 47 | * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, |
| 48 | * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT |
| 49 | * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, |
| 50 | * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY |
| 51 | * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
| 52 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE |
| 53 | * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
| 54 | */ |
| 55 | |
Dave Jiang | 3d2d752 | 2012-02-10 01:18:34 -0800 | [diff] [blame] | 56 | #include <scsi/scsi_cmnd.h> |
Dan Williams | 6f231dd | 2011-07-02 22:56:22 -0700 | [diff] [blame] | 57 | #include "isci.h" |
Dan Williams | 6f231dd | 2011-07-02 22:56:22 -0700 | [diff] [blame] | 58 | #include "task.h" |
| 59 | #include "request.h" |
Dan Williams | 6f231dd | 2011-07-02 22:56:22 -0700 | [diff] [blame] | 60 | #include "scu_completion_codes.h" |
Dan Williams | 5dec6f4 | 2011-05-10 02:28:49 -0700 | [diff] [blame] | 61 | #include "scu_event_codes.h" |
Dave Jiang | 2ec53eb | 2011-05-04 18:01:22 -0700 | [diff] [blame] | 62 | #include "sas.h" |
Dan Williams | 6f231dd | 2011-07-02 22:56:22 -0700 | [diff] [blame] | 63 | |
Dan Williams | d7a0ccd | 2012-02-10 01:18:44 -0800 | [diff] [blame] | 64 | #undef C |
| 65 | #define C(a) (#a) |
| 66 | const char *req_state_name(enum sci_base_request_states state) |
| 67 | { |
| 68 | static const char * const strings[] = REQUEST_STATES; |
| 69 | |
| 70 | return strings[state]; |
| 71 | } |
| 72 | #undef C |
| 73 | |
Dan Williams | 5076a1a | 2011-06-27 14:57:03 -0700 | [diff] [blame] | 74 | static struct scu_sgl_element_pair *to_sgl_element_pair(struct isci_request *ireq, |
Dan Williams | 312e0c2 | 2011-06-28 13:47:09 -0700 | [diff] [blame] | 75 | int idx) |
| 76 | { |
| 77 | if (idx == 0) |
Dan Williams | 5076a1a | 2011-06-27 14:57:03 -0700 | [diff] [blame] | 78 | return &ireq->tc->sgl_pair_ab; |
Dan Williams | 312e0c2 | 2011-06-28 13:47:09 -0700 | [diff] [blame] | 79 | else if (idx == 1) |
Dan Williams | 5076a1a | 2011-06-27 14:57:03 -0700 | [diff] [blame] | 80 | return &ireq->tc->sgl_pair_cd; |
Dan Williams | 312e0c2 | 2011-06-28 13:47:09 -0700 | [diff] [blame] | 81 | else if (idx < 0) |
| 82 | return NULL; |
| 83 | else |
Dan Williams | 5076a1a | 2011-06-27 14:57:03 -0700 | [diff] [blame] | 84 | return &ireq->sg_table[idx - 2]; |
Dan Williams | 6f231dd | 2011-07-02 22:56:22 -0700 | [diff] [blame] | 85 | } |
| 86 | |
Dan Williams | d9dcb4b | 2011-06-30 17:38:32 -0700 | [diff] [blame] | 87 | static dma_addr_t to_sgl_element_pair_dma(struct isci_host *ihost, |
Dan Williams | 5076a1a | 2011-06-27 14:57:03 -0700 | [diff] [blame] | 88 | struct isci_request *ireq, u32 idx) |
Dan Williams | 312e0c2 | 2011-06-28 13:47:09 -0700 | [diff] [blame] | 89 | { |
| 90 | u32 offset; |
| 91 | |
| 92 | if (idx == 0) { |
Dan Williams | 5076a1a | 2011-06-27 14:57:03 -0700 | [diff] [blame] | 93 | offset = (void *) &ireq->tc->sgl_pair_ab - |
Dan Williams | d9dcb4b | 2011-06-30 17:38:32 -0700 | [diff] [blame] | 94 | (void *) &ihost->task_context_table[0]; |
Dan Williams | abec912 | 2012-02-15 13:58:42 -0800 | [diff] [blame] | 95 | return ihost->tc_dma + offset; |
Dan Williams | 312e0c2 | 2011-06-28 13:47:09 -0700 | [diff] [blame] | 96 | } else if (idx == 1) { |
Dan Williams | 5076a1a | 2011-06-27 14:57:03 -0700 | [diff] [blame] | 97 | offset = (void *) &ireq->tc->sgl_pair_cd - |
Dan Williams | d9dcb4b | 2011-06-30 17:38:32 -0700 | [diff] [blame] | 98 | (void *) &ihost->task_context_table[0]; |
Dan Williams | abec912 | 2012-02-15 13:58:42 -0800 | [diff] [blame] | 99 | return ihost->tc_dma + offset; |
Dan Williams | 312e0c2 | 2011-06-28 13:47:09 -0700 | [diff] [blame] | 100 | } |
| 101 | |
Dan Williams | 89a7301 | 2011-06-30 19:14:33 -0700 | [diff] [blame] | 102 | return sci_io_request_get_dma_addr(ireq, &ireq->sg_table[idx - 2]); |
Dan Williams | 312e0c2 | 2011-06-28 13:47:09 -0700 | [diff] [blame] | 103 | } |
| 104 | |
| 105 | static void init_sgl_element(struct scu_sgl_element *e, struct scatterlist *sg) |
| 106 | { |
| 107 | e->length = sg_dma_len(sg); |
| 108 | e->address_upper = upper_32_bits(sg_dma_address(sg)); |
| 109 | e->address_lower = lower_32_bits(sg_dma_address(sg)); |
| 110 | e->address_modifier = 0; |
| 111 | } |
| 112 | |
Dan Williams | 89a7301 | 2011-06-30 19:14:33 -0700 | [diff] [blame] | 113 | static void sci_request_build_sgl(struct isci_request *ireq) |
Dan Williams | f1f52e7 | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 114 | { |
Dan Williams | d9dcb4b | 2011-06-30 17:38:32 -0700 | [diff] [blame] | 115 | struct isci_host *ihost = ireq->isci_host; |
Dan Williams | 5076a1a | 2011-06-27 14:57:03 -0700 | [diff] [blame] | 116 | struct sas_task *task = isci_request_access_task(ireq); |
Dan Williams | f1f52e7 | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 117 | struct scatterlist *sg = NULL; |
| 118 | dma_addr_t dma_addr; |
| 119 | u32 sg_idx = 0; |
| 120 | struct scu_sgl_element_pair *scu_sg = NULL; |
| 121 | struct scu_sgl_element_pair *prev_sg = NULL; |
| 122 | |
| 123 | if (task->num_scatter > 0) { |
| 124 | sg = task->scatter; |
| 125 | |
| 126 | while (sg) { |
Dan Williams | 5076a1a | 2011-06-27 14:57:03 -0700 | [diff] [blame] | 127 | scu_sg = to_sgl_element_pair(ireq, sg_idx); |
Dan Williams | 312e0c2 | 2011-06-28 13:47:09 -0700 | [diff] [blame] | 128 | init_sgl_element(&scu_sg->A, sg); |
Dan Williams | f1f52e7 | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 129 | sg = sg_next(sg); |
Dan Williams | f1f52e7 | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 130 | if (sg) { |
Dan Williams | 312e0c2 | 2011-06-28 13:47:09 -0700 | [diff] [blame] | 131 | init_sgl_element(&scu_sg->B, sg); |
Dan Williams | f1f52e7 | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 132 | sg = sg_next(sg); |
| 133 | } else |
Dan Williams | 312e0c2 | 2011-06-28 13:47:09 -0700 | [diff] [blame] | 134 | memset(&scu_sg->B, 0, sizeof(scu_sg->B)); |
Dan Williams | f1f52e7 | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 135 | |
| 136 | if (prev_sg) { |
Dan Williams | d9dcb4b | 2011-06-30 17:38:32 -0700 | [diff] [blame] | 137 | dma_addr = to_sgl_element_pair_dma(ihost, |
Dan Williams | 5076a1a | 2011-06-27 14:57:03 -0700 | [diff] [blame] | 138 | ireq, |
Dan Williams | 312e0c2 | 2011-06-28 13:47:09 -0700 | [diff] [blame] | 139 | sg_idx); |
Dan Williams | f1f52e7 | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 140 | |
| 141 | prev_sg->next_pair_upper = |
| 142 | upper_32_bits(dma_addr); |
| 143 | prev_sg->next_pair_lower = |
| 144 | lower_32_bits(dma_addr); |
| 145 | } |
| 146 | |
| 147 | prev_sg = scu_sg; |
| 148 | sg_idx++; |
| 149 | } |
| 150 | } else { /* handle when no sg */ |
Dan Williams | 5076a1a | 2011-06-27 14:57:03 -0700 | [diff] [blame] | 151 | scu_sg = to_sgl_element_pair(ireq, sg_idx); |
Dan Williams | f1f52e7 | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 152 | |
Dan Williams | d9dcb4b | 2011-06-30 17:38:32 -0700 | [diff] [blame] | 153 | dma_addr = dma_map_single(&ihost->pdev->dev, |
Dan Williams | f1f52e7 | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 154 | task->scatter, |
| 155 | task->total_xfer_len, |
| 156 | task->data_dir); |
| 157 | |
Dan Williams | 5076a1a | 2011-06-27 14:57:03 -0700 | [diff] [blame] | 158 | ireq->zero_scatter_daddr = dma_addr; |
Dan Williams | f1f52e7 | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 159 | |
| 160 | scu_sg->A.length = task->total_xfer_len; |
| 161 | scu_sg->A.address_upper = upper_32_bits(dma_addr); |
| 162 | scu_sg->A.address_lower = lower_32_bits(dma_addr); |
| 163 | } |
| 164 | |
| 165 | if (scu_sg) { |
| 166 | scu_sg->next_pair_upper = 0; |
| 167 | scu_sg->next_pair_lower = 0; |
| 168 | } |
| 169 | } |
| 170 | |
Dan Williams | 89a7301 | 2011-06-30 19:14:33 -0700 | [diff] [blame] | 171 | static void sci_io_request_build_ssp_command_iu(struct isci_request *ireq) |
Dan Williams | f1f52e7 | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 172 | { |
| 173 | struct ssp_cmd_iu *cmd_iu; |
Dan Williams | f1f52e7 | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 174 | struct sas_task *task = isci_request_access_task(ireq); |
| 175 | |
Dan Williams | 5076a1a | 2011-06-27 14:57:03 -0700 | [diff] [blame] | 176 | cmd_iu = &ireq->ssp.cmd; |
Dan Williams | f1f52e7 | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 177 | |
| 178 | memcpy(cmd_iu->LUN, task->ssp_task.LUN, 8); |
| 179 | cmd_iu->add_cdb_len = 0; |
| 180 | cmd_iu->_r_a = 0; |
| 181 | cmd_iu->_r_b = 0; |
| 182 | cmd_iu->en_fburst = 0; /* unsupported */ |
| 183 | cmd_iu->task_prio = task->ssp_task.task_prio; |
| 184 | cmd_iu->task_attr = task->ssp_task.task_attr; |
| 185 | cmd_iu->_r_c = 0; |
| 186 | |
James Bottomley | e73823f | 2013-05-07 15:38:18 -0700 | [diff] [blame] | 187 | sci_swab32_cpy(&cmd_iu->cdb, task->ssp_task.cmd->cmnd, |
James Bottomley | e1be098 | 2013-07-24 12:43:18 -0700 | [diff] [blame] | 188 | (task->ssp_task.cmd->cmd_len+3) / sizeof(u32)); |
Dan Williams | f1f52e7 | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 189 | } |
| 190 | |
Dan Williams | 89a7301 | 2011-06-30 19:14:33 -0700 | [diff] [blame] | 191 | static void sci_task_request_build_ssp_task_iu(struct isci_request *ireq) |
Dan Williams | f1f52e7 | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 192 | { |
| 193 | struct ssp_task_iu *task_iu; |
Dan Williams | f1f52e7 | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 194 | struct sas_task *task = isci_request_access_task(ireq); |
| 195 | struct isci_tmf *isci_tmf = isci_request_access_tmf(ireq); |
| 196 | |
Dan Williams | 5076a1a | 2011-06-27 14:57:03 -0700 | [diff] [blame] | 197 | task_iu = &ireq->ssp.tmf; |
Dan Williams | f1f52e7 | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 198 | |
| 199 | memset(task_iu, 0, sizeof(struct ssp_task_iu)); |
| 200 | |
| 201 | memcpy(task_iu->LUN, task->ssp_task.LUN, 8); |
| 202 | |
| 203 | task_iu->task_func = isci_tmf->tmf_code; |
| 204 | task_iu->task_tag = |
Jeff Skirvin | 3b34c16 | 2011-10-27 15:05:22 -0700 | [diff] [blame] | 205 | (test_bit(IREQ_TMF, &ireq->flags)) ? |
Dan Williams | f1f52e7 | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 206 | isci_tmf->io_tag : |
| 207 | SCI_CONTROLLER_INVALID_IO_TAG; |
| 208 | } |
| 209 | |
| 210 | /** |
| 211 | * This method is will fill in the SCU Task Context for any type of SSP request. |
| 212 | * @sci_req: |
| 213 | * @task_context: |
| 214 | * |
| 215 | */ |
| 216 | static void scu_ssp_reqeust_construct_task_context( |
Dan Williams | 5076a1a | 2011-06-27 14:57:03 -0700 | [diff] [blame] | 217 | struct isci_request *ireq, |
Dan Williams | f1f52e7 | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 218 | struct scu_task_context *task_context) |
| 219 | { |
| 220 | dma_addr_t dma_addr; |
Dan Williams | 78a6f06 | 2011-06-30 16:31:37 -0700 | [diff] [blame] | 221 | struct isci_remote_device *idev; |
Dan Williams | ffe191c | 2011-06-29 13:09:25 -0700 | [diff] [blame] | 222 | struct isci_port *iport; |
Dan Williams | f1f52e7 | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 223 | |
Dan Williams | 34a9915 | 2011-07-01 02:25:15 -0700 | [diff] [blame] | 224 | idev = ireq->target_device; |
| 225 | iport = idev->owning_port; |
Dan Williams | f1f52e7 | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 226 | |
| 227 | /* Fill in the TC with the its required data */ |
| 228 | task_context->abort = 0; |
| 229 | task_context->priority = 0; |
| 230 | task_context->initiator_request = 1; |
Dan Williams | 78a6f06 | 2011-06-30 16:31:37 -0700 | [diff] [blame] | 231 | task_context->connection_rate = idev->connection_rate; |
Dan Williams | 34a9915 | 2011-07-01 02:25:15 -0700 | [diff] [blame] | 232 | task_context->protocol_engine_index = ISCI_PEG; |
| 233 | task_context->logical_port_index = iport->physical_port_index; |
Dan Williams | f1f52e7 | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 234 | task_context->protocol_type = SCU_TASK_CONTEXT_PROTOCOL_SSP; |
| 235 | task_context->valid = SCU_TASK_CONTEXT_VALID; |
| 236 | task_context->context_type = SCU_TASK_CONTEXT_TYPE; |
| 237 | |
Dan Williams | 34a9915 | 2011-07-01 02:25:15 -0700 | [diff] [blame] | 238 | task_context->remote_node_index = idev->rnc.remote_node_index; |
Dan Williams | f1f52e7 | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 239 | task_context->command_code = 0; |
| 240 | |
| 241 | task_context->link_layer_control = 0; |
| 242 | task_context->do_not_dma_ssp_good_response = 1; |
| 243 | task_context->strict_ordering = 0; |
| 244 | task_context->control_frame = 0; |
| 245 | task_context->timeout_enable = 0; |
| 246 | task_context->block_guard_enable = 0; |
| 247 | |
| 248 | task_context->address_modifier = 0; |
| 249 | |
Dan Williams | 5076a1a | 2011-06-27 14:57:03 -0700 | [diff] [blame] | 250 | /* task_context->type.ssp.tag = ireq->io_tag; */ |
Dan Williams | f1f52e7 | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 251 | task_context->task_phase = 0x01; |
| 252 | |
Dan Williams | 5076a1a | 2011-06-27 14:57:03 -0700 | [diff] [blame] | 253 | ireq->post_context = (SCU_CONTEXT_COMMAND_REQUEST_TYPE_POST_TC | |
Dan Williams | 34a9915 | 2011-07-01 02:25:15 -0700 | [diff] [blame] | 254 | (ISCI_PEG << SCU_CONTEXT_COMMAND_PROTOCOL_ENGINE_GROUP_SHIFT) | |
| 255 | (iport->physical_port_index << |
Dan Williams | ffe191c | 2011-06-29 13:09:25 -0700 | [diff] [blame] | 256 | SCU_CONTEXT_COMMAND_LOGICAL_PORT_SHIFT) | |
| 257 | ISCI_TAG_TCI(ireq->io_tag)); |
Dan Williams | f1f52e7 | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 258 | |
| 259 | /* |
| 260 | * Copy the physical address for the command buffer to the |
| 261 | * SCU Task Context |
| 262 | */ |
Dan Williams | 89a7301 | 2011-06-30 19:14:33 -0700 | [diff] [blame] | 263 | dma_addr = sci_io_request_get_dma_addr(ireq, &ireq->ssp.cmd); |
Dan Williams | f1f52e7 | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 264 | |
| 265 | task_context->command_iu_upper = upper_32_bits(dma_addr); |
| 266 | task_context->command_iu_lower = lower_32_bits(dma_addr); |
| 267 | |
| 268 | /* |
| 269 | * Copy the physical address for the response buffer to the |
| 270 | * SCU Task Context |
| 271 | */ |
Dan Williams | 89a7301 | 2011-06-30 19:14:33 -0700 | [diff] [blame] | 272 | dma_addr = sci_io_request_get_dma_addr(ireq, &ireq->ssp.rsp); |
Dan Williams | f1f52e7 | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 273 | |
| 274 | task_context->response_iu_upper = upper_32_bits(dma_addr); |
| 275 | task_context->response_iu_lower = lower_32_bits(dma_addr); |
| 276 | } |
| 277 | |
Dave Jiang | 3d2d752 | 2012-02-10 01:18:34 -0800 | [diff] [blame] | 278 | static u8 scu_bg_blk_size(struct scsi_device *sdp) |
| 279 | { |
| 280 | switch (sdp->sector_size) { |
| 281 | case 512: |
| 282 | return 0; |
| 283 | case 1024: |
| 284 | return 1; |
| 285 | case 4096: |
| 286 | return 3; |
| 287 | default: |
| 288 | return 0xff; |
| 289 | } |
| 290 | } |
| 291 | |
| 292 | static u32 scu_dif_bytes(u32 len, u32 sector_size) |
| 293 | { |
| 294 | return (len >> ilog2(sector_size)) * 8; |
| 295 | } |
| 296 | |
| 297 | static void scu_ssp_ireq_dif_insert(struct isci_request *ireq, u8 type, u8 op) |
| 298 | { |
| 299 | struct scu_task_context *tc = ireq->tc; |
| 300 | struct scsi_cmnd *scmd = ireq->ttype_ptr.io_task_ptr->uldd_task; |
| 301 | u8 blk_sz = scu_bg_blk_size(scmd->device); |
| 302 | |
| 303 | tc->block_guard_enable = 1; |
| 304 | tc->blk_prot_en = 1; |
| 305 | tc->blk_sz = blk_sz; |
| 306 | /* DIF write insert */ |
| 307 | tc->blk_prot_func = 0x2; |
| 308 | |
| 309 | tc->transfer_length_bytes += scu_dif_bytes(tc->transfer_length_bytes, |
| 310 | scmd->device->sector_size); |
| 311 | |
| 312 | /* always init to 0, used by hw */ |
| 313 | tc->interm_crc_val = 0; |
| 314 | |
| 315 | tc->init_crc_seed = 0; |
| 316 | tc->app_tag_verify = 0; |
| 317 | tc->app_tag_gen = 0; |
| 318 | tc->ref_tag_seed_verify = 0; |
| 319 | |
| 320 | /* always init to same as bg_blk_sz */ |
| 321 | tc->UD_bytes_immed_val = scmd->device->sector_size; |
| 322 | |
| 323 | tc->reserved_DC_0 = 0; |
| 324 | |
| 325 | /* always init to 8 */ |
| 326 | tc->DIF_bytes_immed_val = 8; |
| 327 | |
| 328 | tc->reserved_DC_1 = 0; |
| 329 | tc->bgc_blk_sz = scmd->device->sector_size; |
| 330 | tc->reserved_E0_0 = 0; |
| 331 | tc->app_tag_gen_mask = 0; |
| 332 | |
| 333 | /** setup block guard control **/ |
| 334 | tc->bgctl = 0; |
| 335 | |
| 336 | /* DIF write insert */ |
| 337 | tc->bgctl_f.op = 0x2; |
| 338 | |
| 339 | tc->app_tag_verify_mask = 0; |
| 340 | |
| 341 | /* must init to 0 for hw */ |
| 342 | tc->blk_guard_err = 0; |
| 343 | |
| 344 | tc->reserved_E8_0 = 0; |
| 345 | |
| 346 | if ((type & SCSI_PROT_DIF_TYPE1) || (type & SCSI_PROT_DIF_TYPE2)) |
| 347 | tc->ref_tag_seed_gen = scsi_get_lba(scmd) & 0xffffffff; |
| 348 | else if (type & SCSI_PROT_DIF_TYPE3) |
| 349 | tc->ref_tag_seed_gen = 0; |
| 350 | } |
| 351 | |
| 352 | static void scu_ssp_ireq_dif_strip(struct isci_request *ireq, u8 type, u8 op) |
| 353 | { |
| 354 | struct scu_task_context *tc = ireq->tc; |
| 355 | struct scsi_cmnd *scmd = ireq->ttype_ptr.io_task_ptr->uldd_task; |
| 356 | u8 blk_sz = scu_bg_blk_size(scmd->device); |
| 357 | |
| 358 | tc->block_guard_enable = 1; |
| 359 | tc->blk_prot_en = 1; |
| 360 | tc->blk_sz = blk_sz; |
| 361 | /* DIF read strip */ |
| 362 | tc->blk_prot_func = 0x1; |
| 363 | |
| 364 | tc->transfer_length_bytes += scu_dif_bytes(tc->transfer_length_bytes, |
| 365 | scmd->device->sector_size); |
| 366 | |
| 367 | /* always init to 0, used by hw */ |
| 368 | tc->interm_crc_val = 0; |
| 369 | |
| 370 | tc->init_crc_seed = 0; |
| 371 | tc->app_tag_verify = 0; |
| 372 | tc->app_tag_gen = 0; |
| 373 | |
| 374 | if ((type & SCSI_PROT_DIF_TYPE1) || (type & SCSI_PROT_DIF_TYPE2)) |
| 375 | tc->ref_tag_seed_verify = scsi_get_lba(scmd) & 0xffffffff; |
| 376 | else if (type & SCSI_PROT_DIF_TYPE3) |
| 377 | tc->ref_tag_seed_verify = 0; |
| 378 | |
| 379 | /* always init to same as bg_blk_sz */ |
| 380 | tc->UD_bytes_immed_val = scmd->device->sector_size; |
| 381 | |
| 382 | tc->reserved_DC_0 = 0; |
| 383 | |
| 384 | /* always init to 8 */ |
| 385 | tc->DIF_bytes_immed_val = 8; |
| 386 | |
| 387 | tc->reserved_DC_1 = 0; |
| 388 | tc->bgc_blk_sz = scmd->device->sector_size; |
| 389 | tc->reserved_E0_0 = 0; |
| 390 | tc->app_tag_gen_mask = 0; |
| 391 | |
| 392 | /** setup block guard control **/ |
| 393 | tc->bgctl = 0; |
| 394 | |
| 395 | /* DIF read strip */ |
| 396 | tc->bgctl_f.crc_verify = 1; |
| 397 | tc->bgctl_f.op = 0x1; |
| 398 | if ((type & SCSI_PROT_DIF_TYPE1) || (type & SCSI_PROT_DIF_TYPE2)) { |
| 399 | tc->bgctl_f.ref_tag_chk = 1; |
| 400 | tc->bgctl_f.app_f_detect = 1; |
| 401 | } else if (type & SCSI_PROT_DIF_TYPE3) |
| 402 | tc->bgctl_f.app_ref_f_detect = 1; |
| 403 | |
| 404 | tc->app_tag_verify_mask = 0; |
| 405 | |
| 406 | /* must init to 0 for hw */ |
| 407 | tc->blk_guard_err = 0; |
| 408 | |
| 409 | tc->reserved_E8_0 = 0; |
| 410 | tc->ref_tag_seed_gen = 0; |
| 411 | } |
| 412 | |
Dan Williams | f1f52e7 | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 413 | /** |
| 414 | * This method is will fill in the SCU Task Context for a SSP IO request. |
| 415 | * @sci_req: |
| 416 | * |
| 417 | */ |
Dan Williams | 5076a1a | 2011-06-27 14:57:03 -0700 | [diff] [blame] | 418 | static void scu_ssp_io_request_construct_task_context(struct isci_request *ireq, |
Dan Williams | 312e0c2 | 2011-06-28 13:47:09 -0700 | [diff] [blame] | 419 | enum dma_data_direction dir, |
| 420 | u32 len) |
Dan Williams | f1f52e7 | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 421 | { |
Dan Williams | 5076a1a | 2011-06-27 14:57:03 -0700 | [diff] [blame] | 422 | struct scu_task_context *task_context = ireq->tc; |
Dave Jiang | 3d2d752 | 2012-02-10 01:18:34 -0800 | [diff] [blame] | 423 | struct sas_task *sas_task = ireq->ttype_ptr.io_task_ptr; |
| 424 | struct scsi_cmnd *scmd = sas_task->uldd_task; |
| 425 | u8 prot_type = scsi_get_prot_type(scmd); |
| 426 | u8 prot_op = scsi_get_prot_op(scmd); |
Dan Williams | f1f52e7 | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 427 | |
Dan Williams | 5076a1a | 2011-06-27 14:57:03 -0700 | [diff] [blame] | 428 | scu_ssp_reqeust_construct_task_context(ireq, task_context); |
Dan Williams | f1f52e7 | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 429 | |
| 430 | task_context->ssp_command_iu_length = |
| 431 | sizeof(struct ssp_cmd_iu) / sizeof(u32); |
| 432 | task_context->type.ssp.frame_type = SSP_COMMAND; |
| 433 | |
| 434 | switch (dir) { |
| 435 | case DMA_FROM_DEVICE: |
| 436 | case DMA_NONE: |
| 437 | default: |
| 438 | task_context->task_type = SCU_TASK_TYPE_IOREAD; |
| 439 | break; |
| 440 | case DMA_TO_DEVICE: |
| 441 | task_context->task_type = SCU_TASK_TYPE_IOWRITE; |
| 442 | break; |
| 443 | } |
| 444 | |
| 445 | task_context->transfer_length_bytes = len; |
| 446 | |
| 447 | if (task_context->transfer_length_bytes > 0) |
Dan Williams | 89a7301 | 2011-06-30 19:14:33 -0700 | [diff] [blame] | 448 | sci_request_build_sgl(ireq); |
Dave Jiang | 3d2d752 | 2012-02-10 01:18:34 -0800 | [diff] [blame] | 449 | |
| 450 | if (prot_type != SCSI_PROT_DIF_TYPE0) { |
| 451 | if (prot_op == SCSI_PROT_READ_STRIP) |
| 452 | scu_ssp_ireq_dif_strip(ireq, prot_type, prot_op); |
| 453 | else if (prot_op == SCSI_PROT_WRITE_INSERT) |
| 454 | scu_ssp_ireq_dif_insert(ireq, prot_type, prot_op); |
| 455 | } |
Dan Williams | f1f52e7 | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 456 | } |
| 457 | |
Dan Williams | f1f52e7 | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 458 | /** |
| 459 | * This method will fill in the SCU Task Context for a SSP Task request. The |
| 460 | * following important settings are utilized: -# priority == |
| 461 | * SCU_TASK_PRIORITY_HIGH. This ensures that the task request is issued |
| 462 | * ahead of other task destined for the same Remote Node. -# task_type == |
| 463 | * SCU_TASK_TYPE_IOREAD. This simply indicates that a normal request type |
| 464 | * (i.e. non-raw frame) is being utilized to perform task management. -# |
| 465 | * control_frame == 1. This ensures that the proper endianess is set so |
| 466 | * that the bytes are transmitted in the right order for a task frame. |
| 467 | * @sci_req: This parameter specifies the task request object being |
| 468 | * constructed. |
| 469 | * |
| 470 | */ |
Dan Williams | 5076a1a | 2011-06-27 14:57:03 -0700 | [diff] [blame] | 471 | static void scu_ssp_task_request_construct_task_context(struct isci_request *ireq) |
Dan Williams | f1f52e7 | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 472 | { |
Dan Williams | 5076a1a | 2011-06-27 14:57:03 -0700 | [diff] [blame] | 473 | struct scu_task_context *task_context = ireq->tc; |
Dan Williams | f1f52e7 | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 474 | |
Dan Williams | 5076a1a | 2011-06-27 14:57:03 -0700 | [diff] [blame] | 475 | scu_ssp_reqeust_construct_task_context(ireq, task_context); |
Dan Williams | f1f52e7 | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 476 | |
| 477 | task_context->control_frame = 1; |
| 478 | task_context->priority = SCU_TASK_PRIORITY_HIGH; |
| 479 | task_context->task_type = SCU_TASK_TYPE_RAW_FRAME; |
| 480 | task_context->transfer_length_bytes = 0; |
| 481 | task_context->type.ssp.frame_type = SSP_TASK; |
| 482 | task_context->ssp_command_iu_length = |
| 483 | sizeof(struct ssp_task_iu) / sizeof(u32); |
| 484 | } |
| 485 | |
Dan Williams | f1f52e7 | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 486 | /** |
Dan Williams | 5dec6f4 | 2011-05-10 02:28:49 -0700 | [diff] [blame] | 487 | * This method is will fill in the SCU Task Context for any type of SATA |
| 488 | * request. This is called from the various SATA constructors. |
| 489 | * @sci_req: The general IO request object which is to be used in |
| 490 | * constructing the SCU task context. |
| 491 | * @task_context: The buffer pointer for the SCU task context which is being |
| 492 | * constructed. |
Dan Williams | f1f52e7 | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 493 | * |
Dan Williams | 5dec6f4 | 2011-05-10 02:28:49 -0700 | [diff] [blame] | 494 | * The general io request construction is complete. The buffer assignment for |
| 495 | * the command buffer is complete. none Revisit task context construction to |
| 496 | * determine what is common for SSP/SMP/STP task context structures. |
Dan Williams | f1f52e7 | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 497 | */ |
Dan Williams | 5dec6f4 | 2011-05-10 02:28:49 -0700 | [diff] [blame] | 498 | static void scu_sata_reqeust_construct_task_context( |
Dan Williams | 5076a1a | 2011-06-27 14:57:03 -0700 | [diff] [blame] | 499 | struct isci_request *ireq, |
Dan Williams | 5dec6f4 | 2011-05-10 02:28:49 -0700 | [diff] [blame] | 500 | struct scu_task_context *task_context) |
| 501 | { |
| 502 | dma_addr_t dma_addr; |
Dan Williams | 78a6f06 | 2011-06-30 16:31:37 -0700 | [diff] [blame] | 503 | struct isci_remote_device *idev; |
Dan Williams | ffe191c | 2011-06-29 13:09:25 -0700 | [diff] [blame] | 504 | struct isci_port *iport; |
Dan Williams | 5dec6f4 | 2011-05-10 02:28:49 -0700 | [diff] [blame] | 505 | |
Dan Williams | 34a9915 | 2011-07-01 02:25:15 -0700 | [diff] [blame] | 506 | idev = ireq->target_device; |
| 507 | iport = idev->owning_port; |
Dan Williams | 5dec6f4 | 2011-05-10 02:28:49 -0700 | [diff] [blame] | 508 | |
| 509 | /* Fill in the TC with the its required data */ |
| 510 | task_context->abort = 0; |
| 511 | task_context->priority = SCU_TASK_PRIORITY_NORMAL; |
| 512 | task_context->initiator_request = 1; |
Dan Williams | 78a6f06 | 2011-06-30 16:31:37 -0700 | [diff] [blame] | 513 | task_context->connection_rate = idev->connection_rate; |
Dan Williams | 34a9915 | 2011-07-01 02:25:15 -0700 | [diff] [blame] | 514 | task_context->protocol_engine_index = ISCI_PEG; |
| 515 | task_context->logical_port_index = iport->physical_port_index; |
Dan Williams | 5dec6f4 | 2011-05-10 02:28:49 -0700 | [diff] [blame] | 516 | task_context->protocol_type = SCU_TASK_CONTEXT_PROTOCOL_STP; |
| 517 | task_context->valid = SCU_TASK_CONTEXT_VALID; |
| 518 | task_context->context_type = SCU_TASK_CONTEXT_TYPE; |
| 519 | |
Dan Williams | 34a9915 | 2011-07-01 02:25:15 -0700 | [diff] [blame] | 520 | task_context->remote_node_index = idev->rnc.remote_node_index; |
Dan Williams | 5dec6f4 | 2011-05-10 02:28:49 -0700 | [diff] [blame] | 521 | task_context->command_code = 0; |
| 522 | |
| 523 | task_context->link_layer_control = 0; |
| 524 | task_context->do_not_dma_ssp_good_response = 1; |
| 525 | task_context->strict_ordering = 0; |
| 526 | task_context->control_frame = 0; |
| 527 | task_context->timeout_enable = 0; |
| 528 | task_context->block_guard_enable = 0; |
| 529 | |
| 530 | task_context->address_modifier = 0; |
| 531 | task_context->task_phase = 0x01; |
| 532 | |
| 533 | task_context->ssp_command_iu_length = |
| 534 | (sizeof(struct host_to_dev_fis) - sizeof(u32)) / sizeof(u32); |
| 535 | |
| 536 | /* Set the first word of the H2D REG FIS */ |
Dan Williams | 5076a1a | 2011-06-27 14:57:03 -0700 | [diff] [blame] | 537 | task_context->type.words[0] = *(u32 *)&ireq->stp.cmd; |
Dan Williams | 5dec6f4 | 2011-05-10 02:28:49 -0700 | [diff] [blame] | 538 | |
Dan Williams | 5076a1a | 2011-06-27 14:57:03 -0700 | [diff] [blame] | 539 | ireq->post_context = (SCU_CONTEXT_COMMAND_REQUEST_TYPE_POST_TC | |
Dan Williams | 34a9915 | 2011-07-01 02:25:15 -0700 | [diff] [blame] | 540 | (ISCI_PEG << SCU_CONTEXT_COMMAND_PROTOCOL_ENGINE_GROUP_SHIFT) | |
| 541 | (iport->physical_port_index << |
| 542 | SCU_CONTEXT_COMMAND_LOGICAL_PORT_SHIFT) | |
| 543 | ISCI_TAG_TCI(ireq->io_tag)); |
Dan Williams | 5dec6f4 | 2011-05-10 02:28:49 -0700 | [diff] [blame] | 544 | /* |
| 545 | * Copy the physical address for the command buffer to the SCU Task |
| 546 | * Context. We must offset the command buffer by 4 bytes because the |
| 547 | * first 4 bytes are transfered in the body of the TC. |
| 548 | */ |
Dan Williams | 89a7301 | 2011-06-30 19:14:33 -0700 | [diff] [blame] | 549 | dma_addr = sci_io_request_get_dma_addr(ireq, |
Dan Williams | 5076a1a | 2011-06-27 14:57:03 -0700 | [diff] [blame] | 550 | ((char *) &ireq->stp.cmd) + |
Dan Williams | 5dec6f4 | 2011-05-10 02:28:49 -0700 | [diff] [blame] | 551 | sizeof(u32)); |
| 552 | |
| 553 | task_context->command_iu_upper = upper_32_bits(dma_addr); |
| 554 | task_context->command_iu_lower = lower_32_bits(dma_addr); |
| 555 | |
| 556 | /* SATA Requests do not have a response buffer */ |
| 557 | task_context->response_iu_upper = 0; |
| 558 | task_context->response_iu_lower = 0; |
| 559 | } |
| 560 | |
Dan Williams | 5076a1a | 2011-06-27 14:57:03 -0700 | [diff] [blame] | 561 | static void scu_stp_raw_request_construct_task_context(struct isci_request *ireq) |
Dan Williams | 5dec6f4 | 2011-05-10 02:28:49 -0700 | [diff] [blame] | 562 | { |
Dan Williams | 5076a1a | 2011-06-27 14:57:03 -0700 | [diff] [blame] | 563 | struct scu_task_context *task_context = ireq->tc; |
Dan Williams | 5dec6f4 | 2011-05-10 02:28:49 -0700 | [diff] [blame] | 564 | |
Dan Williams | 5076a1a | 2011-06-27 14:57:03 -0700 | [diff] [blame] | 565 | scu_sata_reqeust_construct_task_context(ireq, task_context); |
Dan Williams | 5dec6f4 | 2011-05-10 02:28:49 -0700 | [diff] [blame] | 566 | |
| 567 | task_context->control_frame = 0; |
| 568 | task_context->priority = SCU_TASK_PRIORITY_NORMAL; |
| 569 | task_context->task_type = SCU_TASK_TYPE_SATA_RAW_FRAME; |
| 570 | task_context->type.stp.fis_type = FIS_REGH2D; |
| 571 | task_context->transfer_length_bytes = sizeof(struct host_to_dev_fis) - sizeof(u32); |
| 572 | } |
| 573 | |
Dan Williams | 89a7301 | 2011-06-30 19:14:33 -0700 | [diff] [blame] | 574 | static enum sci_status sci_stp_pio_request_construct(struct isci_request *ireq, |
Dan Williams | 5076a1a | 2011-06-27 14:57:03 -0700 | [diff] [blame] | 575 | bool copy_rx_frame) |
Dan Williams | 5dec6f4 | 2011-05-10 02:28:49 -0700 | [diff] [blame] | 576 | { |
Dan Williams | 5076a1a | 2011-06-27 14:57:03 -0700 | [diff] [blame] | 577 | struct isci_stp_request *stp_req = &ireq->stp.req; |
Dan Williams | 5dec6f4 | 2011-05-10 02:28:49 -0700 | [diff] [blame] | 578 | |
Dan Williams | 5076a1a | 2011-06-27 14:57:03 -0700 | [diff] [blame] | 579 | scu_stp_raw_request_construct_task_context(ireq); |
Dan Williams | 5dec6f4 | 2011-05-10 02:28:49 -0700 | [diff] [blame] | 580 | |
Dan Williams | ba7cb22 | 2011-06-27 11:56:41 -0700 | [diff] [blame] | 581 | stp_req->status = 0; |
| 582 | stp_req->sgl.offset = 0; |
| 583 | stp_req->sgl.set = SCU_SGL_ELEMENT_PAIR_A; |
Dan Williams | 5dec6f4 | 2011-05-10 02:28:49 -0700 | [diff] [blame] | 584 | |
| 585 | if (copy_rx_frame) { |
Dan Williams | 89a7301 | 2011-06-30 19:14:33 -0700 | [diff] [blame] | 586 | sci_request_build_sgl(ireq); |
Dan Williams | ba7cb22 | 2011-06-27 11:56:41 -0700 | [diff] [blame] | 587 | stp_req->sgl.index = 0; |
Dan Williams | 5dec6f4 | 2011-05-10 02:28:49 -0700 | [diff] [blame] | 588 | } else { |
| 589 | /* The user does not want the data copied to the SGL buffer location */ |
Dan Williams | ba7cb22 | 2011-06-27 11:56:41 -0700 | [diff] [blame] | 590 | stp_req->sgl.index = -1; |
Dan Williams | 5dec6f4 | 2011-05-10 02:28:49 -0700 | [diff] [blame] | 591 | } |
| 592 | |
| 593 | return SCI_SUCCESS; |
| 594 | } |
| 595 | |
| 596 | /** |
| 597 | * |
| 598 | * @sci_req: This parameter specifies the request to be constructed as an |
| 599 | * optimized request. |
| 600 | * @optimized_task_type: This parameter specifies whether the request is to be |
| 601 | * an UDMA request or a NCQ request. - A value of 0 indicates UDMA. - A |
| 602 | * value of 1 indicates NCQ. |
| 603 | * |
| 604 | * This method will perform request construction common to all types of STP |
| 605 | * requests that are optimized by the silicon (i.e. UDMA, NCQ). This method |
| 606 | * returns an indication as to whether the construction was successful. |
| 607 | */ |
Dan Williams | 89a7301 | 2011-06-30 19:14:33 -0700 | [diff] [blame] | 608 | static void sci_stp_optimized_request_construct(struct isci_request *ireq, |
Dan Williams | 5dec6f4 | 2011-05-10 02:28:49 -0700 | [diff] [blame] | 609 | u8 optimized_task_type, |
| 610 | u32 len, |
| 611 | enum dma_data_direction dir) |
| 612 | { |
Dan Williams | 5076a1a | 2011-06-27 14:57:03 -0700 | [diff] [blame] | 613 | struct scu_task_context *task_context = ireq->tc; |
Dan Williams | 5dec6f4 | 2011-05-10 02:28:49 -0700 | [diff] [blame] | 614 | |
| 615 | /* Build the STP task context structure */ |
Dan Williams | 5076a1a | 2011-06-27 14:57:03 -0700 | [diff] [blame] | 616 | scu_sata_reqeust_construct_task_context(ireq, task_context); |
Dan Williams | 5dec6f4 | 2011-05-10 02:28:49 -0700 | [diff] [blame] | 617 | |
| 618 | /* Copy over the SGL elements */ |
Dan Williams | 89a7301 | 2011-06-30 19:14:33 -0700 | [diff] [blame] | 619 | sci_request_build_sgl(ireq); |
Dan Williams | 5dec6f4 | 2011-05-10 02:28:49 -0700 | [diff] [blame] | 620 | |
| 621 | /* Copy over the number of bytes to be transfered */ |
| 622 | task_context->transfer_length_bytes = len; |
| 623 | |
| 624 | if (dir == DMA_TO_DEVICE) { |
| 625 | /* |
| 626 | * The difference between the DMA IN and DMA OUT request task type |
| 627 | * values are consistent with the difference between FPDMA READ |
| 628 | * and FPDMA WRITE values. Add the supplied task type parameter |
| 629 | * to this difference to set the task type properly for this |
| 630 | * DATA OUT (WRITE) case. */ |
| 631 | task_context->task_type = optimized_task_type + (SCU_TASK_TYPE_DMA_OUT |
| 632 | - SCU_TASK_TYPE_DMA_IN); |
| 633 | } else { |
| 634 | /* |
| 635 | * For the DATA IN (READ) case, simply save the supplied |
| 636 | * optimized task type. */ |
| 637 | task_context->task_type = optimized_task_type; |
| 638 | } |
| 639 | } |
| 640 | |
Dan Williams | b50102d | 2011-09-30 18:52:19 -0700 | [diff] [blame] | 641 | static void sci_atapi_construct(struct isci_request *ireq) |
| 642 | { |
| 643 | struct host_to_dev_fis *h2d_fis = &ireq->stp.cmd; |
| 644 | struct sas_task *task; |
Dan Williams | 5dec6f4 | 2011-05-10 02:28:49 -0700 | [diff] [blame] | 645 | |
Dan Williams | b50102d | 2011-09-30 18:52:19 -0700 | [diff] [blame] | 646 | /* To simplify the implementation we take advantage of the |
| 647 | * silicon's partial acceleration of atapi protocol (dma data |
| 648 | * transfers), so we promote all commands to dma protocol. This |
| 649 | * breaks compatibility with ATA_HORKAGE_ATAPI_MOD16_DMA drives. |
| 650 | */ |
| 651 | h2d_fis->features |= ATAPI_PKT_DMA; |
| 652 | |
| 653 | scu_stp_raw_request_construct_task_context(ireq); |
| 654 | |
| 655 | task = isci_request_access_task(ireq); |
| 656 | if (task->data_dir == DMA_NONE) |
| 657 | task->total_xfer_len = 0; |
| 658 | |
| 659 | /* clear the response so we can detect arrivial of an |
| 660 | * unsolicited h2d fis |
| 661 | */ |
| 662 | ireq->stp.rsp.fis_type = 0; |
| 663 | } |
Dan Williams | 5dec6f4 | 2011-05-10 02:28:49 -0700 | [diff] [blame] | 664 | |
Dan Williams | f1f52e7 | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 665 | static enum sci_status |
Dan Williams | 89a7301 | 2011-06-30 19:14:33 -0700 | [diff] [blame] | 666 | sci_io_request_construct_sata(struct isci_request *ireq, |
Dan Williams | f1f52e7 | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 667 | u32 len, |
| 668 | enum dma_data_direction dir, |
| 669 | bool copy) |
Dan Williams | 6f231dd | 2011-07-02 22:56:22 -0700 | [diff] [blame] | 670 | { |
Dan Williams | 6f231dd | 2011-07-02 22:56:22 -0700 | [diff] [blame] | 671 | enum sci_status status = SCI_SUCCESS; |
Dan Williams | f1f52e7 | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 672 | struct sas_task *task = isci_request_access_task(ireq); |
Dan Williams | b50102d | 2011-09-30 18:52:19 -0700 | [diff] [blame] | 673 | struct domain_device *dev = ireq->target_device->domain_dev; |
Dan Williams | 6f231dd | 2011-07-02 22:56:22 -0700 | [diff] [blame] | 674 | |
Dan Williams | f1f52e7 | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 675 | /* check for management protocols */ |
Jeff Skirvin | 3b34c16 | 2011-10-27 15:05:22 -0700 | [diff] [blame] | 676 | if (test_bit(IREQ_TMF, &ireq->flags)) { |
Dan Williams | f1f52e7 | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 677 | struct isci_tmf *tmf = isci_request_access_tmf(ireq); |
Dan Williams | 6f231dd | 2011-07-02 22:56:22 -0700 | [diff] [blame] | 678 | |
Dan Williams | 43a5ab1 | 2011-12-08 23:20:44 -0800 | [diff] [blame] | 679 | dev_err(&ireq->owning_controller->pdev->dev, |
| 680 | "%s: Request 0x%p received un-handled SAT " |
| 681 | "management protocol 0x%x.\n", |
| 682 | __func__, ireq, tmf->tmf_code); |
Dan Williams | 6f231dd | 2011-07-02 22:56:22 -0700 | [diff] [blame] | 683 | |
Dan Williams | 43a5ab1 | 2011-12-08 23:20:44 -0800 | [diff] [blame] | 684 | return SCI_FAILURE; |
Dan Williams | 6f231dd | 2011-07-02 22:56:22 -0700 | [diff] [blame] | 685 | } |
| 686 | |
Dan Williams | f1f52e7 | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 687 | if (!sas_protocol_ata(task->task_proto)) { |
Dan Williams | d9dcb4b | 2011-06-30 17:38:32 -0700 | [diff] [blame] | 688 | dev_err(&ireq->owning_controller->pdev->dev, |
Dan Williams | f1f52e7 | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 689 | "%s: Non-ATA protocol in SATA path: 0x%x\n", |
| 690 | __func__, |
| 691 | task->task_proto); |
Dan Williams | 6f231dd | 2011-07-02 22:56:22 -0700 | [diff] [blame] | 692 | return SCI_FAILURE; |
Dan Williams | f1f52e7 | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 693 | |
Dan Williams | 6f231dd | 2011-07-02 22:56:22 -0700 | [diff] [blame] | 694 | } |
| 695 | |
Dan Williams | b50102d | 2011-09-30 18:52:19 -0700 | [diff] [blame] | 696 | /* ATAPI */ |
Hannes Reinecke | 1cbd772 | 2014-11-05 13:08:20 +0100 | [diff] [blame] | 697 | if (dev->sata_dev.class == ATA_DEV_ATAPI && |
Dan Williams | b50102d | 2011-09-30 18:52:19 -0700 | [diff] [blame] | 698 | task->ata_task.fis.command == ATA_CMD_PACKET) { |
| 699 | sci_atapi_construct(ireq); |
| 700 | return SCI_SUCCESS; |
| 701 | } |
| 702 | |
Dan Williams | f1f52e7 | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 703 | /* non data */ |
Dan Williams | 5dec6f4 | 2011-05-10 02:28:49 -0700 | [diff] [blame] | 704 | if (task->data_dir == DMA_NONE) { |
Dan Williams | 5076a1a | 2011-06-27 14:57:03 -0700 | [diff] [blame] | 705 | scu_stp_raw_request_construct_task_context(ireq); |
Dan Williams | 5dec6f4 | 2011-05-10 02:28:49 -0700 | [diff] [blame] | 706 | return SCI_SUCCESS; |
| 707 | } |
Dan Williams | f1f52e7 | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 708 | |
| 709 | /* NCQ */ |
Dan Williams | 5dec6f4 | 2011-05-10 02:28:49 -0700 | [diff] [blame] | 710 | if (task->ata_task.use_ncq) { |
Dan Williams | 89a7301 | 2011-06-30 19:14:33 -0700 | [diff] [blame] | 711 | sci_stp_optimized_request_construct(ireq, |
Dan Williams | 5dec6f4 | 2011-05-10 02:28:49 -0700 | [diff] [blame] | 712 | SCU_TASK_TYPE_FPDMAQ_READ, |
| 713 | len, dir); |
| 714 | return SCI_SUCCESS; |
| 715 | } |
Dan Williams | f1f52e7 | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 716 | |
| 717 | /* DMA */ |
Dan Williams | 5dec6f4 | 2011-05-10 02:28:49 -0700 | [diff] [blame] | 718 | if (task->ata_task.dma_xfer) { |
Dan Williams | 89a7301 | 2011-06-30 19:14:33 -0700 | [diff] [blame] | 719 | sci_stp_optimized_request_construct(ireq, |
Dan Williams | 5dec6f4 | 2011-05-10 02:28:49 -0700 | [diff] [blame] | 720 | SCU_TASK_TYPE_DMA_IN, |
| 721 | len, dir); |
| 722 | return SCI_SUCCESS; |
| 723 | } else /* PIO */ |
Dan Williams | 89a7301 | 2011-06-30 19:14:33 -0700 | [diff] [blame] | 724 | return sci_stp_pio_request_construct(ireq, copy); |
Dan Williams | f1f52e7 | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 725 | |
| 726 | return status; |
| 727 | } |
| 728 | |
Dan Williams | 89a7301 | 2011-06-30 19:14:33 -0700 | [diff] [blame] | 729 | static enum sci_status sci_io_request_construct_basic_ssp(struct isci_request *ireq) |
Dan Williams | f1f52e7 | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 730 | { |
Dan Williams | f1f52e7 | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 731 | struct sas_task *task = isci_request_access_task(ireq); |
| 732 | |
Dan Williams | c79dd80 | 2012-02-01 00:44:14 -0800 | [diff] [blame] | 733 | ireq->protocol = SAS_PROTOCOL_SSP; |
Dan Williams | f1f52e7 | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 734 | |
Dan Williams | 5076a1a | 2011-06-27 14:57:03 -0700 | [diff] [blame] | 735 | scu_ssp_io_request_construct_task_context(ireq, |
Dan Williams | f1f52e7 | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 736 | task->data_dir, |
| 737 | task->total_xfer_len); |
| 738 | |
Dan Williams | 89a7301 | 2011-06-30 19:14:33 -0700 | [diff] [blame] | 739 | sci_io_request_build_ssp_command_iu(ireq); |
Dan Williams | f1f52e7 | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 740 | |
Dan Williams | 5076a1a | 2011-06-27 14:57:03 -0700 | [diff] [blame] | 741 | sci_change_state(&ireq->sm, SCI_REQ_CONSTRUCTED); |
Dan Williams | f1f52e7 | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 742 | |
| 743 | return SCI_SUCCESS; |
| 744 | } |
| 745 | |
Dan Williams | 89a7301 | 2011-06-30 19:14:33 -0700 | [diff] [blame] | 746 | enum sci_status sci_task_request_construct_ssp( |
Dan Williams | 5076a1a | 2011-06-27 14:57:03 -0700 | [diff] [blame] | 747 | struct isci_request *ireq) |
Dan Williams | f1f52e7 | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 748 | { |
| 749 | /* Construct the SSP Task SCU Task Context */ |
Dan Williams | 5076a1a | 2011-06-27 14:57:03 -0700 | [diff] [blame] | 750 | scu_ssp_task_request_construct_task_context(ireq); |
Dan Williams | f1f52e7 | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 751 | |
| 752 | /* Fill in the SSP Task IU */ |
Dan Williams | 89a7301 | 2011-06-30 19:14:33 -0700 | [diff] [blame] | 753 | sci_task_request_build_ssp_task_iu(ireq); |
Dan Williams | f1f52e7 | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 754 | |
Dan Williams | 5076a1a | 2011-06-27 14:57:03 -0700 | [diff] [blame] | 755 | sci_change_state(&ireq->sm, SCI_REQ_CONSTRUCTED); |
Dan Williams | 6f231dd | 2011-07-02 22:56:22 -0700 | [diff] [blame] | 756 | |
| 757 | return SCI_SUCCESS; |
| 758 | } |
| 759 | |
Dan Williams | 89a7301 | 2011-06-30 19:14:33 -0700 | [diff] [blame] | 760 | static enum sci_status sci_io_request_construct_basic_sata(struct isci_request *ireq) |
Dan Williams | 6f231dd | 2011-07-02 22:56:22 -0700 | [diff] [blame] | 761 | { |
Dan Williams | f1f52e7 | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 762 | enum sci_status status; |
Dan Williams | f1f52e7 | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 763 | bool copy = false; |
Dan Williams | 5076a1a | 2011-06-27 14:57:03 -0700 | [diff] [blame] | 764 | struct sas_task *task = isci_request_access_task(ireq); |
Dan Williams | 6f231dd | 2011-07-02 22:56:22 -0700 | [diff] [blame] | 765 | |
Dan Williams | c79dd80 | 2012-02-01 00:44:14 -0800 | [diff] [blame] | 766 | ireq->protocol = SAS_PROTOCOL_STP; |
Dan Williams | 6f231dd | 2011-07-02 22:56:22 -0700 | [diff] [blame] | 767 | |
Dan Williams | f1f52e7 | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 768 | copy = (task->data_dir == DMA_NONE) ? false : true; |
Dan Williams | 6f231dd | 2011-07-02 22:56:22 -0700 | [diff] [blame] | 769 | |
Dan Williams | 89a7301 | 2011-06-30 19:14:33 -0700 | [diff] [blame] | 770 | status = sci_io_request_construct_sata(ireq, |
Dan Williams | f1f52e7 | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 771 | task->total_xfer_len, |
| 772 | task->data_dir, |
| 773 | copy); |
Dan Williams | 6f231dd | 2011-07-02 22:56:22 -0700 | [diff] [blame] | 774 | |
Dan Williams | f1f52e7 | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 775 | if (status == SCI_SUCCESS) |
Dan Williams | 5076a1a | 2011-06-27 14:57:03 -0700 | [diff] [blame] | 776 | sci_change_state(&ireq->sm, SCI_REQ_CONSTRUCTED); |
Dan Williams | 6f231dd | 2011-07-02 22:56:22 -0700 | [diff] [blame] | 777 | |
Dan Williams | f1f52e7 | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 778 | return status; |
Dan Williams | 6f231dd | 2011-07-02 22:56:22 -0700 | [diff] [blame] | 779 | } |
| 780 | |
Dan Williams | 6f231dd | 2011-07-02 22:56:22 -0700 | [diff] [blame] | 781 | /** |
Dan Williams | f1f52e7 | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 782 | * sci_req_tx_bytes - bytes transferred when reply underruns request |
Dan Williams | b50102d | 2011-09-30 18:52:19 -0700 | [diff] [blame] | 783 | * @ireq: request that was terminated early |
Dan Williams | 6f231dd | 2011-07-02 22:56:22 -0700 | [diff] [blame] | 784 | */ |
Dan Williams | f1f52e7 | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 785 | #define SCU_TASK_CONTEXT_SRAM 0x200000 |
Dan Williams | 5076a1a | 2011-06-27 14:57:03 -0700 | [diff] [blame] | 786 | static u32 sci_req_tx_bytes(struct isci_request *ireq) |
Dan Williams | 6f231dd | 2011-07-02 22:56:22 -0700 | [diff] [blame] | 787 | { |
Dan Williams | d9dcb4b | 2011-06-30 17:38:32 -0700 | [diff] [blame] | 788 | struct isci_host *ihost = ireq->owning_controller; |
Dan Williams | f1f52e7 | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 789 | u32 ret_val = 0; |
Dan Williams | 6f231dd | 2011-07-02 22:56:22 -0700 | [diff] [blame] | 790 | |
Dan Williams | d9dcb4b | 2011-06-30 17:38:32 -0700 | [diff] [blame] | 791 | if (readl(&ihost->smu_registers->address_modifier) == 0) { |
| 792 | void __iomem *scu_reg_base = ihost->scu_registers; |
Dan Williams | 6f231dd | 2011-07-02 22:56:22 -0700 | [diff] [blame] | 793 | |
Dan Williams | f1f52e7 | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 794 | /* get the bytes of data from the Address == BAR1 + 20002Ch + (256*TCi) where |
| 795 | * BAR1 is the scu_registers |
| 796 | * 0x20002C = 0x200000 + 0x2c |
| 797 | * = start of task context SRAM + offset of (type.ssp.data_offset) |
Dan Williams | 89a7301 | 2011-06-30 19:14:33 -0700 | [diff] [blame] | 798 | * TCi is the io_tag of struct sci_request |
Dan Williams | 67ea838 | 2011-05-08 11:47:15 -0700 | [diff] [blame] | 799 | */ |
Dan Williams | f1f52e7 | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 800 | ret_val = readl(scu_reg_base + |
| 801 | (SCU_TASK_CONTEXT_SRAM + offsetof(struct scu_task_context, type.ssp.data_offset)) + |
Dan Williams | 5076a1a | 2011-06-27 14:57:03 -0700 | [diff] [blame] | 802 | ((sizeof(struct scu_task_context)) * ISCI_TAG_TCI(ireq->io_tag))); |
Dan Williams | 67ea838 | 2011-05-08 11:47:15 -0700 | [diff] [blame] | 803 | } |
Dan Williams | 6f231dd | 2011-07-02 22:56:22 -0700 | [diff] [blame] | 804 | |
Dan Williams | f1f52e7 | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 805 | return ret_val; |
Dan Williams | 6f231dd | 2011-07-02 22:56:22 -0700 | [diff] [blame] | 806 | } |
| 807 | |
Dan Williams | 89a7301 | 2011-06-30 19:14:33 -0700 | [diff] [blame] | 808 | enum sci_status sci_request_start(struct isci_request *ireq) |
Dan Williams | f1f52e7 | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 809 | { |
Piotr Sawicki | f4636a7 | 2011-05-10 23:50:32 +0000 | [diff] [blame] | 810 | enum sci_base_request_states state; |
Dan Williams | 5076a1a | 2011-06-27 14:57:03 -0700 | [diff] [blame] | 811 | struct scu_task_context *tc = ireq->tc; |
Dan Williams | d9dcb4b | 2011-06-30 17:38:32 -0700 | [diff] [blame] | 812 | struct isci_host *ihost = ireq->owning_controller; |
Piotr Sawicki | f4636a7 | 2011-05-10 23:50:32 +0000 | [diff] [blame] | 813 | |
Dan Williams | 5076a1a | 2011-06-27 14:57:03 -0700 | [diff] [blame] | 814 | state = ireq->sm.current_state_id; |
Edmund Nadolski | e301370 | 2011-06-02 00:10:43 +0000 | [diff] [blame] | 815 | if (state != SCI_REQ_CONSTRUCTED) { |
Dan Williams | d9dcb4b | 2011-06-30 17:38:32 -0700 | [diff] [blame] | 816 | dev_warn(&ihost->pdev->dev, |
Piotr Sawicki | f4636a7 | 2011-05-10 23:50:32 +0000 | [diff] [blame] | 817 | "%s: SCIC IO Request requested to start while in wrong " |
| 818 | "state %d\n", __func__, state); |
| 819 | return SCI_FAILURE_INVALID_STATE; |
| 820 | } |
Dan Williams | f1f52e7 | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 821 | |
Dan Williams | 5076a1a | 2011-06-27 14:57:03 -0700 | [diff] [blame] | 822 | tc->task_index = ISCI_TAG_TCI(ireq->io_tag); |
Dan Williams | f1f52e7 | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 823 | |
Dan Williams | 312e0c2 | 2011-06-28 13:47:09 -0700 | [diff] [blame] | 824 | switch (tc->protocol_type) { |
| 825 | case SCU_TASK_CONTEXT_PROTOCOL_SMP: |
| 826 | case SCU_TASK_CONTEXT_PROTOCOL_SSP: |
| 827 | /* SSP/SMP Frame */ |
Dan Williams | 5076a1a | 2011-06-27 14:57:03 -0700 | [diff] [blame] | 828 | tc->type.ssp.tag = ireq->io_tag; |
Dan Williams | 312e0c2 | 2011-06-28 13:47:09 -0700 | [diff] [blame] | 829 | tc->type.ssp.target_port_transfer_tag = 0xFFFF; |
| 830 | break; |
Piotr Sawicki | f4636a7 | 2011-05-10 23:50:32 +0000 | [diff] [blame] | 831 | |
Dan Williams | 312e0c2 | 2011-06-28 13:47:09 -0700 | [diff] [blame] | 832 | case SCU_TASK_CONTEXT_PROTOCOL_STP: |
| 833 | /* STP/SATA Frame |
Dan Williams | 5076a1a | 2011-06-27 14:57:03 -0700 | [diff] [blame] | 834 | * tc->type.stp.ncq_tag = ireq->ncq_tag; |
Dan Williams | 312e0c2 | 2011-06-28 13:47:09 -0700 | [diff] [blame] | 835 | */ |
| 836 | break; |
Piotr Sawicki | f4636a7 | 2011-05-10 23:50:32 +0000 | [diff] [blame] | 837 | |
Dan Williams | 312e0c2 | 2011-06-28 13:47:09 -0700 | [diff] [blame] | 838 | case SCU_TASK_CONTEXT_PROTOCOL_NONE: |
| 839 | /* / @todo When do we set no protocol type? */ |
| 840 | break; |
Piotr Sawicki | f4636a7 | 2011-05-10 23:50:32 +0000 | [diff] [blame] | 841 | |
Dan Williams | 312e0c2 | 2011-06-28 13:47:09 -0700 | [diff] [blame] | 842 | default: |
| 843 | /* This should never happen since we build the IO |
| 844 | * requests */ |
| 845 | break; |
Piotr Sawicki | f4636a7 | 2011-05-10 23:50:32 +0000 | [diff] [blame] | 846 | } |
| 847 | |
Dan Williams | 312e0c2 | 2011-06-28 13:47:09 -0700 | [diff] [blame] | 848 | /* Add to the post_context the io tag value */ |
Dan Williams | 5076a1a | 2011-06-27 14:57:03 -0700 | [diff] [blame] | 849 | ireq->post_context |= ISCI_TAG_TCI(ireq->io_tag); |
Dan Williams | 312e0c2 | 2011-06-28 13:47:09 -0700 | [diff] [blame] | 850 | |
| 851 | /* Everything is good go ahead and change state */ |
Dan Williams | 5076a1a | 2011-06-27 14:57:03 -0700 | [diff] [blame] | 852 | sci_change_state(&ireq->sm, SCI_REQ_STARTED); |
Dan Williams | 312e0c2 | 2011-06-28 13:47:09 -0700 | [diff] [blame] | 853 | |
| 854 | return SCI_SUCCESS; |
Dan Williams | f1f52e7 | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 855 | } |
| 856 | |
| 857 | enum sci_status |
Dan Williams | 89a7301 | 2011-06-30 19:14:33 -0700 | [diff] [blame] | 858 | sci_io_request_terminate(struct isci_request *ireq) |
Dan Williams | f1f52e7 | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 859 | { |
Dan Williams | f00e6ba | 2011-05-10 02:39:11 -0700 | [diff] [blame] | 860 | enum sci_base_request_states state; |
Dan Williams | f1f52e7 | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 861 | |
Dan Williams | 5076a1a | 2011-06-27 14:57:03 -0700 | [diff] [blame] | 862 | state = ireq->sm.current_state_id; |
Dan Williams | f00e6ba | 2011-05-10 02:39:11 -0700 | [diff] [blame] | 863 | |
| 864 | switch (state) { |
Edmund Nadolski | e301370 | 2011-06-02 00:10:43 +0000 | [diff] [blame] | 865 | case SCI_REQ_CONSTRUCTED: |
Jeff Skirvin | 726980d | 2012-03-08 22:41:50 -0800 | [diff] [blame] | 866 | /* Set to make sure no HW terminate posting is done: */ |
| 867 | set_bit(IREQ_TC_ABORT_POSTED, &ireq->flags); |
Dan Williams | 34a9915 | 2011-07-01 02:25:15 -0700 | [diff] [blame] | 868 | ireq->scu_status = SCU_TASK_DONE_TASK_ABORT; |
| 869 | ireq->sci_status = SCI_FAILURE_IO_TERMINATED; |
Dan Williams | 5076a1a | 2011-06-27 14:57:03 -0700 | [diff] [blame] | 870 | sci_change_state(&ireq->sm, SCI_REQ_COMPLETED); |
Dan Williams | f00e6ba | 2011-05-10 02:39:11 -0700 | [diff] [blame] | 871 | return SCI_SUCCESS; |
Edmund Nadolski | e301370 | 2011-06-02 00:10:43 +0000 | [diff] [blame] | 872 | case SCI_REQ_STARTED: |
| 873 | case SCI_REQ_TASK_WAIT_TC_COMP: |
| 874 | case SCI_REQ_SMP_WAIT_RESP: |
| 875 | case SCI_REQ_SMP_WAIT_TC_COMP: |
| 876 | case SCI_REQ_STP_UDMA_WAIT_TC_COMP: |
| 877 | case SCI_REQ_STP_UDMA_WAIT_D2H: |
| 878 | case SCI_REQ_STP_NON_DATA_WAIT_H2D: |
| 879 | case SCI_REQ_STP_NON_DATA_WAIT_D2H: |
| 880 | case SCI_REQ_STP_PIO_WAIT_H2D: |
| 881 | case SCI_REQ_STP_PIO_WAIT_FRAME: |
| 882 | case SCI_REQ_STP_PIO_DATA_IN: |
| 883 | case SCI_REQ_STP_PIO_DATA_OUT: |
Dan Williams | b50102d | 2011-09-30 18:52:19 -0700 | [diff] [blame] | 884 | case SCI_REQ_ATAPI_WAIT_H2D: |
| 885 | case SCI_REQ_ATAPI_WAIT_PIO_SETUP: |
| 886 | case SCI_REQ_ATAPI_WAIT_D2H: |
| 887 | case SCI_REQ_ATAPI_WAIT_TC_COMP: |
Jeff Skirvin | 726980d | 2012-03-08 22:41:50 -0800 | [diff] [blame] | 888 | /* Fall through and change state to ABORTING... */ |
Edmund Nadolski | e301370 | 2011-06-02 00:10:43 +0000 | [diff] [blame] | 889 | case SCI_REQ_TASK_WAIT_TC_RESP: |
Jeff Skirvin | 39ea2c5 | 2011-07-29 17:17:05 -0700 | [diff] [blame] | 890 | /* The task frame was already confirmed to have been |
| 891 | * sent by the SCU HW. Since the state machine is |
| 892 | * now only waiting for the task response itself, |
| 893 | * abort the request and complete it immediately |
| 894 | * and don't wait for the task response. |
| 895 | */ |
Dan Williams | 5076a1a | 2011-06-27 14:57:03 -0700 | [diff] [blame] | 896 | sci_change_state(&ireq->sm, SCI_REQ_ABORTING); |
Jeff Skirvin | 726980d | 2012-03-08 22:41:50 -0800 | [diff] [blame] | 897 | /* Fall through and handle like ABORTING... */ |
Edmund Nadolski | e301370 | 2011-06-02 00:10:43 +0000 | [diff] [blame] | 898 | case SCI_REQ_ABORTING: |
Jeff Skirvin | 726980d | 2012-03-08 22:41:50 -0800 | [diff] [blame] | 899 | if (!isci_remote_device_is_safe_to_abort(ireq->target_device)) |
| 900 | set_bit(IREQ_PENDING_ABORT, &ireq->flags); |
| 901 | else |
| 902 | clear_bit(IREQ_PENDING_ABORT, &ireq->flags); |
| 903 | /* If the request is only waiting on the remote device |
| 904 | * suspension, return SUCCESS so the caller will wait too. |
Jeff Skirvin | 39ea2c5 | 2011-07-29 17:17:05 -0700 | [diff] [blame] | 905 | */ |
Jeff Skirvin | 726980d | 2012-03-08 22:41:50 -0800 | [diff] [blame] | 906 | return SCI_SUCCESS; |
Edmund Nadolski | e301370 | 2011-06-02 00:10:43 +0000 | [diff] [blame] | 907 | case SCI_REQ_COMPLETED: |
Dan Williams | f00e6ba | 2011-05-10 02:39:11 -0700 | [diff] [blame] | 908 | default: |
Dan Williams | d9dcb4b | 2011-06-30 17:38:32 -0700 | [diff] [blame] | 909 | dev_warn(&ireq->owning_controller->pdev->dev, |
Dan Williams | f00e6ba | 2011-05-10 02:39:11 -0700 | [diff] [blame] | 910 | "%s: SCIC IO Request requested to abort while in wrong " |
Jeff Skirvin | 726980d | 2012-03-08 22:41:50 -0800 | [diff] [blame] | 911 | "state %d\n", __func__, ireq->sm.current_state_id); |
Dan Williams | f00e6ba | 2011-05-10 02:39:11 -0700 | [diff] [blame] | 912 | break; |
| 913 | } |
Dan Williams | f1f52e7 | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 914 | |
| 915 | return SCI_FAILURE_INVALID_STATE; |
| 916 | } |
| 917 | |
Dan Williams | 89a7301 | 2011-06-30 19:14:33 -0700 | [diff] [blame] | 918 | enum sci_status sci_request_complete(struct isci_request *ireq) |
Dan Williams | f1f52e7 | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 919 | { |
Dan Williams | 79e2b6b | 2011-05-11 08:29:56 -0700 | [diff] [blame] | 920 | enum sci_base_request_states state; |
Dan Williams | d9dcb4b | 2011-06-30 17:38:32 -0700 | [diff] [blame] | 921 | struct isci_host *ihost = ireq->owning_controller; |
Dan Williams | f1f52e7 | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 922 | |
Dan Williams | 5076a1a | 2011-06-27 14:57:03 -0700 | [diff] [blame] | 923 | state = ireq->sm.current_state_id; |
Edmund Nadolski | e301370 | 2011-06-02 00:10:43 +0000 | [diff] [blame] | 924 | if (WARN_ONCE(state != SCI_REQ_COMPLETED, |
Dan Williams | d7a0ccd | 2012-02-10 01:18:44 -0800 | [diff] [blame] | 925 | "isci: request completion from wrong state (%s)\n", |
| 926 | req_state_name(state))) |
Dan Williams | 79e2b6b | 2011-05-11 08:29:56 -0700 | [diff] [blame] | 927 | return SCI_FAILURE_INVALID_STATE; |
Dan Williams | f1f52e7 | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 928 | |
Dan Williams | 5076a1a | 2011-06-27 14:57:03 -0700 | [diff] [blame] | 929 | if (ireq->saved_rx_frame_index != SCU_INVALID_FRAME_INDEX) |
Dan Williams | 89a7301 | 2011-06-30 19:14:33 -0700 | [diff] [blame] | 930 | sci_controller_release_frame(ihost, |
Dan Williams | 5076a1a | 2011-06-27 14:57:03 -0700 | [diff] [blame] | 931 | ireq->saved_rx_frame_index); |
Dan Williams | 79e2b6b | 2011-05-11 08:29:56 -0700 | [diff] [blame] | 932 | |
| 933 | /* XXX can we just stop the machine and remove the 'final' state? */ |
Dan Williams | 5076a1a | 2011-06-27 14:57:03 -0700 | [diff] [blame] | 934 | sci_change_state(&ireq->sm, SCI_REQ_FINAL); |
Dan Williams | 79e2b6b | 2011-05-11 08:29:56 -0700 | [diff] [blame] | 935 | return SCI_SUCCESS; |
| 936 | } |
| 937 | |
Dan Williams | 89a7301 | 2011-06-30 19:14:33 -0700 | [diff] [blame] | 938 | enum sci_status sci_io_request_event_handler(struct isci_request *ireq, |
Dan Williams | 79e2b6b | 2011-05-11 08:29:56 -0700 | [diff] [blame] | 939 | u32 event_code) |
| 940 | { |
| 941 | enum sci_base_request_states state; |
Dan Williams | d9dcb4b | 2011-06-30 17:38:32 -0700 | [diff] [blame] | 942 | struct isci_host *ihost = ireq->owning_controller; |
Dan Williams | 79e2b6b | 2011-05-11 08:29:56 -0700 | [diff] [blame] | 943 | |
Dan Williams | 5076a1a | 2011-06-27 14:57:03 -0700 | [diff] [blame] | 944 | state = ireq->sm.current_state_id; |
Dan Williams | 79e2b6b | 2011-05-11 08:29:56 -0700 | [diff] [blame] | 945 | |
Edmund Nadolski | e301370 | 2011-06-02 00:10:43 +0000 | [diff] [blame] | 946 | if (state != SCI_REQ_STP_PIO_DATA_IN) { |
Dan Williams | d7a0ccd | 2012-02-10 01:18:44 -0800 | [diff] [blame] | 947 | dev_warn(&ihost->pdev->dev, "%s: (%x) in wrong state %s\n", |
| 948 | __func__, event_code, req_state_name(state)); |
Dan Williams | 79e2b6b | 2011-05-11 08:29:56 -0700 | [diff] [blame] | 949 | |
| 950 | return SCI_FAILURE_INVALID_STATE; |
| 951 | } |
| 952 | |
| 953 | switch (scu_get_event_specifier(event_code)) { |
| 954 | case SCU_TASK_DONE_CRC_ERR << SCU_EVENT_SPECIFIC_CODE_SHIFT: |
| 955 | /* We are waiting for data and the SCU has R_ERR the data frame. |
| 956 | * Go back to waiting for the D2H Register FIS |
| 957 | */ |
Dan Williams | 5076a1a | 2011-06-27 14:57:03 -0700 | [diff] [blame] | 958 | sci_change_state(&ireq->sm, SCI_REQ_STP_PIO_WAIT_FRAME); |
Dan Williams | 79e2b6b | 2011-05-11 08:29:56 -0700 | [diff] [blame] | 959 | return SCI_SUCCESS; |
| 960 | default: |
Dan Williams | d9dcb4b | 2011-06-30 17:38:32 -0700 | [diff] [blame] | 961 | dev_err(&ihost->pdev->dev, |
Dan Williams | 79e2b6b | 2011-05-11 08:29:56 -0700 | [diff] [blame] | 962 | "%s: pio request unexpected event %#x\n", |
| 963 | __func__, event_code); |
| 964 | |
| 965 | /* TODO Should we fail the PIO request when we get an |
| 966 | * unexpected event? |
| 967 | */ |
| 968 | return SCI_FAILURE; |
| 969 | } |
Dan Williams | f1f52e7 | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 970 | } |
| 971 | |
Dan Williams | f1f52e7 | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 972 | /* |
| 973 | * This function copies response data for requests returning response data |
| 974 | * instead of sense data. |
| 975 | * @sci_req: This parameter specifies the request object for which to copy |
| 976 | * the response data. |
| 977 | */ |
Dan Williams | 89a7301 | 2011-06-30 19:14:33 -0700 | [diff] [blame] | 978 | static void sci_io_request_copy_response(struct isci_request *ireq) |
Dan Williams | f1f52e7 | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 979 | { |
| 980 | void *resp_buf; |
| 981 | u32 len; |
| 982 | struct ssp_response_iu *ssp_response; |
Dan Williams | f1f52e7 | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 983 | struct isci_tmf *isci_tmf = isci_request_access_tmf(ireq); |
| 984 | |
Dan Williams | 5076a1a | 2011-06-27 14:57:03 -0700 | [diff] [blame] | 985 | ssp_response = &ireq->ssp.rsp; |
Dan Williams | f1f52e7 | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 986 | |
| 987 | resp_buf = &isci_tmf->resp.resp_iu; |
| 988 | |
| 989 | len = min_t(u32, |
| 990 | SSP_RESP_IU_MAX_SIZE, |
| 991 | be32_to_cpu(ssp_response->response_data_len)); |
| 992 | |
| 993 | memcpy(resp_buf, ssp_response->resp_data, len); |
| 994 | } |
| 995 | |
Edmund Nadolski | e301370 | 2011-06-02 00:10:43 +0000 | [diff] [blame] | 996 | static enum sci_status |
Dan Williams | 5076a1a | 2011-06-27 14:57:03 -0700 | [diff] [blame] | 997 | request_started_state_tc_event(struct isci_request *ireq, |
Edmund Nadolski | e301370 | 2011-06-02 00:10:43 +0000 | [diff] [blame] | 998 | u32 completion_code) |
Dan Williams | f1f52e7 | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 999 | { |
Dan Williams | f1f52e7 | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 1000 | struct ssp_response_iu *resp_iu; |
Dan Williams | a7e255a | 2011-05-11 08:27:47 -0700 | [diff] [blame] | 1001 | u8 datapres; |
Dan Williams | f1f52e7 | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 1002 | |
Dan Williams | a7e255a | 2011-05-11 08:27:47 -0700 | [diff] [blame] | 1003 | /* TODO: Any SDMA return code of other than 0 is bad decode 0x003C0000 |
| 1004 | * to determine SDMA status |
Dan Williams | f1f52e7 | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 1005 | */ |
| 1006 | switch (SCU_GET_COMPLETION_TL_STATUS(completion_code)) { |
| 1007 | case SCU_MAKE_COMPLETION_STATUS(SCU_TASK_DONE_GOOD): |
Dan Williams | 34a9915 | 2011-07-01 02:25:15 -0700 | [diff] [blame] | 1008 | ireq->scu_status = SCU_TASK_DONE_GOOD; |
| 1009 | ireq->sci_status = SCI_SUCCESS; |
Dan Williams | f1f52e7 | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 1010 | break; |
Dan Williams | a7e255a | 2011-05-11 08:27:47 -0700 | [diff] [blame] | 1011 | case SCU_MAKE_COMPLETION_STATUS(SCU_TASK_DONE_EARLY_RESP): { |
| 1012 | /* There are times when the SCU hardware will return an early |
Dan Williams | f1f52e7 | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 1013 | * response because the io request specified more data than is |
| 1014 | * returned by the target device (mode pages, inquiry data, |
| 1015 | * etc.). We must check the response stats to see if this is |
| 1016 | * truly a failed request or a good request that just got |
| 1017 | * completed early. |
| 1018 | */ |
Dan Williams | 5076a1a | 2011-06-27 14:57:03 -0700 | [diff] [blame] | 1019 | struct ssp_response_iu *resp = &ireq->ssp.rsp; |
Dan Williams | f1f52e7 | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 1020 | ssize_t word_cnt = SSP_RESP_IU_MAX_SIZE / sizeof(u32); |
| 1021 | |
Dan Williams | 5076a1a | 2011-06-27 14:57:03 -0700 | [diff] [blame] | 1022 | sci_swab32_cpy(&ireq->ssp.rsp, |
| 1023 | &ireq->ssp.rsp, |
Dan Williams | f1f52e7 | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 1024 | word_cnt); |
| 1025 | |
| 1026 | if (resp->status == 0) { |
Dan Williams | 34a9915 | 2011-07-01 02:25:15 -0700 | [diff] [blame] | 1027 | ireq->scu_status = SCU_TASK_DONE_GOOD; |
| 1028 | ireq->sci_status = SCI_SUCCESS_IO_DONE_EARLY; |
Dan Williams | f1f52e7 | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 1029 | } else { |
Dan Williams | 34a9915 | 2011-07-01 02:25:15 -0700 | [diff] [blame] | 1030 | ireq->scu_status = SCU_TASK_DONE_CHECK_RESPONSE; |
| 1031 | ireq->sci_status = SCI_FAILURE_IO_RESPONSE_VALID; |
Dan Williams | f1f52e7 | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 1032 | } |
Dan Williams | a7e255a | 2011-05-11 08:27:47 -0700 | [diff] [blame] | 1033 | break; |
Dan Williams | f1f52e7 | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 1034 | } |
Dan Williams | a7e255a | 2011-05-11 08:27:47 -0700 | [diff] [blame] | 1035 | case SCU_MAKE_COMPLETION_STATUS(SCU_TASK_DONE_CHECK_RESPONSE): { |
Dan Williams | f1f52e7 | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 1036 | ssize_t word_cnt = SSP_RESP_IU_MAX_SIZE / sizeof(u32); |
| 1037 | |
Dan Williams | 5076a1a | 2011-06-27 14:57:03 -0700 | [diff] [blame] | 1038 | sci_swab32_cpy(&ireq->ssp.rsp, |
| 1039 | &ireq->ssp.rsp, |
Dan Williams | f1f52e7 | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 1040 | word_cnt); |
| 1041 | |
Dan Williams | 34a9915 | 2011-07-01 02:25:15 -0700 | [diff] [blame] | 1042 | ireq->scu_status = SCU_TASK_DONE_CHECK_RESPONSE; |
| 1043 | ireq->sci_status = SCI_FAILURE_IO_RESPONSE_VALID; |
Dan Williams | f1f52e7 | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 1044 | break; |
| 1045 | } |
| 1046 | |
| 1047 | case SCU_MAKE_COMPLETION_STATUS(SCU_TASK_DONE_RESP_LEN_ERR): |
Dan Williams | a7e255a | 2011-05-11 08:27:47 -0700 | [diff] [blame] | 1048 | /* TODO With TASK_DONE_RESP_LEN_ERR is the response frame |
Dan Williams | f1f52e7 | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 1049 | * guaranteed to be received before this completion status is |
| 1050 | * posted? |
| 1051 | */ |
Dan Williams | 5076a1a | 2011-06-27 14:57:03 -0700 | [diff] [blame] | 1052 | resp_iu = &ireq->ssp.rsp; |
Dan Williams | f1f52e7 | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 1053 | datapres = resp_iu->datapres; |
| 1054 | |
Dan Williams | a7e255a | 2011-05-11 08:27:47 -0700 | [diff] [blame] | 1055 | if (datapres == 1 || datapres == 2) { |
Dan Williams | 34a9915 | 2011-07-01 02:25:15 -0700 | [diff] [blame] | 1056 | ireq->scu_status = SCU_TASK_DONE_CHECK_RESPONSE; |
| 1057 | ireq->sci_status = SCI_FAILURE_IO_RESPONSE_VALID; |
| 1058 | } else { |
| 1059 | ireq->scu_status = SCU_TASK_DONE_GOOD; |
| 1060 | ireq->sci_status = SCI_SUCCESS; |
| 1061 | } |
Dan Williams | f1f52e7 | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 1062 | break; |
Dan Williams | f1f52e7 | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 1063 | /* only stp device gets suspended. */ |
| 1064 | case SCU_MAKE_COMPLETION_STATUS(SCU_TASK_DONE_ACK_NAK_TO): |
| 1065 | case SCU_MAKE_COMPLETION_STATUS(SCU_TASK_DONE_LL_PERR): |
| 1066 | case SCU_MAKE_COMPLETION_STATUS(SCU_TASK_DONE_NAK_ERR): |
| 1067 | case SCU_MAKE_COMPLETION_STATUS(SCU_TASK_DONE_DATA_LEN_ERR): |
| 1068 | case SCU_MAKE_COMPLETION_STATUS(SCU_TASK_DONE_LL_ABORT_ERR): |
| 1069 | case SCU_MAKE_COMPLETION_STATUS(SCU_TASK_DONE_XR_WD_LEN): |
| 1070 | case SCU_MAKE_COMPLETION_STATUS(SCU_TASK_DONE_MAX_PLD_ERR): |
| 1071 | case SCU_MAKE_COMPLETION_STATUS(SCU_TASK_DONE_UNEXP_RESP): |
| 1072 | case SCU_MAKE_COMPLETION_STATUS(SCU_TASK_DONE_UNEXP_SDBFIS): |
| 1073 | case SCU_MAKE_COMPLETION_STATUS(SCU_TASK_DONE_REG_ERR): |
| 1074 | case SCU_MAKE_COMPLETION_STATUS(SCU_TASK_DONE_SDB_ERR): |
Dan Williams | c79dd80 | 2012-02-01 00:44:14 -0800 | [diff] [blame] | 1075 | if (ireq->protocol == SAS_PROTOCOL_STP) { |
Dan Williams | 34a9915 | 2011-07-01 02:25:15 -0700 | [diff] [blame] | 1076 | ireq->scu_status = SCU_GET_COMPLETION_TL_STATUS(completion_code) >> |
| 1077 | SCU_COMPLETION_TL_STATUS_SHIFT; |
| 1078 | ireq->sci_status = SCI_FAILURE_REMOTE_DEVICE_RESET_REQUIRED; |
Dan Williams | f1f52e7 | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 1079 | } else { |
Dan Williams | 34a9915 | 2011-07-01 02:25:15 -0700 | [diff] [blame] | 1080 | ireq->scu_status = SCU_GET_COMPLETION_TL_STATUS(completion_code) >> |
| 1081 | SCU_COMPLETION_TL_STATUS_SHIFT; |
| 1082 | ireq->sci_status = SCI_FAILURE_CONTROLLER_SPECIFIC_IO_ERR; |
Dan Williams | f1f52e7 | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 1083 | } |
| 1084 | break; |
| 1085 | |
| 1086 | /* both stp/ssp device gets suspended */ |
| 1087 | case SCU_MAKE_COMPLETION_STATUS(SCU_TASK_DONE_LF_ERR): |
| 1088 | case SCU_MAKE_COMPLETION_STATUS(SCU_TASK_OPEN_REJECT_WRONG_DESTINATION): |
| 1089 | case SCU_MAKE_COMPLETION_STATUS(SCU_TASK_OPEN_REJECT_RESERVED_ABANDON_1): |
| 1090 | case SCU_MAKE_COMPLETION_STATUS(SCU_TASK_OPEN_REJECT_RESERVED_ABANDON_2): |
| 1091 | case SCU_MAKE_COMPLETION_STATUS(SCU_TASK_OPEN_REJECT_RESERVED_ABANDON_3): |
| 1092 | case SCU_MAKE_COMPLETION_STATUS(SCU_TASK_OPEN_REJECT_BAD_DESTINATION): |
| 1093 | case SCU_MAKE_COMPLETION_STATUS(SCU_TASK_OPEN_REJECT_ZONE_VIOLATION): |
| 1094 | case SCU_MAKE_COMPLETION_STATUS(SCU_TASK_OPEN_REJECT_STP_RESOURCES_BUSY): |
| 1095 | case SCU_MAKE_COMPLETION_STATUS(SCU_TASK_OPEN_REJECT_PROTOCOL_NOT_SUPPORTED): |
| 1096 | case SCU_MAKE_COMPLETION_STATUS(SCU_TASK_OPEN_REJECT_CONNECTION_RATE_NOT_SUPPORTED): |
Dan Williams | 34a9915 | 2011-07-01 02:25:15 -0700 | [diff] [blame] | 1097 | ireq->scu_status = SCU_GET_COMPLETION_TL_STATUS(completion_code) >> |
| 1098 | SCU_COMPLETION_TL_STATUS_SHIFT; |
| 1099 | ireq->sci_status = SCI_FAILURE_REMOTE_DEVICE_RESET_REQUIRED; |
Dan Williams | f1f52e7 | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 1100 | break; |
| 1101 | |
| 1102 | /* neither ssp nor stp gets suspended. */ |
| 1103 | case SCU_MAKE_COMPLETION_STATUS(SCU_TASK_DONE_NAK_CMD_ERR): |
| 1104 | case SCU_MAKE_COMPLETION_STATUS(SCU_TASK_DONE_UNEXP_XR): |
| 1105 | case SCU_MAKE_COMPLETION_STATUS(SCU_TASK_DONE_XR_IU_LEN_ERR): |
| 1106 | case SCU_MAKE_COMPLETION_STATUS(SCU_TASK_DONE_SDMA_ERR): |
| 1107 | case SCU_MAKE_COMPLETION_STATUS(SCU_TASK_DONE_OFFSET_ERR): |
| 1108 | case SCU_MAKE_COMPLETION_STATUS(SCU_TASK_DONE_EXCESS_DATA): |
| 1109 | case SCU_MAKE_COMPLETION_STATUS(SCU_TASK_DONE_SMP_RESP_TO_ERR): |
| 1110 | case SCU_MAKE_COMPLETION_STATUS(SCU_TASK_DONE_SMP_UFI_ERR): |
| 1111 | case SCU_MAKE_COMPLETION_STATUS(SCU_TASK_DONE_SMP_FRM_TYPE_ERR): |
| 1112 | case SCU_MAKE_COMPLETION_STATUS(SCU_TASK_DONE_SMP_LL_RX_ERR): |
| 1113 | case SCU_MAKE_COMPLETION_STATUS(SCU_TASK_DONE_UNEXP_DATA): |
| 1114 | case SCU_MAKE_COMPLETION_STATUS(SCU_TASK_DONE_OPEN_FAIL): |
| 1115 | case SCU_MAKE_COMPLETION_STATUS(SCU_TASK_DONE_VIIT_ENTRY_NV): |
| 1116 | case SCU_MAKE_COMPLETION_STATUS(SCU_TASK_DONE_IIT_ENTRY_NV): |
| 1117 | case SCU_MAKE_COMPLETION_STATUS(SCU_TASK_DONE_RNCNV_OUTBOUND): |
| 1118 | default: |
Dan Williams | 34a9915 | 2011-07-01 02:25:15 -0700 | [diff] [blame] | 1119 | ireq->scu_status = SCU_GET_COMPLETION_TL_STATUS(completion_code) >> |
| 1120 | SCU_COMPLETION_TL_STATUS_SHIFT; |
| 1121 | ireq->sci_status = SCI_FAILURE_CONTROLLER_SPECIFIC_IO_ERR; |
Dan Williams | f1f52e7 | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 1122 | break; |
| 1123 | } |
| 1124 | |
| 1125 | /* |
| 1126 | * TODO: This is probably wrong for ACK/NAK timeout conditions |
| 1127 | */ |
| 1128 | |
| 1129 | /* In all cases we will treat this as the completion of the IO req. */ |
Dan Williams | 5076a1a | 2011-06-27 14:57:03 -0700 | [diff] [blame] | 1130 | sci_change_state(&ireq->sm, SCI_REQ_COMPLETED); |
Dan Williams | f1f52e7 | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 1131 | return SCI_SUCCESS; |
| 1132 | } |
| 1133 | |
Edmund Nadolski | e301370 | 2011-06-02 00:10:43 +0000 | [diff] [blame] | 1134 | static enum sci_status |
Dan Williams | 5076a1a | 2011-06-27 14:57:03 -0700 | [diff] [blame] | 1135 | request_aborting_state_tc_event(struct isci_request *ireq, |
Edmund Nadolski | e301370 | 2011-06-02 00:10:43 +0000 | [diff] [blame] | 1136 | u32 completion_code) |
Dan Williams | f1f52e7 | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 1137 | { |
| 1138 | switch (SCU_GET_COMPLETION_TL_STATUS(completion_code)) { |
| 1139 | case (SCU_TASK_DONE_GOOD << SCU_COMPLETION_TL_STATUS_SHIFT): |
| 1140 | case (SCU_TASK_DONE_TASK_ABORT << SCU_COMPLETION_TL_STATUS_SHIFT): |
Dan Williams | 34a9915 | 2011-07-01 02:25:15 -0700 | [diff] [blame] | 1141 | ireq->scu_status = SCU_TASK_DONE_TASK_ABORT; |
| 1142 | ireq->sci_status = SCI_FAILURE_IO_TERMINATED; |
Dan Williams | 5076a1a | 2011-06-27 14:57:03 -0700 | [diff] [blame] | 1143 | sci_change_state(&ireq->sm, SCI_REQ_COMPLETED); |
Dan Williams | f1f52e7 | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 1144 | break; |
| 1145 | |
| 1146 | default: |
Dan Williams | a7e255a | 2011-05-11 08:27:47 -0700 | [diff] [blame] | 1147 | /* Unless we get some strange error wait for the task abort to complete |
| 1148 | * TODO: Should there be a state change for this completion? |
| 1149 | */ |
Dan Williams | f1f52e7 | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 1150 | break; |
| 1151 | } |
| 1152 | |
| 1153 | return SCI_SUCCESS; |
| 1154 | } |
| 1155 | |
Dan Williams | 5076a1a | 2011-06-27 14:57:03 -0700 | [diff] [blame] | 1156 | static enum sci_status ssp_task_request_await_tc_event(struct isci_request *ireq, |
Dan Williams | a7e255a | 2011-05-11 08:27:47 -0700 | [diff] [blame] | 1157 | u32 completion_code) |
Dan Williams | f139303 | 2011-05-10 02:28:47 -0700 | [diff] [blame] | 1158 | { |
| 1159 | switch (SCU_GET_COMPLETION_TL_STATUS(completion_code)) { |
| 1160 | case SCU_MAKE_COMPLETION_STATUS(SCU_TASK_DONE_GOOD): |
Dan Williams | 34a9915 | 2011-07-01 02:25:15 -0700 | [diff] [blame] | 1161 | ireq->scu_status = SCU_TASK_DONE_GOOD; |
| 1162 | ireq->sci_status = SCI_SUCCESS; |
Dan Williams | 5076a1a | 2011-06-27 14:57:03 -0700 | [diff] [blame] | 1163 | sci_change_state(&ireq->sm, SCI_REQ_TASK_WAIT_TC_RESP); |
Dan Williams | f139303 | 2011-05-10 02:28:47 -0700 | [diff] [blame] | 1164 | break; |
Dan Williams | f139303 | 2011-05-10 02:28:47 -0700 | [diff] [blame] | 1165 | case SCU_MAKE_COMPLETION_STATUS(SCU_TASK_DONE_ACK_NAK_TO): |
Dan Williams | a7e255a | 2011-05-11 08:27:47 -0700 | [diff] [blame] | 1166 | /* Currently, the decision is to simply allow the task request |
| 1167 | * to timeout if the task IU wasn't received successfully. |
| 1168 | * There is a potential for receiving multiple task responses if |
| 1169 | * we decide to send the task IU again. |
| 1170 | */ |
Dan Williams | d9dcb4b | 2011-06-30 17:38:32 -0700 | [diff] [blame] | 1171 | dev_warn(&ireq->owning_controller->pdev->dev, |
Dan Williams | f139303 | 2011-05-10 02:28:47 -0700 | [diff] [blame] | 1172 | "%s: TaskRequest:0x%p CompletionCode:%x - " |
Dan Williams | 5076a1a | 2011-06-27 14:57:03 -0700 | [diff] [blame] | 1173 | "ACK/NAK timeout\n", __func__, ireq, |
Dan Williams | f139303 | 2011-05-10 02:28:47 -0700 | [diff] [blame] | 1174 | completion_code); |
| 1175 | |
Dan Williams | 5076a1a | 2011-06-27 14:57:03 -0700 | [diff] [blame] | 1176 | sci_change_state(&ireq->sm, SCI_REQ_TASK_WAIT_TC_RESP); |
Dan Williams | f139303 | 2011-05-10 02:28:47 -0700 | [diff] [blame] | 1177 | break; |
Dan Williams | f139303 | 2011-05-10 02:28:47 -0700 | [diff] [blame] | 1178 | default: |
Edmund Nadolski | e301370 | 2011-06-02 00:10:43 +0000 | [diff] [blame] | 1179 | /* |
| 1180 | * All other completion status cause the IO to be complete. |
| 1181 | * If a NAK was received, then it is up to the user to retry |
| 1182 | * the request. |
Dan Williams | a7e255a | 2011-05-11 08:27:47 -0700 | [diff] [blame] | 1183 | */ |
Dan Williams | 34a9915 | 2011-07-01 02:25:15 -0700 | [diff] [blame] | 1184 | ireq->scu_status = SCU_NORMALIZE_COMPLETION_STATUS(completion_code); |
| 1185 | ireq->sci_status = SCI_FAILURE_CONTROLLER_SPECIFIC_IO_ERR; |
Dan Williams | 5076a1a | 2011-06-27 14:57:03 -0700 | [diff] [blame] | 1186 | sci_change_state(&ireq->sm, SCI_REQ_COMPLETED); |
Dan Williams | f139303 | 2011-05-10 02:28:47 -0700 | [diff] [blame] | 1187 | break; |
| 1188 | } |
| 1189 | |
| 1190 | return SCI_SUCCESS; |
| 1191 | } |
| 1192 | |
Edmund Nadolski | e301370 | 2011-06-02 00:10:43 +0000 | [diff] [blame] | 1193 | static enum sci_status |
Dan Williams | 5076a1a | 2011-06-27 14:57:03 -0700 | [diff] [blame] | 1194 | smp_request_await_response_tc_event(struct isci_request *ireq, |
Edmund Nadolski | e301370 | 2011-06-02 00:10:43 +0000 | [diff] [blame] | 1195 | u32 completion_code) |
Dan Williams | c72086e | 2011-05-10 02:28:48 -0700 | [diff] [blame] | 1196 | { |
| 1197 | switch (SCU_GET_COMPLETION_TL_STATUS(completion_code)) { |
| 1198 | case SCU_MAKE_COMPLETION_STATUS(SCU_TASK_DONE_GOOD): |
Dan Williams | a7e255a | 2011-05-11 08:27:47 -0700 | [diff] [blame] | 1199 | /* In the AWAIT RESPONSE state, any TC completion is |
| 1200 | * unexpected. but if the TC has success status, we |
| 1201 | * complete the IO anyway. |
| 1202 | */ |
Dan Williams | 34a9915 | 2011-07-01 02:25:15 -0700 | [diff] [blame] | 1203 | ireq->scu_status = SCU_TASK_DONE_GOOD; |
| 1204 | ireq->sci_status = SCI_SUCCESS; |
Dan Williams | 5076a1a | 2011-06-27 14:57:03 -0700 | [diff] [blame] | 1205 | sci_change_state(&ireq->sm, SCI_REQ_COMPLETED); |
Dan Williams | c72086e | 2011-05-10 02:28:48 -0700 | [diff] [blame] | 1206 | break; |
Dan Williams | c72086e | 2011-05-10 02:28:48 -0700 | [diff] [blame] | 1207 | case SCU_MAKE_COMPLETION_STATUS(SCU_TASK_DONE_SMP_RESP_TO_ERR): |
| 1208 | case SCU_MAKE_COMPLETION_STATUS(SCU_TASK_DONE_SMP_UFI_ERR): |
| 1209 | case SCU_MAKE_COMPLETION_STATUS(SCU_TASK_DONE_SMP_FRM_TYPE_ERR): |
| 1210 | case SCU_MAKE_COMPLETION_STATUS(SCU_TASK_DONE_SMP_LL_RX_ERR): |
Dan Williams | a7e255a | 2011-05-11 08:27:47 -0700 | [diff] [blame] | 1211 | /* These status has been seen in a specific LSI |
| 1212 | * expander, which sometimes is not able to send smp |
| 1213 | * response within 2 ms. This causes our hardware break |
| 1214 | * the connection and set TC completion with one of |
| 1215 | * these SMP_XXX_XX_ERR status. For these type of error, |
Dan Williams | d9dcb4b | 2011-06-30 17:38:32 -0700 | [diff] [blame] | 1216 | * we ask ihost user to retry the request. |
Dan Williams | a7e255a | 2011-05-11 08:27:47 -0700 | [diff] [blame] | 1217 | */ |
Dan Williams | 34a9915 | 2011-07-01 02:25:15 -0700 | [diff] [blame] | 1218 | ireq->scu_status = SCU_TASK_DONE_SMP_RESP_TO_ERR; |
| 1219 | ireq->sci_status = SCI_FAILURE_RETRY_REQUIRED; |
Dan Williams | 5076a1a | 2011-06-27 14:57:03 -0700 | [diff] [blame] | 1220 | sci_change_state(&ireq->sm, SCI_REQ_COMPLETED); |
Dan Williams | c72086e | 2011-05-10 02:28:48 -0700 | [diff] [blame] | 1221 | break; |
Dan Williams | c72086e | 2011-05-10 02:28:48 -0700 | [diff] [blame] | 1222 | default: |
Dan Williams | a7e255a | 2011-05-11 08:27:47 -0700 | [diff] [blame] | 1223 | /* All other completion status cause the IO to be complete. If a NAK |
| 1224 | * was received, then it is up to the user to retry the request |
| 1225 | */ |
Dan Williams | 34a9915 | 2011-07-01 02:25:15 -0700 | [diff] [blame] | 1226 | ireq->scu_status = SCU_NORMALIZE_COMPLETION_STATUS(completion_code); |
| 1227 | ireq->sci_status = SCI_FAILURE_CONTROLLER_SPECIFIC_IO_ERR; |
Dan Williams | 5076a1a | 2011-06-27 14:57:03 -0700 | [diff] [blame] | 1228 | sci_change_state(&ireq->sm, SCI_REQ_COMPLETED); |
Dan Williams | c72086e | 2011-05-10 02:28:48 -0700 | [diff] [blame] | 1229 | break; |
| 1230 | } |
| 1231 | |
| 1232 | return SCI_SUCCESS; |
| 1233 | } |
| 1234 | |
Edmund Nadolski | e301370 | 2011-06-02 00:10:43 +0000 | [diff] [blame] | 1235 | static enum sci_status |
Dan Williams | 5076a1a | 2011-06-27 14:57:03 -0700 | [diff] [blame] | 1236 | smp_request_await_tc_event(struct isci_request *ireq, |
Edmund Nadolski | e301370 | 2011-06-02 00:10:43 +0000 | [diff] [blame] | 1237 | u32 completion_code) |
Dan Williams | c72086e | 2011-05-10 02:28:48 -0700 | [diff] [blame] | 1238 | { |
| 1239 | switch (SCU_GET_COMPLETION_TL_STATUS(completion_code)) { |
| 1240 | case SCU_MAKE_COMPLETION_STATUS(SCU_TASK_DONE_GOOD): |
Dan Williams | 34a9915 | 2011-07-01 02:25:15 -0700 | [diff] [blame] | 1241 | ireq->scu_status = SCU_TASK_DONE_GOOD; |
| 1242 | ireq->sci_status = SCI_SUCCESS; |
Dan Williams | 5076a1a | 2011-06-27 14:57:03 -0700 | [diff] [blame] | 1243 | sci_change_state(&ireq->sm, SCI_REQ_COMPLETED); |
Dan Williams | c72086e | 2011-05-10 02:28:48 -0700 | [diff] [blame] | 1244 | break; |
Dan Williams | c72086e | 2011-05-10 02:28:48 -0700 | [diff] [blame] | 1245 | default: |
Dan Williams | a7e255a | 2011-05-11 08:27:47 -0700 | [diff] [blame] | 1246 | /* All other completion status cause the IO to be |
| 1247 | * complete. If a NAK was received, then it is up to |
| 1248 | * the user to retry the request. |
| 1249 | */ |
Dan Williams | 34a9915 | 2011-07-01 02:25:15 -0700 | [diff] [blame] | 1250 | ireq->scu_status = SCU_NORMALIZE_COMPLETION_STATUS(completion_code); |
| 1251 | ireq->sci_status = SCI_FAILURE_CONTROLLER_SPECIFIC_IO_ERR; |
Dan Williams | 5076a1a | 2011-06-27 14:57:03 -0700 | [diff] [blame] | 1252 | sci_change_state(&ireq->sm, SCI_REQ_COMPLETED); |
Dan Williams | c72086e | 2011-05-10 02:28:48 -0700 | [diff] [blame] | 1253 | break; |
| 1254 | } |
| 1255 | |
| 1256 | return SCI_SUCCESS; |
| 1257 | } |
| 1258 | |
Dan Williams | ba7cb22 | 2011-06-27 11:56:41 -0700 | [diff] [blame] | 1259 | static struct scu_sgl_element *pio_sgl_next(struct isci_stp_request *stp_req) |
Dan Williams | 5dec6f4 | 2011-05-10 02:28:49 -0700 | [diff] [blame] | 1260 | { |
Dan Williams | 312e0c2 | 2011-06-28 13:47:09 -0700 | [diff] [blame] | 1261 | struct scu_sgl_element *sgl; |
| 1262 | struct scu_sgl_element_pair *sgl_pair; |
Dan Williams | 5076a1a | 2011-06-27 14:57:03 -0700 | [diff] [blame] | 1263 | struct isci_request *ireq = to_ireq(stp_req); |
Dan Williams | ba7cb22 | 2011-06-27 11:56:41 -0700 | [diff] [blame] | 1264 | struct isci_stp_pio_sgl *pio_sgl = &stp_req->sgl; |
Dan Williams | 5dec6f4 | 2011-05-10 02:28:49 -0700 | [diff] [blame] | 1265 | |
Dan Williams | 5076a1a | 2011-06-27 14:57:03 -0700 | [diff] [blame] | 1266 | sgl_pair = to_sgl_element_pair(ireq, pio_sgl->index); |
Dan Williams | 312e0c2 | 2011-06-28 13:47:09 -0700 | [diff] [blame] | 1267 | if (!sgl_pair) |
| 1268 | sgl = NULL; |
Dan Williams | ba7cb22 | 2011-06-27 11:56:41 -0700 | [diff] [blame] | 1269 | else if (pio_sgl->set == SCU_SGL_ELEMENT_PAIR_A) { |
Dan Williams | 312e0c2 | 2011-06-28 13:47:09 -0700 | [diff] [blame] | 1270 | if (sgl_pair->B.address_lower == 0 && |
| 1271 | sgl_pair->B.address_upper == 0) { |
| 1272 | sgl = NULL; |
Dan Williams | 5dec6f4 | 2011-05-10 02:28:49 -0700 | [diff] [blame] | 1273 | } else { |
Dan Williams | ba7cb22 | 2011-06-27 11:56:41 -0700 | [diff] [blame] | 1274 | pio_sgl->set = SCU_SGL_ELEMENT_PAIR_B; |
Dan Williams | 312e0c2 | 2011-06-28 13:47:09 -0700 | [diff] [blame] | 1275 | sgl = &sgl_pair->B; |
Dan Williams | 5dec6f4 | 2011-05-10 02:28:49 -0700 | [diff] [blame] | 1276 | } |
| 1277 | } else { |
Dan Williams | 312e0c2 | 2011-06-28 13:47:09 -0700 | [diff] [blame] | 1278 | if (sgl_pair->next_pair_lower == 0 && |
| 1279 | sgl_pair->next_pair_upper == 0) { |
| 1280 | sgl = NULL; |
Dan Williams | 5dec6f4 | 2011-05-10 02:28:49 -0700 | [diff] [blame] | 1281 | } else { |
Dan Williams | ba7cb22 | 2011-06-27 11:56:41 -0700 | [diff] [blame] | 1282 | pio_sgl->index++; |
| 1283 | pio_sgl->set = SCU_SGL_ELEMENT_PAIR_A; |
Dan Williams | 5076a1a | 2011-06-27 14:57:03 -0700 | [diff] [blame] | 1284 | sgl_pair = to_sgl_element_pair(ireq, pio_sgl->index); |
Dan Williams | 312e0c2 | 2011-06-28 13:47:09 -0700 | [diff] [blame] | 1285 | sgl = &sgl_pair->A; |
Dan Williams | 5dec6f4 | 2011-05-10 02:28:49 -0700 | [diff] [blame] | 1286 | } |
| 1287 | } |
| 1288 | |
Dan Williams | 312e0c2 | 2011-06-28 13:47:09 -0700 | [diff] [blame] | 1289 | return sgl; |
Dan Williams | 5dec6f4 | 2011-05-10 02:28:49 -0700 | [diff] [blame] | 1290 | } |
| 1291 | |
Edmund Nadolski | e301370 | 2011-06-02 00:10:43 +0000 | [diff] [blame] | 1292 | static enum sci_status |
Dan Williams | 5076a1a | 2011-06-27 14:57:03 -0700 | [diff] [blame] | 1293 | stp_request_non_data_await_h2d_tc_event(struct isci_request *ireq, |
Edmund Nadolski | e301370 | 2011-06-02 00:10:43 +0000 | [diff] [blame] | 1294 | u32 completion_code) |
Dan Williams | 5dec6f4 | 2011-05-10 02:28:49 -0700 | [diff] [blame] | 1295 | { |
| 1296 | switch (SCU_GET_COMPLETION_TL_STATUS(completion_code)) { |
| 1297 | case SCU_MAKE_COMPLETION_STATUS(SCU_TASK_DONE_GOOD): |
Dan Williams | 34a9915 | 2011-07-01 02:25:15 -0700 | [diff] [blame] | 1298 | ireq->scu_status = SCU_TASK_DONE_GOOD; |
| 1299 | ireq->sci_status = SCI_SUCCESS; |
Dan Williams | 5076a1a | 2011-06-27 14:57:03 -0700 | [diff] [blame] | 1300 | sci_change_state(&ireq->sm, SCI_REQ_STP_NON_DATA_WAIT_D2H); |
Dan Williams | 5dec6f4 | 2011-05-10 02:28:49 -0700 | [diff] [blame] | 1301 | break; |
| 1302 | |
| 1303 | default: |
Dan Williams | a7e255a | 2011-05-11 08:27:47 -0700 | [diff] [blame] | 1304 | /* All other completion status cause the IO to be |
| 1305 | * complete. If a NAK was received, then it is up to |
| 1306 | * the user to retry the request. |
| 1307 | */ |
Dan Williams | 34a9915 | 2011-07-01 02:25:15 -0700 | [diff] [blame] | 1308 | ireq->scu_status = SCU_NORMALIZE_COMPLETION_STATUS(completion_code); |
| 1309 | ireq->sci_status = SCI_FAILURE_CONTROLLER_SPECIFIC_IO_ERR; |
Dan Williams | 5076a1a | 2011-06-27 14:57:03 -0700 | [diff] [blame] | 1310 | sci_change_state(&ireq->sm, SCI_REQ_COMPLETED); |
Dan Williams | 5dec6f4 | 2011-05-10 02:28:49 -0700 | [diff] [blame] | 1311 | break; |
| 1312 | } |
| 1313 | |
| 1314 | return SCI_SUCCESS; |
| 1315 | } |
| 1316 | |
Dan Williams | 5dec6f4 | 2011-05-10 02:28:49 -0700 | [diff] [blame] | 1317 | #define SCU_MAX_FRAME_BUFFER_SIZE 0x400 /* 1K is the maximum SCU frame data payload */ |
| 1318 | |
| 1319 | /* transmit DATA_FIS from (current sgl + offset) for input |
| 1320 | * parameter length. current sgl and offset is alreay stored in the IO request |
| 1321 | */ |
Dan Williams | 89a7301 | 2011-06-30 19:14:33 -0700 | [diff] [blame] | 1322 | static enum sci_status sci_stp_request_pio_data_out_trasmit_data_frame( |
Dan Williams | 5076a1a | 2011-06-27 14:57:03 -0700 | [diff] [blame] | 1323 | struct isci_request *ireq, |
Dan Williams | 5dec6f4 | 2011-05-10 02:28:49 -0700 | [diff] [blame] | 1324 | u32 length) |
| 1325 | { |
Dan Williams | 5076a1a | 2011-06-27 14:57:03 -0700 | [diff] [blame] | 1326 | struct isci_stp_request *stp_req = &ireq->stp.req; |
| 1327 | struct scu_task_context *task_context = ireq->tc; |
Dan Williams | 312e0c2 | 2011-06-28 13:47:09 -0700 | [diff] [blame] | 1328 | struct scu_sgl_element_pair *sgl_pair; |
Dan Williams | 5dec6f4 | 2011-05-10 02:28:49 -0700 | [diff] [blame] | 1329 | struct scu_sgl_element *current_sgl; |
| 1330 | |
| 1331 | /* Recycle the TC and reconstruct it for sending out DATA FIS containing |
| 1332 | * for the data from current_sgl+offset for the input length |
| 1333 | */ |
Dan Williams | 5076a1a | 2011-06-27 14:57:03 -0700 | [diff] [blame] | 1334 | sgl_pair = to_sgl_element_pair(ireq, stp_req->sgl.index); |
Dan Williams | ba7cb22 | 2011-06-27 11:56:41 -0700 | [diff] [blame] | 1335 | if (stp_req->sgl.set == SCU_SGL_ELEMENT_PAIR_A) |
Dan Williams | 312e0c2 | 2011-06-28 13:47:09 -0700 | [diff] [blame] | 1336 | current_sgl = &sgl_pair->A; |
Dan Williams | 5dec6f4 | 2011-05-10 02:28:49 -0700 | [diff] [blame] | 1337 | else |
Dan Williams | 312e0c2 | 2011-06-28 13:47:09 -0700 | [diff] [blame] | 1338 | current_sgl = &sgl_pair->B; |
Dan Williams | 5dec6f4 | 2011-05-10 02:28:49 -0700 | [diff] [blame] | 1339 | |
| 1340 | /* update the TC */ |
| 1341 | task_context->command_iu_upper = current_sgl->address_upper; |
| 1342 | task_context->command_iu_lower = current_sgl->address_lower; |
| 1343 | task_context->transfer_length_bytes = length; |
| 1344 | task_context->type.stp.fis_type = FIS_DATA; |
| 1345 | |
| 1346 | /* send the new TC out. */ |
Dan Williams | 89a7301 | 2011-06-30 19:14:33 -0700 | [diff] [blame] | 1347 | return sci_controller_continue_io(ireq); |
Dan Williams | 5dec6f4 | 2011-05-10 02:28:49 -0700 | [diff] [blame] | 1348 | } |
| 1349 | |
Dan Williams | 89a7301 | 2011-06-30 19:14:33 -0700 | [diff] [blame] | 1350 | static enum sci_status sci_stp_request_pio_data_out_transmit_data(struct isci_request *ireq) |
Dan Williams | 5dec6f4 | 2011-05-10 02:28:49 -0700 | [diff] [blame] | 1351 | { |
Dan Williams | 5076a1a | 2011-06-27 14:57:03 -0700 | [diff] [blame] | 1352 | struct isci_stp_request *stp_req = &ireq->stp.req; |
Dan Williams | 312e0c2 | 2011-06-28 13:47:09 -0700 | [diff] [blame] | 1353 | struct scu_sgl_element_pair *sgl_pair; |
Dan Williams | b50102d | 2011-09-30 18:52:19 -0700 | [diff] [blame] | 1354 | enum sci_status status = SCI_SUCCESS; |
Dan Williams | ba7cb22 | 2011-06-27 11:56:41 -0700 | [diff] [blame] | 1355 | struct scu_sgl_element *sgl; |
Dan Williams | ba7cb22 | 2011-06-27 11:56:41 -0700 | [diff] [blame] | 1356 | u32 offset; |
| 1357 | u32 len = 0; |
Dan Williams | 5dec6f4 | 2011-05-10 02:28:49 -0700 | [diff] [blame] | 1358 | |
Dan Williams | ba7cb22 | 2011-06-27 11:56:41 -0700 | [diff] [blame] | 1359 | offset = stp_req->sgl.offset; |
Dan Williams | 5076a1a | 2011-06-27 14:57:03 -0700 | [diff] [blame] | 1360 | sgl_pair = to_sgl_element_pair(ireq, stp_req->sgl.index); |
Dan Williams | 312e0c2 | 2011-06-28 13:47:09 -0700 | [diff] [blame] | 1361 | if (WARN_ONCE(!sgl_pair, "%s: null sgl element", __func__)) |
| 1362 | return SCI_FAILURE; |
Dan Williams | 5dec6f4 | 2011-05-10 02:28:49 -0700 | [diff] [blame] | 1363 | |
Dan Williams | ba7cb22 | 2011-06-27 11:56:41 -0700 | [diff] [blame] | 1364 | if (stp_req->sgl.set == SCU_SGL_ELEMENT_PAIR_A) { |
| 1365 | sgl = &sgl_pair->A; |
| 1366 | len = sgl_pair->A.length - offset; |
Dan Williams | 5dec6f4 | 2011-05-10 02:28:49 -0700 | [diff] [blame] | 1367 | } else { |
Dan Williams | ba7cb22 | 2011-06-27 11:56:41 -0700 | [diff] [blame] | 1368 | sgl = &sgl_pair->B; |
| 1369 | len = sgl_pair->B.length - offset; |
Dan Williams | 5dec6f4 | 2011-05-10 02:28:49 -0700 | [diff] [blame] | 1370 | } |
| 1371 | |
Dan Williams | ba7cb22 | 2011-06-27 11:56:41 -0700 | [diff] [blame] | 1372 | if (stp_req->pio_len == 0) |
| 1373 | return SCI_SUCCESS; |
Dan Williams | 5dec6f4 | 2011-05-10 02:28:49 -0700 | [diff] [blame] | 1374 | |
Dan Williams | ba7cb22 | 2011-06-27 11:56:41 -0700 | [diff] [blame] | 1375 | if (stp_req->pio_len >= len) { |
Dan Williams | 89a7301 | 2011-06-30 19:14:33 -0700 | [diff] [blame] | 1376 | status = sci_stp_request_pio_data_out_trasmit_data_frame(ireq, len); |
Dan Williams | ba7cb22 | 2011-06-27 11:56:41 -0700 | [diff] [blame] | 1377 | if (status != SCI_SUCCESS) |
| 1378 | return status; |
| 1379 | stp_req->pio_len -= len; |
Dan Williams | 5dec6f4 | 2011-05-10 02:28:49 -0700 | [diff] [blame] | 1380 | |
Dan Williams | ba7cb22 | 2011-06-27 11:56:41 -0700 | [diff] [blame] | 1381 | /* update the current sgl, offset and save for future */ |
| 1382 | sgl = pio_sgl_next(stp_req); |
| 1383 | offset = 0; |
| 1384 | } else if (stp_req->pio_len < len) { |
Dan Williams | 89a7301 | 2011-06-30 19:14:33 -0700 | [diff] [blame] | 1385 | sci_stp_request_pio_data_out_trasmit_data_frame(ireq, stp_req->pio_len); |
Dan Williams | ba7cb22 | 2011-06-27 11:56:41 -0700 | [diff] [blame] | 1386 | |
| 1387 | /* Sgl offset will be adjusted and saved for future */ |
| 1388 | offset += stp_req->pio_len; |
| 1389 | sgl->address_lower += stp_req->pio_len; |
| 1390 | stp_req->pio_len = 0; |
Dan Williams | 5dec6f4 | 2011-05-10 02:28:49 -0700 | [diff] [blame] | 1391 | } |
| 1392 | |
Dan Williams | ba7cb22 | 2011-06-27 11:56:41 -0700 | [diff] [blame] | 1393 | stp_req->sgl.offset = offset; |
Dan Williams | 5dec6f4 | 2011-05-10 02:28:49 -0700 | [diff] [blame] | 1394 | |
| 1395 | return status; |
| 1396 | } |
| 1397 | |
| 1398 | /** |
| 1399 | * |
| 1400 | * @stp_request: The request that is used for the SGL processing. |
| 1401 | * @data_buffer: The buffer of data to be copied. |
| 1402 | * @length: The length of the data transfer. |
| 1403 | * |
| 1404 | * Copy the data from the buffer for the length specified to the IO reqeust SGL |
| 1405 | * specified data region. enum sci_status |
| 1406 | */ |
| 1407 | static enum sci_status |
Dan Williams | 89a7301 | 2011-06-30 19:14:33 -0700 | [diff] [blame] | 1408 | sci_stp_request_pio_data_in_copy_data_buffer(struct isci_stp_request *stp_req, |
Dan Williams | b50102d | 2011-09-30 18:52:19 -0700 | [diff] [blame] | 1409 | u8 *data_buf, u32 len) |
Dan Williams | 5dec6f4 | 2011-05-10 02:28:49 -0700 | [diff] [blame] | 1410 | { |
Dan Williams | 5dec6f4 | 2011-05-10 02:28:49 -0700 | [diff] [blame] | 1411 | struct isci_request *ireq; |
| 1412 | u8 *src_addr; |
| 1413 | int copy_len; |
| 1414 | struct sas_task *task; |
| 1415 | struct scatterlist *sg; |
| 1416 | void *kaddr; |
| 1417 | int total_len = len; |
| 1418 | |
Dan Williams | 5076a1a | 2011-06-27 14:57:03 -0700 | [diff] [blame] | 1419 | ireq = to_ireq(stp_req); |
Dan Williams | 5dec6f4 | 2011-05-10 02:28:49 -0700 | [diff] [blame] | 1420 | task = isci_request_access_task(ireq); |
| 1421 | src_addr = data_buf; |
| 1422 | |
| 1423 | if (task->num_scatter > 0) { |
| 1424 | sg = task->scatter; |
| 1425 | |
| 1426 | while (total_len > 0) { |
| 1427 | struct page *page = sg_page(sg); |
| 1428 | |
| 1429 | copy_len = min_t(int, total_len, sg_dma_len(sg)); |
Cong Wang | 77dfce0 | 2011-11-25 23:14:23 +0800 | [diff] [blame] | 1430 | kaddr = kmap_atomic(page); |
Dan Williams | 5dec6f4 | 2011-05-10 02:28:49 -0700 | [diff] [blame] | 1431 | memcpy(kaddr + sg->offset, src_addr, copy_len); |
Cong Wang | 77dfce0 | 2011-11-25 23:14:23 +0800 | [diff] [blame] | 1432 | kunmap_atomic(kaddr); |
Dan Williams | 5dec6f4 | 2011-05-10 02:28:49 -0700 | [diff] [blame] | 1433 | total_len -= copy_len; |
| 1434 | src_addr += copy_len; |
| 1435 | sg = sg_next(sg); |
| 1436 | } |
| 1437 | } else { |
| 1438 | BUG_ON(task->total_xfer_len < total_len); |
| 1439 | memcpy(task->scatter, src_addr, total_len); |
| 1440 | } |
| 1441 | |
| 1442 | return SCI_SUCCESS; |
| 1443 | } |
| 1444 | |
| 1445 | /** |
| 1446 | * |
| 1447 | * @sci_req: The PIO DATA IN request that is to receive the data. |
| 1448 | * @data_buffer: The buffer to copy from. |
| 1449 | * |
| 1450 | * Copy the data buffer to the io request data region. enum sci_status |
| 1451 | */ |
Dan Williams | 89a7301 | 2011-06-30 19:14:33 -0700 | [diff] [blame] | 1452 | static enum sci_status sci_stp_request_pio_data_in_copy_data( |
Dan Williams | ba7cb22 | 2011-06-27 11:56:41 -0700 | [diff] [blame] | 1453 | struct isci_stp_request *stp_req, |
Dan Williams | 5dec6f4 | 2011-05-10 02:28:49 -0700 | [diff] [blame] | 1454 | u8 *data_buffer) |
| 1455 | { |
| 1456 | enum sci_status status; |
| 1457 | |
| 1458 | /* |
| 1459 | * If there is less than 1K remaining in the transfer request |
| 1460 | * copy just the data for the transfer */ |
Dan Williams | ba7cb22 | 2011-06-27 11:56:41 -0700 | [diff] [blame] | 1461 | if (stp_req->pio_len < SCU_MAX_FRAME_BUFFER_SIZE) { |
Dan Williams | 89a7301 | 2011-06-30 19:14:33 -0700 | [diff] [blame] | 1462 | status = sci_stp_request_pio_data_in_copy_data_buffer( |
Dan Williams | ba7cb22 | 2011-06-27 11:56:41 -0700 | [diff] [blame] | 1463 | stp_req, data_buffer, stp_req->pio_len); |
Dan Williams | 5dec6f4 | 2011-05-10 02:28:49 -0700 | [diff] [blame] | 1464 | |
| 1465 | if (status == SCI_SUCCESS) |
Dan Williams | ba7cb22 | 2011-06-27 11:56:41 -0700 | [diff] [blame] | 1466 | stp_req->pio_len = 0; |
Dan Williams | 5dec6f4 | 2011-05-10 02:28:49 -0700 | [diff] [blame] | 1467 | } else { |
| 1468 | /* We are transfering the whole frame so copy */ |
Dan Williams | 89a7301 | 2011-06-30 19:14:33 -0700 | [diff] [blame] | 1469 | status = sci_stp_request_pio_data_in_copy_data_buffer( |
Dan Williams | ba7cb22 | 2011-06-27 11:56:41 -0700 | [diff] [blame] | 1470 | stp_req, data_buffer, SCU_MAX_FRAME_BUFFER_SIZE); |
Dan Williams | 5dec6f4 | 2011-05-10 02:28:49 -0700 | [diff] [blame] | 1471 | |
| 1472 | if (status == SCI_SUCCESS) |
Dan Williams | ba7cb22 | 2011-06-27 11:56:41 -0700 | [diff] [blame] | 1473 | stp_req->pio_len -= SCU_MAX_FRAME_BUFFER_SIZE; |
Dan Williams | 5dec6f4 | 2011-05-10 02:28:49 -0700 | [diff] [blame] | 1474 | } |
| 1475 | |
| 1476 | return status; |
| 1477 | } |
| 1478 | |
Edmund Nadolski | e301370 | 2011-06-02 00:10:43 +0000 | [diff] [blame] | 1479 | static enum sci_status |
Dan Williams | 5076a1a | 2011-06-27 14:57:03 -0700 | [diff] [blame] | 1480 | stp_request_pio_await_h2d_completion_tc_event(struct isci_request *ireq, |
Edmund Nadolski | e301370 | 2011-06-02 00:10:43 +0000 | [diff] [blame] | 1481 | u32 completion_code) |
Dan Williams | 5dec6f4 | 2011-05-10 02:28:49 -0700 | [diff] [blame] | 1482 | { |
| 1483 | enum sci_status status = SCI_SUCCESS; |
| 1484 | |
| 1485 | switch (SCU_GET_COMPLETION_TL_STATUS(completion_code)) { |
| 1486 | case SCU_MAKE_COMPLETION_STATUS(SCU_TASK_DONE_GOOD): |
Dan Williams | 34a9915 | 2011-07-01 02:25:15 -0700 | [diff] [blame] | 1487 | ireq->scu_status = SCU_TASK_DONE_GOOD; |
| 1488 | ireq->sci_status = SCI_SUCCESS; |
Dan Williams | 5076a1a | 2011-06-27 14:57:03 -0700 | [diff] [blame] | 1489 | sci_change_state(&ireq->sm, SCI_REQ_STP_PIO_WAIT_FRAME); |
Dan Williams | 5dec6f4 | 2011-05-10 02:28:49 -0700 | [diff] [blame] | 1490 | break; |
| 1491 | |
| 1492 | default: |
Dan Williams | a7e255a | 2011-05-11 08:27:47 -0700 | [diff] [blame] | 1493 | /* All other completion status cause the IO to be |
| 1494 | * complete. If a NAK was received, then it is up to |
| 1495 | * the user to retry the request. |
| 1496 | */ |
Dan Williams | 34a9915 | 2011-07-01 02:25:15 -0700 | [diff] [blame] | 1497 | ireq->scu_status = SCU_NORMALIZE_COMPLETION_STATUS(completion_code); |
| 1498 | ireq->sci_status = SCI_FAILURE_CONTROLLER_SPECIFIC_IO_ERR; |
Dan Williams | 5076a1a | 2011-06-27 14:57:03 -0700 | [diff] [blame] | 1499 | sci_change_state(&ireq->sm, SCI_REQ_COMPLETED); |
Dan Williams | 5dec6f4 | 2011-05-10 02:28:49 -0700 | [diff] [blame] | 1500 | break; |
| 1501 | } |
| 1502 | |
| 1503 | return status; |
| 1504 | } |
| 1505 | |
Edmund Nadolski | e301370 | 2011-06-02 00:10:43 +0000 | [diff] [blame] | 1506 | static enum sci_status |
Dan Williams | 5076a1a | 2011-06-27 14:57:03 -0700 | [diff] [blame] | 1507 | pio_data_out_tx_done_tc_event(struct isci_request *ireq, |
Edmund Nadolski | e301370 | 2011-06-02 00:10:43 +0000 | [diff] [blame] | 1508 | u32 completion_code) |
Dan Williams | 5dec6f4 | 2011-05-10 02:28:49 -0700 | [diff] [blame] | 1509 | { |
| 1510 | enum sci_status status = SCI_SUCCESS; |
| 1511 | bool all_frames_transferred = false; |
Dan Williams | 5076a1a | 2011-06-27 14:57:03 -0700 | [diff] [blame] | 1512 | struct isci_stp_request *stp_req = &ireq->stp.req; |
Dan Williams | 5dec6f4 | 2011-05-10 02:28:49 -0700 | [diff] [blame] | 1513 | |
| 1514 | switch (SCU_GET_COMPLETION_TL_STATUS(completion_code)) { |
| 1515 | case SCU_MAKE_COMPLETION_STATUS(SCU_TASK_DONE_GOOD): |
| 1516 | /* Transmit data */ |
Dan Williams | ba7cb22 | 2011-06-27 11:56:41 -0700 | [diff] [blame] | 1517 | if (stp_req->pio_len != 0) { |
Dan Williams | 89a7301 | 2011-06-30 19:14:33 -0700 | [diff] [blame] | 1518 | status = sci_stp_request_pio_data_out_transmit_data(ireq); |
Dan Williams | 5dec6f4 | 2011-05-10 02:28:49 -0700 | [diff] [blame] | 1519 | if (status == SCI_SUCCESS) { |
Dan Williams | ba7cb22 | 2011-06-27 11:56:41 -0700 | [diff] [blame] | 1520 | if (stp_req->pio_len == 0) |
Dan Williams | 5dec6f4 | 2011-05-10 02:28:49 -0700 | [diff] [blame] | 1521 | all_frames_transferred = true; |
| 1522 | } |
Dan Williams | ba7cb22 | 2011-06-27 11:56:41 -0700 | [diff] [blame] | 1523 | } else if (stp_req->pio_len == 0) { |
Dan Williams | 5dec6f4 | 2011-05-10 02:28:49 -0700 | [diff] [blame] | 1524 | /* |
| 1525 | * this will happen if the all data is written at the |
| 1526 | * first time after the pio setup fis is received |
| 1527 | */ |
| 1528 | all_frames_transferred = true; |
| 1529 | } |
| 1530 | |
| 1531 | /* all data transferred. */ |
| 1532 | if (all_frames_transferred) { |
| 1533 | /* |
Edmund Nadolski | e301370 | 2011-06-02 00:10:43 +0000 | [diff] [blame] | 1534 | * Change the state to SCI_REQ_STP_PIO_DATA_IN |
Dan Williams | 5dec6f4 | 2011-05-10 02:28:49 -0700 | [diff] [blame] | 1535 | * and wait for PIO_SETUP fis / or D2H REg fis. */ |
Dan Williams | 5076a1a | 2011-06-27 14:57:03 -0700 | [diff] [blame] | 1536 | sci_change_state(&ireq->sm, SCI_REQ_STP_PIO_WAIT_FRAME); |
Dan Williams | 5dec6f4 | 2011-05-10 02:28:49 -0700 | [diff] [blame] | 1537 | } |
| 1538 | break; |
Edmund Nadolski | e301370 | 2011-06-02 00:10:43 +0000 | [diff] [blame] | 1539 | |
Dan Williams | 5dec6f4 | 2011-05-10 02:28:49 -0700 | [diff] [blame] | 1540 | default: |
| 1541 | /* |
Edmund Nadolski | e301370 | 2011-06-02 00:10:43 +0000 | [diff] [blame] | 1542 | * All other completion status cause the IO to be complete. |
| 1543 | * If a NAK was received, then it is up to the user to retry |
| 1544 | * the request. |
| 1545 | */ |
Dan Williams | 34a9915 | 2011-07-01 02:25:15 -0700 | [diff] [blame] | 1546 | ireq->scu_status = SCU_NORMALIZE_COMPLETION_STATUS(completion_code); |
| 1547 | ireq->sci_status = SCI_FAILURE_CONTROLLER_SPECIFIC_IO_ERR; |
Dan Williams | 5076a1a | 2011-06-27 14:57:03 -0700 | [diff] [blame] | 1548 | sci_change_state(&ireq->sm, SCI_REQ_COMPLETED); |
Dan Williams | 5dec6f4 | 2011-05-10 02:28:49 -0700 | [diff] [blame] | 1549 | break; |
| 1550 | } |
| 1551 | |
| 1552 | return status; |
| 1553 | } |
| 1554 | |
Dan Williams | 89a7301 | 2011-06-30 19:14:33 -0700 | [diff] [blame] | 1555 | static enum sci_status sci_stp_request_udma_general_frame_handler(struct isci_request *ireq, |
Dan Williams | 5dec6f4 | 2011-05-10 02:28:49 -0700 | [diff] [blame] | 1556 | u32 frame_index) |
| 1557 | { |
Dan Williams | d9dcb4b | 2011-06-30 17:38:32 -0700 | [diff] [blame] | 1558 | struct isci_host *ihost = ireq->owning_controller; |
Dan Williams | 5dec6f4 | 2011-05-10 02:28:49 -0700 | [diff] [blame] | 1559 | struct dev_to_host_fis *frame_header; |
| 1560 | enum sci_status status; |
| 1561 | u32 *frame_buffer; |
| 1562 | |
Dan Williams | 89a7301 | 2011-06-30 19:14:33 -0700 | [diff] [blame] | 1563 | status = sci_unsolicited_frame_control_get_header(&ihost->uf_control, |
Dan Williams | 5dec6f4 | 2011-05-10 02:28:49 -0700 | [diff] [blame] | 1564 | frame_index, |
| 1565 | (void **)&frame_header); |
| 1566 | |
| 1567 | if ((status == SCI_SUCCESS) && |
| 1568 | (frame_header->fis_type == FIS_REGD2H)) { |
Dan Williams | 89a7301 | 2011-06-30 19:14:33 -0700 | [diff] [blame] | 1569 | sci_unsolicited_frame_control_get_buffer(&ihost->uf_control, |
Dan Williams | 5dec6f4 | 2011-05-10 02:28:49 -0700 | [diff] [blame] | 1570 | frame_index, |
| 1571 | (void **)&frame_buffer); |
| 1572 | |
Dan Williams | 89a7301 | 2011-06-30 19:14:33 -0700 | [diff] [blame] | 1573 | sci_controller_copy_sata_response(&ireq->stp.rsp, |
Dan Williams | 5dec6f4 | 2011-05-10 02:28:49 -0700 | [diff] [blame] | 1574 | frame_header, |
| 1575 | frame_buffer); |
| 1576 | } |
| 1577 | |
Dan Williams | 89a7301 | 2011-06-30 19:14:33 -0700 | [diff] [blame] | 1578 | sci_controller_release_frame(ihost, frame_index); |
Dan Williams | 5dec6f4 | 2011-05-10 02:28:49 -0700 | [diff] [blame] | 1579 | |
| 1580 | return status; |
| 1581 | } |
| 1582 | |
Dan Williams | b50102d | 2011-09-30 18:52:19 -0700 | [diff] [blame] | 1583 | static enum sci_status process_unsolicited_fis(struct isci_request *ireq, |
| 1584 | u32 frame_index) |
| 1585 | { |
| 1586 | struct isci_host *ihost = ireq->owning_controller; |
| 1587 | enum sci_status status; |
| 1588 | struct dev_to_host_fis *frame_header; |
| 1589 | u32 *frame_buffer; |
| 1590 | |
| 1591 | status = sci_unsolicited_frame_control_get_header(&ihost->uf_control, |
| 1592 | frame_index, |
| 1593 | (void **)&frame_header); |
| 1594 | |
| 1595 | if (status != SCI_SUCCESS) |
| 1596 | return status; |
| 1597 | |
| 1598 | if (frame_header->fis_type != FIS_REGD2H) { |
| 1599 | dev_err(&ireq->isci_host->pdev->dev, |
| 1600 | "%s ERROR: invalid fis type 0x%X\n", |
| 1601 | __func__, frame_header->fis_type); |
| 1602 | return SCI_FAILURE; |
| 1603 | } |
| 1604 | |
| 1605 | sci_unsolicited_frame_control_get_buffer(&ihost->uf_control, |
| 1606 | frame_index, |
| 1607 | (void **)&frame_buffer); |
| 1608 | |
| 1609 | sci_controller_copy_sata_response(&ireq->stp.rsp, |
| 1610 | (u32 *)frame_header, |
| 1611 | frame_buffer); |
| 1612 | |
| 1613 | /* Frame has been decoded return it to the controller */ |
| 1614 | sci_controller_release_frame(ihost, frame_index); |
| 1615 | |
| 1616 | return status; |
| 1617 | } |
| 1618 | |
| 1619 | static enum sci_status atapi_d2h_reg_frame_handler(struct isci_request *ireq, |
| 1620 | u32 frame_index) |
| 1621 | { |
| 1622 | struct sas_task *task = isci_request_access_task(ireq); |
| 1623 | enum sci_status status; |
| 1624 | |
| 1625 | status = process_unsolicited_fis(ireq, frame_index); |
| 1626 | |
| 1627 | if (status == SCI_SUCCESS) { |
| 1628 | if (ireq->stp.rsp.status & ATA_ERR) |
| 1629 | status = SCI_IO_FAILURE_RESPONSE_VALID; |
| 1630 | } else { |
| 1631 | status = SCI_IO_FAILURE_RESPONSE_VALID; |
| 1632 | } |
| 1633 | |
| 1634 | if (status != SCI_SUCCESS) { |
| 1635 | ireq->scu_status = SCU_TASK_DONE_CHECK_RESPONSE; |
| 1636 | ireq->sci_status = status; |
| 1637 | } else { |
| 1638 | ireq->scu_status = SCU_TASK_DONE_GOOD; |
| 1639 | ireq->sci_status = SCI_SUCCESS; |
| 1640 | } |
| 1641 | |
| 1642 | /* the d2h ufi is the end of non-data commands */ |
| 1643 | if (task->data_dir == DMA_NONE) |
| 1644 | sci_change_state(&ireq->sm, SCI_REQ_COMPLETED); |
| 1645 | |
| 1646 | return status; |
| 1647 | } |
| 1648 | |
| 1649 | static void scu_atapi_reconstruct_raw_frame_task_context(struct isci_request *ireq) |
| 1650 | { |
| 1651 | struct ata_device *dev = sas_to_ata_dev(ireq->target_device->domain_dev); |
| 1652 | void *atapi_cdb = ireq->ttype_ptr.io_task_ptr->ata_task.atapi_packet; |
| 1653 | struct scu_task_context *task_context = ireq->tc; |
| 1654 | |
| 1655 | /* fill in the SCU Task Context for a DATA fis containing CDB in Raw Frame |
| 1656 | * type. The TC for previous Packet fis was already there, we only need to |
| 1657 | * change the H2D fis content. |
| 1658 | */ |
| 1659 | memset(&ireq->stp.cmd, 0, sizeof(struct host_to_dev_fis)); |
| 1660 | memcpy(((u8 *)&ireq->stp.cmd + sizeof(u32)), atapi_cdb, ATAPI_CDB_LEN); |
| 1661 | memset(&(task_context->type.stp), 0, sizeof(struct stp_task_context)); |
| 1662 | task_context->type.stp.fis_type = FIS_DATA; |
| 1663 | task_context->transfer_length_bytes = dev->cdb_len; |
| 1664 | } |
| 1665 | |
| 1666 | static void scu_atapi_construct_task_context(struct isci_request *ireq) |
| 1667 | { |
| 1668 | struct ata_device *dev = sas_to_ata_dev(ireq->target_device->domain_dev); |
| 1669 | struct sas_task *task = isci_request_access_task(ireq); |
| 1670 | struct scu_task_context *task_context = ireq->tc; |
| 1671 | int cdb_len = dev->cdb_len; |
| 1672 | |
| 1673 | /* reference: SSTL 1.13.4.2 |
| 1674 | * task_type, sata_direction |
| 1675 | */ |
| 1676 | if (task->data_dir == DMA_TO_DEVICE) { |
| 1677 | task_context->task_type = SCU_TASK_TYPE_PACKET_DMA_OUT; |
| 1678 | task_context->sata_direction = 0; |
| 1679 | } else { |
| 1680 | /* todo: for NO_DATA command, we need to send out raw frame. */ |
| 1681 | task_context->task_type = SCU_TASK_TYPE_PACKET_DMA_IN; |
| 1682 | task_context->sata_direction = 1; |
| 1683 | } |
| 1684 | |
| 1685 | memset(&task_context->type.stp, 0, sizeof(task_context->type.stp)); |
| 1686 | task_context->type.stp.fis_type = FIS_DATA; |
| 1687 | |
| 1688 | memset(&ireq->stp.cmd, 0, sizeof(ireq->stp.cmd)); |
| 1689 | memcpy(&ireq->stp.cmd.lbal, task->ata_task.atapi_packet, cdb_len); |
| 1690 | task_context->ssp_command_iu_length = cdb_len / sizeof(u32); |
| 1691 | |
| 1692 | /* task phase is set to TX_CMD */ |
| 1693 | task_context->task_phase = 0x1; |
| 1694 | |
| 1695 | /* retry counter */ |
| 1696 | task_context->stp_retry_count = 0; |
| 1697 | |
| 1698 | /* data transfer size. */ |
| 1699 | task_context->transfer_length_bytes = task->total_xfer_len; |
| 1700 | |
| 1701 | /* setup sgl */ |
| 1702 | sci_request_build_sgl(ireq); |
| 1703 | } |
| 1704 | |
Edmund Nadolski | e301370 | 2011-06-02 00:10:43 +0000 | [diff] [blame] | 1705 | enum sci_status |
Dan Williams | 89a7301 | 2011-06-30 19:14:33 -0700 | [diff] [blame] | 1706 | sci_io_request_frame_handler(struct isci_request *ireq, |
Edmund Nadolski | e301370 | 2011-06-02 00:10:43 +0000 | [diff] [blame] | 1707 | u32 frame_index) |
Dan Williams | d1c637c3 | 2011-05-11 08:27:47 -0700 | [diff] [blame] | 1708 | { |
Dan Williams | d9dcb4b | 2011-06-30 17:38:32 -0700 | [diff] [blame] | 1709 | struct isci_host *ihost = ireq->owning_controller; |
Dan Williams | 5076a1a | 2011-06-27 14:57:03 -0700 | [diff] [blame] | 1710 | struct isci_stp_request *stp_req = &ireq->stp.req; |
Dan Williams | d1c637c3 | 2011-05-11 08:27:47 -0700 | [diff] [blame] | 1711 | enum sci_base_request_states state; |
| 1712 | enum sci_status status; |
| 1713 | ssize_t word_cnt; |
| 1714 | |
Dan Williams | 5076a1a | 2011-06-27 14:57:03 -0700 | [diff] [blame] | 1715 | state = ireq->sm.current_state_id; |
Dan Williams | d1c637c3 | 2011-05-11 08:27:47 -0700 | [diff] [blame] | 1716 | switch (state) { |
Edmund Nadolski | e301370 | 2011-06-02 00:10:43 +0000 | [diff] [blame] | 1717 | case SCI_REQ_STARTED: { |
Dan Williams | d1c637c3 | 2011-05-11 08:27:47 -0700 | [diff] [blame] | 1718 | struct ssp_frame_hdr ssp_hdr; |
| 1719 | void *frame_header; |
| 1720 | |
Dan Williams | 89a7301 | 2011-06-30 19:14:33 -0700 | [diff] [blame] | 1721 | sci_unsolicited_frame_control_get_header(&ihost->uf_control, |
Dan Williams | d1c637c3 | 2011-05-11 08:27:47 -0700 | [diff] [blame] | 1722 | frame_index, |
| 1723 | &frame_header); |
| 1724 | |
| 1725 | word_cnt = sizeof(struct ssp_frame_hdr) / sizeof(u32); |
| 1726 | sci_swab32_cpy(&ssp_hdr, frame_header, word_cnt); |
| 1727 | |
| 1728 | if (ssp_hdr.frame_type == SSP_RESPONSE) { |
| 1729 | struct ssp_response_iu *resp_iu; |
| 1730 | ssize_t word_cnt = SSP_RESP_IU_MAX_SIZE / sizeof(u32); |
| 1731 | |
Dan Williams | 89a7301 | 2011-06-30 19:14:33 -0700 | [diff] [blame] | 1732 | sci_unsolicited_frame_control_get_buffer(&ihost->uf_control, |
Dan Williams | d1c637c3 | 2011-05-11 08:27:47 -0700 | [diff] [blame] | 1733 | frame_index, |
| 1734 | (void **)&resp_iu); |
| 1735 | |
Dan Williams | 5076a1a | 2011-06-27 14:57:03 -0700 | [diff] [blame] | 1736 | sci_swab32_cpy(&ireq->ssp.rsp, resp_iu, word_cnt); |
Dan Williams | d1c637c3 | 2011-05-11 08:27:47 -0700 | [diff] [blame] | 1737 | |
Dan Williams | 5076a1a | 2011-06-27 14:57:03 -0700 | [diff] [blame] | 1738 | resp_iu = &ireq->ssp.rsp; |
Dan Williams | d1c637c3 | 2011-05-11 08:27:47 -0700 | [diff] [blame] | 1739 | |
| 1740 | if (resp_iu->datapres == 0x01 || |
| 1741 | resp_iu->datapres == 0x02) { |
Dan Williams | 34a9915 | 2011-07-01 02:25:15 -0700 | [diff] [blame] | 1742 | ireq->scu_status = SCU_TASK_DONE_CHECK_RESPONSE; |
| 1743 | ireq->sci_status = SCI_FAILURE_CONTROLLER_SPECIFIC_IO_ERR; |
| 1744 | } else { |
| 1745 | ireq->scu_status = SCU_TASK_DONE_GOOD; |
| 1746 | ireq->sci_status = SCI_SUCCESS; |
| 1747 | } |
Dan Williams | d1c637c3 | 2011-05-11 08:27:47 -0700 | [diff] [blame] | 1748 | } else { |
| 1749 | /* not a response frame, why did it get forwarded? */ |
Dan Williams | d9dcb4b | 2011-06-30 17:38:32 -0700 | [diff] [blame] | 1750 | dev_err(&ihost->pdev->dev, |
Dan Williams | d1c637c3 | 2011-05-11 08:27:47 -0700 | [diff] [blame] | 1751 | "%s: SCIC IO Request 0x%p received unexpected " |
Dan Williams | 5076a1a | 2011-06-27 14:57:03 -0700 | [diff] [blame] | 1752 | "frame %d type 0x%02x\n", __func__, ireq, |
Dan Williams | d1c637c3 | 2011-05-11 08:27:47 -0700 | [diff] [blame] | 1753 | frame_index, ssp_hdr.frame_type); |
| 1754 | } |
| 1755 | |
| 1756 | /* |
Edmund Nadolski | e301370 | 2011-06-02 00:10:43 +0000 | [diff] [blame] | 1757 | * In any case we are done with this frame buffer return it to |
| 1758 | * the controller |
Dan Williams | d1c637c3 | 2011-05-11 08:27:47 -0700 | [diff] [blame] | 1759 | */ |
Dan Williams | 89a7301 | 2011-06-30 19:14:33 -0700 | [diff] [blame] | 1760 | sci_controller_release_frame(ihost, frame_index); |
Dan Williams | d1c637c3 | 2011-05-11 08:27:47 -0700 | [diff] [blame] | 1761 | |
| 1762 | return SCI_SUCCESS; |
| 1763 | } |
Edmund Nadolski | e301370 | 2011-06-02 00:10:43 +0000 | [diff] [blame] | 1764 | |
| 1765 | case SCI_REQ_TASK_WAIT_TC_RESP: |
Dan Williams | 89a7301 | 2011-06-30 19:14:33 -0700 | [diff] [blame] | 1766 | sci_io_request_copy_response(ireq); |
Dan Williams | 5076a1a | 2011-06-27 14:57:03 -0700 | [diff] [blame] | 1767 | sci_change_state(&ireq->sm, SCI_REQ_COMPLETED); |
Dan Williams | 89a7301 | 2011-06-30 19:14:33 -0700 | [diff] [blame] | 1768 | sci_controller_release_frame(ihost, frame_index); |
Dan Williams | d1c637c3 | 2011-05-11 08:27:47 -0700 | [diff] [blame] | 1769 | return SCI_SUCCESS; |
Edmund Nadolski | e301370 | 2011-06-02 00:10:43 +0000 | [diff] [blame] | 1770 | |
| 1771 | case SCI_REQ_SMP_WAIT_RESP: { |
Dan Williams | 54b5e3a | 2011-09-28 18:35:27 -0700 | [diff] [blame] | 1772 | struct sas_task *task = isci_request_access_task(ireq); |
| 1773 | struct scatterlist *sg = &task->smp_task.smp_resp; |
| 1774 | void *frame_header, *kaddr; |
| 1775 | u8 *rsp; |
Dan Williams | d1c637c3 | 2011-05-11 08:27:47 -0700 | [diff] [blame] | 1776 | |
Dan Williams | 89a7301 | 2011-06-30 19:14:33 -0700 | [diff] [blame] | 1777 | sci_unsolicited_frame_control_get_header(&ihost->uf_control, |
Dan Williams | 54b5e3a | 2011-09-28 18:35:27 -0700 | [diff] [blame] | 1778 | frame_index, |
| 1779 | &frame_header); |
Cong Wang | 77dfce0 | 2011-11-25 23:14:23 +0800 | [diff] [blame] | 1780 | kaddr = kmap_atomic(sg_page(sg)); |
Dan Williams | 54b5e3a | 2011-09-28 18:35:27 -0700 | [diff] [blame] | 1781 | rsp = kaddr + sg->offset; |
| 1782 | sci_swab32_cpy(rsp, frame_header, 1); |
Dan Williams | d1c637c3 | 2011-05-11 08:27:47 -0700 | [diff] [blame] | 1783 | |
Dan Williams | 54b5e3a | 2011-09-28 18:35:27 -0700 | [diff] [blame] | 1784 | if (rsp[0] == SMP_RESPONSE) { |
Dan Williams | d1c637c3 | 2011-05-11 08:27:47 -0700 | [diff] [blame] | 1785 | void *smp_resp; |
| 1786 | |
Dan Williams | 89a7301 | 2011-06-30 19:14:33 -0700 | [diff] [blame] | 1787 | sci_unsolicited_frame_control_get_buffer(&ihost->uf_control, |
Dan Williams | 54b5e3a | 2011-09-28 18:35:27 -0700 | [diff] [blame] | 1788 | frame_index, |
| 1789 | &smp_resp); |
Dan Williams | d1c637c3 | 2011-05-11 08:27:47 -0700 | [diff] [blame] | 1790 | |
Dan Williams | 54b5e3a | 2011-09-28 18:35:27 -0700 | [diff] [blame] | 1791 | word_cnt = (sg->length/4)-1; |
| 1792 | if (word_cnt > 0) |
| 1793 | word_cnt = min_t(unsigned int, word_cnt, |
| 1794 | SCU_UNSOLICITED_FRAME_BUFFER_SIZE/4); |
| 1795 | sci_swab32_cpy(rsp + 4, smp_resp, word_cnt); |
Dan Williams | d1c637c3 | 2011-05-11 08:27:47 -0700 | [diff] [blame] | 1796 | |
Dan Williams | 34a9915 | 2011-07-01 02:25:15 -0700 | [diff] [blame] | 1797 | ireq->scu_status = SCU_TASK_DONE_GOOD; |
| 1798 | ireq->sci_status = SCI_SUCCESS; |
Dan Williams | 5076a1a | 2011-06-27 14:57:03 -0700 | [diff] [blame] | 1799 | sci_change_state(&ireq->sm, SCI_REQ_SMP_WAIT_TC_COMP); |
Dan Williams | d1c637c3 | 2011-05-11 08:27:47 -0700 | [diff] [blame] | 1800 | } else { |
Edmund Nadolski | e301370 | 2011-06-02 00:10:43 +0000 | [diff] [blame] | 1801 | /* |
| 1802 | * This was not a response frame why did it get |
| 1803 | * forwarded? |
| 1804 | */ |
Dan Williams | d9dcb4b | 2011-06-30 17:38:32 -0700 | [diff] [blame] | 1805 | dev_err(&ihost->pdev->dev, |
Edmund Nadolski | e301370 | 2011-06-02 00:10:43 +0000 | [diff] [blame] | 1806 | "%s: SCIC SMP Request 0x%p received unexpected " |
| 1807 | "frame %d type 0x%02x\n", |
| 1808 | __func__, |
Dan Williams | 5076a1a | 2011-06-27 14:57:03 -0700 | [diff] [blame] | 1809 | ireq, |
Edmund Nadolski | e301370 | 2011-06-02 00:10:43 +0000 | [diff] [blame] | 1810 | frame_index, |
Dan Williams | 54b5e3a | 2011-09-28 18:35:27 -0700 | [diff] [blame] | 1811 | rsp[0]); |
Dan Williams | d1c637c3 | 2011-05-11 08:27:47 -0700 | [diff] [blame] | 1812 | |
Dan Williams | 34a9915 | 2011-07-01 02:25:15 -0700 | [diff] [blame] | 1813 | ireq->scu_status = SCU_TASK_DONE_SMP_FRM_TYPE_ERR; |
| 1814 | ireq->sci_status = SCI_FAILURE_CONTROLLER_SPECIFIC_IO_ERR; |
Dan Williams | 5076a1a | 2011-06-27 14:57:03 -0700 | [diff] [blame] | 1815 | sci_change_state(&ireq->sm, SCI_REQ_COMPLETED); |
Dan Williams | d1c637c3 | 2011-05-11 08:27:47 -0700 | [diff] [blame] | 1816 | } |
Cong Wang | 77dfce0 | 2011-11-25 23:14:23 +0800 | [diff] [blame] | 1817 | kunmap_atomic(kaddr); |
Dan Williams | d1c637c3 | 2011-05-11 08:27:47 -0700 | [diff] [blame] | 1818 | |
Dan Williams | 89a7301 | 2011-06-30 19:14:33 -0700 | [diff] [blame] | 1819 | sci_controller_release_frame(ihost, frame_index); |
Dan Williams | d1c637c3 | 2011-05-11 08:27:47 -0700 | [diff] [blame] | 1820 | |
| 1821 | return SCI_SUCCESS; |
| 1822 | } |
Edmund Nadolski | e301370 | 2011-06-02 00:10:43 +0000 | [diff] [blame] | 1823 | |
| 1824 | case SCI_REQ_STP_UDMA_WAIT_TC_COMP: |
Dan Williams | 89a7301 | 2011-06-30 19:14:33 -0700 | [diff] [blame] | 1825 | return sci_stp_request_udma_general_frame_handler(ireq, |
Edmund Nadolski | e301370 | 2011-06-02 00:10:43 +0000 | [diff] [blame] | 1826 | frame_index); |
| 1827 | |
| 1828 | case SCI_REQ_STP_UDMA_WAIT_D2H: |
Dan Williams | d1c637c3 | 2011-05-11 08:27:47 -0700 | [diff] [blame] | 1829 | /* Use the general frame handler to copy the resposne data */ |
Dan Williams | 34a9915 | 2011-07-01 02:25:15 -0700 | [diff] [blame] | 1830 | status = sci_stp_request_udma_general_frame_handler(ireq, frame_index); |
Dan Williams | d1c637c3 | 2011-05-11 08:27:47 -0700 | [diff] [blame] | 1831 | |
| 1832 | if (status != SCI_SUCCESS) |
| 1833 | return status; |
| 1834 | |
Dan Williams | 34a9915 | 2011-07-01 02:25:15 -0700 | [diff] [blame] | 1835 | ireq->scu_status = SCU_TASK_DONE_CHECK_RESPONSE; |
| 1836 | ireq->sci_status = SCI_FAILURE_IO_RESPONSE_VALID; |
| 1837 | sci_change_state(&ireq->sm, SCI_REQ_COMPLETED); |
Dan Williams | d1c637c3 | 2011-05-11 08:27:47 -0700 | [diff] [blame] | 1838 | return SCI_SUCCESS; |
Edmund Nadolski | e301370 | 2011-06-02 00:10:43 +0000 | [diff] [blame] | 1839 | |
| 1840 | case SCI_REQ_STP_NON_DATA_WAIT_D2H: { |
Dan Williams | d1c637c3 | 2011-05-11 08:27:47 -0700 | [diff] [blame] | 1841 | struct dev_to_host_fis *frame_header; |
| 1842 | u32 *frame_buffer; |
| 1843 | |
Dan Williams | 89a7301 | 2011-06-30 19:14:33 -0700 | [diff] [blame] | 1844 | status = sci_unsolicited_frame_control_get_header(&ihost->uf_control, |
Dan Williams | d1c637c3 | 2011-05-11 08:27:47 -0700 | [diff] [blame] | 1845 | frame_index, |
| 1846 | (void **)&frame_header); |
| 1847 | |
| 1848 | if (status != SCI_SUCCESS) { |
Dan Williams | d9dcb4b | 2011-06-30 17:38:32 -0700 | [diff] [blame] | 1849 | dev_err(&ihost->pdev->dev, |
Edmund Nadolski | e301370 | 2011-06-02 00:10:43 +0000 | [diff] [blame] | 1850 | "%s: SCIC IO Request 0x%p could not get frame " |
| 1851 | "header for frame index %d, status %x\n", |
| 1852 | __func__, |
| 1853 | stp_req, |
| 1854 | frame_index, |
| 1855 | status); |
Dan Williams | d1c637c3 | 2011-05-11 08:27:47 -0700 | [diff] [blame] | 1856 | |
| 1857 | return status; |
| 1858 | } |
| 1859 | |
| 1860 | switch (frame_header->fis_type) { |
| 1861 | case FIS_REGD2H: |
Dan Williams | 89a7301 | 2011-06-30 19:14:33 -0700 | [diff] [blame] | 1862 | sci_unsolicited_frame_control_get_buffer(&ihost->uf_control, |
Dan Williams | d1c637c3 | 2011-05-11 08:27:47 -0700 | [diff] [blame] | 1863 | frame_index, |
| 1864 | (void **)&frame_buffer); |
| 1865 | |
Dan Williams | 89a7301 | 2011-06-30 19:14:33 -0700 | [diff] [blame] | 1866 | sci_controller_copy_sata_response(&ireq->stp.rsp, |
Dan Williams | d1c637c3 | 2011-05-11 08:27:47 -0700 | [diff] [blame] | 1867 | frame_header, |
| 1868 | frame_buffer); |
| 1869 | |
| 1870 | /* The command has completed with error */ |
Dan Williams | 34a9915 | 2011-07-01 02:25:15 -0700 | [diff] [blame] | 1871 | ireq->scu_status = SCU_TASK_DONE_CHECK_RESPONSE; |
| 1872 | ireq->sci_status = SCI_FAILURE_IO_RESPONSE_VALID; |
Dan Williams | d1c637c3 | 2011-05-11 08:27:47 -0700 | [diff] [blame] | 1873 | break; |
| 1874 | |
| 1875 | default: |
Dan Williams | d9dcb4b | 2011-06-30 17:38:32 -0700 | [diff] [blame] | 1876 | dev_warn(&ihost->pdev->dev, |
Dan Williams | d1c637c3 | 2011-05-11 08:27:47 -0700 | [diff] [blame] | 1877 | "%s: IO Request:0x%p Frame Id:%d protocol " |
| 1878 | "violation occurred\n", __func__, stp_req, |
| 1879 | frame_index); |
| 1880 | |
Dan Williams | 34a9915 | 2011-07-01 02:25:15 -0700 | [diff] [blame] | 1881 | ireq->scu_status = SCU_TASK_DONE_UNEXP_FIS; |
| 1882 | ireq->sci_status = SCI_FAILURE_PROTOCOL_VIOLATION; |
Dan Williams | d1c637c3 | 2011-05-11 08:27:47 -0700 | [diff] [blame] | 1883 | break; |
| 1884 | } |
| 1885 | |
Dan Williams | 5076a1a | 2011-06-27 14:57:03 -0700 | [diff] [blame] | 1886 | sci_change_state(&ireq->sm, SCI_REQ_COMPLETED); |
Dan Williams | d1c637c3 | 2011-05-11 08:27:47 -0700 | [diff] [blame] | 1887 | |
| 1888 | /* Frame has been decoded return it to the controller */ |
Dan Williams | 89a7301 | 2011-06-30 19:14:33 -0700 | [diff] [blame] | 1889 | sci_controller_release_frame(ihost, frame_index); |
Dan Williams | d1c637c3 | 2011-05-11 08:27:47 -0700 | [diff] [blame] | 1890 | |
| 1891 | return status; |
| 1892 | } |
Edmund Nadolski | e301370 | 2011-06-02 00:10:43 +0000 | [diff] [blame] | 1893 | |
| 1894 | case SCI_REQ_STP_PIO_WAIT_FRAME: { |
Dan Williams | d1c637c3 | 2011-05-11 08:27:47 -0700 | [diff] [blame] | 1895 | struct sas_task *task = isci_request_access_task(ireq); |
| 1896 | struct dev_to_host_fis *frame_header; |
| 1897 | u32 *frame_buffer; |
| 1898 | |
Dan Williams | 89a7301 | 2011-06-30 19:14:33 -0700 | [diff] [blame] | 1899 | status = sci_unsolicited_frame_control_get_header(&ihost->uf_control, |
Dan Williams | d1c637c3 | 2011-05-11 08:27:47 -0700 | [diff] [blame] | 1900 | frame_index, |
| 1901 | (void **)&frame_header); |
| 1902 | |
| 1903 | if (status != SCI_SUCCESS) { |
Dan Williams | d9dcb4b | 2011-06-30 17:38:32 -0700 | [diff] [blame] | 1904 | dev_err(&ihost->pdev->dev, |
Edmund Nadolski | e301370 | 2011-06-02 00:10:43 +0000 | [diff] [blame] | 1905 | "%s: SCIC IO Request 0x%p could not get frame " |
| 1906 | "header for frame index %d, status %x\n", |
Dan Williams | d1c637c3 | 2011-05-11 08:27:47 -0700 | [diff] [blame] | 1907 | __func__, stp_req, frame_index, status); |
| 1908 | return status; |
| 1909 | } |
| 1910 | |
| 1911 | switch (frame_header->fis_type) { |
| 1912 | case FIS_PIO_SETUP: |
| 1913 | /* Get from the frame buffer the PIO Setup Data */ |
Dan Williams | 89a7301 | 2011-06-30 19:14:33 -0700 | [diff] [blame] | 1914 | sci_unsolicited_frame_control_get_buffer(&ihost->uf_control, |
Dan Williams | d1c637c3 | 2011-05-11 08:27:47 -0700 | [diff] [blame] | 1915 | frame_index, |
| 1916 | (void **)&frame_buffer); |
| 1917 | |
Edmund Nadolski | e301370 | 2011-06-02 00:10:43 +0000 | [diff] [blame] | 1918 | /* Get the data from the PIO Setup The SCU Hardware |
| 1919 | * returns first word in the frame_header and the rest |
| 1920 | * of the data is in the frame buffer so we need to |
| 1921 | * back up one dword |
Dan Williams | d1c637c3 | 2011-05-11 08:27:47 -0700 | [diff] [blame] | 1922 | */ |
| 1923 | |
| 1924 | /* transfer_count: first 16bits in the 4th dword */ |
Dan Williams | ba7cb22 | 2011-06-27 11:56:41 -0700 | [diff] [blame] | 1925 | stp_req->pio_len = frame_buffer[3] & 0xffff; |
Dan Williams | d1c637c3 | 2011-05-11 08:27:47 -0700 | [diff] [blame] | 1926 | |
Dan Williams | ba7cb22 | 2011-06-27 11:56:41 -0700 | [diff] [blame] | 1927 | /* status: 4th byte in the 3rd dword */ |
| 1928 | stp_req->status = (frame_buffer[2] >> 24) & 0xff; |
Dan Williams | d1c637c3 | 2011-05-11 08:27:47 -0700 | [diff] [blame] | 1929 | |
Dan Williams | 89a7301 | 2011-06-30 19:14:33 -0700 | [diff] [blame] | 1930 | sci_controller_copy_sata_response(&ireq->stp.rsp, |
Dan Williams | d1c637c3 | 2011-05-11 08:27:47 -0700 | [diff] [blame] | 1931 | frame_header, |
| 1932 | frame_buffer); |
| 1933 | |
Dan Williams | 5076a1a | 2011-06-27 14:57:03 -0700 | [diff] [blame] | 1934 | ireq->stp.rsp.status = stp_req->status; |
Dan Williams | d1c637c3 | 2011-05-11 08:27:47 -0700 | [diff] [blame] | 1935 | |
| 1936 | /* The next state is dependent on whether the |
| 1937 | * request was PIO Data-in or Data out |
| 1938 | */ |
| 1939 | if (task->data_dir == DMA_FROM_DEVICE) { |
Dan Williams | 5076a1a | 2011-06-27 14:57:03 -0700 | [diff] [blame] | 1940 | sci_change_state(&ireq->sm, SCI_REQ_STP_PIO_DATA_IN); |
Dan Williams | d1c637c3 | 2011-05-11 08:27:47 -0700 | [diff] [blame] | 1941 | } else if (task->data_dir == DMA_TO_DEVICE) { |
| 1942 | /* Transmit data */ |
Dan Williams | 89a7301 | 2011-06-30 19:14:33 -0700 | [diff] [blame] | 1943 | status = sci_stp_request_pio_data_out_transmit_data(ireq); |
Dan Williams | d1c637c3 | 2011-05-11 08:27:47 -0700 | [diff] [blame] | 1944 | if (status != SCI_SUCCESS) |
| 1945 | break; |
Dan Williams | 5076a1a | 2011-06-27 14:57:03 -0700 | [diff] [blame] | 1946 | sci_change_state(&ireq->sm, SCI_REQ_STP_PIO_DATA_OUT); |
Dan Williams | d1c637c3 | 2011-05-11 08:27:47 -0700 | [diff] [blame] | 1947 | } |
| 1948 | break; |
Edmund Nadolski | e301370 | 2011-06-02 00:10:43 +0000 | [diff] [blame] | 1949 | |
Dan Williams | d1c637c3 | 2011-05-11 08:27:47 -0700 | [diff] [blame] | 1950 | case FIS_SETDEVBITS: |
Dan Williams | 5076a1a | 2011-06-27 14:57:03 -0700 | [diff] [blame] | 1951 | sci_change_state(&ireq->sm, SCI_REQ_STP_PIO_WAIT_FRAME); |
Dan Williams | d1c637c3 | 2011-05-11 08:27:47 -0700 | [diff] [blame] | 1952 | break; |
Edmund Nadolski | e301370 | 2011-06-02 00:10:43 +0000 | [diff] [blame] | 1953 | |
Dan Williams | d1c637c3 | 2011-05-11 08:27:47 -0700 | [diff] [blame] | 1954 | case FIS_REGD2H: |
| 1955 | if (frame_header->status & ATA_BUSY) { |
Edmund Nadolski | e301370 | 2011-06-02 00:10:43 +0000 | [diff] [blame] | 1956 | /* |
| 1957 | * Now why is the drive sending a D2H Register |
| 1958 | * FIS when it is still busy? Do nothing since |
| 1959 | * we are still in the right state. |
Dan Williams | d1c637c3 | 2011-05-11 08:27:47 -0700 | [diff] [blame] | 1960 | */ |
Dan Williams | d9dcb4b | 2011-06-30 17:38:32 -0700 | [diff] [blame] | 1961 | dev_dbg(&ihost->pdev->dev, |
Dan Williams | d1c637c3 | 2011-05-11 08:27:47 -0700 | [diff] [blame] | 1962 | "%s: SCIC PIO Request 0x%p received " |
| 1963 | "D2H Register FIS with BSY status " |
Edmund Nadolski | e301370 | 2011-06-02 00:10:43 +0000 | [diff] [blame] | 1964 | "0x%x\n", |
| 1965 | __func__, |
| 1966 | stp_req, |
Dan Williams | d1c637c3 | 2011-05-11 08:27:47 -0700 | [diff] [blame] | 1967 | frame_header->status); |
| 1968 | break; |
| 1969 | } |
| 1970 | |
Dan Williams | 89a7301 | 2011-06-30 19:14:33 -0700 | [diff] [blame] | 1971 | sci_unsolicited_frame_control_get_buffer(&ihost->uf_control, |
Dan Williams | d1c637c3 | 2011-05-11 08:27:47 -0700 | [diff] [blame] | 1972 | frame_index, |
| 1973 | (void **)&frame_buffer); |
| 1974 | |
Maciej Patelczyk | 49bd665 | 2012-10-15 14:29:03 +0200 | [diff] [blame] | 1975 | sci_controller_copy_sata_response(&ireq->stp.rsp, |
Dan Williams | d1c637c3 | 2011-05-11 08:27:47 -0700 | [diff] [blame] | 1976 | frame_header, |
| 1977 | frame_buffer); |
| 1978 | |
Dan Williams | 34a9915 | 2011-07-01 02:25:15 -0700 | [diff] [blame] | 1979 | ireq->scu_status = SCU_TASK_DONE_CHECK_RESPONSE; |
| 1980 | ireq->sci_status = SCI_FAILURE_IO_RESPONSE_VALID; |
Dan Williams | 5076a1a | 2011-06-27 14:57:03 -0700 | [diff] [blame] | 1981 | sci_change_state(&ireq->sm, SCI_REQ_COMPLETED); |
Dan Williams | d1c637c3 | 2011-05-11 08:27:47 -0700 | [diff] [blame] | 1982 | break; |
Edmund Nadolski | e301370 | 2011-06-02 00:10:43 +0000 | [diff] [blame] | 1983 | |
Dan Williams | d1c637c3 | 2011-05-11 08:27:47 -0700 | [diff] [blame] | 1984 | default: |
| 1985 | /* FIXME: what do we do here? */ |
| 1986 | break; |
| 1987 | } |
| 1988 | |
| 1989 | /* Frame is decoded return it to the controller */ |
Dan Williams | 89a7301 | 2011-06-30 19:14:33 -0700 | [diff] [blame] | 1990 | sci_controller_release_frame(ihost, frame_index); |
Dan Williams | d1c637c3 | 2011-05-11 08:27:47 -0700 | [diff] [blame] | 1991 | |
| 1992 | return status; |
| 1993 | } |
Edmund Nadolski | e301370 | 2011-06-02 00:10:43 +0000 | [diff] [blame] | 1994 | |
| 1995 | case SCI_REQ_STP_PIO_DATA_IN: { |
Dan Williams | d1c637c3 | 2011-05-11 08:27:47 -0700 | [diff] [blame] | 1996 | struct dev_to_host_fis *frame_header; |
| 1997 | struct sata_fis_data *frame_buffer; |
| 1998 | |
Dan Williams | 89a7301 | 2011-06-30 19:14:33 -0700 | [diff] [blame] | 1999 | status = sci_unsolicited_frame_control_get_header(&ihost->uf_control, |
Dan Williams | d1c637c3 | 2011-05-11 08:27:47 -0700 | [diff] [blame] | 2000 | frame_index, |
| 2001 | (void **)&frame_header); |
| 2002 | |
| 2003 | if (status != SCI_SUCCESS) { |
Dan Williams | d9dcb4b | 2011-06-30 17:38:32 -0700 | [diff] [blame] | 2004 | dev_err(&ihost->pdev->dev, |
Edmund Nadolski | e301370 | 2011-06-02 00:10:43 +0000 | [diff] [blame] | 2005 | "%s: SCIC IO Request 0x%p could not get frame " |
| 2006 | "header for frame index %d, status %x\n", |
| 2007 | __func__, |
| 2008 | stp_req, |
| 2009 | frame_index, |
| 2010 | status); |
Dan Williams | d1c637c3 | 2011-05-11 08:27:47 -0700 | [diff] [blame] | 2011 | return status; |
| 2012 | } |
| 2013 | |
| 2014 | if (frame_header->fis_type != FIS_DATA) { |
Dan Williams | d9dcb4b | 2011-06-30 17:38:32 -0700 | [diff] [blame] | 2015 | dev_err(&ihost->pdev->dev, |
Dan Williams | d1c637c3 | 2011-05-11 08:27:47 -0700 | [diff] [blame] | 2016 | "%s: SCIC PIO Request 0x%p received frame %d " |
| 2017 | "with fis type 0x%02x when expecting a data " |
Edmund Nadolski | e301370 | 2011-06-02 00:10:43 +0000 | [diff] [blame] | 2018 | "fis.\n", |
| 2019 | __func__, |
| 2020 | stp_req, |
| 2021 | frame_index, |
Dan Williams | d1c637c3 | 2011-05-11 08:27:47 -0700 | [diff] [blame] | 2022 | frame_header->fis_type); |
| 2023 | |
Dan Williams | 34a9915 | 2011-07-01 02:25:15 -0700 | [diff] [blame] | 2024 | ireq->scu_status = SCU_TASK_DONE_GOOD; |
| 2025 | ireq->sci_status = SCI_FAILURE_IO_REQUIRES_SCSI_ABORT; |
Dan Williams | 5076a1a | 2011-06-27 14:57:03 -0700 | [diff] [blame] | 2026 | sci_change_state(&ireq->sm, SCI_REQ_COMPLETED); |
Dan Williams | d1c637c3 | 2011-05-11 08:27:47 -0700 | [diff] [blame] | 2027 | |
| 2028 | /* Frame is decoded return it to the controller */ |
Dan Williams | 89a7301 | 2011-06-30 19:14:33 -0700 | [diff] [blame] | 2029 | sci_controller_release_frame(ihost, frame_index); |
Dan Williams | d1c637c3 | 2011-05-11 08:27:47 -0700 | [diff] [blame] | 2030 | return status; |
| 2031 | } |
| 2032 | |
Dan Williams | ba7cb22 | 2011-06-27 11:56:41 -0700 | [diff] [blame] | 2033 | if (stp_req->sgl.index < 0) { |
Dan Williams | 5076a1a | 2011-06-27 14:57:03 -0700 | [diff] [blame] | 2034 | ireq->saved_rx_frame_index = frame_index; |
Dan Williams | ba7cb22 | 2011-06-27 11:56:41 -0700 | [diff] [blame] | 2035 | stp_req->pio_len = 0; |
Dan Williams | d1c637c3 | 2011-05-11 08:27:47 -0700 | [diff] [blame] | 2036 | } else { |
Dan Williams | 89a7301 | 2011-06-30 19:14:33 -0700 | [diff] [blame] | 2037 | sci_unsolicited_frame_control_get_buffer(&ihost->uf_control, |
Dan Williams | d1c637c3 | 2011-05-11 08:27:47 -0700 | [diff] [blame] | 2038 | frame_index, |
| 2039 | (void **)&frame_buffer); |
| 2040 | |
Dan Williams | 89a7301 | 2011-06-30 19:14:33 -0700 | [diff] [blame] | 2041 | status = sci_stp_request_pio_data_in_copy_data(stp_req, |
Dan Williams | d1c637c3 | 2011-05-11 08:27:47 -0700 | [diff] [blame] | 2042 | (u8 *)frame_buffer); |
| 2043 | |
| 2044 | /* Frame is decoded return it to the controller */ |
Dan Williams | 89a7301 | 2011-06-30 19:14:33 -0700 | [diff] [blame] | 2045 | sci_controller_release_frame(ihost, frame_index); |
Dan Williams | d1c637c3 | 2011-05-11 08:27:47 -0700 | [diff] [blame] | 2046 | } |
| 2047 | |
| 2048 | /* Check for the end of the transfer, are there more |
| 2049 | * bytes remaining for this data transfer |
| 2050 | */ |
Dan Williams | ba7cb22 | 2011-06-27 11:56:41 -0700 | [diff] [blame] | 2051 | if (status != SCI_SUCCESS || stp_req->pio_len != 0) |
Dan Williams | d1c637c3 | 2011-05-11 08:27:47 -0700 | [diff] [blame] | 2052 | return status; |
| 2053 | |
Dan Williams | ba7cb22 | 2011-06-27 11:56:41 -0700 | [diff] [blame] | 2054 | if ((stp_req->status & ATA_BUSY) == 0) { |
Dan Williams | 34a9915 | 2011-07-01 02:25:15 -0700 | [diff] [blame] | 2055 | ireq->scu_status = SCU_TASK_DONE_CHECK_RESPONSE; |
| 2056 | ireq->sci_status = SCI_FAILURE_IO_RESPONSE_VALID; |
Dan Williams | 5076a1a | 2011-06-27 14:57:03 -0700 | [diff] [blame] | 2057 | sci_change_state(&ireq->sm, SCI_REQ_COMPLETED); |
Dan Williams | d1c637c3 | 2011-05-11 08:27:47 -0700 | [diff] [blame] | 2058 | } else { |
Dan Williams | 5076a1a | 2011-06-27 14:57:03 -0700 | [diff] [blame] | 2059 | sci_change_state(&ireq->sm, SCI_REQ_STP_PIO_WAIT_FRAME); |
Dan Williams | d1c637c3 | 2011-05-11 08:27:47 -0700 | [diff] [blame] | 2060 | } |
| 2061 | return status; |
| 2062 | } |
Edmund Nadolski | e301370 | 2011-06-02 00:10:43 +0000 | [diff] [blame] | 2063 | |
Dan Williams | b50102d | 2011-09-30 18:52:19 -0700 | [diff] [blame] | 2064 | case SCI_REQ_ATAPI_WAIT_PIO_SETUP: { |
| 2065 | struct sas_task *task = isci_request_access_task(ireq); |
| 2066 | |
| 2067 | sci_controller_release_frame(ihost, frame_index); |
| 2068 | ireq->target_device->working_request = ireq; |
| 2069 | if (task->data_dir == DMA_NONE) { |
| 2070 | sci_change_state(&ireq->sm, SCI_REQ_ATAPI_WAIT_TC_COMP); |
| 2071 | scu_atapi_reconstruct_raw_frame_task_context(ireq); |
| 2072 | } else { |
| 2073 | sci_change_state(&ireq->sm, SCI_REQ_ATAPI_WAIT_D2H); |
| 2074 | scu_atapi_construct_task_context(ireq); |
| 2075 | } |
| 2076 | |
| 2077 | sci_controller_continue_io(ireq); |
| 2078 | return SCI_SUCCESS; |
| 2079 | } |
| 2080 | case SCI_REQ_ATAPI_WAIT_D2H: |
| 2081 | return atapi_d2h_reg_frame_handler(ireq, frame_index); |
Edmund Nadolski | e301370 | 2011-06-02 00:10:43 +0000 | [diff] [blame] | 2082 | case SCI_REQ_ABORTING: |
| 2083 | /* |
| 2084 | * TODO: Is it even possible to get an unsolicited frame in the |
Dan Williams | d1c637c3 | 2011-05-11 08:27:47 -0700 | [diff] [blame] | 2085 | * aborting state? |
| 2086 | */ |
Dan Williams | 89a7301 | 2011-06-30 19:14:33 -0700 | [diff] [blame] | 2087 | sci_controller_release_frame(ihost, frame_index); |
Dan Williams | d1c637c3 | 2011-05-11 08:27:47 -0700 | [diff] [blame] | 2088 | return SCI_SUCCESS; |
Edmund Nadolski | e301370 | 2011-06-02 00:10:43 +0000 | [diff] [blame] | 2089 | |
Dan Williams | d1c637c3 | 2011-05-11 08:27:47 -0700 | [diff] [blame] | 2090 | default: |
Dan Williams | d9dcb4b | 2011-06-30 17:38:32 -0700 | [diff] [blame] | 2091 | dev_warn(&ihost->pdev->dev, |
Edmund Nadolski | e301370 | 2011-06-02 00:10:43 +0000 | [diff] [blame] | 2092 | "%s: SCIC IO Request given unexpected frame %x while " |
| 2093 | "in state %d\n", |
| 2094 | __func__, |
| 2095 | frame_index, |
| 2096 | state); |
Dan Williams | d1c637c3 | 2011-05-11 08:27:47 -0700 | [diff] [blame] | 2097 | |
Dan Williams | 89a7301 | 2011-06-30 19:14:33 -0700 | [diff] [blame] | 2098 | sci_controller_release_frame(ihost, frame_index); |
Dan Williams | d1c637c3 | 2011-05-11 08:27:47 -0700 | [diff] [blame] | 2099 | return SCI_FAILURE_INVALID_STATE; |
| 2100 | } |
| 2101 | } |
| 2102 | |
Dan Williams | 5076a1a | 2011-06-27 14:57:03 -0700 | [diff] [blame] | 2103 | static enum sci_status stp_request_udma_await_tc_event(struct isci_request *ireq, |
Dan Williams | a7e255a | 2011-05-11 08:27:47 -0700 | [diff] [blame] | 2104 | u32 completion_code) |
Dan Williams | 5dec6f4 | 2011-05-10 02:28:49 -0700 | [diff] [blame] | 2105 | { |
| 2106 | enum sci_status status = SCI_SUCCESS; |
| 2107 | |
| 2108 | switch (SCU_GET_COMPLETION_TL_STATUS(completion_code)) { |
| 2109 | case SCU_MAKE_COMPLETION_STATUS(SCU_TASK_DONE_GOOD): |
Dan Williams | 34a9915 | 2011-07-01 02:25:15 -0700 | [diff] [blame] | 2110 | ireq->scu_status = SCU_TASK_DONE_GOOD; |
| 2111 | ireq->sci_status = SCI_SUCCESS; |
| 2112 | sci_change_state(&ireq->sm, SCI_REQ_COMPLETED); |
Dan Williams | 5dec6f4 | 2011-05-10 02:28:49 -0700 | [diff] [blame] | 2113 | break; |
| 2114 | case SCU_MAKE_COMPLETION_STATUS(SCU_TASK_DONE_UNEXP_FIS): |
| 2115 | case SCU_MAKE_COMPLETION_STATUS(SCU_TASK_DONE_REG_ERR): |
Dan Williams | a7e255a | 2011-05-11 08:27:47 -0700 | [diff] [blame] | 2116 | /* We must check ther response buffer to see if the D2H |
| 2117 | * Register FIS was received before we got the TC |
| 2118 | * completion. |
| 2119 | */ |
Dan Williams | 5076a1a | 2011-06-27 14:57:03 -0700 | [diff] [blame] | 2120 | if (ireq->stp.rsp.fis_type == FIS_REGD2H) { |
Jeff Skirvin | 8780516 | 2012-03-08 22:42:09 -0800 | [diff] [blame] | 2121 | sci_remote_device_suspend(ireq->target_device, |
| 2122 | SCI_SW_SUSPEND_NORMAL); |
| 2123 | |
Dan Williams | 34a9915 | 2011-07-01 02:25:15 -0700 | [diff] [blame] | 2124 | ireq->scu_status = SCU_TASK_DONE_CHECK_RESPONSE; |
| 2125 | ireq->sci_status = SCI_FAILURE_IO_RESPONSE_VALID; |
| 2126 | sci_change_state(&ireq->sm, SCI_REQ_COMPLETED); |
Dan Williams | 5dec6f4 | 2011-05-10 02:28:49 -0700 | [diff] [blame] | 2127 | } else { |
Dan Williams | a7e255a | 2011-05-11 08:27:47 -0700 | [diff] [blame] | 2128 | /* If we have an error completion status for the |
| 2129 | * TC then we can expect a D2H register FIS from |
| 2130 | * the device so we must change state to wait |
| 2131 | * for it |
| 2132 | */ |
Dan Williams | 5076a1a | 2011-06-27 14:57:03 -0700 | [diff] [blame] | 2133 | sci_change_state(&ireq->sm, SCI_REQ_STP_UDMA_WAIT_D2H); |
Dan Williams | 5dec6f4 | 2011-05-10 02:28:49 -0700 | [diff] [blame] | 2134 | } |
| 2135 | break; |
| 2136 | |
Dan Williams | a7e255a | 2011-05-11 08:27:47 -0700 | [diff] [blame] | 2137 | /* TODO Check to see if any of these completion status need to |
| 2138 | * wait for the device to host register fis. |
| 2139 | */ |
| 2140 | /* TODO We can retry the command for SCU_TASK_DONE_CMD_LL_R_ERR |
| 2141 | * - this comes only for B0 |
| 2142 | */ |
Dan Williams | 5dec6f4 | 2011-05-10 02:28:49 -0700 | [diff] [blame] | 2143 | default: |
| 2144 | /* All other completion status cause the IO to be complete. */ |
Dan Williams | 34a9915 | 2011-07-01 02:25:15 -0700 | [diff] [blame] | 2145 | ireq->scu_status = SCU_NORMALIZE_COMPLETION_STATUS(completion_code); |
| 2146 | ireq->sci_status = SCI_FAILURE_CONTROLLER_SPECIFIC_IO_ERR; |
| 2147 | sci_change_state(&ireq->sm, SCI_REQ_COMPLETED); |
Dan Williams | 5dec6f4 | 2011-05-10 02:28:49 -0700 | [diff] [blame] | 2148 | break; |
| 2149 | } |
| 2150 | |
| 2151 | return status; |
| 2152 | } |
| 2153 | |
Dan Williams | b50102d | 2011-09-30 18:52:19 -0700 | [diff] [blame] | 2154 | static enum sci_status atapi_raw_completion(struct isci_request *ireq, u32 completion_code, |
| 2155 | enum sci_base_request_states next) |
| 2156 | { |
| 2157 | enum sci_status status = SCI_SUCCESS; |
| 2158 | |
| 2159 | switch (SCU_GET_COMPLETION_TL_STATUS(completion_code)) { |
| 2160 | case SCU_MAKE_COMPLETION_STATUS(SCU_TASK_DONE_GOOD): |
| 2161 | ireq->scu_status = SCU_TASK_DONE_GOOD; |
| 2162 | ireq->sci_status = SCI_SUCCESS; |
| 2163 | sci_change_state(&ireq->sm, next); |
| 2164 | break; |
| 2165 | default: |
| 2166 | /* All other completion status cause the IO to be complete. |
| 2167 | * If a NAK was received, then it is up to the user to retry |
| 2168 | * the request. |
| 2169 | */ |
| 2170 | ireq->scu_status = SCU_NORMALIZE_COMPLETION_STATUS(completion_code); |
| 2171 | ireq->sci_status = SCI_FAILURE_CONTROLLER_SPECIFIC_IO_ERR; |
| 2172 | |
| 2173 | sci_change_state(&ireq->sm, SCI_REQ_COMPLETED); |
| 2174 | break; |
| 2175 | } |
| 2176 | |
| 2177 | return status; |
| 2178 | } |
| 2179 | |
| 2180 | static enum sci_status atapi_data_tc_completion_handler(struct isci_request *ireq, |
| 2181 | u32 completion_code) |
| 2182 | { |
| 2183 | struct isci_remote_device *idev = ireq->target_device; |
| 2184 | struct dev_to_host_fis *d2h = &ireq->stp.rsp; |
| 2185 | enum sci_status status = SCI_SUCCESS; |
| 2186 | |
| 2187 | switch (SCU_GET_COMPLETION_TL_STATUS(completion_code)) { |
| 2188 | case (SCU_TASK_DONE_GOOD << SCU_COMPLETION_TL_STATUS_SHIFT): |
| 2189 | sci_change_state(&ireq->sm, SCI_REQ_COMPLETED); |
| 2190 | break; |
| 2191 | |
| 2192 | case (SCU_TASK_DONE_UNEXP_FIS << SCU_COMPLETION_TL_STATUS_SHIFT): { |
| 2193 | u16 len = sci_req_tx_bytes(ireq); |
| 2194 | |
| 2195 | /* likely non-error data underrrun, workaround missing |
| 2196 | * d2h frame from the controller |
| 2197 | */ |
| 2198 | if (d2h->fis_type != FIS_REGD2H) { |
| 2199 | d2h->fis_type = FIS_REGD2H; |
| 2200 | d2h->flags = (1 << 6); |
| 2201 | d2h->status = 0x50; |
| 2202 | d2h->error = 0; |
| 2203 | d2h->lbal = 0; |
| 2204 | d2h->byte_count_low = len & 0xff; |
| 2205 | d2h->byte_count_high = len >> 8; |
| 2206 | d2h->device = 0xa0; |
| 2207 | d2h->lbal_exp = 0; |
| 2208 | d2h->lbam_exp = 0; |
| 2209 | d2h->lbah_exp = 0; |
| 2210 | d2h->_r_a = 0; |
| 2211 | d2h->sector_count = 0x3; |
| 2212 | d2h->sector_count_exp = 0; |
| 2213 | d2h->_r_b = 0; |
| 2214 | d2h->_r_c = 0; |
| 2215 | d2h->_r_d = 0; |
| 2216 | } |
| 2217 | |
| 2218 | ireq->scu_status = SCU_TASK_DONE_GOOD; |
| 2219 | ireq->sci_status = SCI_SUCCESS_IO_DONE_EARLY; |
| 2220 | status = ireq->sci_status; |
| 2221 | |
| 2222 | /* the hw will have suspended the rnc, so complete the |
| 2223 | * request upon pending resume |
| 2224 | */ |
| 2225 | sci_change_state(&idev->sm, SCI_STP_DEV_ATAPI_ERROR); |
| 2226 | break; |
| 2227 | } |
| 2228 | case (SCU_TASK_DONE_EXCESS_DATA << SCU_COMPLETION_TL_STATUS_SHIFT): |
| 2229 | /* In this case, there is no UF coming after. |
| 2230 | * compelte the IO now. |
| 2231 | */ |
| 2232 | ireq->scu_status = SCU_TASK_DONE_GOOD; |
| 2233 | ireq->sci_status = SCI_SUCCESS; |
| 2234 | sci_change_state(&ireq->sm, SCI_REQ_COMPLETED); |
| 2235 | break; |
| 2236 | |
| 2237 | default: |
| 2238 | if (d2h->fis_type == FIS_REGD2H) { |
| 2239 | /* UF received change the device state to ATAPI_ERROR */ |
| 2240 | status = ireq->sci_status; |
| 2241 | sci_change_state(&idev->sm, SCI_STP_DEV_ATAPI_ERROR); |
| 2242 | } else { |
Anatol Pomozov | 4907cb7 | 2012-09-01 10:31:09 -0700 | [diff] [blame] | 2243 | /* If receiving any non-success TC status, no UF |
Dan Williams | b50102d | 2011-09-30 18:52:19 -0700 | [diff] [blame] | 2244 | * received yet, then an UF for the status fis |
| 2245 | * is coming after (XXX: suspect this is |
| 2246 | * actually a protocol error or a bug like the |
| 2247 | * DONE_UNEXP_FIS case) |
| 2248 | */ |
| 2249 | ireq->scu_status = SCU_TASK_DONE_CHECK_RESPONSE; |
| 2250 | ireq->sci_status = SCI_FAILURE_IO_RESPONSE_VALID; |
| 2251 | |
| 2252 | sci_change_state(&ireq->sm, SCI_REQ_ATAPI_WAIT_D2H); |
| 2253 | } |
| 2254 | break; |
| 2255 | } |
| 2256 | |
| 2257 | return status; |
| 2258 | } |
| 2259 | |
Jeff Skirvin | ac78ed0 | 2012-03-08 22:41:50 -0800 | [diff] [blame] | 2260 | static int sci_request_smp_completion_status_is_tx_suspend( |
| 2261 | unsigned int completion_status) |
| 2262 | { |
| 2263 | switch (completion_status) { |
| 2264 | case SCU_TASK_OPEN_REJECT_WRONG_DESTINATION: |
| 2265 | case SCU_TASK_OPEN_REJECT_RESERVED_ABANDON_1: |
| 2266 | case SCU_TASK_OPEN_REJECT_RESERVED_ABANDON_2: |
| 2267 | case SCU_TASK_OPEN_REJECT_RESERVED_ABANDON_3: |
| 2268 | case SCU_TASK_OPEN_REJECT_BAD_DESTINATION: |
| 2269 | case SCU_TASK_OPEN_REJECT_ZONE_VIOLATION: |
| 2270 | return 1; |
| 2271 | } |
| 2272 | return 0; |
| 2273 | } |
| 2274 | |
| 2275 | static int sci_request_smp_completion_status_is_tx_rx_suspend( |
| 2276 | unsigned int completion_status) |
| 2277 | { |
| 2278 | return 0; /* There are no Tx/Rx SMP suspend conditions. */ |
| 2279 | } |
| 2280 | |
| 2281 | static int sci_request_ssp_completion_status_is_tx_suspend( |
| 2282 | unsigned int completion_status) |
| 2283 | { |
| 2284 | switch (completion_status) { |
| 2285 | case SCU_TASK_DONE_TX_RAW_CMD_ERR: |
| 2286 | case SCU_TASK_DONE_LF_ERR: |
| 2287 | case SCU_TASK_OPEN_REJECT_WRONG_DESTINATION: |
| 2288 | case SCU_TASK_OPEN_REJECT_RESERVED_ABANDON_1: |
| 2289 | case SCU_TASK_OPEN_REJECT_RESERVED_ABANDON_2: |
| 2290 | case SCU_TASK_OPEN_REJECT_RESERVED_ABANDON_3: |
| 2291 | case SCU_TASK_OPEN_REJECT_BAD_DESTINATION: |
| 2292 | case SCU_TASK_OPEN_REJECT_ZONE_VIOLATION: |
| 2293 | case SCU_TASK_OPEN_REJECT_STP_RESOURCES_BUSY: |
| 2294 | case SCU_TASK_OPEN_REJECT_PROTOCOL_NOT_SUPPORTED: |
| 2295 | case SCU_TASK_OPEN_REJECT_CONNECTION_RATE_NOT_SUPPORTED: |
| 2296 | return 1; |
| 2297 | } |
| 2298 | return 0; |
| 2299 | } |
| 2300 | |
| 2301 | static int sci_request_ssp_completion_status_is_tx_rx_suspend( |
| 2302 | unsigned int completion_status) |
| 2303 | { |
| 2304 | return 0; /* There are no Tx/Rx SSP suspend conditions. */ |
| 2305 | } |
| 2306 | |
| 2307 | static int sci_request_stpsata_completion_status_is_tx_suspend( |
| 2308 | unsigned int completion_status) |
| 2309 | { |
| 2310 | switch (completion_status) { |
| 2311 | case SCU_TASK_DONE_TX_RAW_CMD_ERR: |
| 2312 | case SCU_TASK_DONE_LL_R_ERR: |
| 2313 | case SCU_TASK_DONE_LL_PERR: |
| 2314 | case SCU_TASK_DONE_REG_ERR: |
| 2315 | case SCU_TASK_DONE_SDB_ERR: |
| 2316 | case SCU_TASK_OPEN_REJECT_WRONG_DESTINATION: |
| 2317 | case SCU_TASK_OPEN_REJECT_RESERVED_ABANDON_1: |
| 2318 | case SCU_TASK_OPEN_REJECT_RESERVED_ABANDON_2: |
| 2319 | case SCU_TASK_OPEN_REJECT_RESERVED_ABANDON_3: |
| 2320 | case SCU_TASK_OPEN_REJECT_BAD_DESTINATION: |
| 2321 | case SCU_TASK_OPEN_REJECT_ZONE_VIOLATION: |
| 2322 | case SCU_TASK_OPEN_REJECT_STP_RESOURCES_BUSY: |
| 2323 | case SCU_TASK_OPEN_REJECT_PROTOCOL_NOT_SUPPORTED: |
| 2324 | case SCU_TASK_OPEN_REJECT_CONNECTION_RATE_NOT_SUPPORTED: |
| 2325 | return 1; |
| 2326 | } |
| 2327 | return 0; |
| 2328 | } |
| 2329 | |
| 2330 | |
| 2331 | static int sci_request_stpsata_completion_status_is_tx_rx_suspend( |
| 2332 | unsigned int completion_status) |
| 2333 | { |
| 2334 | switch (completion_status) { |
| 2335 | case SCU_TASK_DONE_LF_ERR: |
| 2336 | case SCU_TASK_DONE_LL_SY_TERM: |
| 2337 | case SCU_TASK_DONE_LL_LF_TERM: |
| 2338 | case SCU_TASK_DONE_BREAK_RCVD: |
| 2339 | case SCU_TASK_DONE_INV_FIS_LEN: |
| 2340 | case SCU_TASK_DONE_UNEXP_FIS: |
| 2341 | case SCU_TASK_DONE_UNEXP_SDBFIS: |
| 2342 | case SCU_TASK_DONE_MAX_PLD_ERR: |
| 2343 | return 1; |
| 2344 | } |
| 2345 | return 0; |
| 2346 | } |
| 2347 | |
| 2348 | static void sci_request_handle_suspending_completions( |
| 2349 | struct isci_request *ireq, |
| 2350 | u32 completion_code) |
| 2351 | { |
| 2352 | int is_tx = 0; |
| 2353 | int is_tx_rx = 0; |
| 2354 | |
| 2355 | switch (ireq->protocol) { |
| 2356 | case SAS_PROTOCOL_SMP: |
| 2357 | is_tx = sci_request_smp_completion_status_is_tx_suspend( |
| 2358 | completion_code); |
| 2359 | is_tx_rx = sci_request_smp_completion_status_is_tx_rx_suspend( |
| 2360 | completion_code); |
| 2361 | break; |
| 2362 | case SAS_PROTOCOL_SSP: |
| 2363 | is_tx = sci_request_ssp_completion_status_is_tx_suspend( |
| 2364 | completion_code); |
| 2365 | is_tx_rx = sci_request_ssp_completion_status_is_tx_rx_suspend( |
| 2366 | completion_code); |
| 2367 | break; |
| 2368 | case SAS_PROTOCOL_STP: |
| 2369 | is_tx = sci_request_stpsata_completion_status_is_tx_suspend( |
| 2370 | completion_code); |
| 2371 | is_tx_rx = |
| 2372 | sci_request_stpsata_completion_status_is_tx_rx_suspend( |
| 2373 | completion_code); |
| 2374 | break; |
| 2375 | default: |
| 2376 | dev_warn(&ireq->isci_host->pdev->dev, |
| 2377 | "%s: request %p has no valid protocol\n", |
| 2378 | __func__, ireq); |
| 2379 | break; |
| 2380 | } |
| 2381 | if (is_tx || is_tx_rx) { |
| 2382 | BUG_ON(is_tx && is_tx_rx); |
| 2383 | |
| 2384 | sci_remote_node_context_suspend( |
| 2385 | &ireq->target_device->rnc, |
Jeff Skirvin | c94fc1a | 2012-03-08 22:41:58 -0800 | [diff] [blame] | 2386 | SCI_HW_SUSPEND, |
Jeff Skirvin | ac78ed0 | 2012-03-08 22:41:50 -0800 | [diff] [blame] | 2387 | (is_tx_rx) ? SCU_EVENT_TL_RNC_SUSPEND_TX_RX |
Jeff Skirvin | 447bfbc | 2012-03-08 22:41:59 -0800 | [diff] [blame] | 2388 | : SCU_EVENT_TL_RNC_SUSPEND_TX); |
Jeff Skirvin | ac78ed0 | 2012-03-08 22:41:50 -0800 | [diff] [blame] | 2389 | } |
| 2390 | } |
| 2391 | |
Dan Williams | a7e255a | 2011-05-11 08:27:47 -0700 | [diff] [blame] | 2392 | enum sci_status |
Dan Williams | 89a7301 | 2011-06-30 19:14:33 -0700 | [diff] [blame] | 2393 | sci_io_request_tc_completion(struct isci_request *ireq, |
Jeff Skirvin | ac78ed0 | 2012-03-08 22:41:50 -0800 | [diff] [blame] | 2394 | u32 completion_code) |
Dan Williams | a7e255a | 2011-05-11 08:27:47 -0700 | [diff] [blame] | 2395 | { |
| 2396 | enum sci_base_request_states state; |
Dan Williams | d9dcb4b | 2011-06-30 17:38:32 -0700 | [diff] [blame] | 2397 | struct isci_host *ihost = ireq->owning_controller; |
Dan Williams | a7e255a | 2011-05-11 08:27:47 -0700 | [diff] [blame] | 2398 | |
Dan Williams | 5076a1a | 2011-06-27 14:57:03 -0700 | [diff] [blame] | 2399 | state = ireq->sm.current_state_id; |
Dan Williams | a7e255a | 2011-05-11 08:27:47 -0700 | [diff] [blame] | 2400 | |
Jeff Skirvin | ac78ed0 | 2012-03-08 22:41:50 -0800 | [diff] [blame] | 2401 | /* Decode those completions that signal upcoming suspension events. */ |
| 2402 | sci_request_handle_suspending_completions( |
| 2403 | ireq, SCU_GET_COMPLETION_TL_STATUS(completion_code)); |
| 2404 | |
Dan Williams | a7e255a | 2011-05-11 08:27:47 -0700 | [diff] [blame] | 2405 | switch (state) { |
Edmund Nadolski | e301370 | 2011-06-02 00:10:43 +0000 | [diff] [blame] | 2406 | case SCI_REQ_STARTED: |
Dan Williams | 5076a1a | 2011-06-27 14:57:03 -0700 | [diff] [blame] | 2407 | return request_started_state_tc_event(ireq, completion_code); |
Edmund Nadolski | e301370 | 2011-06-02 00:10:43 +0000 | [diff] [blame] | 2408 | |
| 2409 | case SCI_REQ_TASK_WAIT_TC_COMP: |
Dan Williams | 5076a1a | 2011-06-27 14:57:03 -0700 | [diff] [blame] | 2410 | return ssp_task_request_await_tc_event(ireq, |
Edmund Nadolski | e301370 | 2011-06-02 00:10:43 +0000 | [diff] [blame] | 2411 | completion_code); |
| 2412 | |
| 2413 | case SCI_REQ_SMP_WAIT_RESP: |
Dan Williams | 5076a1a | 2011-06-27 14:57:03 -0700 | [diff] [blame] | 2414 | return smp_request_await_response_tc_event(ireq, |
Edmund Nadolski | e301370 | 2011-06-02 00:10:43 +0000 | [diff] [blame] | 2415 | completion_code); |
| 2416 | |
| 2417 | case SCI_REQ_SMP_WAIT_TC_COMP: |
Dan Williams | 5076a1a | 2011-06-27 14:57:03 -0700 | [diff] [blame] | 2418 | return smp_request_await_tc_event(ireq, completion_code); |
Edmund Nadolski | e301370 | 2011-06-02 00:10:43 +0000 | [diff] [blame] | 2419 | |
| 2420 | case SCI_REQ_STP_UDMA_WAIT_TC_COMP: |
Dan Williams | 5076a1a | 2011-06-27 14:57:03 -0700 | [diff] [blame] | 2421 | return stp_request_udma_await_tc_event(ireq, |
Edmund Nadolski | e301370 | 2011-06-02 00:10:43 +0000 | [diff] [blame] | 2422 | completion_code); |
| 2423 | |
| 2424 | case SCI_REQ_STP_NON_DATA_WAIT_H2D: |
Dan Williams | 5076a1a | 2011-06-27 14:57:03 -0700 | [diff] [blame] | 2425 | return stp_request_non_data_await_h2d_tc_event(ireq, |
Edmund Nadolski | e301370 | 2011-06-02 00:10:43 +0000 | [diff] [blame] | 2426 | completion_code); |
| 2427 | |
| 2428 | case SCI_REQ_STP_PIO_WAIT_H2D: |
Dan Williams | 5076a1a | 2011-06-27 14:57:03 -0700 | [diff] [blame] | 2429 | return stp_request_pio_await_h2d_completion_tc_event(ireq, |
Edmund Nadolski | e301370 | 2011-06-02 00:10:43 +0000 | [diff] [blame] | 2430 | completion_code); |
| 2431 | |
| 2432 | case SCI_REQ_STP_PIO_DATA_OUT: |
Dan Williams | 5076a1a | 2011-06-27 14:57:03 -0700 | [diff] [blame] | 2433 | return pio_data_out_tx_done_tc_event(ireq, completion_code); |
Edmund Nadolski | e301370 | 2011-06-02 00:10:43 +0000 | [diff] [blame] | 2434 | |
Edmund Nadolski | e301370 | 2011-06-02 00:10:43 +0000 | [diff] [blame] | 2435 | case SCI_REQ_ABORTING: |
Dan Williams | 5076a1a | 2011-06-27 14:57:03 -0700 | [diff] [blame] | 2436 | return request_aborting_state_tc_event(ireq, |
Edmund Nadolski | e301370 | 2011-06-02 00:10:43 +0000 | [diff] [blame] | 2437 | completion_code); |
| 2438 | |
Dan Williams | b50102d | 2011-09-30 18:52:19 -0700 | [diff] [blame] | 2439 | case SCI_REQ_ATAPI_WAIT_H2D: |
| 2440 | return atapi_raw_completion(ireq, completion_code, |
| 2441 | SCI_REQ_ATAPI_WAIT_PIO_SETUP); |
| 2442 | |
| 2443 | case SCI_REQ_ATAPI_WAIT_TC_COMP: |
| 2444 | return atapi_raw_completion(ireq, completion_code, |
| 2445 | SCI_REQ_ATAPI_WAIT_D2H); |
| 2446 | |
| 2447 | case SCI_REQ_ATAPI_WAIT_D2H: |
| 2448 | return atapi_data_tc_completion_handler(ireq, completion_code); |
| 2449 | |
Edmund Nadolski | e301370 | 2011-06-02 00:10:43 +0000 | [diff] [blame] | 2450 | default: |
Dan Williams | d7a0ccd | 2012-02-10 01:18:44 -0800 | [diff] [blame] | 2451 | dev_warn(&ihost->pdev->dev, "%s: %x in wrong state %s\n", |
| 2452 | __func__, completion_code, req_state_name(state)); |
Edmund Nadolski | e301370 | 2011-06-02 00:10:43 +0000 | [diff] [blame] | 2453 | return SCI_FAILURE_INVALID_STATE; |
Dan Williams | a7e255a | 2011-05-11 08:27:47 -0700 | [diff] [blame] | 2454 | } |
| 2455 | } |
| 2456 | |
Dan Williams | 6f231dd | 2011-07-02 22:56:22 -0700 | [diff] [blame] | 2457 | /** |
| 2458 | * isci_request_process_response_iu() - This function sets the status and |
| 2459 | * response iu, in the task struct, from the request object for the upper |
| 2460 | * layer driver. |
| 2461 | * @sas_task: This parameter is the task struct from the upper layer driver. |
| 2462 | * @resp_iu: This parameter points to the response iu of the completed request. |
| 2463 | * @dev: This parameter specifies the linux device struct. |
| 2464 | * |
| 2465 | * none. |
| 2466 | */ |
| 2467 | static void isci_request_process_response_iu( |
| 2468 | struct sas_task *task, |
| 2469 | struct ssp_response_iu *resp_iu, |
| 2470 | struct device *dev) |
| 2471 | { |
| 2472 | dev_dbg(dev, |
| 2473 | "%s: resp_iu = %p " |
| 2474 | "resp_iu->status = 0x%x,\nresp_iu->datapres = %d " |
| 2475 | "resp_iu->response_data_len = %x, " |
| 2476 | "resp_iu->sense_data_len = %x\nrepsonse data: ", |
| 2477 | __func__, |
| 2478 | resp_iu, |
| 2479 | resp_iu->status, |
| 2480 | resp_iu->datapres, |
| 2481 | resp_iu->response_data_len, |
| 2482 | resp_iu->sense_data_len); |
| 2483 | |
| 2484 | task->task_status.stat = resp_iu->status; |
| 2485 | |
| 2486 | /* libsas updates the task status fields based on the response iu. */ |
| 2487 | sas_ssp_task_response(dev, task, resp_iu); |
| 2488 | } |
| 2489 | |
| 2490 | /** |
| 2491 | * isci_request_set_open_reject_status() - This function prepares the I/O |
| 2492 | * completion for OPEN_REJECT conditions. |
| 2493 | * @request: This parameter is the completed isci_request object. |
| 2494 | * @response_ptr: This parameter specifies the service response for the I/O. |
| 2495 | * @status_ptr: This parameter specifies the exec status for the I/O. |
Dan Williams | 6f231dd | 2011-07-02 22:56:22 -0700 | [diff] [blame] | 2496 | * @open_rej_reason: This parameter specifies the encoded reason for the |
| 2497 | * abandon-class reject. |
| 2498 | * |
| 2499 | * none. |
| 2500 | */ |
| 2501 | static void isci_request_set_open_reject_status( |
| 2502 | struct isci_request *request, |
| 2503 | struct sas_task *task, |
| 2504 | enum service_response *response_ptr, |
| 2505 | enum exec_status *status_ptr, |
Dan Williams | 6f231dd | 2011-07-02 22:56:22 -0700 | [diff] [blame] | 2506 | enum sas_open_rej_reason open_rej_reason) |
| 2507 | { |
| 2508 | /* Task in the target is done. */ |
Dan Williams | 38d8879 | 2011-06-23 14:33:48 -0700 | [diff] [blame] | 2509 | set_bit(IREQ_COMPLETE_IN_TARGET, &request->flags); |
Dan Williams | 6f231dd | 2011-07-02 22:56:22 -0700 | [diff] [blame] | 2510 | *response_ptr = SAS_TASK_UNDELIVERED; |
| 2511 | *status_ptr = SAS_OPEN_REJECT; |
Dan Williams | 6f231dd | 2011-07-02 22:56:22 -0700 | [diff] [blame] | 2512 | task->task_status.open_rej_reason = open_rej_reason; |
| 2513 | } |
| 2514 | |
| 2515 | /** |
| 2516 | * isci_request_handle_controller_specific_errors() - This function decodes |
| 2517 | * controller-specific I/O completion error conditions. |
| 2518 | * @request: This parameter is the completed isci_request object. |
| 2519 | * @response_ptr: This parameter specifies the service response for the I/O. |
| 2520 | * @status_ptr: This parameter specifies the exec status for the I/O. |
Dan Williams | 6f231dd | 2011-07-02 22:56:22 -0700 | [diff] [blame] | 2521 | * |
| 2522 | * none. |
| 2523 | */ |
| 2524 | static void isci_request_handle_controller_specific_errors( |
Dan Williams | 209fae1 | 2011-06-13 17:39:44 -0700 | [diff] [blame] | 2525 | struct isci_remote_device *idev, |
Dan Williams | 6f231dd | 2011-07-02 22:56:22 -0700 | [diff] [blame] | 2526 | struct isci_request *request, |
| 2527 | struct sas_task *task, |
| 2528 | enum service_response *response_ptr, |
Jeff Skirvin | 14aaa9f | 2012-03-08 22:41:54 -0800 | [diff] [blame] | 2529 | enum exec_status *status_ptr) |
Dan Williams | 6f231dd | 2011-07-02 22:56:22 -0700 | [diff] [blame] | 2530 | { |
| 2531 | unsigned int cstatus; |
| 2532 | |
Dan Williams | 5076a1a | 2011-06-27 14:57:03 -0700 | [diff] [blame] | 2533 | cstatus = request->scu_status; |
Dan Williams | 6f231dd | 2011-07-02 22:56:22 -0700 | [diff] [blame] | 2534 | |
| 2535 | dev_dbg(&request->isci_host->pdev->dev, |
| 2536 | "%s: %p SCI_FAILURE_CONTROLLER_SPECIFIC_IO_ERR " |
| 2537 | "- controller status = 0x%x\n", |
| 2538 | __func__, request, cstatus); |
| 2539 | |
| 2540 | /* Decode the controller-specific errors; most |
| 2541 | * important is to recognize those conditions in which |
| 2542 | * the target may still have a task outstanding that |
| 2543 | * must be aborted. |
| 2544 | * |
| 2545 | * Note that there are SCU completion codes being |
| 2546 | * named in the decode below for which SCIC has already |
| 2547 | * done work to handle them in a way other than as |
| 2548 | * a controller-specific completion code; these are left |
| 2549 | * in the decode below for completeness sake. |
| 2550 | */ |
| 2551 | switch (cstatus) { |
| 2552 | case SCU_TASK_DONE_DMASETUP_DIRERR: |
| 2553 | /* Also SCU_TASK_DONE_SMP_FRM_TYPE_ERR: */ |
| 2554 | case SCU_TASK_DONE_XFERCNT_ERR: |
| 2555 | /* Also SCU_TASK_DONE_SMP_UFI_ERR: */ |
| 2556 | if (task->task_proto == SAS_PROTOCOL_SMP) { |
| 2557 | /* SCU_TASK_DONE_SMP_UFI_ERR == Task Done. */ |
| 2558 | *response_ptr = SAS_TASK_COMPLETE; |
| 2559 | |
| 2560 | /* See if the device has been/is being stopped. Note |
| 2561 | * that we ignore the quiesce state, since we are |
| 2562 | * concerned about the actual device state. |
| 2563 | */ |
Dan Williams | 209fae1 | 2011-06-13 17:39:44 -0700 | [diff] [blame] | 2564 | if (!idev) |
Dan Williams | 6f231dd | 2011-07-02 22:56:22 -0700 | [diff] [blame] | 2565 | *status_ptr = SAS_DEVICE_UNKNOWN; |
| 2566 | else |
| 2567 | *status_ptr = SAS_ABORTED_TASK; |
| 2568 | |
Dan Williams | 38d8879 | 2011-06-23 14:33:48 -0700 | [diff] [blame] | 2569 | set_bit(IREQ_COMPLETE_IN_TARGET, &request->flags); |
Dan Williams | 6f231dd | 2011-07-02 22:56:22 -0700 | [diff] [blame] | 2570 | } else { |
| 2571 | /* Task in the target is not done. */ |
| 2572 | *response_ptr = SAS_TASK_UNDELIVERED; |
| 2573 | |
Dan Williams | 209fae1 | 2011-06-13 17:39:44 -0700 | [diff] [blame] | 2574 | if (!idev) |
Dan Williams | 6f231dd | 2011-07-02 22:56:22 -0700 | [diff] [blame] | 2575 | *status_ptr = SAS_DEVICE_UNKNOWN; |
| 2576 | else |
| 2577 | *status_ptr = SAM_STAT_TASK_ABORTED; |
| 2578 | |
Dan Williams | 38d8879 | 2011-06-23 14:33:48 -0700 | [diff] [blame] | 2579 | clear_bit(IREQ_COMPLETE_IN_TARGET, &request->flags); |
Dan Williams | 6f231dd | 2011-07-02 22:56:22 -0700 | [diff] [blame] | 2580 | } |
| 2581 | |
| 2582 | break; |
| 2583 | |
| 2584 | case SCU_TASK_DONE_CRC_ERR: |
| 2585 | case SCU_TASK_DONE_NAK_CMD_ERR: |
| 2586 | case SCU_TASK_DONE_EXCESS_DATA: |
| 2587 | case SCU_TASK_DONE_UNEXP_FIS: |
| 2588 | /* Also SCU_TASK_DONE_UNEXP_RESP: */ |
| 2589 | case SCU_TASK_DONE_VIIT_ENTRY_NV: /* TODO - conditions? */ |
| 2590 | case SCU_TASK_DONE_IIT_ENTRY_NV: /* TODO - conditions? */ |
| 2591 | case SCU_TASK_DONE_RNCNV_OUTBOUND: /* TODO - conditions? */ |
| 2592 | /* These are conditions in which the target |
| 2593 | * has completed the task, so that no cleanup |
| 2594 | * is necessary. |
| 2595 | */ |
| 2596 | *response_ptr = SAS_TASK_COMPLETE; |
| 2597 | |
| 2598 | /* See if the device has been/is being stopped. Note |
| 2599 | * that we ignore the quiesce state, since we are |
| 2600 | * concerned about the actual device state. |
| 2601 | */ |
Dan Williams | 209fae1 | 2011-06-13 17:39:44 -0700 | [diff] [blame] | 2602 | if (!idev) |
Dan Williams | 6f231dd | 2011-07-02 22:56:22 -0700 | [diff] [blame] | 2603 | *status_ptr = SAS_DEVICE_UNKNOWN; |
| 2604 | else |
| 2605 | *status_ptr = SAS_ABORTED_TASK; |
| 2606 | |
Dan Williams | 38d8879 | 2011-06-23 14:33:48 -0700 | [diff] [blame] | 2607 | set_bit(IREQ_COMPLETE_IN_TARGET, &request->flags); |
Dan Williams | 6f231dd | 2011-07-02 22:56:22 -0700 | [diff] [blame] | 2608 | break; |
| 2609 | |
| 2610 | |
| 2611 | /* Note that the only open reject completion codes seen here will be |
| 2612 | * abandon-class codes; all others are automatically retried in the SCU. |
| 2613 | */ |
| 2614 | case SCU_TASK_OPEN_REJECT_WRONG_DESTINATION: |
| 2615 | |
| 2616 | isci_request_set_open_reject_status( |
| 2617 | request, task, response_ptr, status_ptr, |
Jeff Skirvin | 14aaa9f | 2012-03-08 22:41:54 -0800 | [diff] [blame] | 2618 | SAS_OREJ_WRONG_DEST); |
Dan Williams | 6f231dd | 2011-07-02 22:56:22 -0700 | [diff] [blame] | 2619 | break; |
| 2620 | |
| 2621 | case SCU_TASK_OPEN_REJECT_ZONE_VIOLATION: |
| 2622 | |
| 2623 | /* Note - the return of AB0 will change when |
| 2624 | * libsas implements detection of zone violations. |
| 2625 | */ |
| 2626 | isci_request_set_open_reject_status( |
| 2627 | request, task, response_ptr, status_ptr, |
Jeff Skirvin | 14aaa9f | 2012-03-08 22:41:54 -0800 | [diff] [blame] | 2628 | SAS_OREJ_RESV_AB0); |
Dan Williams | 6f231dd | 2011-07-02 22:56:22 -0700 | [diff] [blame] | 2629 | break; |
| 2630 | |
| 2631 | case SCU_TASK_OPEN_REJECT_RESERVED_ABANDON_1: |
| 2632 | |
| 2633 | isci_request_set_open_reject_status( |
| 2634 | request, task, response_ptr, status_ptr, |
Jeff Skirvin | 14aaa9f | 2012-03-08 22:41:54 -0800 | [diff] [blame] | 2635 | SAS_OREJ_RESV_AB1); |
Dan Williams | 6f231dd | 2011-07-02 22:56:22 -0700 | [diff] [blame] | 2636 | break; |
| 2637 | |
| 2638 | case SCU_TASK_OPEN_REJECT_RESERVED_ABANDON_2: |
| 2639 | |
| 2640 | isci_request_set_open_reject_status( |
| 2641 | request, task, response_ptr, status_ptr, |
Jeff Skirvin | 14aaa9f | 2012-03-08 22:41:54 -0800 | [diff] [blame] | 2642 | SAS_OREJ_RESV_AB2); |
Dan Williams | 6f231dd | 2011-07-02 22:56:22 -0700 | [diff] [blame] | 2643 | break; |
| 2644 | |
| 2645 | case SCU_TASK_OPEN_REJECT_RESERVED_ABANDON_3: |
| 2646 | |
| 2647 | isci_request_set_open_reject_status( |
| 2648 | request, task, response_ptr, status_ptr, |
Jeff Skirvin | 14aaa9f | 2012-03-08 22:41:54 -0800 | [diff] [blame] | 2649 | SAS_OREJ_RESV_AB3); |
Dan Williams | 6f231dd | 2011-07-02 22:56:22 -0700 | [diff] [blame] | 2650 | break; |
| 2651 | |
| 2652 | case SCU_TASK_OPEN_REJECT_BAD_DESTINATION: |
| 2653 | |
| 2654 | isci_request_set_open_reject_status( |
| 2655 | request, task, response_ptr, status_ptr, |
Jeff Skirvin | 14aaa9f | 2012-03-08 22:41:54 -0800 | [diff] [blame] | 2656 | SAS_OREJ_BAD_DEST); |
Dan Williams | 6f231dd | 2011-07-02 22:56:22 -0700 | [diff] [blame] | 2657 | break; |
| 2658 | |
| 2659 | case SCU_TASK_OPEN_REJECT_STP_RESOURCES_BUSY: |
| 2660 | |
| 2661 | isci_request_set_open_reject_status( |
| 2662 | request, task, response_ptr, status_ptr, |
Jeff Skirvin | 14aaa9f | 2012-03-08 22:41:54 -0800 | [diff] [blame] | 2663 | SAS_OREJ_STP_NORES); |
Dan Williams | 6f231dd | 2011-07-02 22:56:22 -0700 | [diff] [blame] | 2664 | break; |
| 2665 | |
| 2666 | case SCU_TASK_OPEN_REJECT_PROTOCOL_NOT_SUPPORTED: |
| 2667 | |
| 2668 | isci_request_set_open_reject_status( |
| 2669 | request, task, response_ptr, status_ptr, |
Jeff Skirvin | 14aaa9f | 2012-03-08 22:41:54 -0800 | [diff] [blame] | 2670 | SAS_OREJ_EPROTO); |
Dan Williams | 6f231dd | 2011-07-02 22:56:22 -0700 | [diff] [blame] | 2671 | break; |
| 2672 | |
| 2673 | case SCU_TASK_OPEN_REJECT_CONNECTION_RATE_NOT_SUPPORTED: |
| 2674 | |
| 2675 | isci_request_set_open_reject_status( |
| 2676 | request, task, response_ptr, status_ptr, |
Jeff Skirvin | 14aaa9f | 2012-03-08 22:41:54 -0800 | [diff] [blame] | 2677 | SAS_OREJ_CONN_RATE); |
Dan Williams | 6f231dd | 2011-07-02 22:56:22 -0700 | [diff] [blame] | 2678 | break; |
| 2679 | |
| 2680 | case SCU_TASK_DONE_LL_R_ERR: |
| 2681 | /* Also SCU_TASK_DONE_ACK_NAK_TO: */ |
| 2682 | case SCU_TASK_DONE_LL_PERR: |
| 2683 | case SCU_TASK_DONE_LL_SY_TERM: |
| 2684 | /* Also SCU_TASK_DONE_NAK_ERR:*/ |
| 2685 | case SCU_TASK_DONE_LL_LF_TERM: |
| 2686 | /* Also SCU_TASK_DONE_DATA_LEN_ERR: */ |
| 2687 | case SCU_TASK_DONE_LL_ABORT_ERR: |
| 2688 | case SCU_TASK_DONE_SEQ_INV_TYPE: |
| 2689 | /* Also SCU_TASK_DONE_UNEXP_XR: */ |
| 2690 | case SCU_TASK_DONE_XR_IU_LEN_ERR: |
| 2691 | case SCU_TASK_DONE_INV_FIS_LEN: |
| 2692 | /* Also SCU_TASK_DONE_XR_WD_LEN: */ |
| 2693 | case SCU_TASK_DONE_SDMA_ERR: |
| 2694 | case SCU_TASK_DONE_OFFSET_ERR: |
| 2695 | case SCU_TASK_DONE_MAX_PLD_ERR: |
| 2696 | case SCU_TASK_DONE_LF_ERR: |
| 2697 | case SCU_TASK_DONE_SMP_RESP_TO_ERR: /* Escalate to dev reset? */ |
| 2698 | case SCU_TASK_DONE_SMP_LL_RX_ERR: |
| 2699 | case SCU_TASK_DONE_UNEXP_DATA: |
| 2700 | case SCU_TASK_DONE_UNEXP_SDBFIS: |
| 2701 | case SCU_TASK_DONE_REG_ERR: |
| 2702 | case SCU_TASK_DONE_SDB_ERR: |
| 2703 | case SCU_TASK_DONE_TASK_ABORT: |
| 2704 | default: |
| 2705 | /* Task in the target is not done. */ |
| 2706 | *response_ptr = SAS_TASK_UNDELIVERED; |
| 2707 | *status_ptr = SAM_STAT_TASK_ABORTED; |
Dan Williams | 6f231dd | 2011-07-02 22:56:22 -0700 | [diff] [blame] | 2708 | |
Jeff Skirvin | 14aaa9f | 2012-03-08 22:41:54 -0800 | [diff] [blame] | 2709 | if (task->task_proto == SAS_PROTOCOL_SMP) |
Dan Williams | 38d8879 | 2011-06-23 14:33:48 -0700 | [diff] [blame] | 2710 | set_bit(IREQ_COMPLETE_IN_TARGET, &request->flags); |
Jeff Skirvin | 14aaa9f | 2012-03-08 22:41:54 -0800 | [diff] [blame] | 2711 | else |
Dan Williams | 38d8879 | 2011-06-23 14:33:48 -0700 | [diff] [blame] | 2712 | clear_bit(IREQ_COMPLETE_IN_TARGET, &request->flags); |
Dan Williams | 6f231dd | 2011-07-02 22:56:22 -0700 | [diff] [blame] | 2713 | break; |
| 2714 | } |
| 2715 | } |
| 2716 | |
Dan Williams | 1a87828 | 2011-07-29 17:16:40 -0700 | [diff] [blame] | 2717 | static void isci_process_stp_response(struct sas_task *task, struct dev_to_host_fis *fis) |
Dan Williams | 16ba770 | 2011-07-01 10:52:55 -0700 | [diff] [blame] | 2718 | { |
Dan Williams | 16ba770 | 2011-07-01 10:52:55 -0700 | [diff] [blame] | 2719 | struct task_status_struct *ts = &task->task_status; |
| 2720 | struct ata_task_resp *resp = (void *)&ts->buf[0]; |
| 2721 | |
Dan Williams | 1a87828 | 2011-07-29 17:16:40 -0700 | [diff] [blame] | 2722 | resp->frame_len = sizeof(*fis); |
| 2723 | memcpy(resp->ending_fis, fis, sizeof(*fis)); |
Dan Williams | 16ba770 | 2011-07-01 10:52:55 -0700 | [diff] [blame] | 2724 | ts->buf_valid_size = sizeof(*resp); |
| 2725 | |
Dan Williams | 2193b1b | 2014-02-06 12:23:15 -0800 | [diff] [blame] | 2726 | /* If an error is flagged let libata decode the fis */ |
| 2727 | if (ac_err_mask(fis->status)) |
Dan Williams | 16ba770 | 2011-07-01 10:52:55 -0700 | [diff] [blame] | 2728 | ts->stat = SAS_PROTO_RESPONSE; |
| 2729 | else |
| 2730 | ts->stat = SAM_STAT_GOOD; |
| 2731 | |
| 2732 | ts->resp = SAS_TASK_COMPLETE; |
| 2733 | } |
| 2734 | |
Dan Williams | d9dcb4b | 2011-06-30 17:38:32 -0700 | [diff] [blame] | 2735 | static void isci_request_io_request_complete(struct isci_host *ihost, |
Dan Williams | f1f52e7 | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 2736 | struct isci_request *request, |
| 2737 | enum sci_io_status completion_status) |
Dan Williams | 6f231dd | 2011-07-02 22:56:22 -0700 | [diff] [blame] | 2738 | { |
| 2739 | struct sas_task *task = isci_request_access_task(request); |
| 2740 | struct ssp_response_iu *resp_iu; |
Dan Williams | 6f231dd | 2011-07-02 22:56:22 -0700 | [diff] [blame] | 2741 | unsigned long task_flags; |
Jeff Skirvin | 0e2e279 | 2011-10-27 15:04:50 -0700 | [diff] [blame] | 2742 | struct isci_remote_device *idev = request->target_device; |
| 2743 | enum service_response response = SAS_TASK_UNDELIVERED; |
| 2744 | enum exec_status status = SAS_ABORTED_TASK; |
Dan Williams | 6f231dd | 2011-07-02 22:56:22 -0700 | [diff] [blame] | 2745 | |
Dan Williams | d9dcb4b | 2011-06-30 17:38:32 -0700 | [diff] [blame] | 2746 | dev_dbg(&ihost->pdev->dev, |
Jeff Skirvin | f838180 | 2012-03-04 12:44:53 +0000 | [diff] [blame] | 2747 | "%s: request = %p, task = %p, " |
Dan Williams | 6f231dd | 2011-07-02 22:56:22 -0700 | [diff] [blame] | 2748 | "task->data_dir = %d completion_status = 0x%x\n", |
Jeff Skirvin | f838180 | 2012-03-04 12:44:53 +0000 | [diff] [blame] | 2749 | __func__, request, task, task->data_dir, completion_status); |
Dan Williams | 6f231dd | 2011-07-02 22:56:22 -0700 | [diff] [blame] | 2750 | |
Jeff Skirvin | 14aaa9f | 2012-03-08 22:41:54 -0800 | [diff] [blame] | 2751 | /* The request is done from an SCU HW perspective. */ |
Dan Williams | 6f231dd | 2011-07-02 22:56:22 -0700 | [diff] [blame] | 2752 | |
Jeff Skirvin | 14aaa9f | 2012-03-08 22:41:54 -0800 | [diff] [blame] | 2753 | /* This is an active request being completed from the core. */ |
| 2754 | switch (completion_status) { |
Dan Williams | 6f231dd | 2011-07-02 22:56:22 -0700 | [diff] [blame] | 2755 | |
Jeff Skirvin | 14aaa9f | 2012-03-08 22:41:54 -0800 | [diff] [blame] | 2756 | case SCI_IO_FAILURE_RESPONSE_VALID: |
| 2757 | dev_dbg(&ihost->pdev->dev, |
| 2758 | "%s: SCI_IO_FAILURE_RESPONSE_VALID (%p/%p)\n", |
| 2759 | __func__, request, task); |
| 2760 | |
| 2761 | if (sas_protocol_ata(task->task_proto)) { |
| 2762 | isci_process_stp_response(task, &request->stp.rsp); |
| 2763 | } else if (SAS_PROTOCOL_SSP == task->task_proto) { |
| 2764 | |
| 2765 | /* crack the iu response buffer. */ |
| 2766 | resp_iu = &request->ssp.rsp; |
| 2767 | isci_request_process_response_iu(task, resp_iu, |
| 2768 | &ihost->pdev->dev); |
| 2769 | |
| 2770 | } else if (SAS_PROTOCOL_SMP == task->task_proto) { |
| 2771 | |
| 2772 | dev_err(&ihost->pdev->dev, |
| 2773 | "%s: SCI_IO_FAILURE_RESPONSE_VALID: " |
| 2774 | "SAS_PROTOCOL_SMP protocol\n", |
| 2775 | __func__); |
| 2776 | |
| 2777 | } else |
| 2778 | dev_err(&ihost->pdev->dev, |
| 2779 | "%s: unknown protocol\n", __func__); |
| 2780 | |
| 2781 | /* use the task status set in the task struct by the |
| 2782 | * isci_request_process_response_iu call. |
| 2783 | */ |
Dan Williams | 38d8879 | 2011-06-23 14:33:48 -0700 | [diff] [blame] | 2784 | set_bit(IREQ_COMPLETE_IN_TARGET, &request->flags); |
Jeff Skirvin | 14aaa9f | 2012-03-08 22:41:54 -0800 | [diff] [blame] | 2785 | response = task->task_status.resp; |
| 2786 | status = task->task_status.stat; |
| 2787 | break; |
| 2788 | |
| 2789 | case SCI_IO_SUCCESS: |
| 2790 | case SCI_IO_SUCCESS_IO_DONE_EARLY: |
| 2791 | |
Dan Williams | 6f231dd | 2011-07-02 22:56:22 -0700 | [diff] [blame] | 2792 | response = SAS_TASK_COMPLETE; |
Jeff Skirvin | 14aaa9f | 2012-03-08 22:41:54 -0800 | [diff] [blame] | 2793 | status = SAM_STAT_GOOD; |
| 2794 | set_bit(IREQ_COMPLETE_IN_TARGET, &request->flags); |
| 2795 | |
| 2796 | if (completion_status == SCI_IO_SUCCESS_IO_DONE_EARLY) { |
| 2797 | |
| 2798 | /* This was an SSP / STP / SATA transfer. |
| 2799 | * There is a possibility that less data than |
| 2800 | * the maximum was transferred. |
| 2801 | */ |
| 2802 | u32 transferred_length = sci_req_tx_bytes(request); |
| 2803 | |
| 2804 | task->task_status.residual |
| 2805 | = task->total_xfer_len - transferred_length; |
| 2806 | |
| 2807 | /* If there were residual bytes, call this an |
| 2808 | * underrun. |
| 2809 | */ |
| 2810 | if (task->task_status.residual != 0) |
| 2811 | status = SAS_DATA_UNDERRUN; |
| 2812 | |
| 2813 | dev_dbg(&ihost->pdev->dev, |
| 2814 | "%s: SCI_IO_SUCCESS_IO_DONE_EARLY %d\n", |
| 2815 | __func__, status); |
| 2816 | |
| 2817 | } else |
| 2818 | dev_dbg(&ihost->pdev->dev, "%s: SCI_IO_SUCCESS\n", |
| 2819 | __func__); |
| 2820 | break; |
| 2821 | |
| 2822 | case SCI_IO_FAILURE_TERMINATED: |
| 2823 | |
| 2824 | dev_dbg(&ihost->pdev->dev, |
| 2825 | "%s: SCI_IO_FAILURE_TERMINATED (%p/%p)\n", |
| 2826 | __func__, request, task); |
| 2827 | |
| 2828 | /* The request was terminated explicitly. */ |
Jeff Skirvin | e3c84df | 2012-03-08 22:41:58 -0800 | [diff] [blame] | 2829 | set_bit(IREQ_COMPLETE_IN_TARGET, &request->flags); |
Jeff Skirvin | 14aaa9f | 2012-03-08 22:41:54 -0800 | [diff] [blame] | 2830 | response = SAS_TASK_UNDELIVERED; |
Dan Williams | 6f231dd | 2011-07-02 22:56:22 -0700 | [diff] [blame] | 2831 | |
| 2832 | /* See if the device has been/is being stopped. Note |
Jeff Skirvin | 14aaa9f | 2012-03-08 22:41:54 -0800 | [diff] [blame] | 2833 | * that we ignore the quiesce state, since we are |
| 2834 | * concerned about the actual device state. |
| 2835 | */ |
| 2836 | if (!idev) |
| 2837 | status = SAS_DEVICE_UNKNOWN; |
| 2838 | else |
| 2839 | status = SAS_ABORTED_TASK; |
| 2840 | break; |
| 2841 | |
| 2842 | case SCI_FAILURE_CONTROLLER_SPECIFIC_IO_ERR: |
| 2843 | |
| 2844 | isci_request_handle_controller_specific_errors(idev, request, |
| 2845 | task, &response, |
| 2846 | &status); |
| 2847 | break; |
| 2848 | |
| 2849 | case SCI_IO_FAILURE_REMOTE_DEVICE_RESET_REQUIRED: |
| 2850 | /* This is a special case, in that the I/O completion |
| 2851 | * is telling us that the device needs a reset. |
| 2852 | * In order for the device reset condition to be |
| 2853 | * noticed, the I/O has to be handled in the error |
| 2854 | * handler. Set the reset flag and cause the |
| 2855 | * SCSI error thread to be scheduled. |
| 2856 | */ |
| 2857 | spin_lock_irqsave(&task->task_state_lock, task_flags); |
| 2858 | task->task_state_flags |= SAS_TASK_NEED_DEV_RESET; |
| 2859 | spin_unlock_irqrestore(&task->task_state_lock, task_flags); |
| 2860 | |
| 2861 | /* Fail the I/O. */ |
| 2862 | response = SAS_TASK_UNDELIVERED; |
| 2863 | status = SAM_STAT_TASK_ABORTED; |
| 2864 | |
| 2865 | clear_bit(IREQ_COMPLETE_IN_TARGET, &request->flags); |
| 2866 | break; |
| 2867 | |
| 2868 | case SCI_FAILURE_RETRY_REQUIRED: |
| 2869 | |
| 2870 | /* Fail the I/O so it can be retried. */ |
| 2871 | response = SAS_TASK_UNDELIVERED; |
Dan Williams | 209fae1 | 2011-06-13 17:39:44 -0700 | [diff] [blame] | 2872 | if (!idev) |
Dan Williams | 6f231dd | 2011-07-02 22:56:22 -0700 | [diff] [blame] | 2873 | status = SAS_DEVICE_UNKNOWN; |
| 2874 | else |
| 2875 | status = SAS_ABORTED_TASK; |
| 2876 | |
Dan Williams | 38d8879 | 2011-06-23 14:33:48 -0700 | [diff] [blame] | 2877 | set_bit(IREQ_COMPLETE_IN_TARGET, &request->flags); |
Dan Williams | 6f231dd | 2011-07-02 22:56:22 -0700 | [diff] [blame] | 2878 | break; |
| 2879 | |
Jeff Skirvin | 77c852f | 2011-06-20 14:09:16 -0700 | [diff] [blame] | 2880 | |
Dan Williams | 6f231dd | 2011-07-02 22:56:22 -0700 | [diff] [blame] | 2881 | default: |
Jeff Skirvin | 14aaa9f | 2012-03-08 22:41:54 -0800 | [diff] [blame] | 2882 | /* Catch any otherwise unhandled error codes here. */ |
| 2883 | dev_dbg(&ihost->pdev->dev, |
| 2884 | "%s: invalid completion code: 0x%x - " |
| 2885 | "isci_request = %p\n", |
| 2886 | __func__, completion_status, request); |
Dan Williams | 6f231dd | 2011-07-02 22:56:22 -0700 | [diff] [blame] | 2887 | |
Jeff Skirvin | 14aaa9f | 2012-03-08 22:41:54 -0800 | [diff] [blame] | 2888 | response = SAS_TASK_UNDELIVERED; |
Jeff Skirvin | a5fde22 | 2011-03-04 14:06:42 -0800 | [diff] [blame] | 2889 | |
Jeff Skirvin | 14aaa9f | 2012-03-08 22:41:54 -0800 | [diff] [blame] | 2890 | /* See if the device has been/is being stopped. Note |
| 2891 | * that we ignore the quiesce state, since we are |
| 2892 | * concerned about the actual device state. |
| 2893 | */ |
| 2894 | if (!idev) |
| 2895 | status = SAS_DEVICE_UNKNOWN; |
| 2896 | else |
| 2897 | status = SAS_ABORTED_TASK; |
Jeff Skirvin | a5fde22 | 2011-03-04 14:06:42 -0800 | [diff] [blame] | 2898 | |
Jeff Skirvin | 14aaa9f | 2012-03-08 22:41:54 -0800 | [diff] [blame] | 2899 | if (SAS_PROTOCOL_SMP == task->task_proto) |
Dan Williams | 38d8879 | 2011-06-23 14:33:48 -0700 | [diff] [blame] | 2900 | set_bit(IREQ_COMPLETE_IN_TARGET, &request->flags); |
Jeff Skirvin | 14aaa9f | 2012-03-08 22:41:54 -0800 | [diff] [blame] | 2901 | else |
Dan Williams | 38d8879 | 2011-06-23 14:33:48 -0700 | [diff] [blame] | 2902 | clear_bit(IREQ_COMPLETE_IN_TARGET, &request->flags); |
Dan Williams | 6f231dd | 2011-07-02 22:56:22 -0700 | [diff] [blame] | 2903 | break; |
| 2904 | } |
| 2905 | |
Dan Williams | ddcc7e3 | 2011-06-17 10:40:43 -0700 | [diff] [blame] | 2906 | switch (task->task_proto) { |
| 2907 | case SAS_PROTOCOL_SSP: |
| 2908 | if (task->data_dir == DMA_NONE) |
| 2909 | break; |
| 2910 | if (task->num_scatter == 0) |
| 2911 | /* 0 indicates a single dma address */ |
Dan Williams | d9dcb4b | 2011-06-30 17:38:32 -0700 | [diff] [blame] | 2912 | dma_unmap_single(&ihost->pdev->dev, |
Dan Williams | ddcc7e3 | 2011-06-17 10:40:43 -0700 | [diff] [blame] | 2913 | request->zero_scatter_daddr, |
| 2914 | task->total_xfer_len, task->data_dir); |
| 2915 | else /* unmap the sgl dma addresses */ |
Dan Williams | d9dcb4b | 2011-06-30 17:38:32 -0700 | [diff] [blame] | 2916 | dma_unmap_sg(&ihost->pdev->dev, task->scatter, |
Dan Williams | ddcc7e3 | 2011-06-17 10:40:43 -0700 | [diff] [blame] | 2917 | request->num_sg_entries, task->data_dir); |
| 2918 | break; |
Dan Williams | e9bf709 | 2011-06-16 16:59:56 -0700 | [diff] [blame] | 2919 | case SAS_PROTOCOL_SMP: { |
| 2920 | struct scatterlist *sg = &task->smp_task.smp_req; |
| 2921 | struct smp_req *smp_req; |
| 2922 | void *kaddr; |
| 2923 | |
Dan Williams | d9dcb4b | 2011-06-30 17:38:32 -0700 | [diff] [blame] | 2924 | dma_unmap_sg(&ihost->pdev->dev, sg, 1, DMA_TO_DEVICE); |
Dan Williams | e9bf709 | 2011-06-16 16:59:56 -0700 | [diff] [blame] | 2925 | |
| 2926 | /* need to swab it back in case the command buffer is re-used */ |
Cong Wang | 77dfce0 | 2011-11-25 23:14:23 +0800 | [diff] [blame] | 2927 | kaddr = kmap_atomic(sg_page(sg)); |
Dan Williams | e9bf709 | 2011-06-16 16:59:56 -0700 | [diff] [blame] | 2928 | smp_req = kaddr + sg->offset; |
| 2929 | sci_swab32_cpy(smp_req, smp_req, sg->length / sizeof(u32)); |
Cong Wang | 77dfce0 | 2011-11-25 23:14:23 +0800 | [diff] [blame] | 2930 | kunmap_atomic(kaddr); |
Dan Williams | e9bf709 | 2011-06-16 16:59:56 -0700 | [diff] [blame] | 2931 | break; |
| 2932 | } |
Dan Williams | ddcc7e3 | 2011-06-17 10:40:43 -0700 | [diff] [blame] | 2933 | default: |
| 2934 | break; |
| 2935 | } |
Dan Williams | 6f231dd | 2011-07-02 22:56:22 -0700 | [diff] [blame] | 2936 | |
Jeff Skirvin | 14aaa9f | 2012-03-08 22:41:54 -0800 | [diff] [blame] | 2937 | spin_lock_irqsave(&task->task_state_lock, task_flags); |
| 2938 | |
| 2939 | task->task_status.resp = response; |
| 2940 | task->task_status.stat = status; |
| 2941 | |
| 2942 | if (test_bit(IREQ_COMPLETE_IN_TARGET, &request->flags)) { |
| 2943 | /* Normal notification (task_done) */ |
| 2944 | task->task_state_flags |= SAS_TASK_STATE_DONE; |
| 2945 | task->task_state_flags &= ~(SAS_TASK_AT_INITIATOR | |
| 2946 | SAS_TASK_STATE_PENDING); |
| 2947 | } |
| 2948 | spin_unlock_irqrestore(&task->task_state_lock, task_flags); |
| 2949 | |
Dan Williams | 6f231dd | 2011-07-02 22:56:22 -0700 | [diff] [blame] | 2950 | /* complete the io request to the core. */ |
Dan Williams | 89a7301 | 2011-06-30 19:14:33 -0700 | [diff] [blame] | 2951 | sci_controller_complete_io(ihost, request->target_device, request); |
Dan Williams | 209fae1 | 2011-06-13 17:39:44 -0700 | [diff] [blame] | 2952 | |
Dan Williams | 67ea838 | 2011-05-08 11:47:15 -0700 | [diff] [blame] | 2953 | /* set terminated handle so it cannot be completed or |
Dan Williams | 6f231dd | 2011-07-02 22:56:22 -0700 | [diff] [blame] | 2954 | * terminated again, and to cause any calls into abort |
| 2955 | * task to recognize the already completed case. |
| 2956 | */ |
Dan Williams | 38d8879 | 2011-06-23 14:33:48 -0700 | [diff] [blame] | 2957 | set_bit(IREQ_TERMINATED, &request->flags); |
Jeff Skirvin | f838180 | 2012-03-04 12:44:53 +0000 | [diff] [blame] | 2958 | |
| 2959 | ireq_done(ihost, request, task); |
Dan Williams | 6f231dd | 2011-07-02 22:56:22 -0700 | [diff] [blame] | 2960 | } |
Dan Williams | f1f52e7 | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 2961 | |
Dan Williams | 89a7301 | 2011-06-30 19:14:33 -0700 | [diff] [blame] | 2962 | static void sci_request_started_state_enter(struct sci_base_state_machine *sm) |
Dan Williams | f1f52e7 | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 2963 | { |
Dan Williams | 5076a1a | 2011-06-27 14:57:03 -0700 | [diff] [blame] | 2964 | struct isci_request *ireq = container_of(sm, typeof(*ireq), sm); |
Dan Williams | 78a6f06 | 2011-06-30 16:31:37 -0700 | [diff] [blame] | 2965 | struct domain_device *dev = ireq->target_device->domain_dev; |
Dan Williams | b50102d | 2011-09-30 18:52:19 -0700 | [diff] [blame] | 2966 | enum sci_base_request_states state; |
Dan Williams | c72086e | 2011-05-10 02:28:48 -0700 | [diff] [blame] | 2967 | struct sas_task *task; |
| 2968 | |
| 2969 | /* XXX as hch said always creating an internal sas_task for tmf |
| 2970 | * requests would simplify the driver |
| 2971 | */ |
Jeff Skirvin | 3b34c16 | 2011-10-27 15:05:22 -0700 | [diff] [blame] | 2972 | task = (test_bit(IREQ_TMF, &ireq->flags)) ? NULL : isci_request_access_task(ireq); |
Dan Williams | f1f52e7 | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 2973 | |
Dan Williams | 5dec6f4 | 2011-05-10 02:28:49 -0700 | [diff] [blame] | 2974 | /* all unaccelerated request types (non ssp or ncq) handled with |
| 2975 | * substates |
Dan Williams | f139303 | 2011-05-10 02:28:47 -0700 | [diff] [blame] | 2976 | */ |
James Bottomley | aa9f832 | 2013-05-07 14:44:06 -0700 | [diff] [blame] | 2977 | if (!task && dev->dev_type == SAS_END_DEVICE) { |
Dan Williams | b50102d | 2011-09-30 18:52:19 -0700 | [diff] [blame] | 2978 | state = SCI_REQ_TASK_WAIT_TC_COMP; |
Dan Williams | c72086e | 2011-05-10 02:28:48 -0700 | [diff] [blame] | 2979 | } else if (task && task->task_proto == SAS_PROTOCOL_SMP) { |
Dan Williams | b50102d | 2011-09-30 18:52:19 -0700 | [diff] [blame] | 2980 | state = SCI_REQ_SMP_WAIT_RESP; |
Dan Williams | 5dec6f4 | 2011-05-10 02:28:49 -0700 | [diff] [blame] | 2981 | } else if (task && sas_protocol_ata(task->task_proto) && |
| 2982 | !task->ata_task.use_ncq) { |
Hannes Reinecke | 1cbd772 | 2014-11-05 13:08:20 +0100 | [diff] [blame] | 2983 | if (dev->sata_dev.class == ATA_DEV_ATAPI && |
Dan Williams | b50102d | 2011-09-30 18:52:19 -0700 | [diff] [blame] | 2984 | task->ata_task.fis.command == ATA_CMD_PACKET) { |
| 2985 | state = SCI_REQ_ATAPI_WAIT_H2D; |
| 2986 | } else if (task->data_dir == DMA_NONE) { |
Edmund Nadolski | e301370 | 2011-06-02 00:10:43 +0000 | [diff] [blame] | 2987 | state = SCI_REQ_STP_NON_DATA_WAIT_H2D; |
Dan Williams | b50102d | 2011-09-30 18:52:19 -0700 | [diff] [blame] | 2988 | } else if (task->ata_task.dma_xfer) { |
Edmund Nadolski | e301370 | 2011-06-02 00:10:43 +0000 | [diff] [blame] | 2989 | state = SCI_REQ_STP_UDMA_WAIT_TC_COMP; |
Dan Williams | b50102d | 2011-09-30 18:52:19 -0700 | [diff] [blame] | 2990 | } else /* PIO */ { |
Edmund Nadolski | e301370 | 2011-06-02 00:10:43 +0000 | [diff] [blame] | 2991 | state = SCI_REQ_STP_PIO_WAIT_H2D; |
Dan Williams | b50102d | 2011-09-30 18:52:19 -0700 | [diff] [blame] | 2992 | } |
| 2993 | } else { |
| 2994 | /* SSP or NCQ are fully accelerated, no substates */ |
| 2995 | return; |
Dan Williams | c72086e | 2011-05-10 02:28:48 -0700 | [diff] [blame] | 2996 | } |
Dan Williams | b50102d | 2011-09-30 18:52:19 -0700 | [diff] [blame] | 2997 | sci_change_state(sm, state); |
Dan Williams | f1f52e7 | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 2998 | } |
| 2999 | |
Dan Williams | 89a7301 | 2011-06-30 19:14:33 -0700 | [diff] [blame] | 3000 | static void sci_request_completed_state_enter(struct sci_base_state_machine *sm) |
Dan Williams | f1f52e7 | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 3001 | { |
Dan Williams | 5076a1a | 2011-06-27 14:57:03 -0700 | [diff] [blame] | 3002 | struct isci_request *ireq = container_of(sm, typeof(*ireq), sm); |
Dan Williams | d9dcb4b | 2011-06-30 17:38:32 -0700 | [diff] [blame] | 3003 | struct isci_host *ihost = ireq->owning_controller; |
Dan Williams | f1f52e7 | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 3004 | |
Dan Williams | f1f52e7 | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 3005 | /* Tell the SCI_USER that the IO request is complete */ |
Dan Williams | 38d8879 | 2011-06-23 14:33:48 -0700 | [diff] [blame] | 3006 | if (!test_bit(IREQ_TMF, &ireq->flags)) |
Dan Williams | f1f52e7 | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 3007 | isci_request_io_request_complete(ihost, ireq, |
Dan Williams | 5076a1a | 2011-06-27 14:57:03 -0700 | [diff] [blame] | 3008 | ireq->sci_status); |
Dan Williams | f1f52e7 | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 3009 | else |
Dan Williams | 5076a1a | 2011-06-27 14:57:03 -0700 | [diff] [blame] | 3010 | isci_task_request_complete(ihost, ireq, ireq->sci_status); |
Dan Williams | f1f52e7 | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 3011 | } |
| 3012 | |
Dan Williams | 89a7301 | 2011-06-30 19:14:33 -0700 | [diff] [blame] | 3013 | static void sci_request_aborting_state_enter(struct sci_base_state_machine *sm) |
Dan Williams | f1f52e7 | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 3014 | { |
Dan Williams | 5076a1a | 2011-06-27 14:57:03 -0700 | [diff] [blame] | 3015 | struct isci_request *ireq = container_of(sm, typeof(*ireq), sm); |
Dan Williams | f1f52e7 | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 3016 | |
| 3017 | /* Setting the abort bit in the Task Context is required by the silicon. */ |
Dan Williams | 5076a1a | 2011-06-27 14:57:03 -0700 | [diff] [blame] | 3018 | ireq->tc->abort = 1; |
Dan Williams | c72086e | 2011-05-10 02:28:48 -0700 | [diff] [blame] | 3019 | } |
| 3020 | |
Dan Williams | 89a7301 | 2011-06-30 19:14:33 -0700 | [diff] [blame] | 3021 | static void sci_stp_request_started_non_data_await_h2d_completion_enter(struct sci_base_state_machine *sm) |
Dan Williams | 5dec6f4 | 2011-05-10 02:28:49 -0700 | [diff] [blame] | 3022 | { |
Dan Williams | 5076a1a | 2011-06-27 14:57:03 -0700 | [diff] [blame] | 3023 | struct isci_request *ireq = container_of(sm, typeof(*ireq), sm); |
Dan Williams | 5dec6f4 | 2011-05-10 02:28:49 -0700 | [diff] [blame] | 3024 | |
Dan Williams | 34a9915 | 2011-07-01 02:25:15 -0700 | [diff] [blame] | 3025 | ireq->target_device->working_request = ireq; |
Dan Williams | 5dec6f4 | 2011-05-10 02:28:49 -0700 | [diff] [blame] | 3026 | } |
| 3027 | |
Dan Williams | 89a7301 | 2011-06-30 19:14:33 -0700 | [diff] [blame] | 3028 | static void sci_stp_request_started_pio_await_h2d_completion_enter(struct sci_base_state_machine *sm) |
Dan Williams | 5dec6f4 | 2011-05-10 02:28:49 -0700 | [diff] [blame] | 3029 | { |
Dan Williams | 5076a1a | 2011-06-27 14:57:03 -0700 | [diff] [blame] | 3030 | struct isci_request *ireq = container_of(sm, typeof(*ireq), sm); |
Dan Williams | 5dec6f4 | 2011-05-10 02:28:49 -0700 | [diff] [blame] | 3031 | |
Dan Williams | 34a9915 | 2011-07-01 02:25:15 -0700 | [diff] [blame] | 3032 | ireq->target_device->working_request = ireq; |
Dan Williams | 5dec6f4 | 2011-05-10 02:28:49 -0700 | [diff] [blame] | 3033 | } |
| 3034 | |
Dan Williams | 89a7301 | 2011-06-30 19:14:33 -0700 | [diff] [blame] | 3035 | static const struct sci_base_state sci_request_state_table[] = { |
Edmund Nadolski | e301370 | 2011-06-02 00:10:43 +0000 | [diff] [blame] | 3036 | [SCI_REQ_INIT] = { }, |
| 3037 | [SCI_REQ_CONSTRUCTED] = { }, |
| 3038 | [SCI_REQ_STARTED] = { |
Dan Williams | 89a7301 | 2011-06-30 19:14:33 -0700 | [diff] [blame] | 3039 | .enter_state = sci_request_started_state_enter, |
Dan Williams | 5dec6f4 | 2011-05-10 02:28:49 -0700 | [diff] [blame] | 3040 | }, |
Edmund Nadolski | e301370 | 2011-06-02 00:10:43 +0000 | [diff] [blame] | 3041 | [SCI_REQ_STP_NON_DATA_WAIT_H2D] = { |
Dan Williams | 89a7301 | 2011-06-30 19:14:33 -0700 | [diff] [blame] | 3042 | .enter_state = sci_stp_request_started_non_data_await_h2d_completion_enter, |
Dan Williams | 5dec6f4 | 2011-05-10 02:28:49 -0700 | [diff] [blame] | 3043 | }, |
Edmund Nadolski | e301370 | 2011-06-02 00:10:43 +0000 | [diff] [blame] | 3044 | [SCI_REQ_STP_NON_DATA_WAIT_D2H] = { }, |
| 3045 | [SCI_REQ_STP_PIO_WAIT_H2D] = { |
Dan Williams | 89a7301 | 2011-06-30 19:14:33 -0700 | [diff] [blame] | 3046 | .enter_state = sci_stp_request_started_pio_await_h2d_completion_enter, |
Dan Williams | 5dec6f4 | 2011-05-10 02:28:49 -0700 | [diff] [blame] | 3047 | }, |
Edmund Nadolski | e301370 | 2011-06-02 00:10:43 +0000 | [diff] [blame] | 3048 | [SCI_REQ_STP_PIO_WAIT_FRAME] = { }, |
| 3049 | [SCI_REQ_STP_PIO_DATA_IN] = { }, |
| 3050 | [SCI_REQ_STP_PIO_DATA_OUT] = { }, |
| 3051 | [SCI_REQ_STP_UDMA_WAIT_TC_COMP] = { }, |
| 3052 | [SCI_REQ_STP_UDMA_WAIT_D2H] = { }, |
Edmund Nadolski | e301370 | 2011-06-02 00:10:43 +0000 | [diff] [blame] | 3053 | [SCI_REQ_TASK_WAIT_TC_COMP] = { }, |
| 3054 | [SCI_REQ_TASK_WAIT_TC_RESP] = { }, |
| 3055 | [SCI_REQ_SMP_WAIT_RESP] = { }, |
| 3056 | [SCI_REQ_SMP_WAIT_TC_COMP] = { }, |
Dan Williams | b50102d | 2011-09-30 18:52:19 -0700 | [diff] [blame] | 3057 | [SCI_REQ_ATAPI_WAIT_H2D] = { }, |
| 3058 | [SCI_REQ_ATAPI_WAIT_PIO_SETUP] = { }, |
| 3059 | [SCI_REQ_ATAPI_WAIT_D2H] = { }, |
| 3060 | [SCI_REQ_ATAPI_WAIT_TC_COMP] = { }, |
Edmund Nadolski | e301370 | 2011-06-02 00:10:43 +0000 | [diff] [blame] | 3061 | [SCI_REQ_COMPLETED] = { |
Dan Williams | 89a7301 | 2011-06-30 19:14:33 -0700 | [diff] [blame] | 3062 | .enter_state = sci_request_completed_state_enter, |
Dan Williams | f1f52e7 | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 3063 | }, |
Edmund Nadolski | e301370 | 2011-06-02 00:10:43 +0000 | [diff] [blame] | 3064 | [SCI_REQ_ABORTING] = { |
Dan Williams | 89a7301 | 2011-06-30 19:14:33 -0700 | [diff] [blame] | 3065 | .enter_state = sci_request_aborting_state_enter, |
Dan Williams | f1f52e7 | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 3066 | }, |
Edmund Nadolski | e301370 | 2011-06-02 00:10:43 +0000 | [diff] [blame] | 3067 | [SCI_REQ_FINAL] = { }, |
Dan Williams | f1f52e7 | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 3068 | }; |
| 3069 | |
Edmund Nadolski | e301370 | 2011-06-02 00:10:43 +0000 | [diff] [blame] | 3070 | static void |
Dan Williams | 89a7301 | 2011-06-30 19:14:33 -0700 | [diff] [blame] | 3071 | sci_general_request_construct(struct isci_host *ihost, |
Dan Williams | 78a6f06 | 2011-06-30 16:31:37 -0700 | [diff] [blame] | 3072 | struct isci_remote_device *idev, |
Dan Williams | 5076a1a | 2011-06-27 14:57:03 -0700 | [diff] [blame] | 3073 | struct isci_request *ireq) |
Dan Williams | f1f52e7 | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 3074 | { |
Dan Williams | 89a7301 | 2011-06-30 19:14:33 -0700 | [diff] [blame] | 3075 | sci_init_sm(&ireq->sm, sci_request_state_table, SCI_REQ_INIT); |
Dan Williams | f1f52e7 | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 3076 | |
Dan Williams | 78a6f06 | 2011-06-30 16:31:37 -0700 | [diff] [blame] | 3077 | ireq->target_device = idev; |
Dan Williams | c79dd80 | 2012-02-01 00:44:14 -0800 | [diff] [blame] | 3078 | ireq->protocol = SAS_PROTOCOL_NONE; |
Dan Williams | 5076a1a | 2011-06-27 14:57:03 -0700 | [diff] [blame] | 3079 | ireq->saved_rx_frame_index = SCU_INVALID_FRAME_INDEX; |
Dan Williams | f1f52e7 | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 3080 | |
Dan Williams | 5076a1a | 2011-06-27 14:57:03 -0700 | [diff] [blame] | 3081 | ireq->sci_status = SCI_SUCCESS; |
| 3082 | ireq->scu_status = 0; |
| 3083 | ireq->post_context = 0xFFFFFFFF; |
Dan Williams | f1f52e7 | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 3084 | } |
| 3085 | |
| 3086 | static enum sci_status |
Dan Williams | 89a7301 | 2011-06-30 19:14:33 -0700 | [diff] [blame] | 3087 | sci_io_request_construct(struct isci_host *ihost, |
Dan Williams | 78a6f06 | 2011-06-30 16:31:37 -0700 | [diff] [blame] | 3088 | struct isci_remote_device *idev, |
Dan Williams | 5076a1a | 2011-06-27 14:57:03 -0700 | [diff] [blame] | 3089 | struct isci_request *ireq) |
Dan Williams | f1f52e7 | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 3090 | { |
Dan Williams | 78a6f06 | 2011-06-30 16:31:37 -0700 | [diff] [blame] | 3091 | struct domain_device *dev = idev->domain_dev; |
Dan Williams | f1f52e7 | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 3092 | enum sci_status status = SCI_SUCCESS; |
| 3093 | |
| 3094 | /* Build the common part of the request */ |
Dan Williams | 89a7301 | 2011-06-30 19:14:33 -0700 | [diff] [blame] | 3095 | sci_general_request_construct(ihost, idev, ireq); |
Dan Williams | f1f52e7 | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 3096 | |
Dan Williams | 78a6f06 | 2011-06-30 16:31:37 -0700 | [diff] [blame] | 3097 | if (idev->rnc.remote_node_index == SCIC_SDS_REMOTE_NODE_CONTEXT_INVALID_INDEX) |
Dan Williams | f1f52e7 | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 3098 | return SCI_FAILURE_INVALID_REMOTE_DEVICE; |
| 3099 | |
James Bottomley | aa9f832 | 2013-05-07 14:44:06 -0700 | [diff] [blame] | 3100 | if (dev->dev_type == SAS_END_DEVICE) |
Dan Williams | c72086e | 2011-05-10 02:28:48 -0700 | [diff] [blame] | 3101 | /* pass */; |
Dan Williams | 11cc518 | 2012-02-01 00:23:10 -0800 | [diff] [blame] | 3102 | else if (dev_is_sata(dev)) |
Dan Williams | 5076a1a | 2011-06-27 14:57:03 -0700 | [diff] [blame] | 3103 | memset(&ireq->stp.cmd, 0, sizeof(ireq->stp.cmd)); |
Dan Williams | c72086e | 2011-05-10 02:28:48 -0700 | [diff] [blame] | 3104 | else if (dev_is_expander(dev)) |
Dan Williams | e9bf709 | 2011-06-16 16:59:56 -0700 | [diff] [blame] | 3105 | /* pass */; |
Dan Williams | c72086e | 2011-05-10 02:28:48 -0700 | [diff] [blame] | 3106 | else |
| 3107 | return SCI_FAILURE_UNSUPPORTED_PROTOCOL; |
Dan Williams | f1f52e7 | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 3108 | |
Dan Williams | 5076a1a | 2011-06-27 14:57:03 -0700 | [diff] [blame] | 3109 | memset(ireq->tc, 0, offsetof(struct scu_task_context, sgl_pair_ab)); |
Dan Williams | f1f52e7 | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 3110 | |
| 3111 | return status; |
| 3112 | } |
| 3113 | |
Dan Williams | 89a7301 | 2011-06-30 19:14:33 -0700 | [diff] [blame] | 3114 | enum sci_status sci_task_request_construct(struct isci_host *ihost, |
Dan Williams | 78a6f06 | 2011-06-30 16:31:37 -0700 | [diff] [blame] | 3115 | struct isci_remote_device *idev, |
Dan Williams | 5076a1a | 2011-06-27 14:57:03 -0700 | [diff] [blame] | 3116 | u16 io_tag, struct isci_request *ireq) |
Dan Williams | f1f52e7 | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 3117 | { |
Dan Williams | 78a6f06 | 2011-06-30 16:31:37 -0700 | [diff] [blame] | 3118 | struct domain_device *dev = idev->domain_dev; |
Dan Williams | f1f52e7 | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 3119 | enum sci_status status = SCI_SUCCESS; |
| 3120 | |
| 3121 | /* Build the common part of the request */ |
Dan Williams | 89a7301 | 2011-06-30 19:14:33 -0700 | [diff] [blame] | 3122 | sci_general_request_construct(ihost, idev, ireq); |
Dan Williams | f1f52e7 | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 3123 | |
James Bottomley | aa9f832 | 2013-05-07 14:44:06 -0700 | [diff] [blame] | 3124 | if (dev->dev_type == SAS_END_DEVICE || dev_is_sata(dev)) { |
Dan Williams | 5076a1a | 2011-06-27 14:57:03 -0700 | [diff] [blame] | 3125 | set_bit(IREQ_TMF, &ireq->flags); |
| 3126 | memset(ireq->tc, 0, sizeof(struct scu_task_context)); |
Jeff Skirvin | 28de92b | 2012-03-08 22:42:06 -0800 | [diff] [blame] | 3127 | |
| 3128 | /* Set the protocol indicator. */ |
| 3129 | if (dev_is_sata(dev)) |
| 3130 | ireq->protocol = SAS_PROTOCOL_STP; |
| 3131 | else |
| 3132 | ireq->protocol = SAS_PROTOCOL_SSP; |
Dan Williams | c72086e | 2011-05-10 02:28:48 -0700 | [diff] [blame] | 3133 | } else |
| 3134 | status = SCI_FAILURE_UNSUPPORTED_PROTOCOL; |
Dan Williams | f1f52e7 | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 3135 | |
| 3136 | return status; |
| 3137 | } |
| 3138 | |
| 3139 | static enum sci_status isci_request_ssp_request_construct( |
| 3140 | struct isci_request *request) |
| 3141 | { |
| 3142 | enum sci_status status; |
| 3143 | |
| 3144 | dev_dbg(&request->isci_host->pdev->dev, |
| 3145 | "%s: request = %p\n", |
| 3146 | __func__, |
| 3147 | request); |
Dan Williams | 89a7301 | 2011-06-30 19:14:33 -0700 | [diff] [blame] | 3148 | status = sci_io_request_construct_basic_ssp(request); |
Dan Williams | f1f52e7 | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 3149 | return status; |
| 3150 | } |
| 3151 | |
Dan Williams | 16ba770 | 2011-07-01 10:52:55 -0700 | [diff] [blame] | 3152 | static enum sci_status isci_request_stp_request_construct(struct isci_request *ireq) |
Dan Williams | f1f52e7 | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 3153 | { |
Dan Williams | 16ba770 | 2011-07-01 10:52:55 -0700 | [diff] [blame] | 3154 | struct sas_task *task = isci_request_access_task(ireq); |
| 3155 | struct host_to_dev_fis *fis = &ireq->stp.cmd; |
| 3156 | struct ata_queued_cmd *qc = task->uldd_task; |
Dan Williams | f1f52e7 | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 3157 | enum sci_status status; |
Dan Williams | f1f52e7 | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 3158 | |
Dan Williams | 16ba770 | 2011-07-01 10:52:55 -0700 | [diff] [blame] | 3159 | dev_dbg(&ireq->isci_host->pdev->dev, |
| 3160 | "%s: ireq = %p\n", |
Dan Williams | f1f52e7 | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 3161 | __func__, |
Dan Williams | 16ba770 | 2011-07-01 10:52:55 -0700 | [diff] [blame] | 3162 | ireq); |
Dan Williams | f1f52e7 | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 3163 | |
Dan Williams | 16ba770 | 2011-07-01 10:52:55 -0700 | [diff] [blame] | 3164 | memcpy(fis, &task->ata_task.fis, sizeof(struct host_to_dev_fis)); |
| 3165 | if (!task->ata_task.device_control_reg_update) |
| 3166 | fis->flags |= 0x80; |
| 3167 | fis->flags &= 0xF0; |
Dan Williams | f1f52e7 | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 3168 | |
Dan Williams | 16ba770 | 2011-07-01 10:52:55 -0700 | [diff] [blame] | 3169 | status = sci_io_request_construct_basic_sata(ireq); |
Dan Williams | f1f52e7 | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 3170 | |
Dan Williams | 16ba770 | 2011-07-01 10:52:55 -0700 | [diff] [blame] | 3171 | if (qc && (qc->tf.command == ATA_CMD_FPDMA_WRITE || |
| 3172 | qc->tf.command == ATA_CMD_FPDMA_READ)) { |
| 3173 | fis->sector_count = qc->tag << 3; |
| 3174 | ireq->tc->type.stp.ncq_tag = qc->tag; |
Dan Williams | f1f52e7 | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 3175 | } |
| 3176 | |
| 3177 | return status; |
| 3178 | } |
| 3179 | |
Dan Williams | e9bf709 | 2011-06-16 16:59:56 -0700 | [diff] [blame] | 3180 | static enum sci_status |
Dan Williams | 89a7301 | 2011-06-30 19:14:33 -0700 | [diff] [blame] | 3181 | sci_io_request_construct_smp(struct device *dev, |
Dan Williams | 5076a1a | 2011-06-27 14:57:03 -0700 | [diff] [blame] | 3182 | struct isci_request *ireq, |
Dan Williams | e9bf709 | 2011-06-16 16:59:56 -0700 | [diff] [blame] | 3183 | struct sas_task *task) |
Dan Williams | c72086e | 2011-05-10 02:28:48 -0700 | [diff] [blame] | 3184 | { |
Dan Williams | e9bf709 | 2011-06-16 16:59:56 -0700 | [diff] [blame] | 3185 | struct scatterlist *sg = &task->smp_task.smp_req; |
Dan Williams | 78a6f06 | 2011-06-30 16:31:37 -0700 | [diff] [blame] | 3186 | struct isci_remote_device *idev; |
Dan Williams | c72086e | 2011-05-10 02:28:48 -0700 | [diff] [blame] | 3187 | struct scu_task_context *task_context; |
Dan Williams | ffe191c | 2011-06-29 13:09:25 -0700 | [diff] [blame] | 3188 | struct isci_port *iport; |
Dan Williams | e9bf709 | 2011-06-16 16:59:56 -0700 | [diff] [blame] | 3189 | struct smp_req *smp_req; |
| 3190 | void *kaddr; |
| 3191 | u8 req_len; |
| 3192 | u32 cmd; |
| 3193 | |
Cong Wang | 77dfce0 | 2011-11-25 23:14:23 +0800 | [diff] [blame] | 3194 | kaddr = kmap_atomic(sg_page(sg)); |
Dan Williams | e9bf709 | 2011-06-16 16:59:56 -0700 | [diff] [blame] | 3195 | smp_req = kaddr + sg->offset; |
| 3196 | /* |
| 3197 | * Look at the SMP requests' header fields; for certain SAS 1.x SMP |
| 3198 | * functions under SAS 2.0, a zero request length really indicates |
| 3199 | * a non-zero default length. |
| 3200 | */ |
| 3201 | if (smp_req->req_len == 0) { |
| 3202 | switch (smp_req->func) { |
| 3203 | case SMP_DISCOVER: |
| 3204 | case SMP_REPORT_PHY_ERR_LOG: |
| 3205 | case SMP_REPORT_PHY_SATA: |
| 3206 | case SMP_REPORT_ROUTE_INFO: |
| 3207 | smp_req->req_len = 2; |
| 3208 | break; |
| 3209 | case SMP_CONF_ROUTE_INFO: |
| 3210 | case SMP_PHY_CONTROL: |
| 3211 | case SMP_PHY_TEST_FUNCTION: |
| 3212 | smp_req->req_len = 9; |
| 3213 | break; |
| 3214 | /* Default - zero is a valid default for 2.0. */ |
| 3215 | } |
| 3216 | } |
| 3217 | req_len = smp_req->req_len; |
| 3218 | sci_swab32_cpy(smp_req, smp_req, sg->length / sizeof(u32)); |
| 3219 | cmd = *(u32 *) smp_req; |
Cong Wang | 77dfce0 | 2011-11-25 23:14:23 +0800 | [diff] [blame] | 3220 | kunmap_atomic(kaddr); |
Dan Williams | e9bf709 | 2011-06-16 16:59:56 -0700 | [diff] [blame] | 3221 | |
| 3222 | if (!dma_map_sg(dev, sg, 1, DMA_TO_DEVICE)) |
| 3223 | return SCI_FAILURE; |
| 3224 | |
Dan Williams | c79dd80 | 2012-02-01 00:44:14 -0800 | [diff] [blame] | 3225 | ireq->protocol = SAS_PROTOCOL_SMP; |
Dan Williams | c72086e | 2011-05-10 02:28:48 -0700 | [diff] [blame] | 3226 | |
| 3227 | /* byte swap the smp request. */ |
Dan Williams | c72086e | 2011-05-10 02:28:48 -0700 | [diff] [blame] | 3228 | |
Dan Williams | 5076a1a | 2011-06-27 14:57:03 -0700 | [diff] [blame] | 3229 | task_context = ireq->tc; |
Dan Williams | c72086e | 2011-05-10 02:28:48 -0700 | [diff] [blame] | 3230 | |
Dan Williams | 34a9915 | 2011-07-01 02:25:15 -0700 | [diff] [blame] | 3231 | idev = ireq->target_device; |
| 3232 | iport = idev->owning_port; |
Dan Williams | c72086e | 2011-05-10 02:28:48 -0700 | [diff] [blame] | 3233 | |
| 3234 | /* |
| 3235 | * Fill in the TC with the its required data |
| 3236 | * 00h |
| 3237 | */ |
| 3238 | task_context->priority = 0; |
| 3239 | task_context->initiator_request = 1; |
Dan Williams | 78a6f06 | 2011-06-30 16:31:37 -0700 | [diff] [blame] | 3240 | task_context->connection_rate = idev->connection_rate; |
Dan Williams | 34a9915 | 2011-07-01 02:25:15 -0700 | [diff] [blame] | 3241 | task_context->protocol_engine_index = ISCI_PEG; |
| 3242 | task_context->logical_port_index = iport->physical_port_index; |
Dan Williams | c72086e | 2011-05-10 02:28:48 -0700 | [diff] [blame] | 3243 | task_context->protocol_type = SCU_TASK_CONTEXT_PROTOCOL_SMP; |
| 3244 | task_context->abort = 0; |
| 3245 | task_context->valid = SCU_TASK_CONTEXT_VALID; |
| 3246 | task_context->context_type = SCU_TASK_CONTEXT_TYPE; |
| 3247 | |
| 3248 | /* 04h */ |
Dan Williams | 78a6f06 | 2011-06-30 16:31:37 -0700 | [diff] [blame] | 3249 | task_context->remote_node_index = idev->rnc.remote_node_index; |
Dan Williams | c72086e | 2011-05-10 02:28:48 -0700 | [diff] [blame] | 3250 | task_context->command_code = 0; |
| 3251 | task_context->task_type = SCU_TASK_TYPE_SMP_REQUEST; |
| 3252 | |
| 3253 | /* 08h */ |
| 3254 | task_context->link_layer_control = 0; |
| 3255 | task_context->do_not_dma_ssp_good_response = 1; |
| 3256 | task_context->strict_ordering = 0; |
| 3257 | task_context->control_frame = 1; |
| 3258 | task_context->timeout_enable = 0; |
| 3259 | task_context->block_guard_enable = 0; |
| 3260 | |
| 3261 | /* 0ch */ |
| 3262 | task_context->address_modifier = 0; |
| 3263 | |
| 3264 | /* 10h */ |
Dave Jiang | 77d6738 | 2011-05-25 02:21:57 +0000 | [diff] [blame] | 3265 | task_context->ssp_command_iu_length = req_len; |
Dan Williams | c72086e | 2011-05-10 02:28:48 -0700 | [diff] [blame] | 3266 | |
| 3267 | /* 14h */ |
| 3268 | task_context->transfer_length_bytes = 0; |
| 3269 | |
| 3270 | /* |
| 3271 | * 18h ~ 30h, protocol specific |
| 3272 | * since commandIU has been build by framework at this point, we just |
| 3273 | * copy the frist DWord from command IU to this location. */ |
Dan Williams | e9bf709 | 2011-06-16 16:59:56 -0700 | [diff] [blame] | 3274 | memcpy(&task_context->type.smp, &cmd, sizeof(u32)); |
Dan Williams | c72086e | 2011-05-10 02:28:48 -0700 | [diff] [blame] | 3275 | |
| 3276 | /* |
| 3277 | * 40h |
| 3278 | * "For SMP you could program it to zero. We would prefer that way |
| 3279 | * so that done code will be consistent." - Venki |
| 3280 | */ |
| 3281 | task_context->task_phase = 0; |
| 3282 | |
Dan Williams | 5076a1a | 2011-06-27 14:57:03 -0700 | [diff] [blame] | 3283 | ireq->post_context = (SCU_CONTEXT_COMMAND_REQUEST_TYPE_POST_TC | |
Dan Williams | 34a9915 | 2011-07-01 02:25:15 -0700 | [diff] [blame] | 3284 | (ISCI_PEG << SCU_CONTEXT_COMMAND_PROTOCOL_ENGINE_GROUP_SHIFT) | |
| 3285 | (iport->physical_port_index << |
| 3286 | SCU_CONTEXT_COMMAND_LOGICAL_PORT_SHIFT) | |
| 3287 | ISCI_TAG_TCI(ireq->io_tag)); |
Dan Williams | c72086e | 2011-05-10 02:28:48 -0700 | [diff] [blame] | 3288 | /* |
| 3289 | * Copy the physical address for the command buffer to the SCU Task |
| 3290 | * Context command buffer should not contain command header. |
| 3291 | */ |
Dan Williams | e9bf709 | 2011-06-16 16:59:56 -0700 | [diff] [blame] | 3292 | task_context->command_iu_upper = upper_32_bits(sg_dma_address(sg)); |
| 3293 | task_context->command_iu_lower = lower_32_bits(sg_dma_address(sg) + sizeof(u32)); |
Dan Williams | c72086e | 2011-05-10 02:28:48 -0700 | [diff] [blame] | 3294 | |
| 3295 | /* SMP response comes as UF, so no need to set response IU address. */ |
| 3296 | task_context->response_iu_upper = 0; |
| 3297 | task_context->response_iu_lower = 0; |
Dan Williams | c72086e | 2011-05-10 02:28:48 -0700 | [diff] [blame] | 3298 | |
Dan Williams | 5076a1a | 2011-06-27 14:57:03 -0700 | [diff] [blame] | 3299 | sci_change_state(&ireq->sm, SCI_REQ_CONSTRUCTED); |
Dan Williams | c72086e | 2011-05-10 02:28:48 -0700 | [diff] [blame] | 3300 | |
| 3301 | return SCI_SUCCESS; |
| 3302 | } |
| 3303 | |
| 3304 | /* |
Dan Williams | f1f52e7 | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 3305 | * isci_smp_request_build() - This function builds the smp request. |
| 3306 | * @ireq: This parameter points to the isci_request allocated in the |
| 3307 | * request construct function. |
| 3308 | * |
| 3309 | * SCI_SUCCESS on successfull completion, or specific failure code. |
| 3310 | */ |
| 3311 | static enum sci_status isci_smp_request_build(struct isci_request *ireq) |
| 3312 | { |
Dan Williams | f1f52e7 | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 3313 | struct sas_task *task = isci_request_access_task(ireq); |
Dan Williams | e9bf709 | 2011-06-16 16:59:56 -0700 | [diff] [blame] | 3314 | struct device *dev = &ireq->isci_host->pdev->dev; |
Dan Williams | e9bf709 | 2011-06-16 16:59:56 -0700 | [diff] [blame] | 3315 | enum sci_status status = SCI_FAILURE; |
Dan Williams | f1f52e7 | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 3316 | |
Dan Williams | 89a7301 | 2011-06-30 19:14:33 -0700 | [diff] [blame] | 3317 | status = sci_io_request_construct_smp(dev, ireq, task); |
Dan Williams | f1f52e7 | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 3318 | if (status != SCI_SUCCESS) |
Dan Williams | a8a0a13 | 2011-07-01 12:07:25 -0700 | [diff] [blame] | 3319 | dev_dbg(&ireq->isci_host->pdev->dev, |
Dan Williams | f1f52e7 | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 3320 | "%s: failed with status = %d\n", |
| 3321 | __func__, |
| 3322 | status); |
| 3323 | |
| 3324 | return status; |
| 3325 | } |
| 3326 | |
| 3327 | /** |
| 3328 | * isci_io_request_build() - This function builds the io request object. |
Dan Williams | d9dcb4b | 2011-06-30 17:38:32 -0700 | [diff] [blame] | 3329 | * @ihost: This parameter specifies the ISCI host object |
Dan Williams | f1f52e7 | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 3330 | * @request: This parameter points to the isci_request object allocated in the |
| 3331 | * request construct function. |
| 3332 | * @sci_device: This parameter is the handle for the sci core's remote device |
| 3333 | * object that is the destination for this request. |
| 3334 | * |
| 3335 | * SCI_SUCCESS on successfull completion, or specific failure code. |
| 3336 | */ |
Dan Williams | d9dcb4b | 2011-06-30 17:38:32 -0700 | [diff] [blame] | 3337 | static enum sci_status isci_io_request_build(struct isci_host *ihost, |
Dan Williams | 312e0c2 | 2011-06-28 13:47:09 -0700 | [diff] [blame] | 3338 | struct isci_request *request, |
Dan Williams | 78a6f06 | 2011-06-30 16:31:37 -0700 | [diff] [blame] | 3339 | struct isci_remote_device *idev) |
Dan Williams | f1f52e7 | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 3340 | { |
| 3341 | enum sci_status status = SCI_SUCCESS; |
| 3342 | struct sas_task *task = isci_request_access_task(request); |
Dan Williams | f1f52e7 | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 3343 | |
Dan Williams | d9dcb4b | 2011-06-30 17:38:32 -0700 | [diff] [blame] | 3344 | dev_dbg(&ihost->pdev->dev, |
Dan Williams | 78a6f06 | 2011-06-30 16:31:37 -0700 | [diff] [blame] | 3345 | "%s: idev = 0x%p; request = %p, " |
Dan Williams | f1f52e7 | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 3346 | "num_scatter = %d\n", |
| 3347 | __func__, |
Dan Williams | 78a6f06 | 2011-06-30 16:31:37 -0700 | [diff] [blame] | 3348 | idev, |
Dan Williams | f1f52e7 | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 3349 | request, |
| 3350 | task->num_scatter); |
| 3351 | |
| 3352 | /* map the sgl addresses, if present. |
| 3353 | * libata does the mapping for sata devices |
| 3354 | * before we get the request. |
| 3355 | */ |
| 3356 | if (task->num_scatter && |
| 3357 | !sas_protocol_ata(task->task_proto) && |
| 3358 | !(SAS_PROTOCOL_SMP & task->task_proto)) { |
| 3359 | |
| 3360 | request->num_sg_entries = dma_map_sg( |
Dan Williams | d9dcb4b | 2011-06-30 17:38:32 -0700 | [diff] [blame] | 3361 | &ihost->pdev->dev, |
Dan Williams | f1f52e7 | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 3362 | task->scatter, |
| 3363 | task->num_scatter, |
| 3364 | task->data_dir |
| 3365 | ); |
| 3366 | |
| 3367 | if (request->num_sg_entries == 0) |
| 3368 | return SCI_FAILURE_INSUFFICIENT_RESOURCES; |
| 3369 | } |
| 3370 | |
Dan Williams | 89a7301 | 2011-06-30 19:14:33 -0700 | [diff] [blame] | 3371 | status = sci_io_request_construct(ihost, idev, request); |
Dan Williams | f1f52e7 | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 3372 | |
| 3373 | if (status != SCI_SUCCESS) { |
Dan Williams | a8a0a13 | 2011-07-01 12:07:25 -0700 | [diff] [blame] | 3374 | dev_dbg(&ihost->pdev->dev, |
Dan Williams | f1f52e7 | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 3375 | "%s: failed request construct\n", |
| 3376 | __func__); |
| 3377 | return SCI_FAILURE; |
| 3378 | } |
| 3379 | |
| 3380 | switch (task->task_proto) { |
| 3381 | case SAS_PROTOCOL_SMP: |
| 3382 | status = isci_smp_request_build(request); |
| 3383 | break; |
| 3384 | case SAS_PROTOCOL_SSP: |
| 3385 | status = isci_request_ssp_request_construct(request); |
| 3386 | break; |
| 3387 | case SAS_PROTOCOL_SATA: |
| 3388 | case SAS_PROTOCOL_STP: |
| 3389 | case SAS_PROTOCOL_SATA | SAS_PROTOCOL_STP: |
| 3390 | status = isci_request_stp_request_construct(request); |
| 3391 | break; |
| 3392 | default: |
Dan Williams | a8a0a13 | 2011-07-01 12:07:25 -0700 | [diff] [blame] | 3393 | dev_dbg(&ihost->pdev->dev, |
Dan Williams | f1f52e7 | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 3394 | "%s: unknown protocol\n", __func__); |
| 3395 | return SCI_FAILURE; |
| 3396 | } |
| 3397 | |
| 3398 | return SCI_SUCCESS; |
| 3399 | } |
| 3400 | |
Dan Williams | db05625 | 2011-06-17 14:18:39 -0700 | [diff] [blame] | 3401 | static struct isci_request *isci_request_from_tag(struct isci_host *ihost, u16 tag) |
Dan Williams | f1f52e7 | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 3402 | { |
Dan Williams | 0d0cf14 | 2011-06-13 00:51:30 -0700 | [diff] [blame] | 3403 | struct isci_request *ireq; |
Dan Williams | f1f52e7 | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 3404 | |
Dan Williams | db05625 | 2011-06-17 14:18:39 -0700 | [diff] [blame] | 3405 | ireq = ihost->reqs[ISCI_TAG_TCI(tag)]; |
Dan Williams | 5076a1a | 2011-06-27 14:57:03 -0700 | [diff] [blame] | 3406 | ireq->io_tag = tag; |
Dan Williams | 0d0cf14 | 2011-06-13 00:51:30 -0700 | [diff] [blame] | 3407 | ireq->io_request_completion = NULL; |
Dan Williams | 38d8879 | 2011-06-23 14:33:48 -0700 | [diff] [blame] | 3408 | ireq->flags = 0; |
Dan Williams | 0d0cf14 | 2011-06-13 00:51:30 -0700 | [diff] [blame] | 3409 | ireq->num_sg_entries = 0; |
Dan Williams | f1f52e7 | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 3410 | |
Dan Williams | 0d0cf14 | 2011-06-13 00:51:30 -0700 | [diff] [blame] | 3411 | return ireq; |
Dan Williams | f1f52e7 | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 3412 | } |
| 3413 | |
Dan Williams | db05625 | 2011-06-17 14:18:39 -0700 | [diff] [blame] | 3414 | static struct isci_request *isci_io_request_from_tag(struct isci_host *ihost, |
| 3415 | struct sas_task *task, |
| 3416 | u16 tag) |
Dan Williams | f1f52e7 | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 3417 | { |
Dan Williams | 0d0cf14 | 2011-06-13 00:51:30 -0700 | [diff] [blame] | 3418 | struct isci_request *ireq; |
Dan Williams | f1f52e7 | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 3419 | |
Dan Williams | db05625 | 2011-06-17 14:18:39 -0700 | [diff] [blame] | 3420 | ireq = isci_request_from_tag(ihost, tag); |
| 3421 | ireq->ttype_ptr.io_task_ptr = task; |
Jeff Skirvin | 3b34c16 | 2011-10-27 15:05:22 -0700 | [diff] [blame] | 3422 | clear_bit(IREQ_TMF, &ireq->flags); |
Dan Williams | db05625 | 2011-06-17 14:18:39 -0700 | [diff] [blame] | 3423 | task->lldd_task = ireq; |
| 3424 | |
Dan Williams | 0d0cf14 | 2011-06-13 00:51:30 -0700 | [diff] [blame] | 3425 | return ireq; |
Dan Williams | f1f52e7 | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 3426 | } |
| 3427 | |
Dan Williams | db05625 | 2011-06-17 14:18:39 -0700 | [diff] [blame] | 3428 | struct isci_request *isci_tmf_request_from_tag(struct isci_host *ihost, |
| 3429 | struct isci_tmf *isci_tmf, |
| 3430 | u16 tag) |
Dan Williams | f1f52e7 | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 3431 | { |
Dan Williams | 0d0cf14 | 2011-06-13 00:51:30 -0700 | [diff] [blame] | 3432 | struct isci_request *ireq; |
Dan Williams | f1f52e7 | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 3433 | |
Dan Williams | db05625 | 2011-06-17 14:18:39 -0700 | [diff] [blame] | 3434 | ireq = isci_request_from_tag(ihost, tag); |
| 3435 | ireq->ttype_ptr.tmf_task_ptr = isci_tmf; |
Jeff Skirvin | 3b34c16 | 2011-10-27 15:05:22 -0700 | [diff] [blame] | 3436 | set_bit(IREQ_TMF, &ireq->flags); |
Dan Williams | db05625 | 2011-06-17 14:18:39 -0700 | [diff] [blame] | 3437 | |
Dan Williams | 0d0cf14 | 2011-06-13 00:51:30 -0700 | [diff] [blame] | 3438 | return ireq; |
Dan Williams | f1f52e7 | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 3439 | } |
| 3440 | |
Dan Williams | 209fae1 | 2011-06-13 17:39:44 -0700 | [diff] [blame] | 3441 | int isci_request_execute(struct isci_host *ihost, struct isci_remote_device *idev, |
Dan Williams | db05625 | 2011-06-17 14:18:39 -0700 | [diff] [blame] | 3442 | struct sas_task *task, u16 tag) |
Dan Williams | f1f52e7 | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 3443 | { |
Dan Williams | f1f52e7 | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 3444 | enum sci_status status = SCI_FAILURE_UNSUPPORTED_PROTOCOL; |
Dan Williams | 0d0cf14 | 2011-06-13 00:51:30 -0700 | [diff] [blame] | 3445 | struct isci_request *ireq; |
Dan Williams | f1f52e7 | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 3446 | unsigned long flags; |
Dan Williams | 0d0cf14 | 2011-06-13 00:51:30 -0700 | [diff] [blame] | 3447 | int ret = 0; |
Dan Williams | f1f52e7 | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 3448 | |
Dan Williams | f1f52e7 | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 3449 | /* do common allocation and init of request object. */ |
Dan Williams | db05625 | 2011-06-17 14:18:39 -0700 | [diff] [blame] | 3450 | ireq = isci_io_request_from_tag(ihost, task, tag); |
Dan Williams | f1f52e7 | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 3451 | |
Dan Williams | db05625 | 2011-06-17 14:18:39 -0700 | [diff] [blame] | 3452 | status = isci_io_request_build(ihost, ireq, idev); |
Dan Williams | f1f52e7 | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 3453 | if (status != SCI_SUCCESS) { |
Dan Williams | a8a0a13 | 2011-07-01 12:07:25 -0700 | [diff] [blame] | 3454 | dev_dbg(&ihost->pdev->dev, |
Dan Williams | f1f52e7 | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 3455 | "%s: request_construct failed - status = 0x%x\n", |
| 3456 | __func__, |
| 3457 | status); |
Dan Williams | db05625 | 2011-06-17 14:18:39 -0700 | [diff] [blame] | 3458 | return status; |
Dan Williams | f1f52e7 | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 3459 | } |
| 3460 | |
Dan Williams | 0d0cf14 | 2011-06-13 00:51:30 -0700 | [diff] [blame] | 3461 | spin_lock_irqsave(&ihost->scic_lock, flags); |
Dan Williams | f1f52e7 | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 3462 | |
Jeff Skirvin | 9274f45 | 2011-06-23 17:09:02 -0700 | [diff] [blame] | 3463 | if (test_bit(IDEV_IO_NCQERROR, &idev->flags)) { |
| 3464 | |
| 3465 | if (isci_task_is_ncq_recovery(task)) { |
| 3466 | |
| 3467 | /* The device is in an NCQ recovery state. Issue the |
| 3468 | * request on the task side. Note that it will |
| 3469 | * complete on the I/O request side because the |
| 3470 | * request was built that way (ie. |
| 3471 | * ireq->is_task_management_request is false). |
| 3472 | */ |
Dan Williams | 89a7301 | 2011-06-30 19:14:33 -0700 | [diff] [blame] | 3473 | status = sci_controller_start_task(ihost, |
Dan Williams | 78a6f06 | 2011-06-30 16:31:37 -0700 | [diff] [blame] | 3474 | idev, |
Dan Williams | 5076a1a | 2011-06-27 14:57:03 -0700 | [diff] [blame] | 3475 | ireq); |
Jeff Skirvin | 9274f45 | 2011-06-23 17:09:02 -0700 | [diff] [blame] | 3476 | } else { |
| 3477 | status = SCI_FAILURE; |
| 3478 | } |
| 3479 | } else { |
Jeff Skirvin | 9274f45 | 2011-06-23 17:09:02 -0700 | [diff] [blame] | 3480 | /* send the request, let the core assign the IO TAG. */ |
Dan Williams | 89a7301 | 2011-06-30 19:14:33 -0700 | [diff] [blame] | 3481 | status = sci_controller_start_io(ihost, idev, |
Dan Williams | 5076a1a | 2011-06-27 14:57:03 -0700 | [diff] [blame] | 3482 | ireq); |
Jeff Skirvin | 9274f45 | 2011-06-23 17:09:02 -0700 | [diff] [blame] | 3483 | } |
Dan Williams | 312e0c2 | 2011-06-28 13:47:09 -0700 | [diff] [blame] | 3484 | |
Dan Williams | f1f52e7 | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 3485 | if (status != SCI_SUCCESS && |
| 3486 | status != SCI_FAILURE_REMOTE_DEVICE_RESET_REQUIRED) { |
Dan Williams | a8a0a13 | 2011-07-01 12:07:25 -0700 | [diff] [blame] | 3487 | dev_dbg(&ihost->pdev->dev, |
Dan Williams | f1f52e7 | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 3488 | "%s: failed request start (0x%x)\n", |
| 3489 | __func__, status); |
Dan Williams | 0d0cf14 | 2011-06-13 00:51:30 -0700 | [diff] [blame] | 3490 | spin_unlock_irqrestore(&ihost->scic_lock, flags); |
Dan Williams | db05625 | 2011-06-17 14:18:39 -0700 | [diff] [blame] | 3491 | return status; |
Dan Williams | f1f52e7 | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 3492 | } |
Dan Williams | f1f52e7 | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 3493 | /* Either I/O started OK, or the core has signaled that |
| 3494 | * the device needs a target reset. |
Dan Williams | f1f52e7 | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 3495 | */ |
Jeff Skirvin | 14aaa9f | 2012-03-08 22:41:54 -0800 | [diff] [blame] | 3496 | if (status != SCI_SUCCESS) { |
Dan Williams | f1f52e7 | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 3497 | /* The request did not really start in the |
| 3498 | * hardware, so clear the request handle |
| 3499 | * here so no terminations will be done. |
| 3500 | */ |
Dan Williams | 38d8879 | 2011-06-23 14:33:48 -0700 | [diff] [blame] | 3501 | set_bit(IREQ_TERMINATED, &ireq->flags); |
Dan Williams | f1f52e7 | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 3502 | } |
Dan Williams | 0d0cf14 | 2011-06-13 00:51:30 -0700 | [diff] [blame] | 3503 | spin_unlock_irqrestore(&ihost->scic_lock, flags); |
Dan Williams | f1f52e7 | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 3504 | |
| 3505 | if (status == |
| 3506 | SCI_FAILURE_REMOTE_DEVICE_RESET_REQUIRED) { |
| 3507 | /* Signal libsas that we need the SCSI error |
Dan Williams | 312e0c2 | 2011-06-28 13:47:09 -0700 | [diff] [blame] | 3508 | * handler thread to work on this I/O and that |
| 3509 | * we want a device reset. |
| 3510 | */ |
Dan Williams | f1f52e7 | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 3511 | spin_lock_irqsave(&task->task_state_lock, flags); |
| 3512 | task->task_state_flags |= SAS_TASK_NEED_DEV_RESET; |
| 3513 | spin_unlock_irqrestore(&task->task_state_lock, flags); |
| 3514 | |
| 3515 | /* Cause this task to be scheduled in the SCSI error |
Dan Williams | 312e0c2 | 2011-06-28 13:47:09 -0700 | [diff] [blame] | 3516 | * handler thread. |
| 3517 | */ |
Dan Williams | 312d3e5 | 2011-11-17 17:59:50 -0800 | [diff] [blame] | 3518 | sas_task_abort(task); |
Dan Williams | f1f52e7 | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 3519 | |
| 3520 | /* Change the status, since we are holding |
Dan Williams | 312e0c2 | 2011-06-28 13:47:09 -0700 | [diff] [blame] | 3521 | * the I/O until it is managed by the SCSI |
| 3522 | * error handler. |
| 3523 | */ |
Dan Williams | f1f52e7 | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 3524 | status = SCI_SUCCESS; |
| 3525 | } |
| 3526 | |
Dan Williams | f1f52e7 | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 3527 | return ret; |
| 3528 | } |