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gerrit-public.fairphone.software / kernel / msm-4.19 / 5c73cc4b6c83e88863a5de869cc5df3b913aef4a / . / arch / arm / mach-omap2 / prm33xx.h
blob: 98ac41f271da3460378a11a44468504f11ed0f32 [file] [log] [blame]
Vaibhav Hiremathddd04b92012-06-18 00:47:26 -0600[diff] [blame]1/*
2 * AM33XX PRM instance offset macros
3 *
4 * Copyright (C) 2011-2012 Texas Instruments Incorporated - http://www.ti.com/
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License as
8 * published by the Free Software Foundation version 2.
9 *
10 * This program is distributed "as is" WITHOUT ANY WARRANTY of any
11 * kind, whether express or implied; without even the implied warranty
12 * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
14 */
15
16#ifndef __ARCH_ARM_MACH_OMAP2_PRM33XX_H
17#define __ARCH_ARM_MACH_OMAP2_PRM33XX_H
18
19#include "prcm-common.h"
20#include "prm.h"
21
22#define AM33XX_PRM_BASE 0x44E00000
23
24#define AM33XX_PRM_REGADDR(inst, reg) \
25 AM33XX_L4_WK_IO_ADDRESS(AM33XX_PRM_BASE + (inst) + (reg))
26
27
28/* PRM instances */
29#define AM33XX_PRM_OCP_SOCKET_MOD 0x0B00
30#define AM33XX_PRM_PER_MOD 0x0C00
31#define AM33XX_PRM_WKUP_MOD 0x0D00
32#define AM33XX_PRM_MPU_MOD 0x0E00
33#define AM33XX_PRM_DEVICE_MOD 0x0F00
34#define AM33XX_PRM_RTC_MOD 0x1000
35#define AM33XX_PRM_GFX_MOD 0x1100
36#define AM33XX_PRM_CEFUSE_MOD 0x1200
37
38/* PRM */
39
40/* PRM.OCP_SOCKET_PRM register offsets */
41#define AM33XX_REVISION_PRM_OFFSET 0x0000
42#define AM33XX_REVISION_PRM AM33XX_PRM_REGADDR(AM33XX_PRM_OCP_SOCKET_MOD, 0x0000)
43#define AM33XX_PRM_IRQSTATUS_MPU_OFFSET 0x0004
44#define AM33XX_PRM_IRQSTATUS_MPU AM33XX_PRM_REGADDR(AM33XX_PRM_OCP_SOCKET_MOD, 0x0004)
45#define AM33XX_PRM_IRQENABLE_MPU_OFFSET 0x0008
46#define AM33XX_PRM_IRQENABLE_MPU AM33XX_PRM_REGADDR(AM33XX_PRM_OCP_SOCKET_MOD, 0x0008)
47#define AM33XX_PRM_IRQSTATUS_M3_OFFSET 0x000c
48#define AM33XX_PRM_IRQSTATUS_M3 AM33XX_PRM_REGADDR(AM33XX_PRM_OCP_SOCKET_MOD, 0x000c)
49#define AM33XX_PRM_IRQENABLE_M3_OFFSET 0x0010
50#define AM33XX_PRM_IRQENABLE_M3 AM33XX_PRM_REGADDR(AM33XX_PRM_OCP_SOCKET_MOD, 0x0010)
51
52/* PRM.PER_PRM register offsets */
53#define AM33XX_RM_PER_RSTCTRL_OFFSET 0x0000
54#define AM33XX_RM_PER_RSTCTRL AM33XX_PRM_REGADDR(AM33XX_PRM_PER_MOD, 0x0000)
55#define AM33XX_RM_PER_RSTST_OFFSET 0x0004
56#define AM33XX_RM_PER_RSTST AM33XX_PRM_REGADDR(AM33XX_PRM_PER_MOD, 0x0004)
57#define AM33XX_PM_PER_PWRSTST_OFFSET 0x0008
58#define AM33XX_PM_PER_PWRSTST AM33XX_PRM_REGADDR(AM33XX_PRM_PER_MOD, 0x0008)
59#define AM33XX_PM_PER_PWRSTCTRL_OFFSET 0x000c
60#define AM33XX_PM_PER_PWRSTCTRL AM33XX_PRM_REGADDR(AM33XX_PRM_PER_MOD, 0x000c)
61
62/* PRM.WKUP_PRM register offsets */
63#define AM33XX_RM_WKUP_RSTCTRL_OFFSET 0x0000
64#define AM33XX_RM_WKUP_RSTCTRL AM33XX_PRM_REGADDR(AM33XX_PRM_WKUP_MOD, 0x0000)
65#define AM33XX_PM_WKUP_PWRSTCTRL_OFFSET 0x0004
66#define AM33XX_PM_WKUP_PWRSTCTRL AM33XX_PRM_REGADDR(AM33XX_PRM_WKUP_MOD, 0x0004)
67#define AM33XX_PM_WKUP_PWRSTST_OFFSET 0x0008
68#define AM33XX_PM_WKUP_PWRSTST AM33XX_PRM_REGADDR(AM33XX_PRM_WKUP_MOD, 0x0008)
69#define AM33XX_RM_WKUP_RSTST_OFFSET 0x000c
70#define AM33XX_RM_WKUP_RSTST AM33XX_PRM_REGADDR(AM33XX_PRM_WKUP_MOD, 0x000c)
71
72/* PRM.MPU_PRM register offsets */
73#define AM33XX_PM_MPU_PWRSTCTRL_OFFSET 0x0000
74#define AM33XX_PM_MPU_PWRSTCTRL AM33XX_PRM_REGADDR(AM33XX_PRM_MPU_MOD, 0x0000)
75#define AM33XX_PM_MPU_PWRSTST_OFFSET 0x0004
76#define AM33XX_PM_MPU_PWRSTST AM33XX_PRM_REGADDR(AM33XX_PRM_MPU_MOD, 0x0004)
77#define AM33XX_RM_MPU_RSTST_OFFSET 0x0008
78#define AM33XX_RM_MPU_RSTST AM33XX_PRM_REGADDR(AM33XX_PRM_MPU_MOD, 0x0008)
79
80/* PRM.DEVICE_PRM register offsets */
81#define AM33XX_PRM_RSTCTRL_OFFSET 0x0000
82#define AM33XX_PRM_RSTCTRL AM33XX_PRM_REGADDR(AM33XX_PRM_DEVICE_MOD, 0x0000)
83#define AM33XX_PRM_RSTTIME_OFFSET 0x0004
84#define AM33XX_PRM_RSTTIME AM33XX_PRM_REGADDR(AM33XX_PRM_DEVICE_MOD, 0x0004)
85#define AM33XX_PRM_RSTST_OFFSET 0x0008
86#define AM33XX_PRM_RSTST AM33XX_PRM_REGADDR(AM33XX_PRM_DEVICE_MOD, 0x0008)
87#define AM33XX_PRM_SRAM_COUNT_OFFSET 0x000c
88#define AM33XX_PRM_SRAM_COUNT AM33XX_PRM_REGADDR(AM33XX_PRM_DEVICE_MOD, 0x000c)
89#define AM33XX_PRM_LDO_SRAM_CORE_SETUP_OFFSET 0x0010
90#define AM33XX_PRM_LDO_SRAM_CORE_SETUP AM33XX_PRM_REGADDR(AM33XX_PRM_DEVICE_MOD, 0x0010)
91#define AM33XX_PRM_LDO_SRAM_CORE_CTRL_OFFSET 0x0014
92#define AM33XX_PRM_LDO_SRAM_CORE_CTRL AM33XX_PRM_REGADDR(AM33XX_PRM_DEVICE_MOD, 0x0014)
93#define AM33XX_PRM_LDO_SRAM_MPU_SETUP_OFFSET 0x0018
94#define AM33XX_PRM_LDO_SRAM_MPU_SETUP AM33XX_PRM_REGADDR(AM33XX_PRM_DEVICE_MOD, 0x0018)
95#define AM33XX_PRM_LDO_SRAM_MPU_CTRL_OFFSET 0x001c
96#define AM33XX_PRM_LDO_SRAM_MPU_CTRL AM33XX_PRM_REGADDR(AM33XX_PRM_DEVICE_MOD, 0x001c)
97
98/* PRM.RTC_PRM register offsets */
99#define AM33XX_PM_RTC_PWRSTCTRL_OFFSET 0x0000
100#define AM33XX_PM_RTC_PWRSTCTRL AM33XX_PRM_REGADDR(AM33XX_PRM_RTC_MOD, 0x0000)
101#define AM33XX_PM_RTC_PWRSTST_OFFSET 0x0004
102#define AM33XX_PM_RTC_PWRSTST AM33XX_PRM_REGADDR(AM33XX_PRM_RTC_MOD, 0x0004)
103
104/* PRM.GFX_PRM register offsets */
105#define AM33XX_PM_GFX_PWRSTCTRL_OFFSET 0x0000
106#define AM33XX_PM_GFX_PWRSTCTRL AM33XX_PRM_REGADDR(AM33XX_PRM_GFX_MOD, 0x0000)
107#define AM33XX_RM_GFX_RSTCTRL_OFFSET 0x0004
108#define AM33XX_RM_GFX_RSTCTRL AM33XX_PRM_REGADDR(AM33XX_PRM_GFX_MOD, 0x0004)
109#define AM33XX_PM_GFX_PWRSTST_OFFSET 0x0010
110#define AM33XX_PM_GFX_PWRSTST AM33XX_PRM_REGADDR(AM33XX_PRM_GFX_MOD, 0x0010)
111#define AM33XX_RM_GFX_RSTST_OFFSET 0x0014
112#define AM33XX_RM_GFX_RSTST AM33XX_PRM_REGADDR(AM33XX_PRM_GFX_MOD, 0x0014)
113
114/* PRM.CEFUSE_PRM register offsets */
115#define AM33XX_PM_CEFUSE_PWRSTCTRL_OFFSET 0x0000
116#define AM33XX_PM_CEFUSE_PWRSTCTRL AM33XX_PRM_REGADDR(AM33XX_PRM_CEFUSE_MOD, 0x0000)
117#define AM33XX_PM_CEFUSE_PWRSTST_OFFSET 0x0004
118#define AM33XX_PM_CEFUSE_PWRSTST AM33XX_PRM_REGADDR(AM33XX_PRM_CEFUSE_MOD, 0x0004)
119
Vaibhav Bedia1a7cb4d2013-01-29 16:45:01 +0530[diff] [blame]120#ifndef __ASSEMBLER__
Tero Kristod9bbe842014-10-27 08:39:24 -0700[diff] [blame]121int am33xx_prm_init(void);
122
Vaibhav Bedia1a7cb4d2013-01-29 16:45:01 +0530[diff] [blame]123#endif /* ASSEMBLER */
Vaibhav Hiremathddd04b92012-06-18 00:47:26 -0600[diff] [blame]124#endif