David Brownell | 1d6432f | 2006-01-08 13:34:22 -0800 | [diff] [blame] | 1 | /* |
| 2 | * Atmel AT45xxx DataFlash MTD driver for lightweight SPI framework |
| 3 | * |
| 4 | * Largely derived from at91_dataflash.c: |
| 5 | * Copyright (C) 2003-2005 SAN People (Pty) Ltd |
| 6 | * |
| 7 | * This program is free software; you can redistribute it and/or |
| 8 | * modify it under the terms of the GNU General Public License |
| 9 | * as published by the Free Software Foundation; either version |
| 10 | * 2 of the License, or (at your option) any later version. |
| 11 | */ |
David Brownell | 1d6432f | 2006-01-08 13:34:22 -0800 | [diff] [blame] | 12 | #include <linux/module.h> |
| 13 | #include <linux/init.h> |
| 14 | #include <linux/slab.h> |
| 15 | #include <linux/delay.h> |
| 16 | #include <linux/device.h> |
| 17 | #include <linux/spi/spi.h> |
| 18 | #include <linux/spi/flash.h> |
| 19 | |
| 20 | #include <linux/mtd/mtd.h> |
| 21 | #include <linux/mtd/partitions.h> |
| 22 | |
| 23 | |
| 24 | /* |
| 25 | * DataFlash is a kind of SPI flash. Most AT45 chips have two buffers in |
| 26 | * each chip, which may be used for double buffered I/O; but this driver |
| 27 | * doesn't (yet) use these for any kind of i/o overlap or prefetching. |
| 28 | * |
| 29 | * Sometimes DataFlash is packaged in MMC-format cards, although the |
| 30 | * MMC stack can't use SPI (yet), or distinguish between MMC and DataFlash |
| 31 | * protocols during enumeration. |
| 32 | */ |
| 33 | |
| 34 | #define CONFIG_DATAFLASH_WRITE_VERIFY |
| 35 | |
| 36 | /* reads can bypass the buffers */ |
| 37 | #define OP_READ_CONTINUOUS 0xE8 |
| 38 | #define OP_READ_PAGE 0xD2 |
| 39 | |
| 40 | /* group B requests can run even while status reports "busy" */ |
| 41 | #define OP_READ_STATUS 0xD7 /* group B */ |
| 42 | |
| 43 | /* move data between host and buffer */ |
| 44 | #define OP_READ_BUFFER1 0xD4 /* group B */ |
| 45 | #define OP_READ_BUFFER2 0xD6 /* group B */ |
| 46 | #define OP_WRITE_BUFFER1 0x84 /* group B */ |
| 47 | #define OP_WRITE_BUFFER2 0x87 /* group B */ |
| 48 | |
| 49 | /* erasing flash */ |
| 50 | #define OP_ERASE_PAGE 0x81 |
| 51 | #define OP_ERASE_BLOCK 0x50 |
| 52 | |
| 53 | /* move data between buffer and flash */ |
| 54 | #define OP_TRANSFER_BUF1 0x53 |
| 55 | #define OP_TRANSFER_BUF2 0x55 |
| 56 | #define OP_MREAD_BUFFER1 0xD4 |
| 57 | #define OP_MREAD_BUFFER2 0xD6 |
| 58 | #define OP_MWERASE_BUFFER1 0x83 |
| 59 | #define OP_MWERASE_BUFFER2 0x86 |
| 60 | #define OP_MWRITE_BUFFER1 0x88 /* sector must be pre-erased */ |
| 61 | #define OP_MWRITE_BUFFER2 0x89 /* sector must be pre-erased */ |
| 62 | |
| 63 | /* write to buffer, then write-erase to flash */ |
| 64 | #define OP_PROGRAM_VIA_BUF1 0x82 |
| 65 | #define OP_PROGRAM_VIA_BUF2 0x85 |
| 66 | |
| 67 | /* compare buffer to flash */ |
| 68 | #define OP_COMPARE_BUF1 0x60 |
| 69 | #define OP_COMPARE_BUF2 0x61 |
| 70 | |
| 71 | /* read flash to buffer, then write-erase to flash */ |
| 72 | #define OP_REWRITE_VIA_BUF1 0x58 |
| 73 | #define OP_REWRITE_VIA_BUF2 0x59 |
| 74 | |
| 75 | /* newer chips report JEDEC manufacturer and device IDs; chip |
| 76 | * serial number and OTP bits; and per-sector writeprotect. |
| 77 | */ |
| 78 | #define OP_READ_ID 0x9F |
| 79 | #define OP_READ_SECURITY 0x77 |
| 80 | #define OP_WRITE_SECURITY 0x9A /* OTP bits */ |
| 81 | |
| 82 | |
| 83 | struct dataflash { |
| 84 | u8 command[4]; |
| 85 | char name[24]; |
| 86 | |
| 87 | unsigned partitioned:1; |
| 88 | |
| 89 | unsigned short page_offset; /* offset in flash address */ |
| 90 | unsigned int page_size; /* of bytes per page */ |
| 91 | |
| 92 | struct semaphore lock; |
| 93 | struct spi_device *spi; |
| 94 | |
| 95 | struct mtd_info mtd; |
| 96 | }; |
| 97 | |
| 98 | #ifdef CONFIG_MTD_PARTITIONS |
| 99 | #define mtd_has_partitions() (1) |
| 100 | #else |
| 101 | #define mtd_has_partitions() (0) |
| 102 | #endif |
| 103 | |
| 104 | /* ......................................................................... */ |
| 105 | |
| 106 | /* |
| 107 | * Return the status of the DataFlash device. |
| 108 | */ |
| 109 | static inline int dataflash_status(struct spi_device *spi) |
| 110 | { |
| 111 | /* NOTE: at45db321c over 25 MHz wants to write |
| 112 | * a dummy byte after the opcode... |
| 113 | */ |
| 114 | return spi_w8r8(spi, OP_READ_STATUS); |
| 115 | } |
| 116 | |
| 117 | /* |
| 118 | * Poll the DataFlash device until it is READY. |
| 119 | * This usually takes 5-20 msec or so; more for sector erase. |
| 120 | */ |
| 121 | static int dataflash_waitready(struct spi_device *spi) |
| 122 | { |
| 123 | int status; |
| 124 | |
| 125 | for (;;) { |
| 126 | status = dataflash_status(spi); |
| 127 | if (status < 0) { |
| 128 | DEBUG(MTD_DEBUG_LEVEL1, "%s: status %d?\n", |
| 129 | spi->dev.bus_id, status); |
| 130 | status = 0; |
| 131 | } |
| 132 | |
| 133 | if (status & (1 << 7)) /* RDY/nBSY */ |
| 134 | return status; |
| 135 | |
| 136 | msleep(3); |
| 137 | } |
| 138 | } |
| 139 | |
| 140 | /* ......................................................................... */ |
| 141 | |
| 142 | /* |
| 143 | * Erase pages of flash. |
| 144 | */ |
| 145 | static int dataflash_erase(struct mtd_info *mtd, struct erase_info *instr) |
| 146 | { |
| 147 | struct dataflash *priv = (struct dataflash *)mtd->priv; |
| 148 | struct spi_device *spi = priv->spi; |
Vitaly Wool | 8275c64 | 2006-01-08 13:34:28 -0800 | [diff] [blame] | 149 | struct spi_transfer x = { .tx_dma = 0, }; |
David Brownell | 1d6432f | 2006-01-08 13:34:22 -0800 | [diff] [blame] | 150 | struct spi_message msg; |
| 151 | unsigned blocksize = priv->page_size << 3; |
| 152 | u8 *command; |
| 153 | |
| 154 | DEBUG(MTD_DEBUG_LEVEL2, "%s: erase addr=0x%x len 0x%x\n", |
| 155 | spi->dev.bus_id, |
| 156 | instr->addr, instr->len); |
| 157 | |
| 158 | /* Sanity checks */ |
| 159 | if ((instr->addr + instr->len) > mtd->size |
| 160 | || (instr->len % priv->page_size) != 0 |
| 161 | || (instr->addr % priv->page_size) != 0) |
| 162 | return -EINVAL; |
| 163 | |
Vitaly Wool | 8275c64 | 2006-01-08 13:34:28 -0800 | [diff] [blame] | 164 | spi_message_init(&msg); |
| 165 | |
| 166 | x.tx_buf = command = priv->command; |
| 167 | x.len = 4; |
| 168 | spi_message_add_tail(&x, &msg); |
David Brownell | 1d6432f | 2006-01-08 13:34:22 -0800 | [diff] [blame] | 169 | |
| 170 | down(&priv->lock); |
| 171 | while (instr->len > 0) { |
| 172 | unsigned int pageaddr; |
| 173 | int status; |
| 174 | int do_block; |
| 175 | |
| 176 | /* Calculate flash page address; use block erase (for speed) if |
| 177 | * we're at a block boundary and need to erase the whole block. |
| 178 | */ |
| 179 | pageaddr = instr->addr / priv->page_size; |
David Brownell | 3cb4f09 | 2006-03-13 21:20:40 -0800 | [diff] [blame] | 180 | do_block = (pageaddr & 0x7) == 0 && instr->len >= blocksize; |
David Brownell | 1d6432f | 2006-01-08 13:34:22 -0800 | [diff] [blame] | 181 | pageaddr = pageaddr << priv->page_offset; |
| 182 | |
| 183 | command[0] = do_block ? OP_ERASE_BLOCK : OP_ERASE_PAGE; |
| 184 | command[1] = (u8)(pageaddr >> 16); |
| 185 | command[2] = (u8)(pageaddr >> 8); |
| 186 | command[3] = 0; |
| 187 | |
| 188 | DEBUG(MTD_DEBUG_LEVEL3, "ERASE %s: (%x) %x %x %x [%i]\n", |
| 189 | do_block ? "block" : "page", |
| 190 | command[0], command[1], command[2], command[3], |
| 191 | pageaddr); |
| 192 | |
| 193 | status = spi_sync(spi, &msg); |
| 194 | (void) dataflash_waitready(spi); |
| 195 | |
| 196 | if (status < 0) { |
| 197 | printk(KERN_ERR "%s: erase %x, err %d\n", |
| 198 | spi->dev.bus_id, pageaddr, status); |
| 199 | /* REVISIT: can retry instr->retries times; or |
| 200 | * giveup and instr->fail_addr = instr->addr; |
| 201 | */ |
| 202 | continue; |
| 203 | } |
| 204 | |
| 205 | if (do_block) { |
| 206 | instr->addr += blocksize; |
| 207 | instr->len -= blocksize; |
| 208 | } else { |
| 209 | instr->addr += priv->page_size; |
| 210 | instr->len -= priv->page_size; |
| 211 | } |
| 212 | } |
| 213 | up(&priv->lock); |
| 214 | |
| 215 | /* Inform MTD subsystem that erase is complete */ |
| 216 | instr->state = MTD_ERASE_DONE; |
| 217 | mtd_erase_callback(instr); |
| 218 | |
| 219 | return 0; |
| 220 | } |
| 221 | |
| 222 | /* |
| 223 | * Read from the DataFlash device. |
| 224 | * from : Start offset in flash device |
| 225 | * len : Amount to read |
| 226 | * retlen : About of data actually read |
| 227 | * buf : Buffer containing the data |
| 228 | */ |
| 229 | static int dataflash_read(struct mtd_info *mtd, loff_t from, size_t len, |
| 230 | size_t *retlen, u_char *buf) |
| 231 | { |
| 232 | struct dataflash *priv = (struct dataflash *)mtd->priv; |
| 233 | struct spi_transfer x[2] = { { .tx_dma = 0, }, }; |
| 234 | struct spi_message msg; |
| 235 | unsigned int addr; |
| 236 | u8 *command; |
| 237 | int status; |
| 238 | |
| 239 | DEBUG(MTD_DEBUG_LEVEL2, "%s: read 0x%x..0x%x\n", |
| 240 | priv->spi->dev.bus_id, (unsigned)from, (unsigned)(from + len)); |
| 241 | |
| 242 | *retlen = 0; |
| 243 | |
| 244 | /* Sanity checks */ |
| 245 | if (!len) |
| 246 | return 0; |
| 247 | if (from + len > mtd->size) |
| 248 | return -EINVAL; |
| 249 | |
| 250 | /* Calculate flash page/byte address */ |
| 251 | addr = (((unsigned)from / priv->page_size) << priv->page_offset) |
| 252 | + ((unsigned)from % priv->page_size); |
| 253 | |
| 254 | command = priv->command; |
| 255 | |
| 256 | DEBUG(MTD_DEBUG_LEVEL3, "READ: (%x) %x %x %x\n", |
| 257 | command[0], command[1], command[2], command[3]); |
| 258 | |
Vitaly Wool | 8275c64 | 2006-01-08 13:34:28 -0800 | [diff] [blame] | 259 | spi_message_init(&msg); |
| 260 | |
David Brownell | 1d6432f | 2006-01-08 13:34:22 -0800 | [diff] [blame] | 261 | x[0].tx_buf = command; |
| 262 | x[0].len = 8; |
Vitaly Wool | 8275c64 | 2006-01-08 13:34:28 -0800 | [diff] [blame] | 263 | spi_message_add_tail(&x[0], &msg); |
| 264 | |
David Brownell | 1d6432f | 2006-01-08 13:34:22 -0800 | [diff] [blame] | 265 | x[1].rx_buf = buf; |
| 266 | x[1].len = len; |
Vitaly Wool | 8275c64 | 2006-01-08 13:34:28 -0800 | [diff] [blame] | 267 | spi_message_add_tail(&x[1], &msg); |
David Brownell | 1d6432f | 2006-01-08 13:34:22 -0800 | [diff] [blame] | 268 | |
| 269 | down(&priv->lock); |
| 270 | |
| 271 | /* Continuous read, max clock = f(car) which may be less than |
| 272 | * the peak rate available. Some chips support commands with |
| 273 | * fewer "don't care" bytes. Both buffers stay unchanged. |
| 274 | */ |
| 275 | command[0] = OP_READ_CONTINUOUS; |
| 276 | command[1] = (u8)(addr >> 16); |
| 277 | command[2] = (u8)(addr >> 8); |
| 278 | command[3] = (u8)(addr >> 0); |
| 279 | /* plus 4 "don't care" bytes */ |
| 280 | |
| 281 | status = spi_sync(priv->spi, &msg); |
| 282 | up(&priv->lock); |
| 283 | |
| 284 | if (status >= 0) { |
| 285 | *retlen = msg.actual_length - 8; |
| 286 | status = 0; |
| 287 | } else |
| 288 | DEBUG(MTD_DEBUG_LEVEL1, "%s: read %x..%x --> %d\n", |
| 289 | priv->spi->dev.bus_id, |
| 290 | (unsigned)from, (unsigned)(from + len), |
| 291 | status); |
| 292 | return status; |
| 293 | } |
| 294 | |
| 295 | /* |
| 296 | * Write to the DataFlash device. |
| 297 | * to : Start offset in flash device |
| 298 | * len : Amount to write |
| 299 | * retlen : Amount of data actually written |
| 300 | * buf : Buffer containing the data |
| 301 | */ |
| 302 | static int dataflash_write(struct mtd_info *mtd, loff_t to, size_t len, |
| 303 | size_t * retlen, const u_char * buf) |
| 304 | { |
| 305 | struct dataflash *priv = (struct dataflash *)mtd->priv; |
| 306 | struct spi_device *spi = priv->spi; |
| 307 | struct spi_transfer x[2] = { { .tx_dma = 0, }, }; |
| 308 | struct spi_message msg; |
| 309 | unsigned int pageaddr, addr, offset, writelen; |
| 310 | size_t remaining = len; |
| 311 | u_char *writebuf = (u_char *) buf; |
| 312 | int status = -EINVAL; |
| 313 | u8 *command; |
| 314 | |
| 315 | DEBUG(MTD_DEBUG_LEVEL2, "%s: write 0x%x..0x%x\n", |
| 316 | spi->dev.bus_id, (unsigned)to, (unsigned)(to + len)); |
| 317 | |
| 318 | *retlen = 0; |
| 319 | |
| 320 | /* Sanity checks */ |
| 321 | if (!len) |
| 322 | return 0; |
| 323 | if ((to + len) > mtd->size) |
| 324 | return -EINVAL; |
| 325 | |
Vitaly Wool | 8275c64 | 2006-01-08 13:34:28 -0800 | [diff] [blame] | 326 | spi_message_init(&msg); |
| 327 | |
David Brownell | 1d6432f | 2006-01-08 13:34:22 -0800 | [diff] [blame] | 328 | x[0].tx_buf = command = priv->command; |
| 329 | x[0].len = 4; |
Vitaly Wool | 8275c64 | 2006-01-08 13:34:28 -0800 | [diff] [blame] | 330 | spi_message_add_tail(&x[0], &msg); |
David Brownell | 1d6432f | 2006-01-08 13:34:22 -0800 | [diff] [blame] | 331 | |
| 332 | pageaddr = ((unsigned)to / priv->page_size); |
| 333 | offset = ((unsigned)to % priv->page_size); |
| 334 | if (offset + len > priv->page_size) |
| 335 | writelen = priv->page_size - offset; |
| 336 | else |
| 337 | writelen = len; |
| 338 | |
| 339 | down(&priv->lock); |
| 340 | while (remaining > 0) { |
| 341 | DEBUG(MTD_DEBUG_LEVEL3, "write @ %i:%i len=%i\n", |
| 342 | pageaddr, offset, writelen); |
| 343 | |
| 344 | /* REVISIT: |
| 345 | * (a) each page in a sector must be rewritten at least |
| 346 | * once every 10K sibling erase/program operations. |
| 347 | * (b) for pages that are already erased, we could |
| 348 | * use WRITE+MWRITE not PROGRAM for ~30% speedup. |
| 349 | * (c) WRITE to buffer could be done while waiting for |
| 350 | * a previous MWRITE/MWERASE to complete ... |
| 351 | * (d) error handling here seems to be mostly missing. |
| 352 | * |
| 353 | * Two persistent bits per page, plus a per-sector counter, |
| 354 | * could support (a) and (b) ... we might consider using |
| 355 | * the second half of sector zero, which is just one block, |
| 356 | * to track that state. (On AT91, that sector should also |
| 357 | * support boot-from-DataFlash.) |
| 358 | */ |
| 359 | |
| 360 | addr = pageaddr << priv->page_offset; |
| 361 | |
| 362 | /* (1) Maybe transfer partial page to Buffer1 */ |
| 363 | if (writelen != priv->page_size) { |
| 364 | command[0] = OP_TRANSFER_BUF1; |
| 365 | command[1] = (addr & 0x00FF0000) >> 16; |
| 366 | command[2] = (addr & 0x0000FF00) >> 8; |
| 367 | command[3] = 0; |
| 368 | |
| 369 | DEBUG(MTD_DEBUG_LEVEL3, "TRANSFER: (%x) %x %x %x\n", |
| 370 | command[0], command[1], command[2], command[3]); |
| 371 | |
David Brownell | 1d6432f | 2006-01-08 13:34:22 -0800 | [diff] [blame] | 372 | status = spi_sync(spi, &msg); |
| 373 | if (status < 0) |
| 374 | DEBUG(MTD_DEBUG_LEVEL1, "%s: xfer %u -> %d \n", |
| 375 | spi->dev.bus_id, addr, status); |
| 376 | |
| 377 | (void) dataflash_waitready(priv->spi); |
| 378 | } |
| 379 | |
| 380 | /* (2) Program full page via Buffer1 */ |
| 381 | addr += offset; |
| 382 | command[0] = OP_PROGRAM_VIA_BUF1; |
| 383 | command[1] = (addr & 0x00FF0000) >> 16; |
| 384 | command[2] = (addr & 0x0000FF00) >> 8; |
| 385 | command[3] = (addr & 0x000000FF); |
| 386 | |
| 387 | DEBUG(MTD_DEBUG_LEVEL3, "PROGRAM: (%x) %x %x %x\n", |
| 388 | command[0], command[1], command[2], command[3]); |
| 389 | |
| 390 | x[1].tx_buf = writebuf; |
| 391 | x[1].len = writelen; |
Vitaly Wool | 8275c64 | 2006-01-08 13:34:28 -0800 | [diff] [blame] | 392 | spi_message_add_tail(x + 1, &msg); |
David Brownell | 1d6432f | 2006-01-08 13:34:22 -0800 | [diff] [blame] | 393 | status = spi_sync(spi, &msg); |
Vitaly Wool | 8275c64 | 2006-01-08 13:34:28 -0800 | [diff] [blame] | 394 | spi_transfer_del(x + 1); |
David Brownell | 1d6432f | 2006-01-08 13:34:22 -0800 | [diff] [blame] | 395 | if (status < 0) |
| 396 | DEBUG(MTD_DEBUG_LEVEL1, "%s: pgm %u/%u -> %d \n", |
| 397 | spi->dev.bus_id, addr, writelen, status); |
| 398 | |
| 399 | (void) dataflash_waitready(priv->spi); |
| 400 | |
Vitaly Wool | 8275c64 | 2006-01-08 13:34:28 -0800 | [diff] [blame] | 401 | |
David Brownell | 1d6432f | 2006-01-08 13:34:22 -0800 | [diff] [blame] | 402 | #ifdef CONFIG_DATAFLASH_WRITE_VERIFY |
| 403 | |
| 404 | /* (3) Compare to Buffer1 */ |
| 405 | addr = pageaddr << priv->page_offset; |
| 406 | command[0] = OP_COMPARE_BUF1; |
| 407 | command[1] = (addr & 0x00FF0000) >> 16; |
| 408 | command[2] = (addr & 0x0000FF00) >> 8; |
| 409 | command[3] = 0; |
| 410 | |
| 411 | DEBUG(MTD_DEBUG_LEVEL3, "COMPARE: (%x) %x %x %x\n", |
| 412 | command[0], command[1], command[2], command[3]); |
| 413 | |
David Brownell | 1d6432f | 2006-01-08 13:34:22 -0800 | [diff] [blame] | 414 | status = spi_sync(spi, &msg); |
| 415 | if (status < 0) |
| 416 | DEBUG(MTD_DEBUG_LEVEL1, "%s: compare %u -> %d \n", |
| 417 | spi->dev.bus_id, addr, status); |
| 418 | |
| 419 | status = dataflash_waitready(priv->spi); |
| 420 | |
| 421 | /* Check result of the compare operation */ |
| 422 | if ((status & (1 << 6)) == 1) { |
| 423 | printk(KERN_ERR "%s: compare page %u, err %d\n", |
| 424 | spi->dev.bus_id, pageaddr, status); |
| 425 | remaining = 0; |
| 426 | status = -EIO; |
| 427 | break; |
| 428 | } else |
| 429 | status = 0; |
| 430 | |
| 431 | #endif /* CONFIG_DATAFLASH_WRITE_VERIFY */ |
| 432 | |
| 433 | remaining = remaining - writelen; |
| 434 | pageaddr++; |
| 435 | offset = 0; |
| 436 | writebuf += writelen; |
| 437 | *retlen += writelen; |
| 438 | |
| 439 | if (remaining > priv->page_size) |
| 440 | writelen = priv->page_size; |
| 441 | else |
| 442 | writelen = remaining; |
| 443 | } |
| 444 | up(&priv->lock); |
| 445 | |
| 446 | return status; |
| 447 | } |
| 448 | |
| 449 | /* ......................................................................... */ |
| 450 | |
| 451 | /* |
| 452 | * Register DataFlash device with MTD subsystem. |
| 453 | */ |
| 454 | static int __devinit |
| 455 | add_dataflash(struct spi_device *spi, char *name, |
| 456 | int nr_pages, int pagesize, int pageoffset) |
| 457 | { |
| 458 | struct dataflash *priv; |
| 459 | struct mtd_info *device; |
| 460 | struct flash_platform_data *pdata = spi->dev.platform_data; |
| 461 | |
Robert P. J. Day | 5cbded5 | 2006-12-13 00:35:56 -0800 | [diff] [blame^] | 462 | priv = kzalloc(sizeof *priv, GFP_KERNEL); |
David Brownell | 1d6432f | 2006-01-08 13:34:22 -0800 | [diff] [blame] | 463 | if (!priv) |
| 464 | return -ENOMEM; |
| 465 | |
| 466 | init_MUTEX(&priv->lock); |
| 467 | priv->spi = spi; |
| 468 | priv->page_size = pagesize; |
| 469 | priv->page_offset = pageoffset; |
| 470 | |
| 471 | /* name must be usable with cmdlinepart */ |
| 472 | sprintf(priv->name, "spi%d.%d-%s", |
| 473 | spi->master->bus_num, spi->chip_select, |
| 474 | name); |
| 475 | |
| 476 | device = &priv->mtd; |
| 477 | device->name = (pdata && pdata->name) ? pdata->name : priv->name; |
| 478 | device->size = nr_pages * pagesize; |
| 479 | device->erasesize = pagesize; |
Artem B. Bityutskiy | 17ffc7b | 2006-06-22 18:15:48 +0400 | [diff] [blame] | 480 | device->writesize = pagesize; |
David Brownell | 1d6432f | 2006-01-08 13:34:22 -0800 | [diff] [blame] | 481 | device->owner = THIS_MODULE; |
| 482 | device->type = MTD_DATAFLASH; |
| 483 | device->flags = MTD_CAP_NORFLASH; |
| 484 | device->erase = dataflash_erase; |
| 485 | device->read = dataflash_read; |
| 486 | device->write = dataflash_write; |
| 487 | device->priv = priv; |
| 488 | |
| 489 | dev_info(&spi->dev, "%s (%d KBytes)\n", name, device->size/1024); |
| 490 | dev_set_drvdata(&spi->dev, priv); |
| 491 | |
| 492 | if (mtd_has_partitions()) { |
| 493 | struct mtd_partition *parts; |
| 494 | int nr_parts = 0; |
| 495 | |
| 496 | #ifdef CONFIG_MTD_CMDLINE_PARTS |
| 497 | static const char *part_probes[] = { "cmdlinepart", NULL, }; |
| 498 | |
| 499 | nr_parts = parse_mtd_partitions(device, part_probes, &parts, 0); |
| 500 | #endif |
| 501 | |
| 502 | if (nr_parts <= 0 && pdata && pdata->parts) { |
| 503 | parts = pdata->parts; |
| 504 | nr_parts = pdata->nr_parts; |
| 505 | } |
| 506 | |
| 507 | if (nr_parts > 0) { |
| 508 | priv->partitioned = 1; |
| 509 | return add_mtd_partitions(device, parts, nr_parts); |
| 510 | } |
David Brownell | 7111763 | 2006-01-08 13:34:29 -0800 | [diff] [blame] | 511 | } else if (pdata && pdata->nr_parts) |
David Brownell | 1d6432f | 2006-01-08 13:34:22 -0800 | [diff] [blame] | 512 | dev_warn(&spi->dev, "ignoring %d default partitions on %s\n", |
| 513 | pdata->nr_parts, device->name); |
| 514 | |
| 515 | return add_mtd_device(device) == 1 ? -ENODEV : 0; |
| 516 | } |
| 517 | |
| 518 | /* |
| 519 | * Detect and initialize DataFlash device: |
| 520 | * |
| 521 | * Device Density ID code #Pages PageSize Offset |
| 522 | * AT45DB011B 1Mbit (128K) xx0011xx (0x0c) 512 264 9 |
| 523 | * AT45DB021B 2Mbit (256K) xx0101xx (0x14) 1025 264 9 |
| 524 | * AT45DB041B 4Mbit (512K) xx0111xx (0x1c) 2048 264 9 |
| 525 | * AT45DB081B 8Mbit (1M) xx1001xx (0x24) 4096 264 9 |
| 526 | * AT45DB0161B 16Mbit (2M) xx1011xx (0x2c) 4096 528 10 |
| 527 | * AT45DB0321B 32Mbit (4M) xx1101xx (0x34) 8192 528 10 |
| 528 | * AT45DB0642 64Mbit (8M) xx111xxx (0x3c) 8192 1056 11 |
| 529 | * AT45DB1282 128Mbit (16M) xx0100xx (0x10) 16384 1056 11 |
| 530 | */ |
| 531 | static int __devinit dataflash_probe(struct spi_device *spi) |
| 532 | { |
| 533 | int status; |
| 534 | |
| 535 | status = dataflash_status(spi); |
| 536 | if (status <= 0 || status == 0xff) { |
| 537 | DEBUG(MTD_DEBUG_LEVEL1, "%s: status error %d\n", |
| 538 | spi->dev.bus_id, status); |
| 539 | if (status == 0xff) |
| 540 | status = -ENODEV; |
| 541 | return status; |
| 542 | } |
| 543 | |
| 544 | /* if there's a device there, assume it's dataflash. |
| 545 | * board setup should have set spi->max_speed_max to |
| 546 | * match f(car) for continuous reads, mode 0 or 3. |
| 547 | */ |
| 548 | switch (status & 0x3c) { |
| 549 | case 0x0c: /* 0 0 1 1 x x */ |
| 550 | status = add_dataflash(spi, "AT45DB011B", 512, 264, 9); |
| 551 | break; |
| 552 | case 0x14: /* 0 1 0 1 x x */ |
| 553 | status = add_dataflash(spi, "AT45DB021B", 1025, 264, 9); |
| 554 | break; |
| 555 | case 0x1c: /* 0 1 1 1 x x */ |
| 556 | status = add_dataflash(spi, "AT45DB041x", 2048, 264, 9); |
| 557 | break; |
| 558 | case 0x24: /* 1 0 0 1 x x */ |
| 559 | status = add_dataflash(spi, "AT45DB081B", 4096, 264, 9); |
| 560 | break; |
| 561 | case 0x2c: /* 1 0 1 1 x x */ |
| 562 | status = add_dataflash(spi, "AT45DB161x", 4096, 528, 10); |
| 563 | break; |
| 564 | case 0x34: /* 1 1 0 1 x x */ |
| 565 | status = add_dataflash(spi, "AT45DB321x", 8192, 528, 10); |
| 566 | break; |
| 567 | case 0x38: /* 1 1 1 x x x */ |
| 568 | case 0x3c: |
| 569 | status = add_dataflash(spi, "AT45DB642x", 8192, 1056, 11); |
| 570 | break; |
| 571 | /* obsolete AT45DB1282 not (yet?) supported */ |
| 572 | default: |
| 573 | DEBUG(MTD_DEBUG_LEVEL1, "%s: unsupported device (%x)\n", |
| 574 | spi->dev.bus_id, status & 0x3c); |
| 575 | status = -ENODEV; |
| 576 | } |
| 577 | |
| 578 | if (status < 0) |
| 579 | DEBUG(MTD_DEBUG_LEVEL1, "%s: add_dataflash --> %d\n", |
| 580 | spi->dev.bus_id, status); |
| 581 | |
| 582 | return status; |
| 583 | } |
| 584 | |
| 585 | static int __devexit dataflash_remove(struct spi_device *spi) |
| 586 | { |
| 587 | struct dataflash *flash = dev_get_drvdata(&spi->dev); |
| 588 | int status; |
| 589 | |
| 590 | DEBUG(MTD_DEBUG_LEVEL1, "%s: remove\n", spi->dev.bus_id); |
| 591 | |
| 592 | if (mtd_has_partitions() && flash->partitioned) |
| 593 | status = del_mtd_partitions(&flash->mtd); |
| 594 | else |
| 595 | status = del_mtd_device(&flash->mtd); |
| 596 | if (status == 0) |
| 597 | kfree(flash); |
| 598 | return status; |
| 599 | } |
| 600 | |
| 601 | static struct spi_driver dataflash_driver = { |
| 602 | .driver = { |
| 603 | .name = "mtd_dataflash", |
| 604 | .bus = &spi_bus_type, |
| 605 | .owner = THIS_MODULE, |
| 606 | }, |
| 607 | |
| 608 | .probe = dataflash_probe, |
| 609 | .remove = __devexit_p(dataflash_remove), |
| 610 | |
| 611 | /* FIXME: investigate suspend and resume... */ |
| 612 | }; |
| 613 | |
| 614 | static int __init dataflash_init(void) |
| 615 | { |
| 616 | return spi_register_driver(&dataflash_driver); |
| 617 | } |
| 618 | module_init(dataflash_init); |
| 619 | |
| 620 | static void __exit dataflash_exit(void) |
| 621 | { |
| 622 | spi_unregister_driver(&dataflash_driver); |
| 623 | } |
| 624 | module_exit(dataflash_exit); |
| 625 | |
| 626 | |
| 627 | MODULE_LICENSE("GPL"); |
| 628 | MODULE_AUTHOR("Andrew Victor, David Brownell"); |
| 629 | MODULE_DESCRIPTION("MTD DataFlash driver"); |